discrete-time signal processing lecture 6 (structures for discrete-time systems)

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DISCRETE-TIME SIGNAL PROCESSING LECTURE 6 (STRUCTURES FOR DISCRETE-TIME SYSTEMS) Husheng Li, UTK-EECS, Fall 2012

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Husheng Li, UTK-EECS, Fall 2012. Discrete-time Signal Processing Lecture 6 (Structures for discrete-time systems). Study how to implement the LTI discrete-time systems. We first present the block diagram and signal flow graph. - PowerPoint PPT Presentation

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Page 1: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

DISCRETE-TIME SIGNAL PROCESSINGLECTURE 6 (STRUCTURES FOR DISCRETE-TIME SYSTEMS)

Husheng Li, UTK-EECS, Fall 2012

Page 2: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

PURPOSE OF THIS CHAPTER

Study how to implement the LTI discrete-time systems.

We first present the block diagram and signal flow graph.

Then, we derive a number of basic equivalent structures for implementing a causal LTI.

Page 3: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

BLOCK DIAGRAM REPRESENTATION

The basic blocks include adders, scalars and delay registers.

Page 4: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

BLOCK DIAGRAM

A block diagram can be rearranged or modified without changing the overall system function.

In the left system, the two cascading sub-systems can be reversed while the system function is still the same.

Page 5: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

DIRECT FORMS I AND II

Page 6: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

SIGNAL FLOW GRAPH REPRESENTATION

The graph representation consists of source, sink, intermediate nodes, additions, scalings and delays.

Page 7: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

BASIC STRUCTURE FOR IIR: DIRECT FORMS

Page 8: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

IIR: CASCADING FORM

A variety of theoretically equivalent systems can be obtained by simply pairing the poles and zeros in different ways.

When the computation precision is finite, the performance could be quite different for different realizations.

Page 9: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

IIR: PARALLEL FORM

We can express a rational system as a partial faction expansion and thus obtain the parallel form of an IIR.

Page 10: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

TRANSPOSED FORMS

Transposition of a flow graph is accomplished by reversing the directions of all branches in the network while keeping the branch transmittances as they were and reversing the roles of the input and output.

For SISO systems, the transposition does not change the system function.

Page 11: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

FIR: DIRECT FORM

Direct form

Transposition

Page 12: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

LINEAR-PHASE FIR

M is even

M is odd

Page 13: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

LATTICE FILTERS

The basic building block is called a two-port flow graph. The system is achieved by cascading the blocks.

Page 14: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

FIR LATTICE FILTER

The coefficients of the filters can be determined by the coefficients-to-k-parameters algorithm.

Page 15: Discrete-time Signal Processing Lecture  6  (Structures for discrete-time systems)

ALL-POLE LATTICE STRUCTURE

A lattice structure for the all-pole system can be developed from FIR lattice by realizing that it is the inverse filter of an FIR system.