digital logic design i cpe100: fall 19 homework #5 due tu
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Digital Logic Design I CPE100: Fall 19
Homework #5Due Tu. 10/10
Note: Do not use a calculator or computer to complete the following exercises. You must show allyour work and put a box around your final answer to receive credit. Messy or unreadable submis-sions will receive no credit.
Homework will only be accepted at the beginning of class and all pages must be stapled together.
Total Points: 65
1. (0 points) How long did it take you to complete the homework? This will not affect your grade(unless omitted) but it helps gauge the workload for this and future semesters. If you do notanswer this question you will get -5 points.
2. (15 points) Use factoring to write the following expressions in canonical POS form.
(a) (5 points) Y1 = B. Assume the output is a function of 2 inputs A,B.
(b) (5 points) Y2 = B. Assume the output is a function of 3 inputs A,B,C.
(c) (5 points) Y3 = AB + C. Assume the output is a function of 3 inputs A,B,C.
Solution
Add a “zero” and use T8’ Theorem (B + W )(B + X) = B + WX.
(a)
Y1 = B + AA
= (B + A)(B + A)
= (A + B)(A + B)
(b)
Y2 = (A + B)(A + B)
= ([A + B] + CC)([A + B] + CC)
= (A + B + C)(A + B + C)(A + B + C)(A + B + C)
(c)
Y3 = AB + C
= (A + C)(B + C)
= (A + C + BB)(B + C + AA)
= (A + B + C)(A + B + C)(A + B + C)(A + B + C)
= (A + B + C)(A + B + C)(A + B + C)
3. (10 points) Simplify the following expression. Show your work and list which Axiom or Theo-rem you used in each step. The final equation should be in minimized SOP form.
Y = (A + B)(A + B + D)(B + C + D).
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Digital Logic Design I CPE100: Fall 19
Solution
Y = (A + B)(A + B + D)(B + C + D)
= (B + A(A + D))(B + C + D) Distributivity
= (B + AA + AD))(B + C + D) Distributivity
= (B + AD)(B + C + D) Complements
= B + AD(C + D) Distributivity
= B + ADC + ADD Distributivity
= B + ADC Complements
4. (15 points) Sketch the two-level schematic using a minimum number of gates (without Booleansimplification) for the following SOP equation
Y = ABC + ABC + ABC + ABC.
(a) (5 points) Sketch using only AND, OR, and NOT gates.
(b) (5 points) Sketch using only NAND and NOT gates.
(c) (5 points) Sketch using only NAND gates.
Solution
(a) (b)
(c)
5. (10 points) Sketch the two-level schematic using a minimum number of NOR gates (withoutBoolean simplification) for the following equation
Y = (A + B + C)(A + B + C)(A + B + C)(A + B + C).
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Digital Logic Design I CPE100: Fall 19
Solution
6. (15 points) Use a Karnaugh map to minimize the following functions. Assume Y is the outputand all other variables are inputs and express your final answer in minimized SOP form.
(a) (5 points)
A B C Y
0 0 0 1
0 0 1 0
0 1 0 1
0 1 1 0
1 0 0 1
1 0 1 0
1 1 0 1
1 1 1 1
(b) (5 points)
A B C D Y
0 0 0 0 0
0 0 0 1 0
0 0 1 0 1
0 0 1 1 1
0 1 0 0 1
0 1 0 1 0
0 1 1 0 1
0 1 1 1 1
1 0 0 0 0
1 0 0 1 0
1 0 1 0 1
1 0 1 1 0
1 1 0 0 1
1 1 0 1 0
1 1 1 0 1
1 1 1 1 1
(c) (5 points)
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Digital Logic Design I CPE100: Fall 19
A B C D Y
0 0 0 0 1
0 0 0 1 0
0 0 1 0 1
0 0 1 1 0
0 1 0 0 0
0 1 0 1 0
0 1 1 0 0
0 1 1 1 0
1 0 0 0 1
1 0 0 1 0
1 0 1 0 1
1 0 1 1 0
1 1 0 0 0
1 1 0 1 1
1 1 1 0 0
1 1 1 1 1
Solution
(a) Y = C + AB (b) Y = CD + AC + BC + BD (c) Y = BD + ABD
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