Digital Electronics C.I.T

Q1. What is the sign of operation for the X-OR gate?

Ans: Operation Of X-OR Gate:

IC 7486 Exclusive-ORThis is an example of convenient packaging of X-

OR gates in integrated circuit from.

X-OR gate constructed using only NAND gates

Symbol:

‘Military’ X-OR

symbol ‘Rectangular’ X-OR Symbol

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Digital Electronics C.I.T

Q2. What will be the output of an X-OR gate when both inputs are HIGH?

Ans: Output of an X-OR gate:The X-OR gate (sometimes EOR gate) is a digital logic gate that

implements exclusive disjunction-it behaves according to the truth table to the right. A HIGH output (1) results of one, and only one, of the inputs to the gate is HIGH (1). If both inputs are LOW (0) or both are HIGH (1), a LOW output (0) result.

Q3. A two input X-OR gate will produce a High output when the inputs are at what logic levels?

Ans: Logic Levels:A logic gate performs a logical operation on one or more logic inputs and

produces a single logic output. Because the output is also logic –level value, an output of one logic gates. The logic normally performed is Boolean logic and is most commonly found in digital circuits. Logic gates are primarily implemented electronically using diodes or transistors, but can also be constructed using electromagnetic relays, fluidics, optics, or even mechanical elements.

In electronic logic, a logic level is represented by a voltage or current, (which depends on the type of electronic logic in use). Each logic gate requires power so that it can source and sink currents to archive the correct output voltage. In logic circuit diagrams the power is not shown, but in a full electronic schematic, power connections are required.

The simplest form of electronic logic is diode logic. This allows AND and OR gates to be built, but not inverters, and so is an incomplete form of logic. Further, without some kind of amplification it is not possible to have such basic logic operations cascaded as required for more complex logic functions. To build a complete logic system, values (vacuum tubes) or transistors can be used. The simplest family of logic gates using bipolar transistors is called resistor-transistor logic, or RTL. Unlike diode logic gates, RTL gates can be cascaded indefinitely to produce more complex logic functions. These gates were used in early integrated circuits. For higher speed, the resistors used in RTL were replaced by diodes, leading to diode-transistor logic, DTL. It was then discovered that one transistor could do the job of two diodes in the space of

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Digital Electronics C.I.T

one diode even better, by more quickly switching off the following stage, so transistor-transistor logic, or TTL, was created. In virtually every type of contemporary chip implementation of digital systems, the bipolar transistors (MOSFETs) to reduce size and power consumption still further, there by resulting in complementary metal-oxide-semiconductor (CMOS) logic.

Q4. What type of gate is represented by the output Boolean expression R T (+)?

Ans: A system for inter converting analogue and digital signals In a large number of data channels using supervisory apparatus common to all the channels.

The present invention solves the problem by providing supervisory apparatus common to a number of data channels which of themselves include only relatively inexpensive and readily available logic, register, comparator, and gate components. The supervisory apparatus includes a cycle of operation of the supervisory apparatus a digital-to-analogue conversion and an analogue-to-digital conversion are accomplished in each data channel, of which there may be hundreds. It is thus a principal object of the invention to provide a new and improved data processing system. Another object of the invention is to provide a new and improved multi-channel arrangement for inter converting digital and analogue signals which is economical to build and which has a sampling rate not limited by the number of data channels involved.

Various other objects, advantages, and features of novelty which characterized my invention are pointed out with particularity in the claims annexed hereto and forming a part hereof. However for a better understanding of the invention, its advantages, and objects attained by its use, reference should be made to the drawing which forms a further part hereof, and to the accompanying descriptive matter, in which there is illustrated and described a preferred embodiment of the invention.

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Digital Electronics C.I.T

Q5. What will be the output of an X-NOR gate when both inputs are LOW?

Ans: Output of an X-NOR gate:The NOR gate is a digital logic do not gate that implements logical NOR-it

behaves according to the truth table to the right. A HIGH output (1) results if both the inputs to the gate are LOW (0). If one or both input is HIGH (1), a LOW output (0) results. NOR is the result of the negation of the OR operator, thus forming a complete operation the combination of which can be combined to generate any other it can only change LOW to HIGH but not vice versa.

In most, but not all, circuit implementations, the negation comes from free (e.g. CMOS) – in some logic families (e.g. TTL) it is required and OR has to be implemented as a NOR followed by an inverter. A significant exception is some proms of domino logic.

It is because of their diversity that NOR and NAND gates are used more than any other gates in the processor design. As both of these gates can be used to replicate any other gate they are produced in much higher numbers than other logic gates. This makes them chapter to buy, which another factor is causing them to be the most popular of gates.

Q6. Draw full adder using two half adders?

Ans: Full adder using two half adders:

Half-Adder:The half adder is the simpler of the two types of adders, as it does not

use a carry input from a previous stage. The input consists only of the two binary bits to be added. The outputs are the sum of the two bits and the carry, if any resulting from the addition. As there is no carry input, the half adder may be used only as the least significant adder of an array of adders. The sum and carry outputs are base on the addition table of Figure 1(a). If the addition table is converted to a truth table, the truth table would appear as in Figure 1(b). Co is the carry out put, and S is the sum.

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Digital Electronics C.I.T

A half-adder can be implemented with an exclusive-OR gate and an AND gate as shown in Figure 1.

Figure1 (a): Implementation of a half-adder

Prepare a circuit schematic diagram of the half- Adder. The two inputs will connect to toggle Switches two outputs will connect to LEDs On the logic workstation.

Figure 1(b): Truth table

Full-Adder:The full adder of Figure 3 differs from the half adder in the half adder in

that it has an additional input for the carry-in term from a previous stage. As shown in Figure3 the implementation of the full adder requires two half adders and an OR gate. The first half adder performs the addition if the input bits, while the second half adder sum the result of the addition and the carry input to produce the sum output. The OR gate produces the carry output from the carries of the two half adders. A half-adder can be implemented with two half-adders and one OR gate, as shown in Figure2.

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Inputs Co S

A B

0 0 0 0

0 1 0 1

1 0 0 1

1 1 1 0

Digital Electronics C.I.T

Figure3. Implementation of a full-adder

Prepare a circuit schematic of the full-adder. The three inputs will connect toggle switches and the two outputs will connect to LEDs on the logic workstation.

INPUT OUTPUTA B C SUM CARRY0 0 00 0 10 1 00 1 11 0 01 0 11 1 0

Observation Table for Full Adder

Q7. Why half and full adder is so called?

Ans: Half Adder:A half adder has two inputs, generally labeled A and B, And two outputs,

the sum S and carry C. S is the two-bit X-OR of A and B, and c is the AND of A and B. Essentially the output of a half adder is the sum is the sum of two one-bit numbers, with C being the most significant of two outputs.

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Digital Electronics C.I.T

Full Adder:The second type of single bit adder is the full adder. The full adder takes

into account a carry input such that multiple adders can be used to add larger numbers. To remove ambiguity between the input and output carry lines, the carry in is labeled Ci or Cin while the carry output is labeled Co or Cout.

Q8. Draw circuit of half & full adder using NAND gate?

Ans: Circuit of half & full adder using NAND gate:Circuit diagram for Half Adder:

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Digital Electronics C.I.T

Circuit diagram for Full Adder:

Q9. Name 3 input & 4 input NAND gate IC?

Ans: 3 input & 4 input of NAND gate IC:Intellectual Skills :

To understand and to differentiate half & full, adder and subtract or concept.

To understand the working of all the circuit. To correlate the LED output and logic state. To analyze the circuits operation.

Motor Skills : Ability to mount ICs on breadboard. Ability to make the connection. Ability to observe and record the readings.

EQUIPMENTS : Power supply, bread board, circuit board/kit, connecting wires, LEDs, ICs.

Q10. Draw the pin diagram of IC 7483 and state its applications?

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Digital Electronics C.I.T

Ans: Pin diagram of IC 7483:a) Addition:

IC type 7483 is a 4-bit binary adder with fast carry. The pin assignment is shown in Fig 1. The two 4-bit input binary numbers are A1 through A4 and B1 through B4.

The 4-bit sum is obtained from S1 through S4. Ci is the input carry and Co the out carries. This IC can be used as an adder-subtractor as a magnitude comparator.

b) Subtraction:The subtraction of two binary numbers can be done by taking the 2’s

complement of the subtrahend and adding it to the minuend. The 2’s complement can be obtained by taking the 1’s complement and adding 1.To perform A - B, we complement the four bits of B, add them to the four bits ofA, and add 1 to the input carry. This is done as shown in Fig 2.

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Digital Electronics C.I.T

Four XOR gates complement the bits of B when the mode select M = 1 (because x ⊕ 1=x’) and leave the bits of B unchanged when M = 0 (because x ⊕ 0=x) thus, when the mode select M is equal to 1, the input carry Ci is equal to 1 and the sum output is A plus the 2’s complement of B. When M is equal to 0, the input carry is equal to 0 and the sum generates A + B.

Q11.What is 1’s complement & 2’s complement of binary number?

Ans: 1’s complement & 2’s complement of binary number:

Most computers (I'm not sure if all) do most of the arithmetic using addition operation - i.e. subtraction, multiplication, and division all use addition operation. This makes circuit design simple and with only one circuit you get to do different things.

What I guess 1's and 2's complements let us do all operations, subtraction, division, and multiplication using addition method. Nope, it would take to long to do multiplication/division by addition/subtraction. Complements are useful for doing subtraction by addition. In base 10 the compliment of 3 would be 7 because 3+7 = 10 and after discarding the 1, we are left with 0

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Digital Electronics C.I.T

Notice that "complement" is spelled with a "e", not an "i". No need to get sloppy. Generally a complement is a quantity needed to make a thing complete. In the above case, 7 have to be added to 3 to make complete the number radix 10 decimal.

I think some examples are in order. We usually use the radix 10 (decimal) and the radix 2 (binary), but let us chose some other radix like 3. What is the 3's complement of 120 radix 3? Since 120 has 3 digits, we subtract it from 3^3 or 27 decimal or 1000 base 3.

Code: 1000-0120 110 = 12 decimalOr we can do it with decimal numbers.Code:27-15 12

Now, let's find the diminished radix complement or 2's complement of the same number, 120 radix 3. So we subtract 120 from 3^3-1 or 222 base 3.Code: 222-120 102 = 11 decimalOr we can do it with decimal numbers.Code:26-15 11

1’s complement:The FormulaN = (2n -1) - Nwhere: n is the number of bits per wordN is a positive integerN is -N in 1's complement notationFor example with an 8-bit word and N = 6, we have:N = (28 -1) - 6 = 255 - 6 = 249 = 11111001

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Digital Electronics C.I.T

In BinaryAn alternate way to find the 1's complement is to simply take the bit by bit complement of the binary number.For example: N = +6 = 000001102N = -6 = 111110012Conversely, given the 1's complement we can find the magnitude of the number by taking it's 1's complement.The largest number that can be represented in 8-bit 1's complement is 011111112 = 127 = $7F. The smallest is100000002 = -127. Note that the values 000000002 and111111112 both represent zero.

AdditionEnd-around Carry. When the addition of two values results in a carry, the carry bit is added to the sum in the rightmost position. There is no overflow as long as the magnitude of the result is not greater than 2n-1.

2’s complement:The FormulaN N * = 2n -where: n is the number of bits per wordN is a positive integerN* is -N in 2's complement notationFor example with an 8-bit word and N = 6, we have:N* = 28 - 6 = 256 - 6 = 250 = 111110102

In BinaryAn alternate way to find the 2's complement is to start at the right and complement each bit to the left of the first"1".For example: N = +6 = 000001102N* = -6 = 111110102Conversely, given the 2's complement we can find the magnitude of the number by taking it's 2's complement.The largest number that can be represented in 8-bit 2s complement is 011111112 = 127. The smallest is100000002 = -128.Addition

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Digital Electronics C.I.T

When the addition of two values results in a carry, the carry bit is ignored. There is no overflow as long as the is not greater than 2n-1 nor less than -2n.

2's Complement Addition : Two's complement addition follows the same rules as binary addition.

For example,5+ (-3) =2 0000 0101 = +5

+ 1111 1101 = -30000 0010 = +2

2's Complement Subtraction : Two's complement subtraction is the binary addition of the minuend to the 2's complement of the subtrahend (adding a negative number is the same as subtracting a positive one).

For example,7 – 12 = (-5) 0000 0111 = +7

+ 1111 0100 = -121111 1011 = -5

2's Complement Multiplication : Two's complement multiplication follows the same rules as binary multiplication.

For example,(-4) x 4 = (-16) 1111 1100 = -4

x 0000 0100 = +41111 0000

2's Complement Division : Two's complement division is repeated 2's complement subtraction. The 2's complement of the divisor is calculated, and then added to the dividend. For the next subtraction cycle, the quotient replaces the dividend. This repeats until the quotient is too small for subtraction or is zero, and then it becomes the remainder. The final Answer is the total of subtraction cycles plus the remainder.

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Digital Electronics C.I.T

For example,7 ÷ 3 = 2 remainder 1 0000 0111 = +7 0000 0100 = +4+1111 1101 = -3 +1111 1101 = -3 0000 0100 = +4 0000 0001 = +1 (remainder)

Q12. Draw a single logic symbol for a 3-input AND gate. Label the inputs A, B & C and label the output Y?

Ans:

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Digital Electronics C.I.T

Q13. Draw a logic symbol diagram of4-input AND gate using three 2-input AND gate?

Ans:

Q14. In this experiment a LOW voltage at the input switch stood for a ______ (Logic 0 or logic1)?

Ans: In this experiment a LOW voltage at the input switch stood for Logic 0 .

Q15. In this experiment a HIGH voltage (near +5V) stood for a (Logic 0, logic 1)?Ans: In this experiment a HIGH voltage (near +5V) stood for a Logic 1.

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Digital Electronics C.I.T

Q16. Make a truth table for a 4-input AND gate. Label the inputs, A, B, C, and D; label the output Y?

Ans: Truth table for a 4-input AND gate.

Q17. When powering the IC in this experiment, the Vcc is connected to the (high, low) of the power supply?

Ans: When powering the IC in this experiment, the Vcc is connected to the high of the power supply.

Q18. The AND gate’s unique output is a (0, 1) which only occurs when (all, some) inputs are (high, low)?

Ans: The AND gate’s unique output is a 1 which only occurs when some inputs are low.

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Input A Input B Output Y

0 0 0

0 1 0

1 0 0

1 1 1