digital design methodology - uvic.caelec399/slides/elec_ceng_seng_399...engineering design flowcad...

Engineering Design Flow CAD Tools Summary

Digital Design MethodologyCENG/ELEC/SENG 399

Dr. F. Gebali, PhD, PEng

ECE Dept.Faculty of Engineering

http://www.ece.uvic.ca/∼fayezc©2012

September 23, 2013

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Outline

1 Engineering Design Flow

2 CAD Tools

3 Summary

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Digital DesignMethodology

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What is a Chip?

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Need for Formal Design Methodologies

Most engineering projects are very complexProblem in design are both dangerous or expensive or bothEngineers work within severe limitations:

Tight timelinesTight budgetDemanding performance requirementsNature of project is cross-disciplinary

There are many alternatives to a given designMust choose optimum design

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Performance Demands

1 Design must be guaranteed to work2 Design must meet specifications3 Verification is mandatory4 Testing is mandatory5 Manufacturer must demonstrate that device is working and

is defect free

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Design Goals

TestableHigh-speedSmall-areaSecure (kill switch, SW/HW/FW viruses)Energy-aware (green computing)Thermal-aware

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Overview of the Design Process

Implementation SW/HW/FW

Functional Specifications Block diagrams

Design Exploration Modeling, Simulation

Testing

Specifications (Words)

Verification

Engineering Design SW/HW Modules

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Customer Specifications

Design a better DNA sequencing engine.

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Functional Specifications

Functionality: possible algorithmsPerformance: power, area, package, speed, · · ·Interfaces & Communications: serial, parallel, protocolsTimingData format:Verification plan:Test: Test generationTime to Market: Implementation SW/HW/FW



Testing


Verification


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Functional Specifications: System Timing

Req

Interrupt

Grant

Ack

End

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Design Exploration

AlgorithmsParallel or sequential designCommunications




Testing


Verification


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Engineering Design




Testing


Verification


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Engineering Design: Structured Design Strategies

1 Choose Top-Down or Bottom-Up approach2 Abstraction3 Hierarchy4 Modularity5 Locality

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Engineering Design: Top-Down or Bottom-Up approach

Behavior

Device

Structure

Circuit

Top-Level Description

Bottom-Level Description

Top-Down

Bottom-up

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Engineering Design: Top-Down Approach

1 Rely on hierarchy to break down the design2 Enables early system-level verification3 Used mainly by digital designers4 Extensive CAD tools for digital designs

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Engineering Design: Bottom-Up Approach

1 All needed basic circuits are developed first2 More complex modules are built3 Used mainly by analog designers4 Limited CAD tools for analog designs

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Abstraction & Hierarchy: Floating Point Adder

ExponentCompare

Mantissa shift

Adder

Normalizer

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Abstraction & Hierarchy: Direct Memory Access

Primary Memory

CPU

Secondary Memory

Peripheral Device

DMA

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Abstraction & Hierarchy: Direct Memory Access

Arbiter

Req_1Ack_1End_1

Req_nAck_nEnd_n

...

Req

Ack

End

DMA

Interrupt

Grant

CPU

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Logic Design

busy

idle

pending

End/Interrupt

Grant/Ack

Req/Interrupt

Req

reset

Grant/InterruptEnd/Ack

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CAD TOOLS

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CAD Tools: Hardware Description Language (VHDL in CENG 441)

entity dma_device_fsm isPort (

clock : in STD_LOGIC;reset : in STD_LOGIC;done : in STD_LOGIC;request : in STD_LOGIC;grant : in STD_LOGIC;interrupt : out STD_LOGIC;ack : out STD_LOGIC;current_s, next_s: out integer);

end dma_device_fsm;

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CAD Tools: Verification using Property Specification Language(PSL in CENG 441)

- - Check grant is followed by ack- - psl CHECK02: assert always grant -> ack;

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CAD Tools: Placement & Routing

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Summary

1 Overview of digital design methodology2 Design considerations3 System specifications4 System descriptions5 Structured design strategies

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THANK YOU

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digital design methodology - uvic.caelec399/slides/elec_ceng_seng_399...engineering design flowcad...

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