Current Mirrors (Ch. 20)

김 영 석김 영 석

충북대학교 전자정보대학

2011.3.1. .

Email: kimys@cbu.ac.kr

전자정보대학 김영석 20-1

Contents20.1 The Basic Current Mirror

20.2 Cascoding the Current Mirror

20.3 Biasing Circuits

전자정보대학 김영석 20-2

20.1 The Basic Current Mirror20.1.1 Long-Channel Design

0, )(1

)(1//

211

2

,11

,1

11

22 ==≈−+−+

⋅= λλλ

LLforWW

VVVV

LWLW

II

satDSDS

satDSO

REF

o

전자정보대학 김영석 20-3

Current MirrorEx 20.1: Determine R

−⋅⋅=−

==VA

RVVDDAI GS

REF )8.005.1(2

102

/12020 22

1 μμ

Ω≈−

= kA

R 20020

05.15μ

전자정보대학 김영석 20-4

20.1.2 Matching Currents in the MirrorThreshold Voltage Mismatch: Use Large Gate Overdrive

G Mi t h

2,

2 21 21

THNTHNTHN

THNTHNTHN

THN

REF

O VVVVVVforV

VII Δ

+=Δ

−=ΔΔ

−≈

Gm Mismatch

2,

2 1 21

nnn

nnn

n

REF

O KPKPKPKPKPKPforKPKP

II Δ

+=Δ

−=Δ

+≈

VDS Mismatch: Critical

22nREF KPI

channelshortforVI OO ⋅+⋅+ 20175.06.011 2λ channelshortforVI DS

O

REF

O −=⋅+

=⋅+

= 20.135.06.011 11

2

λ

전자정보대학 김영석 20-5

Layout Techniques to Improve Matching (1)Adding more contacts

to reduce parasitic resistance

Adding Dummy strips

전자정보대학 김영석 20-6

Layout Techniques to Improve Matching (2)Use Same Orientation

Use Interdigitation

전자정보대학 김영석 20-7

Layout Techniques to Improve Matching (3)Lateral Diffusion Ldiff/Oxide Encrochment Wenc => Width Correction

전자정보대학 김영석 20-8

20.1.3 Biasing the Current MirrorUsing a Resistor: Too dependent on VDD

Using a MOSFET

전자정보대학 김영석 20-9

Biasing the Current MirrorBeta-Multiplier: Widely Used

)(,2212

21

==⋅++=+

⋅+=

WKPKRIVIVI

RIVV

nREFTHNREF

THNREF

REFGSGS

βββββ

)5.6,4()11(2

)(,

2

12

1221

Ω==−=∴ kRKKWI

L

REF

nREFTHNTHN βββββ

circuitbiasgmconstant:12 1

1

12 ⋅

IWKPg

KLWKPR n

circuit biasgmconstant:21

1 −=⋅⋅=R

IL

KPg REFnm

전자정보대학 김영석 20-10

Beta-Multiplier: Short-Channel Design (1)Same Circuit as long-channel design: Small rout

전자정보대학 김영석 20-11

Beta-Multiplier: Short-Channel Design (2)Use Feedback: Large rout

↓↓↓=>↑=>↑=> biasnregDbiaspreg VVIVV ,4

전자정보대학 김영석 20-12

Beta-Multiplier: Short-Channel Design (3)Low-Impedance Node at Vreg => Amp with Single High-Impedance at Vbiasp => Easy to Compensate

Check Stability

전자정보대학 김영석 20-13

20.1.5 Temperature BehaviorResistor-MOSFET Reference

MOSFET O l R f

CppmTCIREF °−≈ /1000

MOSFET-Only Reference

CppmTCIREF °−≈ /3500

Beta-Multiplier

CppmTCIREF °+≈ /1000

Voltage Reference Using the Beta-Multiplier

ppREF

VVK

LWKPR

VV THN

n

GSREF ≈+−⋅⋅

== 1.1)11(21

CVT

VL

REF °≈∂

∂ /600μ

전자정보대학 김영석 20-14

20.2 Cascoding the Current MirrorSimple

Cascode )1( rgrrR ++=Cascode )1( 4424 omooo rgrrR ++=

RO(NMOS/PMOS) Long(ID=20u) Short(ID=10u)

Simple 5M/4M 167k/333k

전자정보대학 김영석 20-15

Cascode 3.75G/2.4G 4.2M/16.6M

Wide-Swing(Low-Voltage) CascodeCascode

VVV THNo Δ⋅+= 2min,

Wide-Swing Cascode

t d d

min,

)(1)(

2WW

VV

MWS

o

=

Δ⋅=

standard)(5

)(LL MWS

전자정보대학 김영석 20-16

Wide-Swing Cascode (Short-Channel)(W/L)MWS=1/25*(W/L)standard

Add M3 to lower VDS1(High Ro)

전자정보대학 김영석 20-17

20.2.4 Regulated Drain Current MirrorWide-Swing Cascode

24424

)1(

om

omooo

rg

rgrrR

≈

++=

Regulated Cascode

24424 )1( omooo

A

rgArrR ⋅++=2 omrAg≈

전자정보대학 김영석 20-18

20.3 Long-Channel Biasing Circuits

AI μ20=

전자정보대학 김영석 20-19

Short-Channel Biasing Circuits

AI μ10= AI μ10

전자정보대학 김영석 20-20