current and base transit-time relations in normal and inverted (iil) bipolar transistors

3
CORRESPONDENCE 76 1 with a high channel length-to-thickness ratio and gate-to-drain separation much greater than the channel thicknewdo not suffer from poor current saturation and carrier accumulation effects [lo]. For the structures analyzed, the smallness of the conducting channel height towards the drainindeed satisfythis requirement even for the worst case when VG = 0. Besides its improved linearity and gain-band performance, the two-layer structure has the potential advantage of lowering the hot-electron noise over the conventional structure due to the increase of G, when Nz > N1. There is, however, the so-called diffusion noise associated with the carrier-velocity saturated region within the gate-to-drain separation rather than under the gate as occurs in the idealized structure analyzed.by Statz et al. [5]. According to their explanation,, this noise would be signifi- cantly reduced in the proposed structure mainly due to increase of the drain output resistance and negligible coupling between the velocity-saturated region and the gate electrode. REFERENCES W. Baechtold et al., “Si and GaAs 0.5 pm-gate Schottky-barrier field-effect transistors,” Electron. Lett., vol. 9, pp. 232-234, 1973. H. C. Huang etal., “GaAs MESFET performance,” presented at the Int. ElectronDevices Meet., Washington, DC, 1975. K. Lehovec and R. Zuleeg, “Voltage-current characteristics of GaAs J-FET’s in the hot electron range,” Solid-state Electron., vol. 13, pp. 1415-1426,1970. W. Baechtold, “Noise behavior GaAs field-effect transistors with short gate lengths,” IEEE Trans. Electron Deuices, vol. ED-19, pp. 674-680,1972, H. Statz, H. A. Haus, andR. A. Pucel, “Noise characteristics of gal- lium arsenide field-effect transistors,” IEEE Trans. Electron De- uices, vol. ED-21, pp. 549-562, 1974. K. Lehovec and R. S. Miller, “Field distribution in junction field- effect transistors at large drain voltages,” IEEE Trans. Electron Deuices, vol. ED-12, pp. 273-281, 1975. F. N. Trofimenkoff, “Field-dependent mobility analysis of the field-effect transistor,” Proc. IEEE,vol. 53, pp. 1765-1766, 1965. H. Benekinget al., “GaAs Mes FET with two-layer channel,” paper presented at ESSDERC,Grenoble, 1975. M. B. Das and P. Schmidt, “High-frequency limitations of abrupt-junction FET’s,” IEEE Trans. Electron Deuices, vol. ED-20, pp. 779-792,1973. T. L. Chiu and H. N. Ghosh, “Characteristics of the junction-gate field-effect transistor with shortchannellength,”Solid-state Electron., vol. 14, pp. 1307-1317, 1971. Current and Base Transit-Time Relations in Normal and Inverted (IIL) Bipolar Transistors M. H. ELSAID, D. J. ROULSTON, AND L. A. K. WATT Abstract-Analytic expressions representing a double-diffused transistor impurity profile are used to calculate the current density and base transit time in a normal transistor and in an inverted (IIL) structure. The calculated current density and transit time for the simplified model and those computed for a double Gaussian impu- rity profile using the variable boundary regional approach are compared. Manuscript received April 21,1976; revised November 18,1976. The authors are with the Department of Electrical Engineering, Uni- versity of Waterloo, Waterloo, Ont. N2L 3G1, Canada. I. INTRODUCTION The purpose of this work is to provide analytic expressions to calculate the current density and base transit time in normal transistors and in inverted (IIL) structures using a simplified model of a double-diffused transistor impurity profile. Results thus obtained, for a range of device structures, are compared with computed current and base transit time, including doping-level mobility dependence. The calculated and the computed results are in sufficiently good agreement to conclude that thesimple formulas provide a useful tool for predicting performance of IIL devices from fabrication data and of comparing structures used in normal and IIL operation. 11. ANALYSIS A simplified model of the double-diffused transistor impurity profile is shown in Fig. l(a). The major part of the base regionand the collector are represented by an exponential distribution of impurity density, while a possible opposing field region near the emitter is considered to be linearly graded; Le., For low-level injection, and assuming Jp = 0, the minority carrier concentration distribution in the base region for the normal n-p-n-transistor is as given by Boothroyd and Trofi- menkoff 111.l where m = WZ/L. The electron current density J, can be writt,en in the form The corresponding valueof KJ for the normal transistor structure can thusbe written as The base transit time 76 can be expressed as the sum of the retarding field and the accelerating field region transit times. The normalized base transit time KTN = rb/(W2/2Dnav) canbe written as KTN = (3) ($)2 [m -1 + e-,] + ($1 For the inverted (IIL) impurityprofile, it can be shownthat the minority carrier distribution in the base region becomes the integration from (x - x,) to (x, - x,) and notfrom (x - x,) to W Notice that the expression given by (2) is obtained by carrying out as given in [ 11.

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CORRESPONDENCE 76 1

with a high channel length-to-thickness ratio and gate-to-drain separation much greater than the channel thicknewdo not suffer from poor current saturation and carrier accumulation effects [lo]. For the structures analyzed, the smallness of the conducting channel height towards the drain indeed satisfy this requirement even for the worst case when VG = 0.

Besides its improved linearity and gain-band performance, the two-layer structure has the potential advantage of lowering the hot-electron noise over the conventional structure due to the increase of G, when Nz > N1. There is, however, the so-called diffusion noise associated with the carrier-velocity saturated region within the gate-to-drain separation rather than under the gate as occurs in the idealized structure analyzed.by Statz et al. [5]. According to their explanation,, this noise would be signifi- cantly reduced in the proposed structure mainly due to increase of the drain output resistance and negligible coupling between the velocity-saturated region and the gate electrode.

REFERENCES

W. Baechtold et al., “Si and GaAs 0.5 pm-gate Schottky-barrier field-effect transistors,” Electron. Lett., vol. 9, pp. 232-234, 1973. H. C. Huang et al., “GaAs MESFET performance,” presented at the Int. Electron Devices Meet., Washington, DC, 1975. K. Lehovec and R. Zuleeg, “Voltage-current characteristics of GaAs J-FET’s in the hot electron range,” Solid-state Electron., vol. 13, pp. 1415-1426,1970. W. Baechtold, “Noise behavior GaAs field-effect transistors with short gate lengths,” IEEE Trans. Electron Deuices, vol. ED-19, pp. 674-680,1972, H. Statz, H. A. Haus, and R. A. Pucel, “Noise characteristics of gal- lium arsenide field-effect transistors,” IEEE Trans. Electron De- uices, vol. ED-21, pp. 549-562, 1974. K. Lehovec and R. S. Miller, “Field distribution in junction field- effect transistors a t large drain voltages,” IEEE Trans. Electron Deuices, vol. ED-12, pp. 273-281, 1975. F. N. Trofimenkoff, “Field-dependent mobility analysis of the field-effect transistor,” Proc. IEEE, vol. 53, pp. 1765-1766, 1965. H. Beneking et al., “GaAs Mes FET with two-layer channel,” paper presented at ESSDERC, Grenoble, 1975. M. B. Das and P. Schmidt, “High-frequency limitations of abrupt-junction FET’s,” IEEE Trans. Electron Deuices, vol. ED-20, pp. 779-792,1973. T. L. Chiu and H. N. Ghosh, “Characteristics of the junction-gate field-effect transistor with short channel length,” Solid-state Electron., vol. 14, pp. 1307-1317, 1971.

Current and Base Transit-Time Relations in Normal and Inverted (IIL) Bipolar Transistors

M. H. ELSAID, D. J. ROULSTON, AND L. A. K. WATT

Abstract-Analytic expressions representing a double-diffused transistor impurity profile are used to calculate the current density and base transit time in a normal transistor and in an inverted (IIL) structure. The calculated current density and transit time for the simplified model and those computed for a double Gaussian impu- rity profile using the variable boundary regional approach are compared.

Manuscript received April 21,1976; revised November 18,1976. The authors are with the Department of Electrical Engineering, Uni-

versity of Waterloo, Waterloo, Ont. N2L 3G1, Canada.

I. INTRODUCTION

The purpose of this work is to provide analytic expressions to calculate the current density and base transit time in normal transistors and in inverted (IIL) structures using a simplified model of a double-diffused transistor impurity profile. Results thus obtained, for a range of device structures, are compared with computed current and base transit time, including doping-level mobility dependence. The calculated and the computed results are in sufficiently good agreement to conclude that the simple formulas provide a useful tool for predicting performance of IIL devices from fabrication data and of comparing structures used in normal and IIL operation.

11. ANALYSIS

A simplified model of the double-diffused transistor impurity profile is shown in Fig. l(a). The major part of the base region and the collector are represented by an exponential distribution of impurity density, while a possible opposing field region near the emitter is considered to be linearly graded; Le.,

For low-level injection, and assuming J p = 0, the minority carrier concentration distribution in the base region for the normal n-p-n-transistor is as given by Boothroyd and Trofi- menkoff 111.l

where m = WZ/L. The electron current density J , can be writt,en in the form

The corresponding value of KJ for the normal transistor structure can thus be written as

The base transit time 7 6 can be expressed as the sum of the retarding field and the accelerating field region transit times. The normalized base transit time KTN = rb/(W2/2Dnav) can be written as

KTN = (3) ($)2 [m -1 + e- , ] + ($1

For the inverted (IIL) impurity profile, it can be shown that the minority carrier distribution in the base region becomes

the integration from ( x - x , ) to (x, - x , ) and not from (x - x , ) to W Notice that the expression given by (2) is obtained by carrying out

as given in [ 11.

762 IEEE TRANSACTIONS ON ELECTRON DEVICES, JUNE 1977

Nok I1 L

h ( a ) xe

I \ r

NORMAL

Fig. 1. (a) Simplified model for the base region of double-diffu c;d

transistor impurity profile. transistor. (b) Double Gaussian representation of double-diffu,! od

The corresponding KJ and KT constants for the IIL structlue can then be written as

( 1. I )a)

For m I 2.5, (loa) can be simplified:

A. Evaluation of the Linear-Exponential Profile Parameters

Assuming that the surface and epitaxial layer dopidg densii:il>s NS and N D ~ ~ ~ , the junction depths xjl and xj2 and X e p i of 1:he double Gaussian impurity profile shown in Fig. l(b) are known, then the parameters L, No, and A of the model can be determir cd by the following relations.

1) Double Gaussian profile equals zero at x = xj2, giving LG

2 ) Equality of profile gradient at x = Wb between the :.]I- proximate expression of (la) and the double Gaussian gives 1) =

3) Equality of (la) to zero a t x = w b gives No = NDepie U'IjL.

4) The profile gradient A is the gradient of the douyle

= xjz/[ln (Ns /N~epi )] l /~ .

L32Xj2.

Gaussian profile a t x = xil, and is given by

A L- (2N~xjl/L~)e-(Xjl/Lo)'. (11)

The parameters x e , x,, and xc shown in Fig. l (a) can be de- termined as follows. For normal transistor structures

Xe = (3vb,~c/QA)'/~

x c = w b - wc (12)

where

Wc = L In (Wepi/L) + 2 In (Vcb,v/Vpt) ] (13)

where Vp, is the reach through voltage of the epitaxial layer [I 1

Vpt = (q/2t)N~epiW:pi. For IIL structures

Xc = ( ~ V , ~ I E / ~ A ) ~ / ~ . (14)

For the forward-biased emitter-base junction, it can be consid- ered to a fair approximation as linearly graded with a gradient equal to that of the exponential doping profile .at x = w b , which is given byNnepi/L. The space-charge layer width in the base side We can then be written as

For both structures, x , is given by the root of the transcen- dental equation Ax = NoeWxlL, x , can be determined roughly by graphicalsolution of the transcendental equation. The New- ton-Raphson method can be used to obtain an accurate solution for x,.

In the above equations, E is the permittivity, VbeN, VcbN, VbeI, and V c b a are the total voltage acrosb the emitter-base and base- collector junction of the normal transistor, and the IIL structure, respectively.

In the following sectiofi we calculate the constants KJN, KJI from ( 5 ) and (9), and the corresponding transit-time constants KTN, KTI from (6) and (10) for four different impurity profiles. Using a computer program [2], based on the variable boundary regional approach, and including doping-level mobility depen- dence [3], the four K values are obtained. The current density for the normal transistor and the IIL structures can be calculated using (4) with the corresponding KJ constant and with n(x , ) calctdated by

where h is the Boltzman constant, T is the absolute temperature, ni is the intrinsic concentration, and N(xe ) is the doping level a t the emitter-base depletion-layer boundary, which is given by N(xe ) = Axe, for the normal transistor structure; and N ( x e ) = Noe-xe/L, for the IIL structure.

111. RESULTS AND CONCLUSIONS

The computed and the calculated K constants for four cases of ,impurity profile are given in Tables I and I1 for the normal transistor and the IIL structures, respectively, for a range of device structures of metallurgical base junction width between 0.29 and 0.53 wm, xepi = 4 prn, base sheet resistance between 13 and 1.6 kWcm2, Ns = 2 X 1019/cm3, and N D ~ ~ ~ = 1016/cm3. All the results shown are for Vcb = 1-V reverse bias and D,,, = 12 cm2/s.

From the tables we can see that the calculated K values can provide a fair estimate for the current density and the base transit

CORRESPONDENCE 763

TABLE I Normal Transistor Structures

KTN -----

C a l c u l a t e d I Computed I C a l c u l a t e <

__ __ 0.48 0.59

0.54 0.53

0.59 0.64 0.54

0.43 0.8 0.58

TABLE I1 IIL Structures

0.60 0.89

0.50 0.89

0.43 0.89

KJI

Computed C a l c u l a t e d Computed C a l c u l a t e d

0.68 1.96 0.8 0 .41

0 .1 5 . 4 3.9 0.1

0.034 9.1 9 .1 0 .043 1 0.029 1 15 .4 I 10.9

time for the normal transistor and the IIL structures. Note that for the normal transistor structure, the K values given in Table I are of order unity; i.e., for the normal transistor structure the minority carrier distribution in the base region can be approxi- mated by a triangular distribution, as is the case for a uniformly doping base. For the IIL structures we can see from Table I1 that the KJ value of case (i) is 40 times larger than that of case (iv), and the factor is 1/20 for the KT value.

We conclude by restating the fundamental difference between the two structures: the transit time and current K constants for the normal transistor are of order of unity; i.e., it behaves as if the base were uniformly doped. For the IIL structure this is not the case, and the KJ constant is in the range of 1-1/40 and the KT constant is in the range from 1 to 20, thus indicating that the shape of the base impurity profile must be taken into account. It should, of course, be noted that if the emitter-base and col- lector-base bias were the same (an impossible situation for normal operation), the depletion layer boundaries would be the same in both structures, and using (16) the J,, versus Vbe law would be the same. The fundamental (and large) difference in the transit time is, however, always present. This would imply that the base component of the switching speed of a double-diffused IIL structure will be considerable worse than the same structure operated in the normal mode. This fact could become important in IIL structures optimized for high-speed operation (e.g., devices with very thin, highly doped epitaxial layers).

REFERENCES

[l] A. R. Boothroyd and F. N. Trofimenkoff, “Determination of the physical parameters of the transistors of single- and double-diffused structure,” IEEE Trans. Electron Devices, vol. ED-10, pp. 149-163, May 1963.

[2] D. J. Roulston, S. G. Chamberlain, and J. Sehgal, “Simplified com- puter-aided analysis of double-diffused transistors including two dimensional high level effects,” IEEE Trans. Electron Devices, vol. ED-19, pp. 809-820, June 1972,

(31 D. M. Caughey and R. Thomas, “Carrier mobilities in silicon em- pirically related to doping and field,” Proc. ZEEE (Lett,), vol. 55, pp. 2192-2193, Dec. 1967.

Heat Flow Resistance Evaluation in Avalanche Diodes

FLORIAN SELLBERG

Abstract-A generalization of the mathematical formulation and a modified measurement procedure are presented for the method of heat flow resistance evaluation earlier proposed by Haitz et al. In this way the accuracy is increased and the limitation to a linear region of voltage-temperature relationship is removed without increasing the complexity.

I. INTRODUCTION

Several methods to measure the heat flow resistance of ava- lanche diodes have earlier been described in the literature. Nondestructive measurement methods with diode power loss distribution approximating actual operating conditions are usually based on the temperature sensitivity of the avalanche voltage [1]-[4]. Both CW [I], [3] and step response or pulse methods [2], [4] have been devised. All the referenced methods except the pulse method [4] use the approximation that the breakdown voltage is linearly dependent on temperature. This is permissible only for rather low junction temperatures and to a different degree for different types of diodes. DDR Si diodes as described in [5] have, for example, a highly nonlinear depen- dence.

Nonetheless the method of Haitz et al. [l] has been adopted as a standard for heat flow resistance measurements by many laboratories. To overcome the limitations in applicability of their method we sought a generalization of its mathematical formu- lation and a modified measurement procedure in order to make it more accurate and independent of linear extrapolations.

11. DERIVATION OF HEAT FLOW RESISTANCE

Regarding the bias current Z and the diode junction temper- ature T as independent variables, we have the colmpletely general equations:

where the diode voltage V and the heat flow resistance r are functions of both Z and T.

The diode is operating with dc bias into a load that does not permit RF oscillation. On the dc bias is superposed a small ac current of low enough frequency to make the temperature of the diode and its heat flow path vary in phase with the power dissi- pation changes induced by the ac modulation.

With this mode of operation, the hestsink temperature T H S remains constant and the junction temperature T is modulated by the ac current. A differentiation gives

We eliminate dTldI between these two equations and observe that dVldZ = limf+- [Z(f)] . “Infinite” frequency symbolizes a frequency high enough that all temperatwe modulation is absent but still low enough that the diode reactance and carrier transit

work under ESTEC Contract 2139/73 MS.

Stockholm 70, Sweden.

Manuscript received July 19,1976. This work was done as part of the

The author is with The Microwave Institute Foundation, S-100 44