cscm project powering cycle and results of the pspice simulations emmanuele ravaioli thanks to h....
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![Page 1: CSCM Project Powering cycle and results of the PSpice simulations Emmanuele Ravaioli Thanks to H. Thiesen, A. Verweij TE-MPE-TM 14-07-2011](https://reader035.vdocuments.mx/reader035/viewer/2022062322/56649eca5503460f94bd939e/html5/thumbnails/1.jpg)
CSCM Project
Powering cycleand results of the PSpice simulations
Emmanuele Ravaioli
Thanks to H. Thiesen, A. Verweij
TE-MPE-TM14-07-2011
![Page 2: CSCM Project Powering cycle and results of the PSpice simulations Emmanuele Ravaioli Thanks to H. Thiesen, A. Verweij TE-MPE-TM 14-07-2011](https://reader035.vdocuments.mx/reader035/viewer/2022062322/56649eca5503460f94bd939e/html5/thumbnails/2.jpg)
CSCM Project – Powering cycle and results of the PSpice simulations
Emmanuele Ravaioli TE-MPE-TM 14-07-2011
• RB circuit• Schematic of the circuit
• Powering cycle
• Power converter behavior
• Opening of the switches
• Diode behavior
• Monte Carlo analysis
• RQ circuit
• Conclusions and further work
2
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RB circuit – Standard configuration
Emmanuele Ravaioli TE-MPE-TM 14-07-2011 3
Power converter FilterSwitch1
Switch 2
77 Magnets
77 Magnets
• PCs in parallel• f_filter ~ 28.5 Hz• Extraction system present• L_dipole = 98 mH
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RB circuit – CSCM configuration
Emmanuele Ravaioli TE-MPE-TM 14-07-2011 4
Power converter FilterSwitch1
Switch 2
77 Magnets
77 Magnets
• PCs in series• f_filter ~ 14.2 Hz ( L_filter x4 )• Extraction system present ?• L_dipole = 98 mH• R_dipole = 43 mΩ (at 20 K)• L_cabling = 4 mH• U_diode > 1.6 V (at 20 K)
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 5
RB circuit – CSCM Powering cycleNo opening of the extraction switches
dVPC/dt = 20 V/s
IDFB = 150 A
dIDFB/dt = 1 kA/s
IDFB = 6 kA
Fast Power Abort
1
2
3
4
5
1 2 3 4 5
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 6
RB circuit – CSCM Powering cycle (Zoom)No opening of the extraction switches
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 7
RB circuit – CSCM Powering cycle (Zoom) – SwitchesBoth RB extraction switches opened without delay at the same time
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 8
RB circuit – Diode openingNo opening of the extraction switches
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 9
RB circuit – Diode opening – Monte Carlo simulationRandom distribution of a number of parameters within realistic range
N_diode ±20%
(opening voltage)
R_dipole ±20%
R_busbar ±20%
L_busbar ±20%
C_ground ±5%
L_aperture ±0.1%
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CSCM Project – Powering cycle and results of the PSpice simulations
Emmanuele Ravaioli TE-MPE-TM 14-07-2011
• RB circuit
• RQ circuit• Schematic of the circuit
• Powering cycle
• Power converter behavior
• Opening of the switch(es)
• Diode behavior
• Conclusions and further work
10
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RQ circuit – CSCM configuration
Emmanuele Ravaioli TE-MPE-TM 14-07-2011 11
Power converter FilterSwitch1
Switch 2
51 Magnets
51 Magnets
• PCs in series (same PCs of RB)• f_filter ~ 14.2 Hz ( L_filter x4 )• Extraction system present ? 1? 2?• L_quadrupole = 5.6 mH• R_quadrupole = 6.3 mΩ (at 20 K)• L_cabling = 2x 4 mH• U_diode > 1.6 V (at 20 K)
Schematic to be edited
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 12
RQ circuit – CSCM Powering cycleNo opening of the extraction switches
dVPC/dt = 20 V/s
IDFB = 500 A
dIDFB/dt = 400 A/s
IDFB = 6 kA
Fast Power Abort
1
2
3
4
5
1 2 3 4 5
![Page 13: CSCM Project Powering cycle and results of the PSpice simulations Emmanuele Ravaioli Thanks to H. Thiesen, A. Verweij TE-MPE-TM 14-07-2011](https://reader035.vdocuments.mx/reader035/viewer/2022062322/56649eca5503460f94bd939e/html5/thumbnails/13.jpg)
Emmanuele Ravaioli TE-MPE-TM 14-07-2011 13
RQ circuit – CSCM Powering cycle (Zoom)No opening of the extraction switches
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 14
RQ circuit – CSCM Powering cycle (Zoom) – 1 SwitchOne RQ extraction switch opened without delay
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 15
RQ circuit – CSCM Powering cycle (Zoom) – 2 SwitchesBoth RQ extraction switches opened without delay at the same time
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 16
RQ circuit – Diode openingNo opening of the extraction switches
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CSCM Project – Powering cycle and results of the PSpice simulations
Emmanuele Ravaioli TE-MPE-TM 14-07-2011
• RB circuit
• RQ circuit
• Conclusions and further work
17
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• The analysis of the CSCM powering cycle in the dipole and quadrupole circuit has been carried out by means of a complete PSpice model.
• The modeling of the diode behavior and the control of the power converter have been challenging and required the developing of dedicated models.
• The simulated powering cycle comprises a voltage ramp until all the diodes are conducting (current flowing through the DFB larger than a set value), a current plateau, a high-rate current ramp, another plateau at maximum current and the switching-off of the power converter with the eventual opening of the extraction switch(es).
• The voltage transients and the current decaying have been simulated and the results have been compared with theoretical calculations.
• The influence of the opening of one or both of the extraction switches have been analyzed. The simulation results suggest that the extraction system is required for the quadrupole circuit but not for the dipole circuit.
• The model of the diode needs to be improved in order to include the heating effect which causes a decrease of the voltage drop across it. (work in progress)
Emmanuele Ravaioli TE-MPE-TM 14-07-2011 18
Conclusions and further work
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011
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Annex
20Emmanuele Ravaioli TE-MPE-TM 14-07-2011
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 21
Time required for discharging the circuitSimulations and (simple) theoretical calculations
Circuit No switch 1 switch 2 switches
RB – Simulation (U_diode = 1.88 V) 110 ms --- 50 ms
RQ – Simulation (U_diode = 1.88 V) 450 ms 300 ms 250 ms
RB – Simulation (U_diode = 1.2 V) to be done --- to be done
RQ – Simulation (U_diode = 1.2 V) to be done to be done to be done
RB – Theory (U_diode = 1.88 V) 110 ms --- ~25 ms
RQ – Theory (U_diode = 1.88 V) 290 ms ~150 ms ~100 ms
RB – Theory (U_diode = 1.2 V) 170 ms --- ~30 ms
RQ – Theory (U_diode = 1.2 V) 450 ms ~180 ms ~120 ms
The model of the diode needs to be improved in order to include the heating effect which causes a decrease of the voltage drop across it. (work in progress)
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 22
RB circuit – Fast Power Abort – DetailsNo opening of the extraction switches
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 23
RB circuit – Fast Power Abort – DetailsBoth RB extraction switches opened without delay at the same time
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 24
RQ circuit – Fast Power Abort – DetailsNo opening of the extraction switches
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 25
RQ circuit – Fast Power Abort – DetailsOne RQ extraction switch opened without delay
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Emmanuele Ravaioli TE-MPE-TM 14-07-2011 26
RQ circuit – Fast Power Abort – DetailsBoth RQ extraction switches opened without delay at the same time