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CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. COURSE LECTURER: E. Y. BAAGYERE. BAAGYERE. CONTACT: 0249990362. CONTACT: 0249990362. LECTURE TIME: 15:40 – 17:45 hrs. LECTURE TIME: 15:40 – 17:45 hrs. VENUE: SP-LAB. VENUE: SP-LAB.

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COURSE OUTLINE INTRODUCTION TO DIGITAL LOGIC SYSTEMS NUMBER SYSTEM AND CONVERSION BINARY TO DECIMAL DECIMAL TO BINARY BINARY ARITHMETIC REPRESENTATION OF NEGATIVE NUMBERS BINARY CODES BOOLEAN ALGEBRA APPLICATION OF BOOLEAN ALGEBRA KARNAUGH MAPS

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Page 1: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

CSC 331: DIGITAL LOGIC DESIGN

COURSE LECTURER: E. Y. BAAGYERE.COURSE LECTURER: E. Y. BAAGYERE.CONTACT: 0249990362.CONTACT: 0249990362.

LECTURE TIME: 15:40 – 17:45 hrs.LECTURE TIME: 15:40 – 17:45 hrs.VENUE: SP-LAB.VENUE: SP-LAB.

Page 2: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Course Reference Materials1. Digital Fundamentals with PLD Programming

by Thomas L. FLOYD.2. Logic and Computer Design Fundamentals, 2nd

Edition.by M. Morris MANO and Charles R.

KIME.3. Fundamentals of Digital Logic With VHDL Design.

by Stephen BROWN and Zvonko VRANESIC.

4. Fundamentals of Logic Design, 5th Editionby Charles H. ROTH, Jr.

Page 3: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

COURSE OUTLINE• INTRODUCTION TO DIGITAL LOGIC SYSTEMS• NUMBER SYSTEM AND CONVERSION

• BINARY TO DECIMAL• DECIMAL TO BINARY• BINARY ARITHMETIC• REPRESENTATION OF NEGATIVE NUMBERS• BINARY CODES

• BOOLEAN ALGEBRA• APPLICATION OF BOOLEAN ALGEBRA• KARNAUGH MAPS

Page 4: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

COURSE OUTLINE

• QUINE – McCLUSKEY METHOD• COMBINATIONAL CIRCUIT DESIGN AND

SIMULATION USING GATES• MULTIPLEXERS, DECODERS• SEQUENTIAL LOGIC DESIGN• MINI PROJECT

Page 5: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

CHAPTER ONENUMBER SYSTEM AND CONVERSION

Digital systems are used extensively in computation and data processing, control systems, communications, and measurement.

REASONS1. Digital systems are capable of greater

accuracy than analog systems2. Reliability is greater than analog.3. More data can be stored in storage device

when digitized than when they are not.

INTRODUCTION

Page 6: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Design of Digital Systems

Digital System Design is in three parts- System Design- Logic Design- Circuit Design

Page 7: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Design of Digital Systems SYSTEM DESIGN: Breaking the overall

system into subsystems and specifying the characteristics of each subsystem.

LOGIC DESIGN: Determining how to interconnect basic logic building blocks to perform a specific function.

CIRCUIT DESIGN: Specifying the interconnection of specific components such as resistors, diodes, and transistors to form a gate, flip – flop, or other logic building block.

Page 8: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Switching Circuits• A switching circuit has one or more inputs and

one or more outputs which take on discrete values.

• In this course we shall study two types of switching circuits – combinational and sequential.

Page 9: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Switching Circuits

Combinational Circuit:The output values depend only on the present value of the inputs and not on the past values.

Sequential Circuit: The outputs depend on both the present and past input values.

Page 10: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

A block Diagram of a Switching Circuit

Switching Circuit

OutputsInputs

Z1

Zn

Z1

X1

X2

Xn

: .

: .

Page 11: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Number System and ConversionThe decimal (base 10) numbers are called positional numbers, each position is assigned a weight.

For example,935.8710 = 9 X 102 + 3 X 101 + 5 X 100 +

8 X10-1+ 7 X 10-2.1101.102 = 1 X 23 + 1 X 22 + 0 X 21 +

1 X 20 + 1 X 2-1 + 0 X 2-2

= 8 + 4 + 0 + 1 + ½ + 0 = 13.510.

Page 12: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Number ConversionAny positive integer R (R > 1) can be chosen as the radix or base of a number system.If the base is R, then R digits (0, 1, ..., R – 1) are used.

Page 13: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Number Conversion A number written in positional notation can be

expanded in power series in R. For example,N = (a4a3a2a1a0.a-1a-2a-3)R

= a4 X R4 + a3 X R3 + a2 X R2 + a1 X R1 + a0 X R0 + a-1 X R-1 + a-2 X R-2 + a-3 X R-3

Where ai is the coefficient of Ri and 0≤ ai ≥ R-1.

Page 14: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

For bases greater than 10, more than 10 symbols are needed to represent the digits.For example, In hexadecimal (base 16), A represents 1010, B represents 1110, C represents 1210, D represents 1310, E represents 1410, and F represents 1510.

Thus;A3F16 = 10 X 162 + 3 X 161 + 15 X 160 = 2560 + 48 + 15 =262310.

Number Conversion

Page 15: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

NUMBER CONVERSION TYPES

Binary – to - decimal conversion Decimal - to - binary conversion

-Repeated division – by – R method.(R = Radix or Base)-Sum – of – weights method.

Page 16: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

The base R equivalent of a decimal integer N can be represented as:N = (anan-1...a2a1a0) = anRn + an-1Rn-1 + ...+ a2R2 + a1R1 + a0.

If we divide N by R, the remainder is a0:

N/R = anRn-1 + an-1Rn-2 + ...+ a2R1 + a1 = Q1 , remainder a0

REPEATED DIVISION - BY - R METHOD

Page 17: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Then we divide the quotient Q1 by R:

Q1/R = anRn-2 + an-1Rn-3 + ...+ a3R1 + a2 = Q2, remainder a1

This process is continued until we finally obtain an.

Note that the remainder obtained at each division step is one of the desired digits and the least significant digit (LSB) is obtained first.

REPEATED DIVISION - BY - R METHOD

Page 18: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

SUM – OF – WEIGHT METHOD Determine the set of binary weights

whose sum is equal to the decimal number.

The lowest weight is 1 , which is 20.

Doubling any weight, you get the next higher weight.Example: 9 = 8 + 1 or 9 = 23 + 20

Thus 9 = 1001

Page 19: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Conversion Decimal Fractions to Binary

There are two ways of converting Decimal fractions to Binary

• Sum – of – weight method• Repeated Multiplication by R Method(where R is the Radix or Base).

Page 20: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Sum – of – Weight Method The most significant weight is 0.5, which

is 2-1

Halving any weight, get you next lower weight.

Example 0.5, 0.25, 0.125, 0.0625. 0.625 = 0.5 + 0.125 = 2-1 + 2-3 = 0.101. There is a 1 in the 2-1 position, a 0 in the 2-2

position, and a 1 in the 2-3 position.

Page 21: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

REPEATED MULTIPLICATION BY R METHOD

Conversion of a decimal fraction to base R can be done using successive multiplications by R. A decimal fraction F can be represented as

F = (.a-1a-2a-3...a-m)R = a-1R-1 + a-2R-2 + a-3R-3 + ... +a-mR-m

Multiplying by R yieldsFR = a-1 + a-2R-1 + a -3R-3 + ... + a-mR-m+1 = a-1 + F1

Page 22: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Where F1 represents the fractional part of the result and a-1 is the integer part.

Multiplying F1 by R yields

F1R = a-2 + a-3R-1 + ... + a-mR-m+2 = a-2 + F2

This process is continued until we have obtained a sufficient number of digitsNote that the integer part obtained at each step is one of the desired digits and the most significant digit (MSB) is obtained first.

REPEATED MULTIPLICATION BY R METHOD

Page 23: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Example: Convert 0.62510 to binary.

F = 0.625 X 2 = 1.250 (a-1 = 1), F1 = .250 X 2 = 0.500 (a-2 = 0), F2 =0.500 X 2 = 1.000 (a-3 = 1).

0.62510 = .1012.

Page 24: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

BINARY ARITHMETICArithmetic operations in digital systems are usually done in binary because design of logic circuits to perform binary arithmetic is much easier than for decimal.Binary arithmetic operations:

AdditionMultiplicationSubtractionDivision

Page 25: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

The addition table for binary numbers is 0 + 0 = 00 + 1 = 11 + 0 = 11 + 1 = 0 and carry 1 to the next column.

Carrying 1 to a column is equivalent to adding 1 to that column.

BINARY ADDITION

Page 26: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Add 1310 and 1110 in binary.

11111310 = 1101

1110 = 1011

11000 = 2410

carries

BINARY ADDITION

Page 27: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

BINARY SUBTRACTION

The subtraction table for binary number is0 – 0 = 00 – 1 = 1 and borrow 1 from next column1 – 0 = 11 – 1 – 0Borrowing 1 from a column is equivalent tosubtracting 1 from that column.

Page 28: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

BINARY SUBTRACTION

Example of binary subtraction 1

11101 - 10011 1010 

A borrow from 3rd position

Page 29: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

BINARY SUBTRACTION

Exercise  1. 10000 - 11   2. 111001 - 1011  

Page 30: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

BINARY MULTIPLICATION

The multiplication table for binary numbers is 0 X 0 =00 X 1 = 01 X 0 = 01 X 1 = 1ExerciseFind 1310 X 1410 in binary.

Page 31: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Binary Multiplication

Example (2): Find 101 X 111

101 111111

000 111 100011

X

Page 32: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

BINARY DIVISION

ASSIGNMENT (1)

Read on binary division

Page 33: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Representation of Signed Numbers

In most computers, in order to represent both positive and negative numbers the first bit in a word is used as a sign bit, with 0 used for plus and 1 used for minus.For an n – bit word, the first bit is the sign and the remaining n -1 bits represent the magnitude of the number. Thus an n – bit word can represent any one of 2n-1 positive integers or 2n-1 negative integers.

Page 34: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

The 1’s complement and 2’s complement

The 1’s complement and 2’s complement are commonly used because arithmetic units are easy to design using these systems

Page 35: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Finding the 1’s complement

• For the 1’s complement system a negative number, -N, is represented by its 1’s complement, N. The 1’s complement of a positive integer N is defined as

• N = (2n – 1) – N• An alternative way of finding the 1’s

complement is to simply complement N bit – by – bit by replacing 0’s with 1’s and 1’s with 0’s.

Page 36: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Finding the 2’s complement

For the 2’s complement number system, a positive number, N, is represented by a 0 followed by the magnitude as in the sign and magnitude system; however, a negative number, -N, is represented by its 2’s complement, Ѝ.

Page 37: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Finding the 2’s complementЍ = 2n – NNote that N = (2n – 1) – N.This implies Ѝ = 2n – N = (2n – 1 – N) + 1 = N + 1

Another way of finding the 2’s complement of a binary number is as follows:

Start at the right with the LSB and write the bits as they are up to and including the first 1.

Take the 1’s complement of the remaining bits.

Page 38: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Back to True Binary Form

To convert from 1’s complement back to the true binary, reverse all the bits. To go from 2’s complement form back to true binary, take the 1’s complement of the 2’s complement number and add 1 to the least significant bit.

Page 39: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

ARITHMETIC OPERATION WITH SIGNED NUMBERS

Addition of Signed Numbers

The two numbers in an addition are the addend and augend. The result is the sum. There are four cases that can occur when two signed binary numbers are added.

Page 40: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Four Cases of Signed Binary Addition

• Both numbers positive• Positive number with magnitude larger than

negative number• Negative number with magnitude larger than

positive number• Both numbers negative.

Page 41: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Both Numbers Positive

00000111 7 00000100 4 00001011 11

The sum is positive and is therefore in true (uncomplemented) binary.

+

Page 42: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Positive number magnitude larger than negative number:

00001111 1511111010 6

1 00001001 9 

The final carry bit is discarded. The sum is positive and therefore in true (uncomplemented) binary.

+

Page 43: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Negative number with magnitude larger than positive number

00010000 1511101000 2411111000 8

The sum is negative and therefore in 2’s complement form.

+ -

-

Page 44: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Both numbers negative

11111011 -5

11110111 -9 1 11110010 14

The final carry bit is discarded. The sum is negative and therefore in 2’s complement form.

+

+

+

Page 45: CSC 331: DIGITAL LOGIC DESIGN COURSE LECTURER: E. Y. BAAGYERE. CONTACT: 0249990362. LECTURE TIME: 15:40  17:45 hrs. VENUE: SP-LAB

Over flow:When two numbers are added and the number of bits required to represent the sum exceeds the number of bits in the two numbers, an overflow results as indicated by an incorrect sign bit. An overflow occurs only when both numbers are negative or both numbers are positive.

Example:

01111101 125 00111010 5810110111 183

    In this example the sum of 183 requires eight magnitude bits. Since there are seven magnitude bits in the numbers (one bit is the sign bit), there is a carry into the sign bit which produces the overflow indication.