crossing the chasm - stanford university · 2 detection & imaging systems nious technologies...

1 Detection & Imaging Systems Nious Technologies

Nagarkar

Prekas

HEFT

Calis

te -

Le

ti

Leti

NuStar

Gridmet

Cd(Zn)Te Detectors from Material to Packaging

Csaba Szeles


• Room-temperature, energy discriminating, high spatial

and good timing resolution, large-area, high-flux detector

arrays for the few keV to few 10x keV energy range.

• Detector technology must provide

– Large-area detectors • Few 10x cm2 to several m2 active area detector arrays

– High-spatial resolution imaging arrays • Few 10x to few 100x microns pitch pixelated arrays

– High-flux capability • Few 10x to few 100x million counts/sec/mm2

– Uniform amplitude and temporal response of pixels

– No or minimum predictable response drift

– Superior long-term reliability

Applications Needs


“Technology: No Place for Wimps!”

Scott Adams - American Cartoonist


Cd(Zn)Te Detector Technology 2012

• Crystal growth technology

– Materials engineering

– Crystallization problem

• Sensor fabrication technology

• Packaging technology

• Detector reliability

• Read-out electronics

• High-flux challenge


Materials Engineering • Why Cd(Zn)Te?

• GaAs offers more mature and superior crystal growth and device

fabrication technologies.

• However, GaAs still lacks the method and technology to compensate

intrinsic deep-level defects that dominate charge transport and lead to

poor charge collection.

• Despite the more complex material science & less mature technology

Cd(Zn)Te proved to be a more viable choice as a room-temperature

direct conversion detector.

0.1

1

10

100

1000

10000

1 10 100

m(c

m2/g

)

Photon energy (keV)

Mass-absorption Coefficients

CdZnTe

GeSi

CsI Se

GaAs


Materials Engineering • The principal charge transport properties of the crystals

governing the performance of semiconductor detector

devices are the bulk resistivity () and the mobility-lifetime

products of electrons (mee) and holes (mhh).

– While Schottky barrier or p-n junction detectors are manufactured

from low bulk resistivity semiconductor crystals it is typically difficult

to achieve large depletion depths with his approach.

– High bulk resistivity (semi-insulating) crystals offer large depletion

depths and high detection efficiency in the hard x-ray energy range.

– Achieving high bulk resistivity consistently and with good uniformity

in Cd(Zn)Te crystals requires active electrical compensation.

– The chosen electrical compensation technique must provide high

mobility-lifetime product of electrons and holes.


Materials Engineering • Electrical compensation: Experimental evidence

– It has been shown experimentally that semi-insulating CdTe and CdZnTe

can be obtained from Te-rich melt or solution by donor doping using Cl or

group III elements: In, Al, Ga.

• Bulk electrical resistivity in the 109-1010 -cm range is typically achieved.

– Importantly this electrical compensation method (unlike in GaAs) preserves

the high electron transport of the material.

• Typically me of 10-3-10-2 cm2/V is achieved

• Compensation mechanism – Due to their low formation energy Cd vacancies

are the dominant defects in CdTe and CdZnTe. • Undoped CdTe and CdZnTe is low-resistivity p-type due

to the dominance of Cd vacancy that is a

double acceptor (VCd2-).

– Technologically feasible electrical compensation requires • Formation of deep-level defects at the middle of the band gap, or

• Self-compensation mechanism.

S.H. Wei & S.B. Zhang PRB 66, 155211 (2002)

M.H. Du et al JAP 104, 93521 (2008)

G.F. Neumark PRB 26, 2250 (1982)

Cs. Szeles IEEE TNS 51, 1242 (2004)

VCd

0

0.5

1

1.5

2

2.5

3

3.5

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6

Fermi level (eV)

Fo

rma

tio

n E

ne

rgy

(e

V) Cdi

VCd

TeCd

In(Al)Cd

EF

Te richTe rich

In(Al)Cd-VCd

0

0.5

1

1.5

2

2.5

3

3.5

0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 1 1.1 1.2 1.3 1.4 1.5 1.6

Fermi level (eV)

Fo

rmatio

n E

nerg

y (eV

) Cdi

VCd

TeCd

In(Al)Cd

EF

Te richTe rich

In(Al)Cd-VCd


The Crystallization Problem • Crystallization is the phase transformation occurring along

the liquid-solid or vapor-solid interface.

• We are aiming at atomic perfection of the crystallized solid.

• Our success is solely determined how well we can control

the microscopic interfacial phenomena with far-field

macroscopic state parameters.

liquid

solid

Control Crystal properties:

YieldSX,

Cdefect(x,y,z),

(x,y,z),

…

Far field variables:

C, T, P,

Interfacial variables:

Ci, Ti, Pi, i


The Crystallization Problem

Macroscopic crystallization phenomena

Phase equilibria Hydrodynamics

Solute partitioning Heat transport

Solute transport

Microscopic interface phenomena

Nucleation

Attachment kinetics

Interface energetics

Interface morphology

Defect generation

Crystal growth process development


The Crystallization Problem • Insufficient control over the atomic perfection and the

proliferation of crystal defects is the continuing principal challenge of Cd(Zn)Te crystal growth technologies.

• The unavoidable formation of crystal defects during solidification and the ensuing defect interactions during cooling lead to a rich and complex defect structure in the crystals. – Formation of point defects during crystallization is

dictated by thermodynamics.

– Formation of structural defects is the result of the process in which the physical system is lowering its total energy under the influence of imposed fields and forces during crystal growth.


The Crystallization Problem • It well understood that point defects define the range of charge

transport properties while structural defects control the charge transport uniformity of the crystals. – Point defects: vacancies, interstitials, antisites, impurities, defect pairs,

triplets and higher-order complexes

– Structural defects: grain boundaries, subgrain boundaries, twins, stacking faults, dislocations, second-phase precipitates, inclusions

• Challenges of Cd(Zn)Te crystal growth

– Parasitic nucleation

– Physical defect generation

– Defect interactions

3 mm3 mm

Sub-Grain

boundaries Grain boundaries

Twins


The Crystallization Problem • Control of microscopic interfacial phenomena with far-field

macroscopic parameters to minimize the formation of crystal defects at the growth interface and the near-interface region.

1. Process design for stable growth conditions – Maintain imposed process rate(s) under the natural crystallization

rate • Constitutional supercooling, formation of structural defects

– Minimize interfacial stress • Parasitic nucleation, physical defect generation

2. Stability of interface process parameters • Parasitic nucleation

3. Nucleation and initial crystallization – Seeding is helpful to minimize early transients and improve early

crystallization stability

• Each process element is critical to minimize parasitic nucleation and physical defect formation.

1. Process design for stable growth conditions • Maintain imposed process rate(s) under the natural crystallization

rate • Constitutional supercooling, formation of structural defects

• Minimize interfacial stress • Parasitic nucleation, physical defect generation

2. Stability of interface process parameters • Parasitic nucleation

3. Nucleation and initial crystallization • Seeding is helpful to minimize early transients and improve early

crystallization stability


Crystal growth techniques • Directional solidification from melt

– Bridgman

– Gradient freeze (GF)

– Electro-dynamic gradient

freeze (EDGF)

• Solution growth

– Traveling heater method (THM)

– Solvent evaporation

• Vapor growth

– Physical vapor transport (PVT)

Tm

Temperature

Z position

Furnace

motion

Temperature

Z position

Tm

Heater

temperature

Classical Bridgman Gradient Freeze

a) b)

Tm

Temperature

Z position

Furnace

motion

Temperature

Z position

Tm

Heater

temperature

Classical Bridgman Gradient Freeze

a) b)

Quartz ampoule

CZT or CdTe

polycrystalline

source charge

Te-rich

Cd-Zn-Te solvent

CZT or CdTe

single crystal

seed

CZT or CdTe

single crystal

ingot

THM PVT


Technological Successes • Seeded THM: CdTe

• Seeded THM: CdZnTe

• Unseeded HP EDGF: CdZnTe

• Hetero-seeded MT-PVT: CdTe & CdZnTe

Ø 50 mm

Ø 75 mm

Ø 140 mm

Ø 50 mm

Detection & Imaging Systems


Detector Manufacturing

CdZnTe ingot

CdZnTe sensors

Sensor

Fabrication

Packaging

Testing


Sensor Fabrication Technology • Sensor Fabrication

– Convert the Cd(Zn)Te crystals into semiconductor sensors & sensor arrays that meet the performance requirements.

• Device Performance & Manufacturing Yield – Minimize the presence of surface, subsurface and interface physical and

chemical defects that deteriorate charge transport in the crystal and sensor performance.

• Reliability – Ensure that the device structure and materials used to form the sensor have

longevity to avoid short and long-term performance drift problems.

• Testing & Packaging Requirements – Ensure that the device structure and materials used enable the testing &

packaging of the sensor with readout electronics.

CdZnTe ingot

CdZnTe sensor

Sensor

Fabrication


Sensor Fabrication Technology

• CdZnTe is extremely brittle

• Principal challenges – Minimizing saw damage

(subsurface)

– Dimensional control

• Chipping & cleavage

• Key technologies – Wire saw slicing & dicing

– Low damage blade dicing

0.0E+00

2.0E-03

4.0E-03

6.0E-03

8.0E-03

1.0E-02

1.2E-02

1.4E-02

1.6E-02

0 5 10 15 20

Tip <- Sample number -> Heel

Ele

ctr

on

m

(cm

2/V

s)

Ingot 1 Row AIngot 1 Row BIngot 2 Row AIngot 2 Row B

MWS slicing

Material

Characterization

Crystal

Growth

Ingot slicing

Single crystal

mining

Crystal dicing

Sensor

Fabrication

50 mm

75 mm

Kerf: 300 mm


Sensor Fabrication Technology

CdZnTe

Non-stoichiometric

surface layer Slicing

Dicing

Surface

Preparation

Packaging

Surface

Passivation

Pre-bond

Chip Test

CdZnTe

Electrode

layer

Interface

Passivation

layer

Electrode

Patterning

Electrode

Deposition


Sensor Fabrication Challenges • Dimensional control of lithography

• Electrode adhesion & mechanical properties of electrode material

• Stress & uniformity of electrode films

• Electrical properties of surfaces & interfaces: noise sources, breakdown voltage, charge steering and trapping

– Cd(Zn)Te detectors are Schottky barrier devices

– Inter-pixel and side surface passivation films are part of the device structure

– Device noise, breakdown voltage, charge steering and trapping are controlled by surface, subsurface, interface & bulk crystal defects

• Device fabrication thermal budget – Need low-temperature processes (≤ 150ºC)

• Long-term stability of surface films & interfaces – Surface & interfacial corrosion

CdZnTe

Side-surface

passivation

Electrode

layer

Interface

Passivation

layer


Charge Collection Distortions

M74-677811-3

FWHM = 9.8%

FWHM = 5.9%

M74-677811-3

M74-677907-5

FWHM = 19%

Low PPE

FWHM > 8%

Good pixel, FHWM <8% Camarda, SPIE 8142, 814202 (2011)

Insulating

layer Non-contact

metal shield

(Frisch-ring)

Anode

Cathode

Side-surface charge trapping in

Virtual Frisch-grid detectors

CdZnTe 3×3×6 mm3

FWHM = 6.9%

M74-677907-5

Charge trapping at inter-pixel surfaces

16×16 pixel, 25×25×5 mm3 CdZnTe

SPECT detector

Re-processing

inter-pixel

surfaces


Packaging • Cd(Zn)Te sensors are typically attached to the

readout chip or an interposer board (substrate)

using flip-chip bonding.

Bumping

• Screen printing

Detector

Placement

Detector

Assembly Mounting

substrate

Curing

Bumping

Reflow

Fluxing

Placement

Reflow

Underfill & curing

Flip-Chip Bonding with

Solder Bumps

Flip-Chip Bonding Process Flow


Packaging • The most widely used interconnect technologies are:

low-temperature solder, electrically conductive adhesive (ECA), & stud bonding combined with ECA.

Low-temperature

solder bump

Si chip

Cd(Zn)Te

Cd(Zn)Te

Interposer

board

ECA

Cd(Zn)Te

ECA

Au stud bump

50 mm / 50 mm

300 mm / 300 mm

50 mm / 300 mm


Detector Reliability • Short and long term performance instability and drift

are major concerns for Cd(Zn)Te radiation detectors. – Instability: erratic, intermittent performance variation

– Drift: gradual performance degradation on time scales from seconds to months

– Can be reversible or irreversible

• Root causes – Bulk crystal effects

• Changes in the crystal’s defect structure

• Space-charge formation

– Sensor surface, interface & near-surface effects

– Packaging-induced effects


Detector Reliability • Packaging induced stress and strain

– Temperature cycles during solder reflow, ECA curing and underfill curing determine the initial residual stress and strain distribution in the Cd(Zn)Te crystal.

• The induced strain during the bonding process may cause the formation of defects in the crystal at the foot of the bond bumps.

2.3mm FR4/0.16mm Thick 0.6mm Diameter Silver Epoxy/5mm

CZT without Underfill

CdZnTe

FR4 board

• Optimized packaging design – CTE matching between

Cd(Zn)Te and substrate

– Choice of interconnect and underfill materials and optimized curing program to minimize residual stress in the Cd(Zn)Te crystals.


Detector Reliability • Packaging induced stress and strain

– Temperature cycling during detector usage may stimulate the formation of additional defects.

• Excessive stress at the interconnect may cause catastrophic failures such as bond bump or crystal fracturing.

– Prolonged exposure to elevated temperature and high bias fields during detector operation may lead to complex defect formation, migration and relaxation phenomena in the bond-induced stress field in the Cd(Zn)Te.

Cracks in

CdZnTe

Cracks in

ECA bump

0 40 80 120 160

CHANNEL NUMBER

0

100

200

300

400

500

600

700

800

900

1000

1100

1200

1300

1400

1500

1600

1700

1800

1900

2000

CO

UN

TS

Pre-Post EI-NY Bonding 676136-02 pixel 16

unmounted test

post mounted test

N02PX16.GRF N02PX16.DAT SAS 06-08-11

0 40 80 120 160

CHANNEL NUMBER

0

100

200

300

400

500

600

700

800

CO

UN

TS

Pre-Post EI-NY Bonding 676136-13 pixel 03

unmounted test

post mounted test

N13PX03.GRF N13PX03.DAT SAS 06-08-11

Pixelated CdZnTe detector 57Co, low-flux

Double peak

Strongly distorted

photopeak


Readout Electronics • Photon counting ASICs landscape

– CERN: Medipix2, Medipix3, Timepix

– Paul Scherrer Institute - Dectris: Pilatus XFS, Mythem II

– Centre de Physique des Particules de Marseille: XPAD3

– Ajat-Xcounter

– SP Devices-U. Linkoping

– Interon-DxRay

– Philips - Aeroflex: ChromAIX

– Gamma-Medica – Ideas: CA, XA

– Nova R&D - Kromek: Rena, Dana, Xena, Mary, Imelda

– BNL - eV PRODUCTS: MW-ASIC


High Flux Challenge • High-flux x-ray imaging poses challenging

requirements for the employed detectors.

Imaging Requirements

Response uniformity &

repeatability

Spatial

Temporal

Count-rate

Energy

Short-term stability

No polarization

Long-term stability & reliability

Stable response over

days, weeks, moths, years

Performance Requirements

X-ray stopping power

Flux dynamic range

Response speed

Delayed response

(“Afterglow”)

Response time < 10 ms

over 5 decades of flux

Signal to noise ratio


High Flux Challenge • Under high-flux x-ray irradiation the electronic system of the

semiconductor sensor is not in thermal equilibrium anymore but in

dynamic equilibrium with the photon field.

• When the rate of charge injection from the x-rays surpasses the

charge-removal rate a space-charge region forms in the detector that

– paralyses carrier transport: polarization,

– deteriorates signal shape and amplitude

– loss of energy & temporal information.

25 75 125 175 225 275 325 3750.00

2.50x105

5.00x105

7.50x105

1.00x106

1.25x106

1.50x106

Co

un

ts/s

ec

X-ray tube current (mA)

25 75 125 175 225 275 325 3750.0

2.0x105

4.0x105

6.0x105

8.0x105

1.0x106

1.2x106

1.4x106

1.6x106

1.8x106

2.0x106

2.2x106

Co

un

ts/s

ec


Non-polarizing device Polarizing device Sensor:

1616-channel 2D

monolithic CdZnTe array

3 mm thick, 500 mm pitch.

Critical flux of

polarization

Szeles et al IEEE TNS 55, 572 (2008)


High Flux Challenge • Catastrophic effect: polarization

-5

-4

-3

-2

-1

0

0 0.2 0.4 0.6 0.8 1

Electric Field at t = 14.88 ms

Low Flux Field

Electric Field

Electric Potential /

E

V L

zL

“pinch” point

Cathode Anode

Bale & Szeles, Phys Rev 77, 35205 (2008)

0

2e+09

4e+09

6e+09

8e+09

1.0e+10

1.2e+10

1.4e+10

1.6e+10

0 20 40 60 80 100 120

Low Flux 1040 mA 1120 mA 1200 mA 1280 mA

Pu

lse H

eig

ht

Sp

ectr

um

Energy [keV]

Low-energy threshold

0

1e+10

2e+10

3e+10

4e+10

5e+10

6e+10

0 200 400 600 800 1000 1200 1400

Total Counts

Counts >Threshold

Tube Current [mA]

Co

un

ts

Critical Flux

25 75 125 175 225 275 325 3750.00

2.50x105

5.00x105

7.50x105

1.00x106

1.25x106

1.50x106

Co

un

ts/s

ec


Prekas et al JPD-AP 43, 85102 (2010)


High Flux Challenge • Space charge has a profound effect on charge transport and

signal formation in semiconductor detectors even before the onset of catastrophic effects.

• Dynamic i.e. flux-dependent effects could lead to very complex detector response patterns under high-flux exposure conditions. – Dynamic lateral polarization i.e. flux-dependent charge steering

causes count-rate uniformity.

– The non-uniform electric field distribution causes strong distortions to temporal evolution and amplitude of the detector signal resulting in the loss of temporal and energy information.

Bale & Szeles JAP 107, 114512 (2010)

Simulated preamplifier and amplified signal with

increasing non-uniform space-charge.

100 %

50 %

60 %90 %

100 %

50 %

60 %90 %

Soldner et al IEEE TNS 54, 1723 (2007)

Bale et al APL 92, 82101 (2008)

Collected charge

profile

Lensing

electric

field lines

Lateral electron

velocity component

X-ray flux

Collected charge

profile

Lensing

electric

field lines

Lateral electron

velocity component

X-ray flux

45005000550060006500700075008000850090009500

10000

2

4

6

8

10

4000

6000

8000

10000

2 4 6 8 10

2

4

6

8

10

45005000550060006500700075008000850090009500

10000

2

4

6

8

10

4000

6000

8000

10000

2 4 6 8 10

2

4

6

8

10

Low flux

High flux

Irradiated area


The Gaps • Advanced crystal growth technologies are needed to

achieve a revolutionary improvement in the charge transport uniformity of Cd(Zn)Te sensors. – Technology development must address two key challenges:

• Is there a fundamental limit to the controllability of microscopic interface parameters by the control of macroscopic parameters?

• Crystal growth processes must be designed around suppressing the formation of physical defects.

– Extending the dynamic range and temporal response uniformity of detectors for high-flux applications requires the parallel reduction of both electron and hole trapping at various crystal defects.

• Advancement of sensor fabrication technologies is needed to improve the charge collection uniformity and stability of Cd(Zn)Te sensors.

• Advancement of detector packaging technologies is needed to achieve uniform detector performance and improved long-term reliability of Cd(Zn)Te detector arrays.

• ASIC advancement is needed to address the high-flux challenge.


• For a successful technology, reality must

take precedence over public relations, for

Nature cannot be fooled.

– Richard P. Feynman (1918-1988)

U. S. physicist, Nobel Prize, 1965.

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