copyright 2011, divya reddy

New Architecture Development for Energy Harvesting

by

Divya Reddy, B. Tech

A Thesis

In

ELECTRICAL ENGINEERING

Submitted to the Graduate Faculty of Texas Tech University in

Partial Fulfillment of the Requirements for

the Degree of

MASTER OF SCIENCE

IN ELECTRICAL ENGINEERING

Approved

Dr. Stephen B Bayne Chair of Committee

Dr. Changzhi Li

Peggy Gordon Miller Dean of the Graduate School

August, 2011

Texas Tech University, Divya Reddy, August 2011

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ACKNOWLEDGMENTS

My deepest gratitude goes to my advisor, Dr. Stephen Bayne for his invaluable advice to

my research as well as my career. I am also grateful to Dr. Changzhi Li for his helpful

suggestions and problem solving approach to the research.

I am extremely thankful for the encouragement and support my parents and family

extended to me throughout my endeavors.

I would like to thank Scotte Thomas and Sandeep Nimmagadda for their insightful

comments and help throughout the project. I am grateful to my friends, professors and

staff at Texas Tech University for the support and for making my journey fruitful and

successful.


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TABLE OF CONTENTS ACKNOWLEDGMENTS....................................................................................................ii

ABSTRACT..........................................................................................................................v

LIST OF TABLES...............................................................................................................vi

LIST OF FIGURES............................................................................................................vii

CHAPTER

I. INTRODUCTION......................................................................................................1 1.1 Applications..............................................................................................................2 1.2 Research Objective...................................................................................................3 1.3 Energy Harvesting System Overview.......................................................................3 1.4 Outline.......................................................................................................................5 II. ENERGY TRANSDUCERS......................................................................................6 2.1 Piezoelectric Generator ............................................................................................6 2.1.1 Testing of Piezoelectric Generator..................................................................... 9 2.1.2 Test Results.......................................................................................................11 2.2 Antenna...................................................................................................................15 2.3 Conclusion..............................................................................................................17 III. ENERGY HARVESTING IC ELECTRONICS................................................... 18 3.1 RF Energy Harvesting............................................................................................ 18 3.1.1 Rectifier............................................................................................................19 3.1.1.1 Rectifier Design in Pspice..........................................................................20 3.1.1.2 Rectifier Design in Cadence......................................................................22 3.1.2 Tradeoff Study between Different DC-DC Conversion Methods...................25 3.1.2.1 Step-up (boost) DC-DC Converter............................................................25 3.1.2.2 Cockcroft-Walton Charge Pump................................................................26 3.1.2.3 Dickson Charge Pump...............................................................................26 3.1.3 DC-DC Charge Pump......................................................................................26 3.1.3.1 DC-DC Charge Pump Design in Cadence.................................................27 3.1.3.2 Charge Pump Simulation in Pspice............................................................33 3.1.4 RF Integrated Circuit.......................................................................................35 3.2 Piezoelectric Energy Harvesting............................................................................ 36 3.2.1 AC-DC Charge Pump..................................................................................... 36 3.2.1.1 AC-DC Charge Pump Design in Pspice.................................................. 37 3.2.1.2 AC-DC Charge Pump Design in Cadence................................................39


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3.3 Summary.................................................................................................................46 IV. ENERGY STORAGE............................................................................................ 47 4.1 Thin Film Battery....................................................................................................47 4.2 Low- dropout Regulator..........................................................................................50 4.3 Conclusion..............................................................................................................53 4.4 Future Work............................................................................................................54

BIBLIOGRAPHY..............................................................................................................55

APPENDICES A. TEST DATA OF 0.6µM AMI CMOS PROCESS.........................................................58


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ABSTRACT This research presents the design of an ultra-low power energy scavenging system capable

of collecting and managing energy from ambient vibrations and RF electromagnetic

waves. The main motive is to develop a self-powered system which is a substitute for

remotely placed low power batteries with rare human interaction. Firstly, the energy

transducers, commercial piezoelectric generators with a wide frequency range of 26 –

205Hz and the antenna with a center frequency of 916MHz are evaluated and

characterized to maximize the efficiency. Both antenna and piezoelectric generator can

form an array of each type to increase the energy being harvested. Secondly, the power

electronic circuits involved in the energy harvesting are designed in 0.6um CMOS

technology and the simulation results are presented. Charge pumps and rectifier were

optimized to operate with low voltage ranges since the energy produced by the

piezoelectric generator and the whip antenna is found to be in microwatts and less from

the test results. The AC output from the piezoelectric generator is rectified and boosted to

required output level using an AC-DC charge pump. A rectifier and DC-DC charge pump

are adopted for the efficient conversion of voltage from the antenna. A back-up battery

will be provided for the start-up of DC-DC charge pump at low input conditions. An

LDO is designed to provide regulated output of 4.1 V to the battery. Finally, the collected

energy will be stored in a 50uAh capacity thin film battery which is intended for low-

voltage and low-power applications.


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LIST OF TABLES

2.1 Specifications of piezoelectric generator [7].............................................................8

2.2 Test results of tuned piezoelectric generator...........................................................13

3.1 Parameter values of N- channel transistor in 0.6um CMOS technology................23

3.2 DC-DC Dickson charge pump specifications.........................................................27

3.3 Output voltage of AC-DC charge pump at different frequencies of vibrations......43


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LIST OF FIGURES

1.1 Energy harvesting estimates [2]....................................................................................2

1.2 System overview of the smart energy harvester...........................................................4

2.1(a) V21b with tip mass, M21b.......................................................................................7

2.1(b) V22bl with tip mass, M22b......................................................................................7

2.2 Stack of two piezos connected in series [8]..................................................................9

2.3 Stack of piezos connected in parallel [8]......................................................................9

2.4 Piezoelectric generator test set-up on shaker...............................................................10

2.5(a) Graph representing output voltage vs. frequency at amplitude of 0.25g................11

2.5(b) Test results of un-tuned V22bl at amplitude of 0.5g..............................................11

2.5(c) Output voltage vs. frequency graph at amplitude of 0.75g.....................................12

2.5(d) Test results of un-tuned piezoelectric generator (V22bl) at amplitude of 1g.........12

2.6 Picture of the output voltage obtained on the fluke oscilloscope at 27Hz and 0.75g amplitude.......................................................................................13

2.7 Spectral analysis of the above signal...........................................................................14

2.8 Performance power characteristics of V21b................................................................14

2.9 Whip antenna...............................................................................................................16

3.1 RF energy harvesting block diagram...........................................................................18

3.2 Schematic and the waveforms of half-wave rectifier..................................................19

3.3 Positive and negative half cycles of a full-bridge rectifier.........................................20

3.4 Full wave rectifier schematic and output ripple voltage in Pspice..............................21

3.5 Output voltage of designed full wave rectifier...........................................................22

3.6 Rectifier schematic in cadence...................................................................................24

3.7 Full wave rectifier transient response in cadence.......................................................25

3.8 DC-DC Dickson charge pump operation....................................................................27

3.9 Dickson charge pump schematic with 9 stages...........................................................29

3.10 Pump output vs. time graph......................................................................................30

3.11 Charge pump’s schematic, clock output and pump transient response at Vφ = 1V, Vin = 1V and N = 16 stage.......................................................................31


viii

3.12 Output voltage vs. load capacitance..........................................................................32

3.13 Pump output voltage vs. different clock amplitudes.................................................33

3.14 DC-DC charge pump schematic in Pspice and output voltage waveform................34

3.15 Integrated RF energy harvesting circuit...................................................................34

3.16 Output voltage of integrated circuit...........................................................................35

3.17 Piezoelectric energy harvesting.................................................................................36

3.18 AC-DC charge pump design in Pspice......................................................................37

3.19 Unit cell of the AC-DC charge pump........................................................................38

3.20 Output voltage across the load capacitance...............................................................39

3.21 Design of AC-DC charge pump in cadence..............................................................40

3.22 Output voltage of AC-DC charge pump....................................................................41

3.23 Output voltage with MOSFET width, W = 115.5µm (L = 0.6 µm)..........................41

3.24 Output voltage with MOSFET width, W = 57.75µm (L = 0.6 µm)..........................42

3.25 Output voltage vs. different load capacitance of AC-DC charge pump....................42

3.26 Output voltage vs. different input frequencies of AC-DC charge pump...................43

3.27 AC-DC charge pump design for worst case condition..............................................44

3.28 2-stage AC-DC charge pump design to illustrate output voltage variation with change in the amplitude of input signal..............................................45

4.1 Thin Film Battery (CBC050) by CYMBET Corporation [23]....................................47

4.2 Charging profile of TFB [25].......................................................................................48

4.3 Charging voltages [25].................................................................................................49

4.4 Discharging characteristics of TFB [21]......................................................................49

4.5 Typical Low-dropout regulator topology....................................................................50

4.6 Integrated piezoelectric energy harvesting circuit.......................................................51

4.7 Transient waveforms of input and regulated output signals........................................52

4.8 Op-amp design in cadence...........................................................................................53

4.9 Block diagram representing the future work...............................................................54


1

CHAPTER I

INTRODUCTION Energy harvesting is the process of extracting ambient energy available from the

environment and converting it into usable electrical energy. The common challenge in

implementing wireless sensors and other low-power electronics is supplying energy for

the life time of a system. The demand for completely self-powered devices is increasing.

Energy harvesting is an attractive alternative for remotely deployed low voltage batteries,

wireless sensors and inconvenient wall plugs [1].

There is an abundance of energy all around us at all times. The sources of ambient energy

include light, wind, thermal, vibrations and electromagnetic waves. The transformation of

acoustic vibrations into electrical energy is piezoelectric energy harvesting. The

piezoelectric generator produces electrical energy when mechanical stress is applied on it.

The piezo generator produces an AC output, which should be rectified and regulated to

obtain a constant DC output voltage. The conversion of ambient radio energy in the

environment into usable electrical energy is RF energy harvesting. An antenna captures

the RF energy and dc-dc charge pump converts the RF energy to appropriate DC voltage.

Key advantages of energy scavenging technology include,

▪ Inexhaustible input sources because energy is extracted from ambient sources

▪ Low cost

▪ Reduced maintenance and

▪ Operates for longer time.

There have been several studies to calculate the amount of energy that can be harvested

from various sources. One such study was carried out by Texas Instruments Inc. and a

summary can be seen in figure 1.1:


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Figure 1.1: Energy harvesting estimates [2] There are many factors that affect the collection of energy. Some of these factors are

location, proximity to the source, time of the day, orientation, etc. For example, an RF

harvester would not be very effective in the desert if radio transmissions are scarce. This

environment, on the other hand, would be ideal for a light sensor as long as the operator

is standing in plain sunlight.

1.1 Applications The multi-energy scavenging system will be able to recharge a battery that supplies

energy to the sensors that are intended to transmit information only from time to time and

at low power. For example, consider a sensor module with its battery pack placed under a

bridge to monitor the mechanical properties of the bridge. The sensor sends data during

any emergency to a distantly located control room. To power these types of remotely

placed sensor modules with rare human interaction, energy harvesting from the

environment finds its application.

Energy harvesting technology has already been commercialized in different ways by

many companies like Texas Instruments, Micro Strain, Advanced Cerametrics, Linear

Technologies, etc to name a few.


3

The tremendous growth of energy harvesting technology has led to various real time

applications like Structural health monitoring, machinery/ equipment monitoring, remote

patient monitoring, surveillance and security, efficient office energy control, Implantable

sensors and other miniaturized devices [4].

1.2 Research Objective The aim of this research is to design an ultra low power multi-energy scavenging system

capable of collecting energy from ambient vibrations and RF electromagnetic waves and

transfer the collected energy in an efficient manner to an energy storage bank consisting

of thin film battery for later use.

Since the available energy from the antenna and piezoelectric generator is less, the major

challenge in this project is to design efficient power electronic circuits capable of

converting this ambient energy into usable energy levels. AC-DC Charge pump, DC-DC

Charge pump, linear drop-out regulators and rectifier are part of the energy harvesting IC

electronics.

In this thesis, each energy harvester is evaluated and characterized to maximize the

efficiency. The power electronic circuits involved in the energy harvesting are designed

in 0.6um CMOS technology and the analytical models and simulation results are

presented. A regulated output is provided which is intended for low-voltage and low-

power applications.

1.3 Energy Harvesting System Overview The main motive of this research is to develop a self-powered system which is a substitute

for batteries that are impractical and costly. The overall system diagram can be seen in

figure 1.2 below:


4

Figure 1.2: System overview of the smart energy harvester

Two energy transducers are used to harvest energy: Piezoelectric generator and the

antenna. These transducers convert different types of energy (vibration and wave energy)

into electrical energy. Upon conversion, there are several signal conditioning circuits to

transfer the collected energy to the storage bank. The signal conditioning circuits

comprises of rectifiers and charge pumps for AC signals, and DC-DC converters and

linear regulators for DC signals. Details about these circuits are discussed in chapter 3.

The storage bank consists of thin film battery. The battery is typically charged slowly and

supplies most loads that draw low currents (in µA).

The overall efficiency of the proposed system can be improved by connecting the arrays

of piezoelectric generator or the antennas either in parallel or series to improve the output

current or voltage respectively depending on the load requirements.


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1.4 Outline Chapter 2 provides the basic working concepts of piezoelectric generator and antenna. The

specifications and test set-up of the commercial energy transducers used are presented in this

chapter. The test-results are analyzed and conclusions are presented in this chapter.

The details of energy harvesting IC electronics are discussed in chapter 3. The trade-offs

in choosing a particular circuit for this application is listed. The analytical models and

simulation results of rectifier, DC-DC charge pump, and AC-DC charge pump are

provided in this chapter. The power electronic circuits are designed in both Pspice

simulation tool and Cadence.

The test results and conclusions from chapter 2 are used as a base to decide few of the

design parameters for the circuits simulated in chapter 3. Thin film battery technology

and charging technique are presented in chapter 4. Design of Low-dropout regulator

along with the error amplifier is provided. Also, future work of this research project is

discussed in this chapter.


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CHAPTER II

ENERGY TRANSDUCERS

2.1 Piezoelectric Generator The transformation of acoustic vibrations into electrical energy is piezoelectric energy

harvesting. A piezoelectric substance generates electricity when mechanical stress is

applied on it. Piezoelectric substances produce moderate power densities from vibrational

energy, sufficient for low-voltage applications like low power wireless sensors, battery

replacement for portable devices and other miniaturized devices [5].

When mechanical pressure is applied on a piezoelectric material, it produces voltage

proportional to the applied pressure. This phenomenon is called piezoelectric effect.

Quartz, cane sugar, Rochelle salt, topaz, tourmaline and berlinite are some of the

naturally occurring piezoelectric crystals [6]. Piezoelectric effect can be induced by

applying strong electric field to an unsymmetrical crystal. The molecules in the crystal

will move freely due to the heat and align in the same direction.

The Piezoelectric generators do not need any additional components for its operation.

They are compact in size and can be fabricated in custom shapes with low maintenance.

The fundamental limit is, piezoelectric materials are brittle and tend to breakdown at

larger fields.

The main factors in selecting a piezoelectric vibrator are,

▪ Frequency (input excitation)

▪ Geometric design – size and weight constraints

▪ Electric load to be powered

▪ Temperature range of operation

▪ Insulation from atmospheric chemicals


7

The size of the generator is not a concern, as user can select a piezoelectric vibrator within

the specified frequency range and inertial mass. The MIDE engineering smart

technologies is providing wide range of piezoelectric harvesting products. Two different

frequency range generators are selected for experimental purposes. Commercial piezo

generators are not available at very low frequencies (1Hz – 25Hz) but energy harvesting

modules (including power electronics) are available for wide range of frequencies. A raw

piezoelectric generator without any electronics included is selected for this application.

Two piezoelectric generators (shown in figure 2.1), V21b and V22bl with a frequency

range of (80-205Hz) and (266-110Hz) respectively are acquired from MIDE engineering

smart technologies. Performance characteristics and other important specifications are

listed in table 2.1.

Figure 2.1(a): V21b with tip mass, M21b

Figure 2.1(b): V22bl with tip mass, M22b


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Specifications:

Table 2.1: Specifications of piezoelectric generator [7]

Piezoelectric Generator

Frequency range(Hz)

Device Size(in)

Performance

V21B

80-205

2.74 x 0.67 x

0.032

V22BL

26-110

2.5 x 0.24 x 0.025

These piezoelectric generators are insulated for protect from harsh environments and

humidity and can operate under wide temperature range of -40 to 90° C. Each

piezoelectric generator consists of two stacks of Piezos. They can be connected either

in series or parallel to maximize the input energy extraction from ambient vibrations.

The pin connections are shown in figures 2.2 and 2.3. The series connection will

double the open-circuit voltage compared to a single wafer and parallel connection

doubles the current compared to single wafer. The output from the piezo is an AC

signal of varied amplitude depending on the captured natural vibrations.


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▪ Series Connection

Figure 2.2: Stack of two piezos connected in series [8]

▪ Parallel Connection

Figure 2.3: Stack of piezos connected in parallel [8]

2.1.1 Testing of piezoelectric generator For maximum power efficiency, the piezoelectric generator must be clamped to the

vibration source in cantilevered position. The frequency of the generator should be

matched to the frequency of the vibrational source for optimizing energy harvesting.

Tuning mass should be used for the frequency matching. After clamping the device to

the source (for example, bridge for structural health monitoring), tuning mass should

be placed on the edge of the cantilevered piezo generator. By connecting an

oscilloscope at the output, the tuning mass should be adjusted till maximum output is

achieved. The natural frequency lowers with increase in the weight of tuning mass.


10

The device was tested for evaluation on a laboratory shaker. Acceleration and

frequency of vibrations are controlled by LAB View program. Figure 2.4 shows the

test set-up of the piezoelectric generator on a laboratory shaker.

Figure 2.4: Piezoelectric generator test set-up on shaker

Test Procedure:

▪ Clamp the piezo element to the vibration shaker.

▪ The natural frequency of the generator should be matched to that of the shaker.

The tuning mass, M21b should be added to the end of the piezo generator,

V21b.

▪ Bee’s Wax can be used for non-permanent attachment of the tuning mass to the

generator.

▪ The output pins of the generator should be attached to the oscilloscope and

tuning mass should be adjusted until the maximum power is achieved.

▪ The piezo generator should be tested at different frequencies – 80Hz, 100Hz,

105Hz, 120Hz, 140Hz, 150Hz, 175Hz, 205Hz, 275Hz and 2.4 grams tip mass.

The test setup for V22bl was same as V21b except the tuning mass, M22b is used

instead. The tip mass of M22b is 1.0 gram.


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2.1.2 Test Results Test Results of un-tuned (without the tip mass attached) piezo generator (V22bl): The piezo generator is tested for the frequency range of 30–110 Hz at four different

amplitudes (0.25g, 0.5g, 0.75g, 1g) and results are presented below in figure 2.5(a)

through 2.5(d).

Figure 2.5(a): Graph representing output voltage vs. frequency at amplitude of 0.25g

Figure 2.5(b): Test results of un-tuned V22bl at amplitude of 0.5g


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Figure 2.5(c): Output voltage vs. frequency graph at amplitude of 0.75g

Figure 2.5(d): Test results of un-tuned piezoelectric generator (V22bl) at amplitude of 1g


13

Test Results of tuned piezo generator (V22bl): The piezoelectric generator was configured in series with no load connected at the output. Test results are presented in table 2.2 and output waveforms are shown in figures 2.6 and spectral analysis in figure 2.7.

Table 2.2: Test results of tuned piezoelectric generator

Tip Mass (gram)

Frequency (Hz)

Amplitude(g)

Open Circuit Voltage (RMS)

Open Circuit Voltage ( Peak)

Expected Results (from the datasheet)

1 27 0.25 0.769 V 1.120 V - 1 27 0.50 1.71 V 2.64 V - 1 27 0.75 4.2 V 6.4 V - 1 27 1 0.452 V 0.64 V - 1 30 0.25 1.87 V 2.80 V - 1 30 0.50 2.52 V 3.84 V - 1 30 0.75 3.07 V 4.72 V - 1 30 1 0.686 V 0.112 V - 1 35 0.25 1.47 V 2.24 V 8 V 1 35 0.50 1.94 V 2.88 V 11.5 V 1 35 0.75 2.39 V 3.68 V 14 V 1 35 1 - - 23.4 V 1 45 0.25 0.429 V 0.72 V - 1 45 0.50 1.09 V 1.60 V - 1 45 0.75 1.43 V 2.16 V - 1 45 1 1.34 V 2.0 V -

Figure 2.6: Picture of the output voltage obtained on the fluke oscilloscope at 27Hz and

0.75g amplitude


14

Figure 2.7: Spectral analysis of the above graph

By analyzing the results, it can be observed that tuned piezoelectric generator provides

greater output voltage. Also, voltage at the output varies according to the load

connected. The performance characteristics of V21b can be seen in figure 2.8. It can

be inferred that the maximum output current available from the piezoelectric generator

is not more than 100µA.

Figure 2.8: Performance power characteristics of V21b


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2.2 Antenna Radio frequency electromagnetic waves are available from mobile phones, TV, wireless

LAN, radio, etc. The energy transmitted from these sources is mostly observed by

surrounding environment (walls, objects and other interferences) or dissipated in the form

of heat [9][10]. A small amount of this available energy can be harvested to power ultra-

low power sensors and miniaturized devices. An antenna in receiving mode transforms RF

electromagnetic waves into electrical signals.

When an alternating current is passing through a conductor or a wire, it will generate a

varying electromagnetic field across the wire. This acts as a transmitter. If another

conductor is placed nearby, this electromagnetic field will induce a current which is

proportional or weaker to the original current. This conductor is called receiver. If the

wire is long enough, it will radiate energy to longer distances [11].

Choosing a right type of antenna for the specific application is required to realize good

range performance. The various factors to be considered while choosing an antenna are,

▪ Antenna placement and path (obstructed/ unobstructed)

▪ PCB materials and undesirable magnetic fields on the PCB

▪ Antenna and load impedance matching

▪ Antenna gain characteristics

▪ Antenna bandwidth and efficiency

There are several types of antennas to choose from for a specific RF application. A PCB

or chip antenna would be the best option if the antenna is a part of ASIC design, but

because of the size of these antennas, these devices have a very narrow bandwidth and

must be made to the exact frequency. A patch antenna is highly directional and can

receive signals only in one direction and also requires a larger plane. For wide frequency

range, a monopole or dipole can be used. For initial testing, a reduced-height helical whip

antenna with a center frequency of 916MHz is chosen. This monopole antenna is Omni-

directional which means it can receive the RF waves from all the directions. Most of the

radio communication signals lie in 500MHz – 10GHz range. The 916MHz frequency falls


16

under ISM (Industrial, Scientific and Medical) band. Since this frequency is not used for

mass communication, the interference is less to other devices or from any device to our

experiment. This frequency is intended for low power applications and experimental

purposes. It was also easy to acquire a commercial antenna at this frequency. Apart from

this, low power and broadband equiangular spiral antenna which is able to receive and

rectify ambient RF radiation is designed and simulated as a part of this project.

Specifications of the whip antenna (ANT-916-CW-RH) are as follows [12],

▪ Frequency : 916MHz (898.5MHz ~ 933.5MHz)

▪ Bandwidth : 35MHz

▪ Wavelength : 1/4-wave

▪ VSWR : 1.9

▪ Impedance : 50 ohms

▪ Connector : SMA

Figure 2.9: Whip antenna

The three main factors that influence the performance of an antenna are the placement,

gain and polarity. The output of the antenna is directly related to the ground plane. If the

ground plane is big enough, the output from the antenna will increase. The whip antenna

should be mounted normally on a ground plane to obtain best performance and it requires

a large ground plane. The radiation pattern is Omni-directional. Hence, it has same

performance for all directions. The whip antenna is a good solution if the size is not a

concern. Antenna performance is also affected by dimensions of nearby objects, cable


17

connections and shape of the circuit board. Whip antenna was tested using a network

analyzer. SMA connecter is used to connect the antenna to a ground plane. Since the

impedance of the antenna is fixed at 50ohms, this antenna can be tuned by analyzing the

VSWR display.

2.3 Conclusion By analyzing the test results of piezoelectric generator and antenna, it can be concluded

that the energy output from the ambient vibrations is very less. Piezoelectric generators

provide output voltages ranging from few hundreds of mill volts to 15V (maximum output

voltage from V21b at favorable conditions). The current output is in micro amperes. The

power output from RF energy is in few micro watts. Efficient power electronic circuits are

required to transfer this low power to a battery. The signal conditioning circuits are

designed in 0.6µm technology.


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CHAPTER III

ENERGY HARVESTING IC ELECTRONICS The crucial and challenging part of this project is designing efficient power electronics

for energy scavenging system. The DC-DC charge pump, AC-DC charge pump,

rectifier and low-dropout regulator are designed in PSPICE and 0.6µm CMOS AMI

process. The simulation results and analytical models of each individual circuit are

presented in this chapter.

3.1 RF Energy Harvesting Block diagram of RF energy harvesting is shown below,

Figure 3.1: RF energy harvesting block diagram

Radio frequency waves from surrounding environment are captured and converted

into electrical energy using an antenna (the details of the whip antenna are provided in

chapter 2). The low AC output signal from the antenna is rectified and a charge pump

is implemented to boost the DC voltage to required higher level. The low-dropout

regulator is used to provide a constant voltage of 4.1V to the thin film battery. The

load to this circuit can be a low-power wireless sensor or any other low-voltage

applications.


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3.1.1 Rectifier The input to the rectifier is an AC signal from the antenna. Rectifiers are inexpensive

and a DC output can be easily obtained in an uncontrolled manner with diodes. To

reduce the output ripples from the rectifier, a large capacitor is connected at the dc

side. A DC-DC charge pump is integrated with the rectifier circuit for the voltage

boost.

A simple Half-wave rectifier is designed using a diode and a rectifier. Either the

positive or the negative half of the ac signal passes through this circuit and the rest is

blocked as can be seen from figure 3.2(b). Since half of the power is lost in the output,

this circuit is inefficient for power transfer applications. The circuit diagram, input

and output waveforms of the half-wave rectifier is shown in the figure below,

(a) (b)

Figure 3.2: Schematic and the waveforms of half-wave rectifier

Full-wave rectification is more efficient as it converts both the polarities of input ac

signal into a dc output. The working of the full-bridge rectifier is illustrated from the

following schematics,


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(a) (b)

Figure 3.3: Positive and negative half cycles of a full-bridge rectifier

In figure 3.3, cathodes of the diodes D1 and D3 are at the same potential. Hence,

current flows through the diode with highest anode potential. In the bottom group,

anode of the diodes D2 and D4 are at the same potential. Subsequently, current tends

to flow through the diode with lowest negative potential. In the positive half cycle of

the input sine wave, current flows through the diodes D1 and D4. In the negative half

cycle, current flows through D3 and D2 and reverse biased voltages appear across

diodes D1 and D4. In this analysis, the diodes are considered to be ideal.

3.1.1.1 Rectifier Design in Pspice A smoothing capacitor is required at the output of the full wave rectifier to convert the

rippled output to a smooth DC voltage. The capacitor value to be chosen for a

specified value of ripple voltage at the output can be calculated from the equation 3-1

as shown below,

(3.1)

Where: f is the input frequency in Hz; Iout is the DC load current in amps, Cout is

output smoothing capacitor and VR is the output ripple voltage.


21

If the ripple is chosen to be 0.1% of the output voltage, the output capacitance is

obtained as 75pF. A sinusoidal input of 1V at an operating frequency of 916M hertz is

applied to the rectifier. Schottky diodes (BAT54ST) with a forward voltage of 240mV

are used for simulation in Pspice to reduce power losses across each diode. Efficiency

of the circuit depends on the applied load, current drawn and frequency of operation.

Figures 3.4 and 3.5 show the schematic, output voltage waveform and ripple voltage

of a full-wave rectifier designed in Pspice.

(a) (b)

Figure 3.4: Full wave rectifier schematic and output ripple voltage in Pspice


22

Figure 3.5: Output voltage of designed full wave rectifier 3.1.1.2 Rectifier Design in Cadence The power electronic circuits for the energy scavenging system are designed in 0.6µm

CMOS technology to develop an ASIC (Application Specific Integrated Circuit) chip

in future. The SPICE parameters and lot specific results of ON Semi 0.6um

technology are included in appendix A. Operation of these circuits mostly depends on

the working and behavior of the MOSFETs. The main dimensions to be considered are

length, width, oxide thickness, drain current and threshold voltage. The oxide

thickness, threshold voltage and few other parameters are technology dependent. The

efficiency of the circuit can be improved by choosing right aspect ratio (W/L) for the

MOSFET. The other characteristics like junction breakdown, oxide breakdown and

punch through issues become critical when dealing with high-voltage transistors [15].

Schottky diodes in the schematics of figure 3.4(a) are replaced by diode-connected

MOSFETs in CADENCE schematic design, since the diode models are not readily


23

available in this technology. When the drain and gate are short or tied together,

MOSFET acts as a diode. Since, both the drain and gate are positively biased, VD >

VG - VT and VG > VT. This implies the device is operating in saturation region.

In saturation region of a MOSFET, the drain current ID is represented as

(3.2)

Or (3.3)

Where, Cox = In the above equation, µ is surface mobility of the carriers, ε is the permittivity of the

gate insulator, tox is thickness of gate insulator, and W and L are the width and length

of the channel [16].

For a diode-connected MOSFET case, the characteristic becomes [17],

(3.4)

Few spice parameters from test data of 0.6µm technology mentioned in appendix A, is

depicted in table 3.1.

Table 3.1: Parameter values of N- channel transistor in 0.6um CMOS technology

Parameter Value

µ 474.56 cm^2/V*s

K' (Uo*Cox/2) 57.7 µA/V^2

tox 142*10^-8cm

IDS 100µA

VDS 1V

VT 0.7V


24

By substituting the above data from table 3.1 in equation (3-3), W/L is obtained as

19.25. Since Lmin is 0.6um, W = 11.55um. Here, minimum length allowed in the

technology is considered. From the equation (3.3), it can be noticed that current

drivability of the transistor can be increased by using smaller length.

An enhancement mode n-channel MOSFET is chosen for this circuit. The device is

usually off in enhancement mode. A sufficient gate voltage (VG > VT) has to be

applied to switch on the device for operation. PMOS devices use holes as majority

carriers instead of electrons. The higher mobility of electrons make NMOS devices

faster and also NMOS transistor can be smaller in size than PMOS for a given

magnitude of current.

In cadence, transistors can be connected in parallel to improve the frequency of

operation and threshold voltage drop [18]. A large specification of multipliers in

layout of the transistor affects the output voltage. Designed full wave rectifier and

output waveform are shown below in figures 3.6 and 3.7.

Figure 3.6: Rectifier schematic in cadence


25

Figure 3.7: Full wave rectifier transient response in cadence 3.1.2 Tradeoff Study between Different DC-DC Conversion Methods Upon rectification of the voltage, a DC-DC converter is integrated with the rectifier

for boosting the dc signals to higher levels. Different conversion topologies are

investigated and the overview of various topologies is discussed in this section.

3.1.2.1 Step-up (boost) DC-DC Converter: Switch-mode dc-dc converters use an inductor, a switch and a diode to transform

voltage from one dc level to another. The required average output voltage is obtained

by controlling on and off states of the switch. The switching efficiency is higher than

the linear regulator since the switch is either completely conducting or switched off,

hence it does not dissipate any power ideally.

The use of inductor in switch-mode converters makes the circuit design complex by

occupying more space. Charge pumps adopt simple design by utilizing capacitors

instead of inductor-switcher circuit to generate higher voltages. This topology suits for

the application which needs low power, simple design and low cost.


26

3.1.2.2 Cockcroft-Walton Charge Pump In this method, voltage multiplication is achieved by cascading diode capacitor

voltage stages in series. The Swiss physicist Heinrich Greinacher first proposed this

kind of voltage multiplier in 1919. Later, this technique was used by John Douglas

Cockcroft and Ernest Thomas Sinton Walton and won Nobel Prize in Physics for their

research in 1951[15].

This topology is mostly used in applications which require very high dc voltages. The

output impedance increases rapidly as the number of multiplying stages are increased.

For efficient multiplication, high values of coupling capacitors are required, which

limits the integration of this circuit in ASIC design, since on-chip capacitors are

limited to few picofarads in CMOS process.

3.1.2.3 Dickson Charge Pump Efficient multiplication is achieved by connecting the capacitors in parallel to the

nodes of the diode chain. The current drive capability is independent of the number of

multiplier stages [15]. To avoid the limitations of switch-mode dc-dc converters and

Cockcroft-Walton charge pump topologies, a two phase Dickson charge pump is

chosen for this application. Since, isolated diode models are not available in 0.6um

AMI CMOS process, NMOS transistors are used. The diode forward voltage drop is

replaced by the transistor threshold voltage. Other important design specifications

include - power efficiency of the design, power consumption and die size.

3.1.3 DC-DC Charge Pump Charge pumps convert received ac or dc input voltage to a required dc level at the

output. From figure 3.8, it can be observed that, clock1 and clock 2 are two out-of-

phase clocks and are capacitive coupled to the diode connected MOSFET chain. When

the clocks are enabled, charge is transferred from stage to stage. Potential energy of

the charge is elevated at each node as the clocks pump packets of charge along the

chain. To reduce the ripple at the output, the load capacitor is kept sufficiently large.


27

Figure 3.8: DC-DC Dickson charge pump operation 3.1.3.1 DC-DC Charge Pump Design in Cadence The design simulations of the charge pump are carried out in 0.6µm CMOS AMI

process and Pspice. The pump specifications are initially considered as seen in table

3.2,

Table 3.2: DC-DC Dickson charge pump specifications

Parameter Value

Power Supply Voltage, Vin 1V

Amplitude of the clocks, Vφ 1.5V

Target output voltage, Vout 5V

Output voltage ramp-up time, Trampup 10µs

Pump current consumption, Iout 100µA

The threshold voltage of the n-channel MOSFETs is considered to be 0.7V from the

spice parameters of 0.6µm process available through MOSIS technologies for initial

calculations. Due to the body effect, the threshold voltage of the device may increase

with increase in the node voltages at each stage.


28

Design Steps: • As diode-connected devices operate in saturation region, the aspect ratio is

determined from equation (3-3). During the initial stages of ramp-up, the pump

will be driving much higher current at the output than the average current the

pump delivers. To accommodate such high currents, the width of the MOSFET

should be 10 to 15 times greater than the calculated value. Also, with the

reduction in the power supply voltages, the sizes of the transistors and coupling

capacitors must be increased further.

• Number of stages (N) of a charge pump is generally proportional to the required

voltage at the output. The value of ‘N’ is derived from the formula,

(3.5)

At different clock amplitudes of 1V and 1.5V, number of stages is determined to

be approximately 16 and 6 stages respectively.

• Frequency of the clock generator can be chosen between 2MHz to 50MHz for the

selected device size and process. A frequency of 20MHz is selected which

translates to 50ns time period for the clock.

At steady state, the current consumed at the output (Iout) should match the current

delivered by the pump at constant Vout. The boosting capacitor can be calculated

from the equation,

(3.6)

The boosting capacitor value comes out to be 6.26pf. As the design is optimized,

the capacitor value can be decreased.

• To ensure good performance of the charge pump, the load capacitance must be

much greater than the coupling capacitance.


29

• Parasitic resistances or capacitances badly impact the output voltage and output

current of the charge pump. The parasitic capacitances at the internal nodes can

be assumed to be 10% of the coupling capacitors, as a rule of thumb [15].

An extra start-up battery will be required for the non-overlapping clock generator and

clock booster in the final ASIC design. Two out-of-phase pulse generators are chosen

with amplitude of 1.5V and 50ns clock period for the initial simulations. The designed

circuit and the transient response can be seen in figures 3.9, 3.10. To obtain an output

voltage of 5V, the number of stages has to be increased. Due to the body effect of the

MOSFETs, Vth increases proportionally with source voltage. The efficiency is

calculated to be 49% for the designed circuit.

Figure 3.9: Dickson charge pump schematic with 9 stages


30

Figure 3.10: Pump output vs. time graph

Several Iterations have been performed to check the performance of Dickson charge

pump by changing different parameters. DC-DC charge pump is tested with a clock

and input amplitude of 1V. The schematic, output transient response and also the clock

signals can be seen in figure 3.11.


31

Figure 3.11: Charge pump’s schematic, clock output and pump transient response at Vφ = 1V, Vin = 1V and N = 16 stages


32

When a capacitive load is connected at the output of the charge pump, the voltage

rises exponentially at the output. As the value of the load capacitance is varied, the

output voltage is increased or decreased accordingly. Figure 3.12 shows the variation

of pump output voltage with load capacitance.

Figure 3.12: Output voltage vs. load capacitance Charge pump performance is analyzed for different clock amplitudes at a power

supply voltage of 1V and 9 stages. The output voltage largely increases with small rise

in amplitude of the clock generator.


33

Figure 3.13: Pump output voltage vs. different clock amplitudes

3.1.3.2 Charge Pump Simulation in Pspice Dickson charge pump is designed and simulated in Pspice with BAT54ST schottky

diodes whose forward voltage drop is around 240mV. The schematic of a 16 stage

Dickson charge pump with input and clock amplitudes of 1V is shown in the figure

3.14 along with the output voltage waveform. Because of the lower forward voltage

drop across the diodes, higher output voltage is obtained when compared to cadence

design.


34

(a)

(b)

Figure 3.14: DC-DC charge pump schematic in Pspice and output voltage waveform


35

3.1.4 RF Integrated Circuit

The full-wave rectifier and DC-DC charge pump are integrated in Cadence and results

are presented below in figures 3.15 and 3.16.

Figure 3.15: Integrated RF energy harvesting circuit

Figure 3.16: Output voltage of integrated circuit


36

3.2 Piezoelectric Energy Harvesting Block diagram of the proposed piezoelectric energy harvesting is shown below,

Figure 3.17: Piezoelectric energy harvesting The piezoelectric generator converts the natural vibrations from the environment into

electrical energy. The frequency range of these commercially obtained piezoelectric

generators range from 26 Hz to 205Hz. Further details of these piezo generators are

presented in chapter 2. An AC-DC charge pump is utilized to rectify and also boost

the output voltage of the piezo generator. A regulated voltage of 4.1V is provided to

the thin film battery from a low-dropout regulator. The stored energy can be used to

power miniaturized devices or as a battery replacement to the portable devices.

3.2.1 AC-DC Charge Pump Based on the type of input to the charge pump, it is classified as either ac-dc or dc-dc.

The frequency range of piezoelectric generators is far less compared to the centre

frequency of the whip antenna. Hence, higher efficiency is achieved when ac-dc

charge pump is designed for lower frequencies when compared to 916MHz frequency

of the antenna. AC-DC charge pump is capable of high efficiency and also the design

is relatively simple consisting of only MOSFETs and capacitors.


37

3.2.1.1. AC-DC Charge Pump Design in Pspice AC-DC charge pump schematic is designed in Pspice with schottky diodes and

capacitors to increase the conversion efficiency and output voltage. Because of its low

forward voltage drop and low junction capacitance, schottky diodes are preferred. A

typical schematic is shown in the figure below.

Figure 3.18: AC-DC charge pump design in Pspice Consider the unit cell of the voltage multiplier. Figure 3.19 represents the single stage

of the charge pump with an ac input and the node voltages as shown in the figure

below.

Unit Cell


38

Figure 3.19: Unit cell of the AC-DC charge pump

The ac input voltage is offset by the shunt diode as shown in the graph. The resultant

waveform is rectified by the series diode. The output voltage waveform at the

capacitor is indicated in the figure 3.19 [19]. Ideally, the voltage is doubled after first

stage. With increase in number of stages, required voltage can be acquired. The

schematic shown in figure 3.18 is tested at an initial frequency of 100Hz and a

sinusoidal input voltage of 0.4Vp-p. The output voltage waveform across the load

capacitance is shown in the figure 3.20. Due to low forward voltage drop of the

schottky diodes, higher voltages are obtained with less number of stages.


39

Figure 3.20: Output voltage across the load capacitance 3.2.1.2. AC-DC Charge Pump Design in Cadence The simulations of AC-DC charge pump are carried out in cadence by replacing

schottky diodes with diode-connected n-channel MOSFETs. Due to low input levels

available from ambient sources, the most critical parameters to be considered in

designing the charge pump are efficiency, output voltage and threshold voltage of the

MOSFETs. By increasing the number of stages, the output voltage can be increased

but at the cost of increased losses. The threshold voltage of the devices can be lowered

by using higher aspect ratio (W/L) for a fixed current drive capability. The n-channel

transistors can be also operated in sub-threshold region to decrease the threshold

voltage further.

In saturation region of a MOSFET, the drain current ID is represented by

(3.7) By assuming that maximum current drawn by the load is 100uA, the width and length

of the channel are calculated to be 11.55µm and 0.6µm respectively. As mentioned


40

earlier, to increase the current drive capability and to lower the Vth at constant output

current, the width of the channel is chosen to be 15 times greater than the calculated

value (W = 173.25µm, Lmin = 0.6µm). Initially, the input to the ac-dc charge pump is a

1Vp-p sinusoidal signal at a frequency of 100Hz. Figure 3.21 shows a 5 stage ac-dc

charge pump design in cadence with a capacitive load at the output.

Figure 3.21: Design of AC-DC charge pump in cadence

The output voltage across the capacitor is shown in the figure 3.22. Various iterations

are performed to check the output voltage at different aspect ratios of the MOSFETs

used. Figure 3.23 and Figure 3.24 shows the simulations of ac-dc charge pump with

different aspect ratios of the devices. Input power supply to the system can be

increased by connecting stacks of piezoelectric generators in series.


41

Figure 3.22: Output voltage of AC-DC charge pump

Figure 3.23: Output voltage with MOSFET width, W = 115.5µm (L = 0.6 µm)


42

Figure 3.24: Output voltage with MOSFET width, W = 57.75µm (L = 0.6 µm)

From the above transient response waveforms, it can be observed that as the width of

the channel is changed, the output voltage varies accordingly. Output voltage also

depends on the load capacitance value. Figure 3.25 shows the output voltage at

different values of load capacitance.

Figure 3.25: Output Voltage vs. different load capacitance of AC-DC charge pump


43

As the input to the piezoelectric generator depends on the ambient vibrations, the

frequency of vibrations may vary along with the amplitude of the input sinusoidal

wave. The designed ac-dc charge pump must be capable of charging the thin film

battery at all input conditions. Figure 3.26 and Table 3.3 shows the variation of output

voltage with frequencies. With decrease in frequency of the vibrations, the output

voltage is also lowered.

Figure 3.26: Output voltage vs. different input frequencies of AC-DC charge pump

Table 3.3: Output voltage of AC-DC charge pump at

Different frequencies of vibrations

Frequency (Hz) Vout (V) 25 3.1 30 3.43 40 3.72 50 3.96 60 4.1 70 4.3 80 4.36 90 4.43

100 4.5


44

Because the output voltage depends on the acoustic vibrations, a 6 stage ac-dc charge

pump is designed to charge a battery even in the worst case scenario. Figure 3.27

shows the design and simulation results.

Figure 3.27: AC-DC charge pump design for worst case condition


45

Figure 3.28: 2-stage ac-dc charge pump design to illustrate output voltage variation with change in the amplitude of input signal


46

3.6 Summary

Power electronic circuits are simulated in Cadence and Pspice. Obtained results

suggest that the power efficiency is dependent on various factors in each design.

Designs are optimized to improve conversion efficiency of each circuit. Because the

output voltage is fluctuating due to ambient and unpredictable input sources, the

voltage has to be regulated. The storage and voltage regulation are discussed in next

chapter.


47

CHAPTER IV

ENERGY STORAGE The energy collected from acoustic vibrations and RF electromagnetic waves is

converted into required levels through various signal conditioning circuits. Upon

conversion, the accumulated energy is transferred to a storage bank consisting of thin

film battery. This chapter presents the design of a low-dropout regulator for charging

the thin film battery and future work involved in this research project.

4.1 Thin Film Battery Rechargeable thin-film lithium and lithium-ion batteries are developed at Oak Ridge

National Laboratory. A commercialized low power thin film battery is obtained from

Cymbet Corporation for this thesis. A small battery will suffice this requirement since

ambient energy is available at very low levels. The specifications of CBC050 battery

are listed below [21].

Electrical Properties:

▪ Output voltage: 3.8V

▪ Capacity (typical): 50µAh

▪ Charging source: 4.00V to 4.15V

▪ Recharge time to 80%: 20 minutes

▪ Charge/Discharge cycles: >5000 to 10% DOD

Figure 4.1: Thin Film Battery (CBC050) by CYMBET Corporation [21]


48

Thin film batteries are all solid state and constructed by depositing the components of

a battery as thin films on a substrate [24]. Because the electrolyte is a solid glass

material, these batteries are safe from leakage and explosions due to electrolyte. They

can also be manufactured in any size and shape. Due to higher energy density, longer

cycling life and solid state construction, thin film batteries offer better performance

than typical rechargeable batteries.

Key Features of Thin film batteries:

▪ All solid state construction

▪ Thousands of research cycles

▪ Low self-discharge

▪ Operating temperature: -20°C to 70°C

Charging time for a thin film battery (TFB) is shorter compared to other conventional

rechargeable batteries [25]. Charging profile is shown in figure 4.2. Voltage

requirements are more stringent than the current limits. The internal cell resistance

limits the charging current and voltage should not exceed 4.3V across the terminals of

TFB. When a voltage source of 4.1V is supplied to the battery, it recharges in 20 - 35

minutes to 80% capacity depending upon the available current. Charging at 4.0V will

charge TFB to 70% capacity at a minimum current of 50µA.

Figure 4.2: Charging profile of TFB [25]


49

Low-dropout regulator supplies constant voltage to the battery to avoid fluctuations in

supply voltage at the battery terminals. It is recommended to charge the battery at a

voltage of 4.1 V as can be seen from figure 4.3.

Figure 4.3: Charging voltages [25]

Unlike super capacitors and other typical rechargeable batteries, thin film batteries

have low discharge rates. It is very crucial to cut-off the discharge voltage at 3.0V to

preserve the performance and cycle life. Discharging characteristics are illustrated in

figure 4.4. Further operating characteristics can be obtained from CBC050 datasheet.

Figure 4.4: Discharging characteristics of TFB [21]


50

4.2 Low-dropout Regulator To supply constant voltage to the thin film batter, a low-dropout regulator is designed.

This regulator works efficiently even for low differential input and output voltages,

called dropout voltage. Advantages of this linear regulator are higher efficiencies,

dropout voltages of less than 500mV and low quiescent current. Essential components

of this design are,

▪ Pass element (PMOS transistor)

▪ Error amplifier

▪ Voltage reference

As can be seen from figure 4.5, the feedback from output voltage is given to the error

amplifier. Band gap reference can be used for high precision voltage reference. Error

amplifier, pass element and the resistor divider circuit form the feedback loop.

Figure 4.5: Typical Low-dropout regulator topology

Output voltage can be calculated from the equation [26],

(4.1)


51

PMOS transistor is used as a pass element to maintain a low voltage drop across it.

LDO requires external capacitors for stability compensation. ESR of the capacitor

must be low to maintain stability. LDO is integrated with AC-DC charge pump and

simulations are run in Pspice. Figure 4.6 and 4.7 show the integrated circuit and

regulate output waveforms. LDO is designed to regulate at 4.0V.

Figure 4.6: Integrated piezoelectric energy harvesting circuit


52

Figure 4.7: Transient waveforms of input and regulated output signals

Op-amp is designed in transistor level to replace ideal op-amp used in Pspice designs

to integrate LDO with other power electronic circuits in final ASIC chip. A two-stage

topology is chosen to obtain high gain at the output. A PMOS differential amplifier

input stage and NMOS common source stage which is actively loaded by current

source transistor P4 can be seen in figure 4.8. A 20µA dc biasing current is allowed

through transistor P2. Aspect ratios of each transistor in saturation region is calculated

by using equation below,

(4.2)

The current mirrors – P2, P3 and P4 distribute the bias current to rest of the circuit

since their gates are connected together. Transistors, N0 and N1 form the active load

to differential input stage.


53

Figure 4.8: Op-amp design in cadence

4.3 Conclusion

Each energy harvester is evaluated and test results are presented. Efficient power

electronic circuits comprising of full-wave rectifier, dc-dc charge pump and ac-dc charge

pump involved in the energy harvesting are designed in 0.6um CMOS technology and

Pspice. Different dc-dc conversion topologies are discussed. Working models and

simulation results of each circuit are presented. Low-dropout regulator and op-amp

designs are shown. A regulated output is provided which is intended for low-voltage and

low-power applications.


54

4.4 Future Work

In an effort to make the energy scavenging system compatible with numerous low-

voltage devices, programmable output voltages with a range of 1.8 V to 3.3 V will be

provided to the user. Solar cells will be introduced in the powering sources in future

and will be integrated along with vibration and RF energy harvesting systems. Battery

management unit can be replaced with MSP430, ultra-lower power microcontroller

developed by Texas Instruments.

Figure 4.9: Block diagram representing the future work

The present system is designed in 0.6um CMOS technology. To improve the

efficiency and performance of the energy scavenging system, a better CMOS

technology will be adopted.


55

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56

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25. CYMBET Corporation, “Guidelines for Charging Cymbet™ EnerChip™ Batteries”, AN -1002, Rev B, 2010.

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27. Gabriel Alfonso Rincon-Mora, “Current Efficient, Low Voltage, Low Drop-out Regulators”, Georgia Institute of Technology, November 1996.

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30. Christian Falconi, Arnaldo D’Amico, Giuseppe Scotti, Alessandro Trifiletti, “Dual Op Amp, LDO Regulator with Power Supply Gain Suppression for CMOS Smart Sensors and Microsystems”, IEEE International Symposium on Circuits and Systems, pp. 2470-2473, June 2008.

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57

32. Tolga Dinc, “Analog Integrated Circuits Design Project: OP-AMP Design”, EL303, Project Report, Sabansi University, Fall 2008.


58

APPENDIX A

TEST DATA OF 0.6µM AMI CMOS PROCESS

T9CU SPICE BSIM3 VERSION 3.1 PARAMETERS SPICE 3f5 Level 8, Star-HSPICE Level 49, UTMOST Level 8 * LOT: T9CU WAF: 6101 * Temperature_parameters=Default .MODEL CMOSN NMOS ( LEVEL = 49 +VERSION = 3.1 TNOM = 27 TOX = 1.42E-8 +XJ = 1.5E-7 NCH = 1.7E17 VTH0 = 0.6571651 +K1 = 0.8829751 K2 = -0.0944289 K3 = 34.0561406 +K3B = -7.2765408 W0 = 1.058792E-8 NLX = 1E-9 +DVT0W = 0 DVT1W = 0 DVT2W = 0 +DVT0 = 0.6756156 DVT1 = 0.3354168 DVT2 = -0.481966 +U0 = 452.0892025 UA = 1E-13 UB = 1.221792E-18 +UC = -2.44058E-14 VSAT = 1.908022E5 A0 = 0.642016 +AGS = 0.1183635 B0 = 1.99888E-6 B1 = 5E-6 +KETA = -5.587464E-3 A1 = 2.46774E-4 A2 = 0.3 +RDSW = 1.069937E3 PRWG = 0.1019833 PRWB = -5.127084E-4 +WR = 1 WINT = 2.115501E-7 LINT = 8.170874E-8 +XL = 1E-7 XW = 0 DWG = -4.899259E-9 +DWB = 6.65057E-8 VOFF = 0 NFACTOR = 0.9451529 +CIT = 0 CDSC = 2.4E-4 CDSCD = 0 +CDSCB = 0 ETA0 = 2.233012E-3 ETAB = 0.6510224 +DSUB = 0.0423972 PCLM = 2.2557278 PDIBLC1 = 1.454233E-4 +PDIBLC2 = 2.169973E-3 PDIBLCB = -0.0942054 DROUT = 1.416077E-5 +PSCBE1 = 2.516822E9 PSCBE2 = 5E-10 PVAG = 0 +DELTA = 0.01 RSH = 86.4 MOBMOD = 1 +PRT = 0 UTE = -1.5 KT1 = -0.11 +KT1L = 0 KT2 = 0.022 UA1 = 4.31E-9 +UB1 = -7.61E-18 UC1 = -5.6E-11 AT = 3.3E4 +WL = 0 WLN = 1 WW = 0 +WWN = 1 WWL = 0 LL = 0 +LLN = 1 LW = 0 LWN = 1 +LWL = 0 CAPMOD = 2 XPART = 0.5 +CGDO = 1.82E-10 CGSO = 1.82E-10 CGBO = 1E-9 +CJ = 4.164836E-4 PB = 0.8359816 MJ = 0.4289687 +CJSW = 3.491195E-10 PBSW = 0.8 MJSW = 0.1987405


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+CJSWG = 1.64E-10 PBSWG = 0.8 MJSWG = 0.1987405 +CF = 0 PVTH0 = -0.050647 PRDSW = 261.8708901 +PK2 = -0.075805 WKETA = 6.663321E-3 LKETA = -4.209743E-3 ) * .MODEL CMOSP PMOS ( LEVEL = 49 +VERSION = 3.1 TNOM = 27 TOX = 1.42E-8 +XJ = 1.5E-7 NCH = 1.7E17 VTH0 = -0.9152268 +K1 = 0.553472 K2 = 7.871921E-3 K3 = 6.7980202 +K3B = -1.1165271 W0 = 1.744638E-7 NLX = 1.106305E-7 +DVT0W = 0 DVT1W = 0 DVT2W = 0 +DVT0 = 0.8271225 DVT1 = 0.3734017 DVT2 = -0.1905238 +U0 = 201.3603195 UA = 2.408572E-9 UB = 1E-21 +UC = -1E-10 VSAT = 9.284696E4 A0 = 0.8605177 +AGS = 0.1014981 B0 = 7.414663E-7 B1 = 0 +KETA = -4.865785E-3 A1 = 0 A2 = 0.5882743 +RDSW = 3E3 PRWG = -0.0280766 PRWB = -0.0480271 +WR = 1 WINT = 2.538513E-7 LINT = 1.225834E-7 +XL = 1E-7 XW = 0 DWG = -2.676455E-9 +DWB = -1.403041E-8 VOFF = -0.0734308 NFACTOR = 1.0971117 +CIT = 0 CDSC = 2.4E-4 CDSCD = 0 +CDSCB = 0 ETA0 = 1.001363E-3 ETAB = -0.2 +DSUB = 1 PCLM = 2.395752 PDIBLC1 = 0.0492874 +PDIBLC2 = 3.649564E-3 PDIBLCB = -9.518202E-3 DROUT = 0.2465689 +PSCBE1 = 1E8 PSCBE2 = 3.365533E-9 PVAG = 0.0149543 +DELTA = 0.01 RSH = 110.9 MOBMOD = 1 +PRT = 0 UTE = -1.5 KT1 = -0.11 +KT1L = 0 KT2 = 0.022 UA1 = 4.31E-9 +UB1 = -7.61E-18 UC1 = -5.6E-11 AT = 3.3E4 +WL = 0 WLN = 1 WW = 0 +WWN = 1 WWL = 0 LL = 0 +LLN = 1 LW = 0 LWN = 1 +LWL = 0 CAPMOD = 2 XPART = 0.5 +CGDO = 2.28E-10 CGSO = 2.28E-10 CGBO = 1E-9 +CJ = 7.163195E-4 PB = 0.8728514 MJ = 0.4900508 +CJSW = 2.220019E-10 PBSW = 0.8 MJSW = 0.1869762 +CJSWG = 6.4E-11 PBSWG = 0.8 MJSWG = 0.1869762


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+CF = 0 PVTH0 = 5.98016E-3 PRDSW = 14.8598424 +PK2 = 3.73981E-3 WKETA = 2.319493E-3 LKETA = -9.587376E-3 )

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