compal confidential...kbyf0 la-5051p 0.3 cover page b tuesday, february 03, 2009 146 2008/11/03...
TRANSCRIPT
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3Cover Page
B
1 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
AMD Griffin Processor with RS780M+SB700
KBYF0 Schematics Document
REV:0.3
Compal Confidential
(With ATI MXM/B)
2009-01-22
ZZZ1
PCB
DA60000B600-*
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBKC0 LA-5051P 0.3Block Diagrams
B
2 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
Power On/Off CKT.
Touch Pad
page 32
CRT Conn.
LPC BUS page 33
Compal Confidential
BGA-528
page 18
MDC 1.5Conn
page 34
Int.KBD
page 31
BANK 0, 1, 2, 3
USB Conn x4
A linkExpress2
DC/DC Interface CKT.
AMD S1G2 Processor
page 32
3.3V 48MHz
Hyper Transport Link 16 x 16
Clock GeneratorICS9LPRS488B
page 30
CIR
Fan Control
Power Circuit DC/DC
uPGA-638 Package
page 32
200pin DDRII-SO-DIMM X2
page 37
ATI RS780M
EC ROM
page 5
1.8V DDRII 667/800
page 4,5,6,7
page 31
HDA CodecALC272
page 15
Memory BUS(DDRII)
BGA-528
HD Audio
page 36
page 10,11,12,13
ATI SB700
Thermal Sensor
page 8,9
page 19,20,21,22,23
page 31
ENE KB926 Audio AMPTPA6017
LCD Conn.
Bluetooth Conn
3.3V 24MHz
Phone Jack x2
Model Name : KBYF0
RTC CKT.page 19
page 16
Dual Channel
page 34
page 39,40,41 42,43,44,45
S-ATA
page 24
SATA HDDConn.
page 28
USB/B Conn.
ADM1032
page 31
BTN/B Conn.
port 0
USB port 0,1,2,6
CMOSCamera
USB port 0,1,2,6
USB
page 31
LED/B Conn. SATA ODD Conn.
page 24
page 17
HDMI Conn.
PCI-Express 16xMXM III VGA/B
RJ45
LAN(GbE)B5784M
page 26
MINI Card x2TV-Tuner WLAN
page 27
page 28
PCI-Express 1x
port 2
USB port 3 USB port 12 USB port4
port 3port 1,2
page 14
page 29 page 16 page 29
5 in 1 Socket
page 25
Mono AMP(for Woofer)
page 34
Digital/Analog MIC.
Int. MICpage 33
File Name: LA-5051P
page 31
Media/B Conn.
page 31
FUN/B Conn.
page 21
BIOS ROMSPI
Card ReaderRTS5159
page 25
port1page 24
Second SATAHDD Conn.
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Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3Notes List
B
3 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
Voltage Rails
VINB++CPU_CORE_0
+1.1VS
Adapter power supply (19V)AC or battery power rail for power circuit.Core voltage for CPU
1.05V switched power rail
External PCI DevicesDevice IDSEL# REQ#/GNT# Interrupts
EC SM Bus1 addressDevice
ADI ADM1032
S1 S3 S5
ON OFF
ON
N/A N/A N/AN/AN/AN/A
Power Plane Description
OFF
OFF
ONOFF
OFF
OFFON
Note : ON* means that this power plane is ON only with AC power available, otherwise it is OFF.
OFFON
ON
ONON
OFF
ON*OFF
OFFON
EC SM Bus2 addressDevice
Smart Battery
ON
EEPROM(24C16/02)
1001 100X b0001 011X b
1010 000X b
OFF OFF
SB700 SM Bus 0 address
Device
Clock Generator(ICS9LPRS365)
Address
Address Address
1101 001Xb
ON ON*
ON OFF OFF
STATESIGNAL
Full ON
S1(Power On Suspend)
S3 (Suspend to RAM)
S4 (Suspend to Disk)
S5 (Soft OFF)
SLP_S1# SLP_S3# SLP_S4# SLP_S5# +VALW +V +VS Clock
ON
ON
ON
ON
ON
ON
ON ON
ON
ON
ON
OFF
OFF
OFF
OFF
OFF
OFF
OFF
OFF
LOW
LOW LOW LOW LOW
LOWLOWLOW
LOW
LOW
LOW
HIGH HIGH HIGH HIGH
HIGHHIGHHIGH
HIGH
HIGH
HIGH
Board ID / SKU ID Table for AD channel
ONOFF
OFF
DDR DIMM0 1001 000XbDDR DIMM2 1001 010Xb
Vcc 3.3V +/- 5%100K +/- 5%Ra/Rc/Re
Board ID Rb / Rd / Rf V min0123
08.2K +/- 5%
0 V0.216 V 0.250 V 0.289 V0.436 V0.712 V
0.503 V0.819 V
0.538 V0.875 V
AD_BID V typAD_BID VAD_BID max
18K +/- 5%33K +/- 5%56K +/- 5%100K +/- 5%200K +/- 5%
3.300 V
0 V 0 V
4567 NC
1.036 V1.453 V 1.650 V 1.759 V1.935 V2.500 V
2.200 V3.300 V
2.341 V
1.185 V 1.264 V
Board ID01234567
PCB Revision0.1
+0.9V 0.9V switched power rail for DDR terminator
+RTCVCC RTC power
+1.5VS
+1.8VS 1.8V switched power rail+2.5VS
+5VS
+3VS+5VALW
+1.8V
2.5V for CPU_VDDA and MXM/B+3VALW
1.8V power rail for CPU VDDIO and DDR
3.3V always on power rail
5V always on power rail3.3V switched power rail
5V switched power rail+VSB VSB always on power rail ON ON*
ONONONON
1.5V power rail for PCIE Card
BOARD ID Table BTO Option TableBTO Item BOM Structure
VGA@UMA@
Discrete
MXM GMT G781-1 1001 101X b
UMA
+1.2V_HT 1.25V switched power rail ON OFF OFF
+3V_LAN 3.3V power rail for LAN ON ON ON
No PCI device
Minicard
Minicard
Device Address
Lan
1001 101X bCPU SB
SB700 SM Bus 1 address
ON
+NB_CORE OFFOFFON1.0V~1.1V switched power rail for NB VDDCON
+CPU_CORE_1 Core voltage for CPU ON OFF OFF+CPU_CORE_NB Core voltage for CPU ON OFF OFF
PROJECT ID Table Board ID
01234567
PROJECTKBKC0 (SJM70)KBYF0 (SJV70)
0.20.3 0.4 1.0*
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A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
H_CADIN1
H_CADIN0
H_CADIP3H_CADIN2H_CADIP2
H_CADIP1
H_CADIN3H_CADIP4
H_CADIN5
H_CADIN4H_CADIP5
H_CADIN6
H_CADIN8
H_CADIN7
H_CADIN9
H_CADIP8
H_CADIP6
H_CADIP7
H_CADIN10H_CADIP10
H_CADIN11H_CADIP11
H_CADIP9
H_CADIN13
H_CADIN12
H_CADIP14
H_CADIP12
H_CADIN14
H_CADIP0
H_CADIN15H_CADIP15
H_CADIP13
H_CADON15
H_CTLON0H_CTLOP0H_CTLIP0
H_CTLIN0
H_CLKIN0H_CLKIP1
H_CLKIP0
H_CLKIN1
H_CTLIP1H_CTLON1H_CTLIN1H_CTLOP1
H_CLKON1
H_CADOP13
H_CADON2
H_CADON3
H_CADON9
H_CADON6
H_CADON0
H_CADOP11
H_CADOP8
H_CADOP6
H_CADON13
H_CADOP1
H_CADOP2
H_CADOP4
H_CADOP5
H_CADON12
H_CADON7
H_CADON5
H_CLKOP0
H_CLKOP1
H_CADON10
H_CADON8
H_CADON4
H_CADON1
H_CADOP12
H_CADOP15
H_CLKON0
H_CADOP9
H_CADOP10
H_CADOP14
H_CADOP7
H_CADOP3
H_CADOP0
H_CADON14
H_CADON11
H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CADIP[0..15]
+1.2V_HT
+1.2V_HT
+1.2V_HT
H_CADIP[0..15]
H_CADIN[0..15]
H_CADOP[0..15]
H_CADON[0..15]
H_CLKIP0H_CLKIN0H_CLKIP1H_CLKIN1
H_CTLIP0H_CTLIN0H_CTLIP1H_CTLIN1
H_CLKOP0 H_CLKON0 H_CLKOP1 H_CLKON1
H_CTLOP0 H_CTLON0 H_CTLOP1 H_CTLON1
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3AMD CPU S1G2 HT I/F
Custom
4 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
250 mil
VLDT=500mA
Athlon 64 S1Processor Socket
Near CPU Socket
VLDT CAP.
C5180.22U_0603_16V4Z
1
2
C533 4.7U_0805_10V4Z
1 2HT LINK
JCPU1A
6090022100G_B
CONN@
VLDT_A3D4VLDT_A2D3VLDT_A1D2VLDT_A0D1
VLDT_B3 AE5VLDT_B2 AE4VLDT_B1 AE3VLDT_B0 AE2
L0_CADIN_H15N5L0_CADIN_L15P5
L0_CADIN_H14M3L0_CADIN_L14M4
L0_CADIN_H13L5L0_CADIN_L13M5
L0_CADIN_H12K3L0_CADIN_L12K4
L0_CADIN_H11H3L0_CADIN_L11H4
L0_CADIN_H10G5L0_CADIN_L10H5
L0_CADIN_H9F3L0_CADIN_L9F4
L0_CADIN_H8E5L0_CADIN_L8F5
L0_CADIN_H7N3L0_CADIN_L7N2
L0_CADIN_H6L1L0_CADIN_L6M1
L0_CADIN_H5L3L0_CADIN_L5L2
L0_CADIN_H4J1L0_CADIN_L4K1
L0_CADIN_H3G1L0_CADIN_L3H1
L0_CADIN_H2G3L0_CADIN_L2G2
L0_CADIN_H1E1L0_CADIN_L1F1
L0_CADIN_H0E3L0_CADIN_L0E2
L0_CADOUT_H15 T4L0_CADOUT_L15 T3
L0_CADOUT_H14 V5L0_CADOUT_L14 U5
L0_CADOUT_H13 V4L0_CADOUT_L13 V3
L0_CADOUT_H12 Y5L0_CADOUT_L12 W5
L0_CADOUT_H11 AB5L0_CADOUT_L11 AA5
L0_CADOUT_H10 AB4L0_CADOUT_L10 AB3
L0_CADOUT_H9 AD5L0_CADOUT_L9 AC5
L0_CADOUT_H8 AD4L0_CADOUT_L8 AD3
L0_CADOUT_H7 T1L0_CADOUT_L7 R1
L0_CADOUT_H6 U2L0_CADOUT_L6 U3
L0_CADOUT_H5 V1L0_CADOUT_L5 U1
L0_CADOUT_H4 W2L0_CADOUT_L4 W3
L0_CADOUT_H3 AA2L0_CADOUT_L3 AA3
L0_CADOUT_H2 AB1L0_CADOUT_L2 AA1
L0_CADOUT_H1 AC2L0_CADOUT_L1 AC3
L0_CADOUT_H0 AD1L0_CADOUT_L0 AC1
L0_CLKIN_H1J5L0_CLKIN_L1K5
L0_CLKIN_H0J3L0_CLKIN_L0J2
L0_CTLIN_H1P3L0_CTLIN_L1P4
L0_CTLIN_H0N1L0_CTLIN_L0P1
L0_CLKOUT_H1 Y4L0_CLKOUT_L1 Y3
L0_CLKOUT_H0 Y1L0_CLKOUT_L0 W1
L0_CTLOUT_H1 T5L0_CTLOUT_L1 R5
L0_CTLOUT_H0 R2L0_CTLOUT_L0 R3
C5354.7U_0805_10V4Z
1
2
C5344.7U_0805_10V4Z
1
2
C517180P_0402_50V8J
1
2
C5200.22U_0603_16V4Z
1
2
C516180P_0402_50V8J
1
2
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRB_SMA10
DDRB_SMA7
DDRB_SMA1
DDRB_SMA12
DDRB_SMA6
DDRB_SMA11
DDRB_SMA0
DDRB_SMA9
DDRB_SMA15
DDRB_SMA3
DDRB_SMA5
DDRB_SMA8
DDRB_SMA13
DDRB_SMA2
DDRB_SMA4
DDRB_CKE1
DDRB_SDQ0
DDRB_CKE0
DDRB_SDQS6DDRB_SDQS6#
DDRB_SDQS2DDRB_SDQS2#
DDRB_SDQS5DDRB_SDQS5#
DDRB_SDQS1DDRB_SDQS1#
DDRB_SDQS4DDRB_SDQS4#
DDRB_SDQS0DDRB_SDQS0#
DDRB_SDQS7DDRB_SDQS7#
DDRB_SDQS3DDRB_SDQS3#
DDRA_CLK1
DDRA_CLK1#
DDRB_CLK0
DDRB_CLK0#
DDRB_CLK1
DDRB_CLK1#
DDRA_SDQS0DDRA_SDQS0#
DDRA_SDQS3DDRA_SDQS3#
DDRA_SDQS2DDRA_SDQS2#
DDRA_SDQS1DDRA_SDQS1#
DDRA_SDQS4DDRA_SDQS4#DDRA_SDQS5DDRA_SDQS5#DDRA_SDQS6DDRA_SDQS6#
DDRA_SDQS7#DDRA_SDQS7
MBMZPMBMZN VTT_SENSE
DDRA_CLK0
DDRA_CLK0#
+MCH_REF
DDRB_ODT0DDRB_ODT1
DDRA_ODT1DDRA_ODT0
DDRB_CLK0#DDRB_CLK0
DDRB_CLK1DDRB_CLK1#DDRA_CLK1#
DDRA_CLK0#DDRA_CLK0
DDRA_CLK1
DDRA_CKE0DDRA_CKE1
DDRB_SDM6
DDRB_SDM4
DDRB_SDM2
DDRB_SDM0
DDRB_SDM5
DDRB_SDM3
DDRB_SDM1
DDRB_SDM7DDRA_SDM6DDRA_SDM5DDRA_SDM4DDRA_SDM3DDRA_SDM2DDRA_SDM1DDRA_SDM0
DDRA_SDM7
DDRA_SDQ3DDRA_SDQ4
DDRA_SDQ0DDRA_SDQ1DDRA_SDQ2
DDRB_SRAS#DDRB_SCAS#DDRB_SWE#
DDRB_SBS0#DDRB_SBS1#DDRB_SBS2#
DDRA_SWE#DDRA_SCAS#DDRA_SRAS#
DDRA_SBS2#DDRA_SBS1#DDRA_SBS0#
DDRA_SMA15
DDRA_SMA12
DDRA_SMA14DDRA_SMA13
DDRA_SMA11DDRA_SMA10
DDRA_SMA6
DDRA_SMA1
DDRA_SMA7
DDRA_SMA2DDRA_SMA3
DDRA_SMA8
DDRA_SMA5DDRA_SMA4
DDRA_SMA9
DDRA_SMA0
DDRB_SMA14
DDRA_SCS1# DDRB_SCS0#DDRB_SCS1#
DDRA_SCS0#
+MCH_REF
DDRA_SDQ5DDRA_SDQ6DDRA_SDQ7DDRA_SDQ8DDRA_SDQ9DDRA_SDQ10DDRA_SDQ11DDRA_SDQ12DDRA_SDQ13DDRA_SDQ14DDRA_SDQ15DDRA_SDQ16DDRA_SDQ17DDRA_SDQ18DDRA_SDQ19DDRA_SDQ20DDRA_SDQ21DDRA_SDQ22DDRA_SDQ23DDRA_SDQ24DDRA_SDQ25DDRA_SDQ26DDRA_SDQ27DDRA_SDQ28DDRA_SDQ29DDRA_SDQ30DDRA_SDQ31DDRA_SDQ32DDRA_SDQ33DDRA_SDQ34DDRA_SDQ35DDRA_SDQ36DDRA_SDQ37DDRA_SDQ38DDRA_SDQ39DDRA_SDQ40DDRA_SDQ41DDRA_SDQ42DDRA_SDQ43DDRA_SDQ44DDRA_SDQ45DDRA_SDQ46DDRA_SDQ47DDRA_SDQ48DDRA_SDQ49DDRA_SDQ50DDRA_SDQ51DDRA_SDQ52DDRA_SDQ53DDRA_SDQ54DDRA_SDQ55DDRA_SDQ56DDRA_SDQ57DDRA_SDQ58DDRA_SDQ59DDRA_SDQ60DDRA_SDQ61DDRA_SDQ62DDRA_SDQ63
DDRB_SDQ1DDRB_SDQ2DDRB_SDQ3DDRB_SDQ4DDRB_SDQ5DDRB_SDQ6DDRB_SDQ7DDRB_SDQ8DDRB_SDQ9DDRB_SDQ10DDRB_SDQ11DDRB_SDQ12DDRB_SDQ13DDRB_SDQ14DDRB_SDQ15DDRB_SDQ16DDRB_SDQ17DDRB_SDQ18DDRB_SDQ19DDRB_SDQ20DDRB_SDQ21DDRB_SDQ22DDRB_SDQ23DDRB_SDQ24DDRB_SDQ25DDRB_SDQ26DDRB_SDQ27DDRB_SDQ28DDRB_SDQ29DDRB_SDQ30DDRB_SDQ31DDRB_SDQ32DDRB_SDQ33DDRB_SDQ34DDRB_SDQ35DDRB_SDQ36DDRB_SDQ37DDRB_SDQ38DDRB_SDQ39DDRB_SDQ40DDRB_SDQ41DDRB_SDQ42DDRB_SDQ43DDRB_SDQ44DDRB_SDQ45DDRB_SDQ46DDRB_SDQ47DDRB_SDQ48DDRB_SDQ49DDRB_SDQ50DDRB_SDQ51DDRB_SDQ52DDRB_SDQ53DDRB_SDQ54DDRB_SDQ55DDRB_SDQ56DDRB_SDQ57DDRB_SDQ58DDRB_SDQ59DDRB_SDQ60DDRB_SDQ61DDRB_SDQ62DDRB_SDQ63
+1.8V
+0.9V+0.9V
+1.8V
DDRA_ODT0DDRA_ODT1
DDRA_SCS0#DDRA_SCS1#
DDRA_CKE0DDRA_CKE1
DDRA_CLK0DDRA_CLK0#DDRA_CLK1DDRA_CLK1#
DDRA_SMA[15..0]
DDRA_SBS0#DDRA_SBS1#DDRA_SBS2#
DDRA_SRAS#DDRA_SCAS#DDRA_SWE#
DDRB_ODT0 DDRB_ODT1
DDRB_SCS0# DDRB_SCS1#
DDRB_CKE0 DDRB_CKE1
DDRB_CLK0 DDRB_CLK0# DDRB_CLK1 DDRB_CLK1#
DDRB_SMA[15..0] DDRB_SDM[7..0]
DDRB_SDQS0DDRB_SDQS0#DDRB_SDQS1DDRB_SDQS1#DDRB_SDQS2DDRB_SDQS2#DDRB_SDQS3DDRB_SDQS3#DDRB_SDQS4DDRB_SDQS4#DDRB_SDQS5DDRB_SDQS5#DDRB_SDQS6DDRB_SDQS6#DDRB_SDQS7DDRB_SDQS7#
DDRB_SBS0# DDRB_SBS1# DDRB_SBS2#
DDRB_SRAS# DDRB_SCAS# DDRB_SWE#
DDRB_SDQ[63..0]DDRA_SDQ[63..0]
DDRA_SDM[7..0]
DDRA_SDQS0 DDRA_SDQS0# DDRA_SDQS1 DDRA_SDQS1# DDRA_SDQS2 DDRA_SDQS2# DDRA_SDQS3 DDRA_SDQS3# DDRA_SDQS4 DDRA_SDQS4# DDRA_SDQS5 DDRA_SDQS5# DDRA_SDQS6 DDRA_SDQS6# DDRA_SDQS7 DDRA_SDQS7#
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3AMD CPU S1G2 DDRII I/F
Custom
5 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
PLACE CLOSE TO PROCESSOR WITHIN 1.5 INCH
Athlon 64 S1ProcessorSocket
Athlon 64 S1Processor Socket
Place them close to CPU within 1"
Processor DDR2 Memory Interface
C2441.5P_0402_50V9C
1
2
MEM:DATAJCPU1C
6090022100G_B
CONN@
MB_DATA63AD11MB_DATA62AF11MB_DATA61AF14MB_DATA60AE14MB_DATA59Y11MB_DATA58AB11MB_DATA57AC12MB_DATA56AF13MB_DATA55AF15MB_DATA54AF16MB_DATA53AC18MB_DATA52AF19MB_DATA51AD14MB_DATA50AC14MB_DATA49AE18MB_DATA48AD18MB_DATA47AD20MB_DATA46AC20MB_DATA45AF23MB_DATA44AF24MB_DATA43AF20MB_DATA42AE20MB_DATA41AD22MB_DATA40AC22MB_DATA39AE25MB_DATA38AD26MB_DATA37AA25MB_DATA36AA26MB_DATA35AE24MB_DATA34AD24MB_DATA33AA23MB_DATA32AA24MB_DATA31G24MB_DATA30G23MB_DATA29D26MB_DATA28C26MB_DATA27G26MB_DATA26G25MB_DATA25E24MB_DATA24E23MB_DATA23C24MB_DATA22B24MB_DATA21C20MB_DATA20B20MB_DATA19C25MB_DATA18D24MB_DATA17A21MB_DATA16D20MB_DATA15D18MB_DATA14C18MB_DATA13D14MB_DATA12C14MB_DATA11A20MB_DATA10A19MB_DATA9A16MB_DATA8A15MB_DATA7A13MB_DATA6D12MB_DATA5E11MB_DATA4G11MB_DATA3B14MB_DATA2A14MB_DATA1A11MB_DATA0C11
MA_DATA63 AA12MA_DATA62 AB12MA_DATA61 AA14MA_DATA60 AB14MA_DATA59 W11MA_DATA58 Y12MA_DATA57 AD13MA_DATA56 AB13MA_DATA55 AD15MA_DATA54 AB15MA_DATA53 AB17MA_DATA52 Y17MA_DATA51 Y14MA_DATA50 W14MA_DATA49 W16MA_DATA48 AD17MA_DATA47 Y18MA_DATA46 AD19MA_DATA45 AD21MA_DATA44 AB21MA_DATA43 AB18MA_DATA42 AA18MA_DATA41 AA20MA_DATA40 Y20MA_DATA39 AA22MA_DATA38 Y22MA_DATA37 W21MA_DATA36 W22MA_DATA35 AA21MA_DATA34 AB22MA_DATA33 AB24MA_DATA32 Y24MA_DATA31 H22MA_DATA30 H20MA_DATA29 E22MA_DATA28 E21MA_DATA27 J19MA_DATA26 H24MA_DATA25 F22MA_DATA24 F20MA_DATA23 C23MA_DATA22 B22MA_DATA21 F18MA_DATA20 E18MA_DATA19 E20MA_DATA18 D22MA_DATA17 C19MA_DATA16 G18MA_DATA15 G17MA_DATA14 C17MA_DATA13 F14MA_DATA12 E14MA_DATA11 H17MA_DATA10 E17
MA_DATA9 E15MA_DATA8 H15MA_DATA7 E13MA_DATA6 C13MA_DATA5 H12MA_DATA4 H11MA_DATA3 G14MA_DATA2 H14MA_DATA1 F12MA_DATA0 G12
MB_DM7AD12MB_DM6AC16MB_DM5AE22MB_DM4AB26MB_DM3E25MB_DM2A22MB_DM1B16MB_DM0A12
MB_DQS_H7AF12MB_DQS_L7AE12
MB_DQS_H6AE16MB_DQS_L6AD16
MB_DQS_H5AF21MB_DQS_L5AF22
MB_DQS_H4AC25MB_DQS_L4AC26
MB_DQS_H3F26MB_DQS_L3E26
MB_DQS_H2A24MB_DQS_L2A23
MB_DQS_H1D16MB_DQS_L1C16
MB_DQS_H0C12MB_DQS_L0B12
MA_DM7 Y13MA_DM6 AB16MA_DM5 Y19MA_DM4 AC24MA_DM3 F24MA_DM2 E19MA_DM1 C15MA_DM0 E12
MA_DQS_H7 W12MA_DQS_L7 W13
MA_DQS_H6 Y15MA_DQS_L6 W15
MA_DQS_H5 AB19MA_DQS_L5 AB20
MA_DQS_H4 AD23MA_DQS_L4 AC23
MA_DQS_H3 G22MA_DQS_L3 G21
MA_DQS_H2 C22MA_DQS_L2 C21
MA_DQS_H1 G16MA_DQS_L1 G15
MA_DQS_H0 G13MA_DQS_L0 H13
C4471.5P_0402_50V9C
1
2
C5091.5P_0402_50V9C
1
2
R781K_0402_1%
12
T2PAD
@
C1781.5P_0402_50V9C
1
2
C18
10.
1U_0
402_
16V4
Z 1
2
T17PAD@
MEM:CMD/CTRL/CLK
JCPU1B
CONN@
VTT1D10VTT2C10VTT3B10VTT4AD10
VTT5 W10VTT6 AC10VTT7 AB10VTT8 AA10VTT9 A10
MA1_ODT1V19MA1_ODT0U21MA0_ODT1V22MA0_ODT0T19
MB1_ODT0 Y26MB0_ODT1 W23MB0_ODT0 W26
RSVD_M2 B18
MB1_CS_L0 U22MB0_CS_L1 W25MB0_CS_L0 V26MA0_CS_L1U19
MA1_CS_L1V20MA1_CS_L0U20
MA0_CS_L0T20
MA_ADD15K19MA_ADD14K24MA_ADD13V24MA_ADD12K20MA_ADD11L22MA_ADD10R21MA_ADD9K22MA_ADD8L19MA_ADD7L21MA_ADD6M24MA_ADD5L20MA_ADD4M22MA_ADD3M19MA_ADD2N22MA_ADD1M20MA_ADD0N21
MA_BANK2J21MA_BANK1R23MA_BANK0R20
MA_RAS_LR19MA_CAS_LT22MA_WE_LT24
MEMZPAF10MEMZNAE10 VTT_SENSE Y10
MEMVREF W17
MA_CLK_H3P19MA_CLK_L3P20
MA_CLK_H2Y16MA_CLK_L2AA16
MA_CLK_H1E16MA_CLK_L1F16
MA_CLK_H0N19MA_CLK_L0N20
MB_CLK_H3 R26MB_CLK_L3 R25
MB_CLK_H2 AF18MB_CLK_L2 AF17
MB_CLK_H1 A17MB_CLK_L1 A18
MB_CLK_H0 P22MB_CLK_L0 R22
MA_CKE0J22MA_CKE1J20
MB_CKE0 J25MB_CKE1 H26
MB_ADD15 J24MB_ADD14 J23MB_ADD13 W24MB_ADD12 L25MB_ADD11 L26MB_ADD10 T26
MB_ADD9 K26MB_ADD8 M26MB_ADD7 L24MB_ADD6 N25MB_ADD5 L23MB_ADD4 N26MB_ADD3 N23MB_ADD2 P26MB_ADD1 N24MB_ADD0 P24
MB_BANK2 J26MB_BANK1 U26MB_BANK0 R24
MB_RAS_L U25MB_CAS_L U24MB_WE_L U23
RSVD_M1H16T5 PAD @
R352 39.2_0402_1%
1 2
R791K_0402_1%
12
R343 39.2_0402_1% 1 2
C18
910
00P_
0402
_50V
7K
1
2
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
CPU_DBRDY
CPU_TDO
CPU_TMSCPU_TCK
CPU_TDICPU_TRST#
CPU_DBREQ#
CPU_HTREF0CPU_HTREF1
TEST25_L
CPU_DBRDYCPU_TMS
TEST25_H
CPU_TEST19_PLLTEST0
CPU_CLKIN_SC_P
CPU_THERMTRIP#_R
LDT_RST#
H_PWRGD
LDT_STOP#
THERMDA_CPU
LDT_STOP#
THERMDC_CPUCPU_SIDCPU_SIC
CPU_LDT_REQ#
CPU_CLKIN_SC_N
CPU_TDICPU_TRST#CPU_TCK
CPU_DBREQ#
CPU_TDO
CPU_SVCCPU_SVD
CPU_TEST12_SCANSHIFTENB
CPU_TEST20_SCANCLK2CPU_TEST21_SCANEN
CPU_TEST24_SCANCLK1CPU_TEST22_SCANSHIFTEN
CPU_TEST29_L_FBCLKOUT_NCPU_TEST29_H_FBCLKOUT_P
CPU_TEST17_BP3CPU_TEST16_BP2
CPU_TEST14_BP0CPU_TEST15_BP1
CPU_TEST28_L_PLLCHRZ_NCPU_TEST28_H_PLLCHRZ_P
LDT_RST#
H_PWRGDLDT_RST#
CPU_TEST23_TSTUPD
CPU_MEMHOT#_1.8V
CPU_SVCCPU_SVD
CPU_TEST27_SINGLECHAIN
H_PROCHOT#
THERMDA_CPU
THERMDC_CPU
EC_SMB_CK2
EC_SMB_DA2
H_P ROCHOT#
MAINPWON
H_THERMTRIP#CPU_THERMTRIP#_R
CPU_SIC
CPU_SID
CPU_VDDNB_FB_HCPU_VDDNB_FB_L
CPU_VDD0_FB_HCPU_VDD0_FB_L
CPU_VDD1_FB_HCPU_VDD1_FB_L
CPU_VDD0_FB_LCPU_VDD0_FB_H
CPU_VDD1_FB_HCPU_VDD1_FB_L
CPU_VDDNB_FB_HCPU_VDDNB_FB_L
CPU_TEST18_PLLTEST1
HDT_RST#
CPU_DBREQ#CPU_DBRDYCPU_TCKCPU_TMSCPU_TDICPU_TRST#CPU_TDOHDT_RST#
CPU_TEST21_SCANENCPU_TEST24_SCANCLK1
CPU_TEST20_SCANCLK2
TEST25_H TEST25_L
CPU_TEST10
CPU_TEST10
CPU_TEST23_TSTUPD
CPU_TEST22_SCANSHIFTEN
CPU_TEST18_PLLTEST1CPU_TEST19_PLLTEST0
+1.8V
+1.2V_HT
+2.5VDDA
+2.5VS
+3VS
+1.8V
+1.8VS
+1.8VS
+1.8VS
+3VS
+1.8V
+1.8V
+3VS
+1.8V
+1.8V
+1.8V
+CPU_CORE_0
+CPU_CORE_1
+CPU_CORE_NB
+1.8V
+1.8VS +1.8VS
+1.2V_HT
CLK_CPU_BCLK
CLK_CPU_BCLK#CPU_LDT_REQ#
LDT_RST#
H_PWRGD
LDT_STOP#
CPU_VDD0_FB_HCPU_VDD0_FB_L
CPU_VDD1_FB_HCPU_VDD1_FB_L
CPU_SID_SB
CPU_SIC_SB
EC_SMB_DA1
EC_SMB_CK1
EC_SMB_CK2
EC_SMB_DA2
SB_PWRGD
MAINPWON
H_THERMTRIP#
CPU_SVC CPU_SVD
CPU_VDDNB_FB_H CPU_VDDNB_FB_L
H_PROCHOT#
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3AMD CPU S1G2 CTRL
Custom
6 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
HDT Connector
NOTE: HDT TERMINATION IS REQUIRED FOR REV. Ax SILICON ONLY.
0718 AMD --> 1K ohm
Place close to CPU wihtin 1.5"
VDDA=300mA
as short as possibleroute as differential
testpoint under package
A:Need to re-Link "SGN00000200"
+1.8V sense no support
2200p change to1000p for ADT7421
Address:100_1101
FDV301N, the Vgs is:min = 0.65VTyp = 0.85VMax = 1.5V
EC is PU to 5VALW
2.09V for Gate
Address:100_1100
Close to CPU
Close to CPU
CPU internal thermal sensor
C449 3300p for tigris
T9PAD@
R415 1K_0402_5%
1 2
R86 44.2_0402_1%
1 2
C5313900P_0402_50V7K
1 2
R531 300_0402_5% @1 2
T27 PAD @
T30
PAD@
R358 300_0402_5%
1 2
R351
20K_0402_5%
@ 12
R92 10_0402_5%
1 2
R361
390_0402_5%12
U8
NC7SZ08P5X_NL_SC70-5@
B 2
A 1Y4
P5
G3
C5540.01U_0402_16V7K
@
1
2
T23 PAD @
R12
930
0_04
02_5
%
12
R113300_0402_5%
12
R357 300_0402_5%
1 2
C532 3900P_0402_50V7K
1 2
C2450.01U_0402_16V7K
@
1
2
R80 10_0402_5%
1 2
R567 0_0402_5%@1 2
R538 300_0402_5%
1 2
C436 0.1U_0402_16V4Z
@1 2
JP29
ACES_85201-1005N@
1122334455667788991010GND11GND12
R11
822
0_04
02_5
%
@
12
JCPU1D
6090022100G_B
VDDA1F8VDDA2F9
RESET_LB7PWROKA7LDTSTOP_LF10
SICAF4SIDAF5
HT_REF1P6HT_REF0R6
VDD0_FB_HF6VDD0_FB_LE6
VDDIO_FB_H W9VDDIO_FB_L Y9
THERMTRIP_L AF6PROCHOT_L AC7
RSVD2A5
LDTREQ_LC6
SVC A6SVD A4
RSVD6 C5RSVD4B5
RSVD1A3
CLKIN_HA9CLKIN_LA8
DBRDYG10TMSAA9TCKAC9TRST_LAD9TDIAF9
DBREQ_L E10
TDO AE9
TEST25_HE9TEST25_LE8
TEST19G9TEST18H10
RSVD8 AA7
TEST9C2
TEST17 D7TEST16 E7TEST15 F7TEST14 C7
TEST12AC8
TEST7 C3
TEST6AA6
THERMDC W7THERMDA W8
VDD1_FB_HY6VDD1_FB_LAB6
TEST29_H C9TEST29_L C8
TEST24AE7
TEST23AD7
TEST22AE8
TEST21AB8TEST20AF7
TEST28_H J7TEST28_L H8
TEST27AF8
ALERT_LAE6
TEST10 K8
TEST8 C4
RSVD3B3
RSVD5C1
VDDNB_FB_H H6VDDNB_FB_L G6
RSVD7 D5
KEY2 W18
MEMHOT_L AA8
RSVD10 H18RSVD9 H19
KEY1 M11
T26 PAD @
T15PAD@
L33
FBM_L11_201209_300L_0805
1 2
T29PAD@
R365
390_0402_5%12
T7PAD@
R356 1K_0402_5%@1 2
SAMTEC_ASP-68200-07
JP1
@
2468
101214161820222423
21191715131197531
26
R3350_0402_5%@
1 2
EB
C
Q32
MMBT3904_NL_SOT23-3
2
3 1
R420300_0402_5%
12
T22 PAD @
R930_0402_5%
1 2
G
DS
Q30FDV301N_NL_SOT23-3@
2
13
R3700_0402_5%
1 2
T16PAD@
R11
222
0_04
02_5
%
@
12
G
DS
Q31 FDV301N_NL_SOT23-3@
2
13
R409169_0402_1%
12
T8PAD@
R101 10_0402_5%
1 2
R532 300_0402_5% @1 2
T3PAD@
R419300_0402_5%
12
C2610.22U_0603_16V4Z
1
2
C446
0.1U
_040
2_16
V4Z
1
2
R535 300_0402_5% @
1 2
R353
300_0402_5%
12
R107300_0402_5% @
12
U27
ADM1032ARMZ_MSOP8
VDD1
ALERT# 6
THERM#4 GND 5
D+2
D-3
SCLK 8
SDATA 7
R98300_0402_5%@
12
T25 PAD @
C2644.7U_0805_10V4Z
1
2
R95 10_0402_5%
1 2 R3370_0402_5%@
12
R108300_0402_5% @
12
R569 0_0402_5%@1 2
R82 44.2_0402_1%
1 2
C449
2200P_0402_50V7K
1 2
C255
3300P_0402_50V7K
1
2
T21 PAD @
R537 300_0402_5%
@1 2
R81 10_0402_5%
1 2
T10 PAD @
C5530.01U_0402_16V7K
@
1
2
R360
34.8K_0402_1%~N
@ 12
R533 300_0402_5% @1 2
T28 PAD @
T4PAD@
R565 0_0402_5%@1 2
R418 0_0402_5%
1 2
T6PAD@
R105300_0402_5%@
12
R416 1K_0402_5%
1 2
R539 300_0402_5%
1 2
R11
522
0_04
02_5
%
@
12
T24 PAD @
R11
922
0_04
02_5
%
@
12
R3340_0402_5%
1 2
R364 10K_0402_5%
1 2
R106 10_0402_5%
1 2
+ C282
150U_D2_6.3VM
1
2
R564 0_0402_5%@1 2
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+CPU_CORE_0
+0.9V
+CPU_CORE_0
+CPU_CORE_0
+CPU_CORE_0
+1.8V
+1.8V
+1.8V
+1.8V +1.8V
+0.9V
+0.9V
+CPU_CORE_NB
+1.8V
+1.8V
+CPU_CORE_1
+CPU_CORE_1
+CPU_CORE_1
+CPU_CORE_1
+CPU_CORE_NB
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3AMD CPU S1G2 PWR & GND
Custom
7 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
A: Add C165 and C176to follow AMD Layoutreview recommand forEMI
Between CPU Socket and DIMM
180PF Qt'y follow the distance betweenCPU socket and DIMM0.
Under CPU Socket
Athlon 64 S1Processor Socket
Near CPU Socket
VTT decoupling.
VDD(+CPU_CORE) decoupling.
VDDIO decoupling.+CPU_CORE_NB decoupling.
C: Change to NBO CAP
C: Change to NBO CAP
Under CPU Socket
Near CPU Socket Right side.
Near CPU Socket Left side.
Near Power Supply
Athlon 64 S1Processor Socket
C1650.22U_0603_16V4Z
1
2
C20722U_0805_6.3V6M
1
2
C22122U_0805_6.3V6M
1
2
C191
180P_0402_50V8J
1
2
C172180P_0402_50V8J
1
2
C1660.22U_0603_16V4Z
1
2
C5414.7U_0805_10V4Z
1
2
C1694.7U_0805_10V4Z
1
2
C22522U_0805_6.3V6M
1
2
C5371000P_0402_50V7K
1
2
C164180P_0402_50V8J
1
2
C5150.22U_0603_16V4Z
1
2
C1630.01U_0402_25V4Z
1
2
C216
0.22U_0603_16V4Z
1
2
C1840.01U_0402_25V4Z
1
2
C1704.7U_0805_10V4Z
1
2
+ C78330U_X_2VM_R6M
1
2
C543180P_0402_50V8J
1
2
C2170.01U_0402_25V4Z
1
2
+ C233
220U_D2_4VM_R15
1
2
C2340.22U_0603_16V4Z
1
2
C1414.7U_0805_10V4Z
1
2
C1950.22U_0603_16V4Z
1
2
C219180P_0402_50V8J
1
2
C27322U_0805_6.3V6M
1
2
C1440.22U_0603_16V4Z
1
2
+ C79330U_X_2VM_R6M
1
2
C1684.7U_0805_10V4Z
1
2C5281000P_0402_50V7K
1
2
C22322U_0805_6.3V6M
1
2
C20022U_0805_6.3V6M
1
2
C5140.22U_0603_16V4Z
1
2
C179180P_0402_50V8J
1
2
C182
180P_0402_50V8J
1
2
C1731000P_0402_50V7K
1
2
C20622U_0805_6.3V6M
1
2
C540180P_0402_50V8J
1
2
C19822U_0805_6.3V6M
1
2
C238180P_0402_50V8J
1
2
C237180P_0402_50V8J
1
2
C239180P_0402_50V8J
1
2
C1620.01U_0402_25V4Z
1
2
+ C281220U_D2_4VM_R15
1
2
C5304.7U_0805_10V4Z
1
2
C18622U_0805_6.3V6M
1
2
C1480.22U_0603_16V4Z
1
2
C20122U_0805_6.3V6M
1
2
+ C77330U_X_2VM_R6M
1
2
C21422U_0805_6.3V6M
1
2
C1464.7U_0805_10V4Z
1
2
C2350.22U_0603_16V4Z
1
2
JCPU1E
6090022100G_B
VDD1_25 AC4VDD1_26 AD2
VDD0_1G4VDD0_2H2VDD0_3J9VDD0_4J11VDD0_5J13
VDD0_7K6VDD0_8K10VDD0_9K12VDD0_10K14VDD0_11L4VDD0_12L7VDD0_13L9VDD0_14L11VDD0_15L13
VDD0_17M2VDD0_18M6VDD0_19M8VDD0_20M10VDD0_21N7VDD0_22N9VDD0_23N11
VDD1_1 P8VDD1_2 P10VDD1_3 R4VDD1_4 R7VDD1_5 R9VDD1_6 R11VDD1_7 T2VDD1_8 T6VDD1_9 T8
VDD1_10 T10VDD1_11 T12VDD1_12 T14VDD1_13 U7VDD1_14 U9VDD1_15 U11VDD1_16 U13
VDD1_18 V6VDD1_19 V8VDD1_20 V10VDD1_21 V12VDD1_22 V14VDD1_23 W4VDD1_24 Y2
VDD0_6J15
VDDNB_1K16
VDD0_16L15
VDDNB_2M16VDDNB_3P16VDDNB_4T16
VDD1_17 U15
VDDNB_5V16
VDDIO1H25VDDIO2J17VDDIO3K18VDDIO4K21VDDIO5K23VDDIO6K25VDDIO7L17VDDIO8M18VDDIO9M21VDDIO10M23VDDIO11M25VDDIO12N17 VDDIO13 P18
VDDIO14 P21VDDIO15 P23VDDIO16 P25VDDIO17 R17VDDIO18 T18VDDIO19 T21VDDIO20 T23VDDIO21 T25VDDIO22 U17VDDIO23 V18VDDIO24 V21VDDIO25 V23VDDIO26 V25VDDIO27 Y25
JCPU1F
6090022100G_B
VSS1AA4VSS2AA11VSS3AA13VSS4AA15VSS5AA17VSS6AA19VSS7AB2VSS8AB7VSS9AB9VSS10AB23VSS11AB25VSS12AC11VSS13AC13VSS14AC15VSS15AC17VSS16AC19VSS17AC21VSS18AD6VSS19AD8VSS20AD25VSS21AE11VSS22AE13VSS23AE15VSS24AE17VSS25AE19VSS26AE21VSS27AE23VSS28B4VSS29B6VSS30B8VSS31B9VSS32B11VSS33B13VSS34B15VSS35B17VSS36B19VSS37B21VSS38B23VSS39B25VSS40D6VSS41D8VSS42D9VSS43D11VSS44D13VSS45D15VSS46D17VSS47D19VSS48D21VSS49D23VSS50D25VSS51E4VSS52F2VSS53F11VSS54F13VSS55F15VSS56F17VSS57F19VSS58F21VSS59F23VSS60F25VSS61H7VSS62H9VSS63H21VSS64H23VSS65J4
VSS66 J6VSS67 J8VSS68 J10VSS69 J12VSS70 J14VSS71 J16VSS72 J18VSS73 K2VSS74 K7VSS75 K9VSS76 K11VSS77 K13VSS78 K15VSS79 K17VSS80 L6VSS81 L8VSS82 L10VSS83 L12VSS84 L14VSS85 L16VSS86 L18VSS87 M7VSS88 M9VSS89 AC6VSS90 M17VSS91 N4VSS92 N8VSS93 N10VSS94 N16VSS95 N18VSS96 P2VSS97 P7VSS98 P9VSS99 P11
VSS100 P17VSS101 R8VSS102 R10VSS103 R16VSS104 R18VSS105 T7VSS106 T9VSS107 T11VSS108 T13VSS109 T15VSS110 T17VSS111 U4VSS112 U6VSS113 U8VSS114 U10VSS115 U12VSS116 U14VSS117 U16VSS118 U18VSS119 V2VSS120 V7VSS121 V9VSS122 V11VSS123 V13VSS124 V15VSS125 V17VSS126 W6VSS127 Y21VSS128 Y23VSS129 N6
C1674.7U_0805_10V4Z
1
2
C1741000P_0402_50V7K
1
2
C22622U_0805_6.3V6M
1
2
C230
0.22U_0603_16V4Z
1
2
+ C80330U_X_2VM_R6M
1
2
C19622U_0805_6.3V6M
1
2
+ C218220U_D2_4VM_R15
@
1
2
C2200.22U_0603_16V4Z
1
2
C175180P_0402_50V8J
1
2
C22422U_0805_6.3V6M
1
2
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRA_SDQ[63..0]
DDRA_SMA[15..0]
DDRA_SDM[7..0]
DDRA_SDQ54
DDRA_SDQ10
DDRA_SDQ47
DDRA_SDQ22
DDRA_SDQ9
DDRA_SDQ23
DDRA_SDQ42
DDRA_SDQ34
DDRA_SDQ49DDRA_SDQ48
DDRA_SDQ61DDRA_SDQ60
DDRA_SDQ43
DDRA_SDQ35
DDRA_SDQ27DDRA_SDQ26
DDRA_SDQ17DDRA_SDQ16
DDRA_SDQ7
DDRA_SDM6
DDRA_SDM1
DDRA_SDQ40
DDRA_SDQS4
DDRA_SDQS2
DDRA_SDQS1
DDRA_SDQS6
DDRA_SDQS4#
DDRA_SDQS1#
DDRA_SDQS6#
DDRA_SDQ21DDRA_SDQ20
DDRA_SDQ1
DDRA_SCAS#
DDRA_SRAS#DDRA_SWE#
DDRA_SMA3
DDRA_SMA7
DDRA_SMA2DDRA_SMA0
DDRA_SMA6
DDRA_SMA1
DDRA_SMA10
DDRA_SMA12
DDRA_SMA5
DDRA_SMA9DDRA_SMA8
DDRA_SMA4
DDRA_SMA11
DDRA_SCS0#
DDRA_SCS1#
DDRA_CKE1DDRA_CKE0
DDRA_CLK0DDRA_CLK0#
DDRA_SBS0#DDRA_SBS1#
DDRA_SMA13
DDRA_SDM3
DDRA_SDQS5
DDRA_SDQ55
DDRA_SDQS5#
DDRA_CLK1DDRA_CLK1#
DDRA_SDM5
DDRA_SDQS7
DDRA_SDM0
DDRA_SDQS7#
DDRA_SDQ5
DDRA_SDQ59DDRA_SDQ58
DDRA_SDQ36
DDRA_SDQ44
DDRA_SDQ28
DDRA_SDQ18DDRA_SDQ19
DDRA_SDQ8
DDRA_SDQ62DDRA_SDQ63
DDRA_SDM7
DDRA_ODT1
DDRA_ODT0
DDRA_SDM2
DDRA_SDQ52DDRA_SDQ53
DDRA_SDQS0DDRA_SDQS0#
DDRA_SDQ2
DDRA_SDQS3
DDRA_SDQ3
DDRA_SDQS3#
DDRA_SDM4
ICH_SMBCLK0ICH_SMBDATA0
DDRA_SDQ4
DDRA_SDQ56DDRA_SDQ57
DDRA_SDQ45
DDRA_SDQ37
DDRA_SDQ6
DDRA_SDQ38
DDRA_SDQ46
DDRA_SDQ30DDRA_SDQ31
DDRA_SDQ39
DDRA_SDQ25 DDRA_SDQ29
DDRA_SDQ11
DDRA_SDQ24
DDRA_SBS2#
DDRA_SDQ51DDRA_SDQ50
DDRA_SDQ0
DDRA_SDQ15DDRA_SDQ14
DDRA_SMA14
DDRA_SDQ12
DDRA_SDQ32
DDRA_SDQ13
DDRA_SDQ41
DDRA_SDQS2#
DDRA_SDQ33
DDRA_SMA15
DDRA_SMA3
DDRA_SMA15DDRA_SMA11
DDRA_SMA6DDRA_SMA7
DDRA_SCAS#
DDRA_SMA0
DDRA_CKE0
DDRA_SBS1#
DDRA_SMA5
DDRA_SBS2#
DDRA_SBS0#
DDRA_SRAS#DDRA_SCS0#
DDRA_SMA8
DDRA_SCS1#
DDRA_SMA4
DDRA_SMA14
DDRA_SMA10
DDRA_ODT0
DDRA_SMA9
DDRA_ODT1
DDRA_SMA2
DDRA_CKE1
DDRA_SMA1
DDRA_SMA13
DDRA_SMA12
DDRA_SWE#
+V_DDR_MCH_REF
+1.8V
+1.8V +1.8V
+3VS
+V_DDR_MCH_REF
+3VS
+1.8V+0.9V
+V_DDR_MCH_REF
+1.8V
+0.9V
DDRA_SDQS0#DDRA_SDQS0
DDRA_SDQS1#DDRA_SDQS1
DDRA_SDQS2#DDRA_SDQS2
DDRA_CKE0
DDRA_SBS2#
DDRA_SBS0#DDRA_SWE#
DDRA_SCAS#DDRA_SCS1#
DDRA_ODT1
DDRA_SDQS4#DDRA_SDQS4
DDRA_SDQS6#DDRA_SDQS6
ICH_SMBDATA0ICH_SMBCLK0
DDRA_CLK0 DDRA_CLK0#
DDRA_SDQS3# DDRA_SDQS3
DDRA_CKE1
DDRA_SBS1# DDRA_SRAS# DDRA_SCS0#
DDRA_ODT0
DDRA_SDQS5# DDRA_SDQS5
DDRA_CLK1 DDRA_CLK1#
DDRA_SDQS7# DDRA_SDQS7
DDRA_SDQ[63..0]
DDRA_SDM[7..0]
DDRA_SMA[15..0]
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3DDRII SO-DIMM 0
Custom
8 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
RESERVE +V_DDR_MCH_REF BUFFER CIRCUIT
DIMM1 REV H:5.2mm (BOT)
C119
0.1U_0402_16V4Z
1
2
C161 0.1U_0402_16V4Z
1 2
RP12
47_0804_8P4R_5%
1 82 73 64 5
JDIMM1
FOX_AS0A426-M2RN-7FCONN@
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144DQS5# 146
DQS5 148VSS 150
DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
GND203 GND 204
C55
0.1U_0402_16V4Z
1
2
C155
0.1U_0402_16V4Z
1
2
R1481K_0402_1%
12
RP18
47_0804_8P4R_5%
18273645
R314 10K_0402_5%
1 2
RP9
47_0804_8P4R_5%
18273645
R1411K_0402_1%
12
C197
0.1U_0402_16V4Z
1
2
C180 0.1U_0402_16V4Z
1 2
R315 10K_0402_5%
1 2
C213 0.1U_0402_16V4Z
1 2
C222 0.1U_0402_16V4Z
1 2
C413
4.7U_0805_10V4Z
1
2
C194 0.1U_0402_16V4Z
1 2
C113
0.1U_0402_16V4Z
1
2
C414
0.1U_0402_16V4Z
1
2
C156 0.1U_0402_16V4Z
1 2
RP23
47_0804_8P4R_5%
18273645
RP17
47_0804_8P4R_5%
1 82 73 64 5
C25
610
00P_
0402
_50V
7K
1
2
C159 0.1U_0402_16V4Z
1 2
C190 0.1U_0402_16V4Z
1 2
C128
0.1U_0402_16V4Z
1
2
C157 0.1U_0402_16V4Z
1 2
C199 0.1U_0402_16V4Z
1 2
C151
0.1U_0402_16V4Z
1
2
RP15
47_0804_8P4R_5%
18273645
RP20
47_0804_8P4R_5%
1 82 73 64 5
C25
71U
_040
2_6.
3V4Z
1
2
C152 0.1U_0402_16V4Z
1 2
C211 0.1U_0402_16V4Z
1 2
C124
0.1U_0402_16V4Z
1
2
C187 0.1U_0402_16V4Z
1 2
C154 0.1U_0402_16V4Z
1 2
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
DDRB_SDQ[63..0]
DDRB_SMA[15..0]
DDRB_SDM[7..0]
DDRB_SMA14
DDRB_SDQ20
DDRB_SDQ39DDRB_SDQ38
DDRB_SDQ29
DDRB_CLK1DDRB_CLK1#
DDRB_SDQ24
DDRB_CLK0
DDRB_SDQ51
DDRB_CLK0#
DDRB_SDQ50
DDRB_SDQ31
DDRB_SDQ28
DDRB_SDQ61
ICH_SMBCLK0ICH_SMBDATA0
DDRB_SDQ27
DDRB_SDQ57
DDRB_SDQ26 DDRB_SDQ30
DDRB_SBS2#
DDRB_SDQS1
DDRB_SDQS2
DDRB_SDQ40
DDRB_SDQS4
DDRB_SDQS6
DDRB_SDQS4#
DDRB_SDQS1#
DDRB_SDQS2#
DDRB_SDQ41
DDRB_SDQS6#
DDRB_SDQ11DDRB_SDQ10
DDRB_SDQ1DDRB_SDQ0
DDRB_SMA3
DDRB_SWE#
DDRB_SCAS#
DDRB_SMA9
DDRB_SMA5
DDRB_SMA12
DDRB_SMA10
DDRB_SMA1
DDRB_CKE0
DDRB_SCS1#
DDRB_SMA8
DDRB_SDM3
DDRB_SBS0#
DDRB_SDQ25
DDRB_SDQ35DDRB_SDQ34
DDRB_SDM5
DDRB_SDQ18
DDRB_SDQ49DDRB_SDQ48
DDRB_SDQ9DDRB_SDQ8
DDRB_SDQ19
DDRB_SDM7
DDRB_SDQ43
DDRB_ODT1
DDRB_SDQ42
DDRB_SDQS0#DDRB_SDQS0
DDRB_SDQ2
DDRB_SDQ33DDRB_SDQ32
DDRB_SDQ56
DDRB_SDQ3
DDRB_SDQ37
DDRB_SDQ7DDRB_SDQ6
DDRB_SDM6
DDRB_SDM1
DDRB_SRAS#
DDRB_SMA7
DDRB_SMA2DDRB_SMA0
DDRB_SMA6
DDRB_SMA4
DDRB_SMA11
DDRB_SCS0#
DDRB_CKE1
DDRB_SBS1#
DDRB_SMA13
DDRB_SDQ54
DDRB_SDQS5
DDRB_SDQ55
DDRB_SDQ44
DDRB_SDQS5#
DDRB_SDQ45
DDRB_SDQ14DDRB_SDQ15
DDRB_SDQS7
DDRB_SDM0
DDRB_SDQS7#
DDRB_SDQ5
DDRB_SDQ62DDRB_SDQ63
DDRB_ODT0
DDRB_SDM2
DDRB_SDQ60
DDRB_SDQ52DDRB_SDQ53
DDRB_SDQ22DDRB_SDQ23
DDRB_SDQ12DDRB_SDQ13
DDRB_SDQS3DDRB_SDQS3#
DDRB_SDM4
DDRB_SDQ46DDRB_SDQ47
DDRB_SDQ36
DDRB_SDQ4
DDRB_SDQ16DDRB_SDQ21
DDRB_SDQ58DDRB_SDQ59
DDRB_SDQ17
DDRB_SMA15
DDRB_SCAS#
DDRB_SMA7
DDRB_SMA3DDRB_SMA1
DDRB_SWE#
DDRB_SBS2#DDRB_SMA15DDRB_CKE1
DDRB_SCS1#
DDRB_CKE0
DDRB_SMA2
DDRB_SMA10
DDRB_SBS1#
DDRB_SMA14
DDRB_ODT1
DDRB_SMA4
DDRB_SMA13
DDRB_SBS0#
DDRB_ODT0
DDRB_SMA11
DDRB_SRAS#DDRB_SMA0
DDRB_SMA6
DDRB_SCS0#
DDRB_SMA5DDRB_SMA12DDRB_SMA9
DDRB_SMA8
+V_DDR_MCH_REF
+1.8V +1.8V
+3VS
+V_DDR_MCH_REF
+0.9V +1.8V
+3VS
+V_DDR_MCH_REF
DDRB_SDQS0#DDRB_SDQS0
DDRB_SDQS1#DDRB_SDQS1
DDRB_SDQS2#DDRB_SDQS2
DDRB_CKE0
DDRB_SBS2#
DDRB_SBS0#DDRB_SWE#
DDRB_SCAS#DDRB_SCS1#
DDRB_ODT1
DDRB_SDQS4#DDRB_SDQS4
DDRB_SDQS6#DDRB_SDQS6
DDRB_CLK0 DDRB_CLK0#
DDRB_SDQS3# DDRB_SDQS3
DDRB_CKE1
DDRB_SBS1# DDRB_SRAS# DDRB_SCS0#
DDRB_ODT0
DDRB_SDQS5# DDRB_SDQS5
DDRB_CLK1 DDRB_CLK1#
DDRB_SDQS7# DDRB_SDQS7
ICH_SMBDATA0ICH_SMBCLK0
DDRB_SDQ[63..0]
DDRB_SDM[7..0]
DDRB_SMA[15..0]
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3DDRII SO-DIMM 1
Custom
9 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
DIMM1 REV H:9.2mm (BOT)
C338822U_0805_6.3V6M @
1
2
C215 0.1U_0402_16V4Z
1 2
RP16
47_0804_8P4R_5%
18273645
C203 0.1U_0402_16V4Z
12
C160 0.1U_0402_16V4Z
1 2
C153 0.1U_0402_16V4Z
1 2
C204 0.1U_0402_16V4Z
12
RP14
47_0804_8P4R_5%
1 82 73 64 5
RP10
47_0804_8P4R_5%
18273645
C20
210
00P_
0402
_25V
8J
1
2
C176 0.1U_0402_16V4Z
1 2C185 0.1U_0402_16V4Z
12
RP22
47_0804_8P4R_5%
18273645
C193 0.1U_0402_16V4Z
1 2
C29
20.
1U_0
402_
16V4
Z
1
2
R331 10K_0402_5%
1 2
RP19
47_0804_8P4R_5%
1 82 73 64 5
JDIMM2
FOX_AS0A426-MARG-7FCONN@
VREF1VSS3DQ05DQ17VSS9DQS0#11DQS013VSS15DQ217DQ319VSS21DQ823DQ925VSS27DQS1#29DQS131VSS33DQ1035DQ1137VSS39
VSS41DQ1643DQ1745VSS47DQS2#49DQS251VSS53DQ1855DQ1957VSS59DQ2461DQ2563VSS65DM367NC69VSS71DQ2673DQ2775VSS77CKE079VDD81NC83BA285VDD87A1289A991A893VDD95A597A399A1101VDD103A10/AP105BA0107WE#109VDD111CAS#113NC/S1#115VDD117NC/ODT1119VSS121DQ32123DQ33125VSS127DQS4#129DQS4131VSS133DQ34135DQ35137VSS139DQ40141DQ41143
VSS 2DQ4 4DQ5 6VSS 8DM0 10VSS 12DQ6 14DQ7 16VSS 18
DQ12 20DQ13 22
VSS 24DM1 26VSS 28CK0 30
CK0# 32VSS 34
DQ14 36DQ15 38
VSS 40
VSS 42DQ20 44DQ21 46
VSS 48NC 50
DM2 52VSS 54
DQ22 56DQ23 58
VSS 60DQ28 62DQ29 64
VSS 66DQS3# 68
DQS3 70VSS 72
DQ30 74DQ31 76
VSS 78NC/CKE1 80
VDD 82NC/A15 84NC/A14 86
VDD 88A11 90
A7 92A6 94
VDD 96A4 98A2 100A0 102
VDD 104BA1 106
RAS# 108S0# 110
VDD 112ODT0 114
NC/A13 116VDD 118
NC 120VSS 122
DQ36 124DQ37 126
VSS 128DM4 130VSS 132
DQ38 134DQ39 136
VSS 138DQ44 140DQ45 142
VSS 144VSS145DM5147VSS149DQ42151DQ43153VSS155DQ48157DQ49159VSS161NC,TEST163VSS165DQS6#167DQS6169VSS171DQ50173DQ51175VSS177DQ56179DQ57181VSS183DM7185VSS187DQ58189DQ59191VSS193SDA195SCL197VDDSPD199
DQS5# 146DQS5 148
VSS 150DQ46 152DQ47 154
VSS 156DQ52 158DQ53 160
VSS 162CK1 164
CK1# 166VSS 168DM6 170VSS 172
DQ54 174DQ55 176
VSS 178DQ60 180DQ61 182
VSS 184DQS7# 186
DQS7 188VSS 190
DQ62 192DQ63 194
VSS 196SAO 198SA1 200
GND201 GND 202
RP21
47_0804_8P4R_5%
18273645
C205 0.1U_0402_16V4Z
12
R327 10K_0402_5%
1 2
C210 0.1U_0402_16V4Z
1 2
RP11
47_0804_8P4R_5%
1 82 73 64 5
C209 0.1U_0402_16V4Z
1 2
C158 0.1U_0402_16V4Z
12
C171 0.1U_0402_16V4Z
12
C188 0.1U_0402_16V4Z
12
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
PCIE_MTX_C_GRX_P8PCIE_MTX_C_GRX_N8PCIE_MTX_GRX_N8
PCIE_MTX_GRX_P8
PCIE_MTX_C_GRX_P9PCIE_MTX_C_GRX_N9
PCIE_GTX_MRX_N0
PCIE_MTX_GRX_P9PCIE_MTX_GRX_N9
PCIE_GTX_MRX_P1
PCIE_MTX_C_GRX_N10PCIE_MTX_C_GRX_P10PCIE_MTX_GRX_P10
PCIE_MTX_GRX_N10
PCIE_GTX_MRX_N15
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_N11PCIE_MTX_C_GRX_P11
PCIE_MTX_GRX_N11PCIE_MTX_GRX_P11
PCIE_GTX_MRX_P3
PCIE_MTX_C_GRX_P12PCIE_MTX_C_GRX_N12
PCIE_MTX_GRX_P12
SB_RX0P
PCIE_MTX_GRX_N12
PCIE_GTX_MRX_P4
SB_RX0NSB_RX1PSB_RX1N
PCIE_MTX_C_GRX_P13PCIE_MTX_C_GRX_N13PCIE_MTX_GRX_N13
PCIE_GTX_MRX_N5
PCIE_MTX_GRX_P13
PCIE_GTX_MRX_P5
PCIE_MTX_C_GRX_N14PCIE_MTX_C_GRX_P14
PCIE_GTX_MRX_N6
PCIE_MTX_GRX_N14PCIE_MTX_GRX_P14
PCIE_GTX_MRX_P7
PCIE_MTX_C_GRX_P15PCIE_MTX_C_GRX_N15PCIE_MTX_GRX_N15
PCIE_MTX_GRX_P15
PCIE_ITX_PRX_P1PCIE_ITX_PRX_N1PCIE_ITX_PRX_P2
PCIE_GTX_MRX_P10
PCIE_ITX_PRX_N2
PCIE_GTX_MRX_N10
PCIE_ITX_PRX_P3PCIE_ITX_PRX_N3
PCIE_GTX_MRX_N12
PCIE_PTX_C_IRX_P1
PCIE_GTX_MRX_P12
PCIE_PTX_C_IRX_N1
PCIE_PTX_C_IRX_P3
PCIE_GTX_MRX_N13
PCIE_PTX_C_IRX_N3
PCIE_PTX_C_IRX_P2PCIE_PTX_C_IRX_N2
PCIE_GTX_MRX_N14
SB_RX2PSB_RX2NSB_RX3PSB_RX3N
SB_TX2P_CSB_TX2N_C
PCIE_MTX_C_GRX_N0PCIE_MTX_C_GRX_P0PCIE_MTX_GRX_P0
SB_TX3P_C
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
SB_TX3N_C
PCIE_MTX_GRX_N0
SB_TX0P_CSB_TX0N_CSB_TX1P_C
PCIE_MTX_C_GRX_P1PCIE_MTX_C_GRX_N1PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P1
PCIE_MTX_C_GRX_N2PCIE_MTX_C_GRX_P2
PCIE_MTX_GRX_N2PCIE_MTX_GRX_P2
PCIE_MTX_C_GRX_P3PCIE_MTX_C_GRX_N3PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P3
H_CADIN[0..15]
H_CADIP[0..15]
H_CADOP[0..15]
H_CADON[0..15]
SB_TX1N_C
PCIE_MTX_C_GRX_P4PCIE_MTX_C_GRX_N4
PCIE_MTX_GRX_P4PCIE_MTX_GRX_N4
PCIE_MTX_C_GRX_P5PCIE_MTX_C_GRX_N5PCIE_MTX_GRX_N5
PCIE_MTX_GRX_P5
PCIE_MTX_C_GRX_P6PCIE_MTX_C_GRX_N6PCIE_MTX_GRX_N6
PCIE_MTX_GRX_P6
PCIE_MTX_C_GRX_P7PCIE_MTX_C_GRX_N7PCIE_MTX_GRX_N7
PCIE_MTX_GRX_P7
H_CADIN0H_CADIP1H_CADIN1
H_CADIN2H_CADIP2
H_CADIN3H_CADIP3
H_CLKIP0H_CLKIN0
H_CTLIN0H_CTLIP0
H_CLKON0H_CLKOP1
H_CTLON0
H_CADIN4H_CADIP4
H_CADIN5H_CADIP5
H_CADIN6H_CADIP6
H_CADIN7H_CADIP7
H_CADIN8H_CADIP8
H_CADIN9H_CADIP9
H_CADIN10H_CADIP10
H_CLKOP0
H_CLKON1
H_CTLOP0
H_CADIP11H_CADIN11H_CADIP12H_CADIN12
H_CADIN13H_CADIP13
H_CADIN14H_CADIP14
H_CADIN15H_CADIP15
H_CADOP0
H_CLKIN1
H_CADON0
H_CLKIP1
H_CADOP1H_CADON1
H_CTLIP1H_CTLIN1
H_CADON2
H_CTLOP1
H_CADOP2
H_CTLON1
H_CADOP3H_CADON3
H_CADON4H_CADOP4
H_CADOP5H_CADON5H_CADOP6H_CADON6H_CADOP7H_CADON7
H_CADOP15H_CADON15
H_CADOP14H_CADON14
H_CADOP13H_CADON13
H_CADOP12H_CADON12
H_CADOP11H_CADON11
H_CADON10H_CADOP10H_CADON9H_CADOP9
H_CADOP8H_CADON8
H_CADIP0
PCIE_MTX_GRX_N0
PCIE_MTX_GRX_P0
PCIE_MTX_GRX_N1
PCIE_MTX_GRX_P1
PCIE_MTX_GRX_N2
PCIE_MTX_GRX_P2
PCIE_MTX_GRX_N3
PCIE_MTX_GRX_P3 HDMI_CLK+_UMA
HDMI_CLK-_UMA
HDMI_TX0+_UMA
HDMI_TX0-_UMA
HDMI_TX1+_UMA
HDMI_TX1-_UMA
HDMI_TX2+_UMA
HDMI_TX2-_UMA
PCIE_GTX_C_MRX_N0PCIE_GTX_C_MRX_P0
PCIE_GTX_C_MRX_N15
PCIE_GTX_C_MRX_N2PCIE_GTX_C_MRX_P2
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_P8PCIE_GTX_C_MRX_N8PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P10PCIE_GTX_C_MRX_N10PCIE_GTX_C_MRX_P11
PCIE_GTX_C_MRX_N12PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_N14
PCIE_GTX_MRX_P0
PCIE_GTX_C_MRX_P1PCIE_GTX_C_MRX_N1
PCIE_GTX_MRX_P2PCIE_GTX_MRX_N2
PCIE_GTX_C_MRX_P3PCIE_GTX_C_MRX_N3 PCIE_GTX_MRX_N3PCIE_GTX_C_MRX_P4
PCIE_GTX_MRX_N4PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_P6 PCIE_GTX_MRX_P6
PCIE_GTX_C_MRX_P7PCIE_GTX_C_MRX_N7 PCIE_GTX_MRX_N7
PCIE_GTX_MRX_P8
PCIE_GTX_MRX_P9PCIE_GTX_C_MRX_N9 PCIE_GTX_MRX_N9
PCIE_GTX_MRX_P11PCIE_GTX_C_MRX_N11 PCIE_GTX_MRX_N11PCIE_GTX_C_MRX_P12
PCIE_GTX_MRX_P13PCIE_GTX_C_MRX_N13PCIE_GTX_C_MRX_P14 PCIE_GTX_MRX_P14
PCIE_GTX_C_MRX_P15 PCIE_GTX_MRX_P15
PCIE_GTX_MRX_N1
PCIE_GTX_MRX_N8
+1.1VS
PCIE_GTX_C_MRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_PTX_C_IRX_P1PCIE_PTX_C_IRX_N1PCIE_PTX_C_IRX_P2PCIE_PTX_C_IRX_N2PCIE_PTX_C_IRX_P3PCIE_PTX_C_IRX_N3
SB_RX0PSB_RX0NSB_RX1PSB_RX1NSB_RX2PSB_RX2NSB_RX3PSB_RX3N
SB_TX0P SB_TX0N SB_TX1P SB_TX1N SB_TX2P SB_TX2N SB_TX3P SB_TX3N
PCIE_ITX_C_PRX_P1 PCIE_ITX_C_PRX_N1 PCIE_ITX_C_PRX_P2 PCIE_ITX_C_PRX_N2 PCIE_ITX_C_PRX_P3 PCIE_ITX_C_PRX_N3
H_CADOP[0..15]
H_CADON[0..15]
H_CADIP[0..15]
H_CADIN[0..15]
H_CLKOP0H_CLKON0H_CLKOP1H_CLKON1
H_CTLOP0H_CTLON0H_CTLOP1H_CTLON1
H_CLKIP0 H_CLKIN0 H_CLKIP1 H_CLKIN1
H_CTLIP0 H_CTLIN0 H_CTLIP1 H_CTLIN1
HDMI_CLK+_UMA
HDMI_CLK-_UMA
HDMI_TX0+_UMA
HDMI_TX0-_UMA
HDMI_TX1+_UMA
HDMI_TX2+_UMA
HDMI_TX1-_UMA
HDMI_TX2-_UMA
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3RS780-HT/PCIE
Custom
10 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
GLAN
WLAN
DP0GFX_TX0,TX1,TX2 and TX3
RS780M Display Port Support (muxed on GFX)
DP1GFX_TX4,TX5,TX6 and TX7
AUX0 and HPD0
AUX1 and HPD1
0718 Place within 1"layout 1:2
0718 Place within 1"layout 1:2
TV Tuner
C901 0.1U_0402_10V7KUMA@1 2
C481 0.1U_0402_16V7KVGA@1 2
C693 0.1U_0402_16V7K VGA@ 1 2
C464 0.1U_0402_16V7KVGA@1 2
C711 0.1U_0402_16V7K VGA@ 1 2
C684 0.1U_0402_16V7K VGA@ 1 2
C694 0.1U_0402_16V7K VGA@ 1 2
C704 0.1U_0402_16V7K VGA@ 1 2
C683 0.1U_0402_16V7K VGA@1 2
C271 0.1U_0402_16V7K
1 2
C462 0.1U_0402_16V7KVGA@1 2
C468 0.1U_0402_16V7K VGA@1 2
C897 0.1U_0402_10V7KUMA@1 2
C705 0.1U_0402_16V7K VGA@ 1 2
R76
301_0402_1%
1 2
C21 0.1U_0402_16V7K
1 2
R33 1.27K_0402_1%
1 2
C463 0.1U_0402_16V7KVGA@1 2
C695 0.1U_0402_16V7K VGA@ 1 2
C686 0.1U_0402_16V7K VGA@1 2
C696 0.1U_0402_16V7K VGA@ 1 2
C900 0.1U_0402_10V7KUMA@1 2
C706 0.1U_0402_16V7K VGA@ 1 2
C450 0.1U_0402_16V7K VGA@1 2
C685 0.1U_0402_16V7K VGA@ 1 2
C470 0.1U_0402_16V7KVGA@1 2
C20 0.1U_0402_16V7K
1 2
C31 0.1U_0402_16V7K
1 2
PART 1 OF 6
HYP
ER T
RA
NSP
OR
T C
PU I/
F
U25A
RS780M_FCBGA528
HT_RXCAD15PU19HT_RXCAD15NU18
HT_RXCAD14PU20HT_RXCAD14NU21
HT_RXCAD13PV21HT_RXCAD13NV20
HT_RXCAD12PW21HT_RXCAD12NW20
HT_RXCAD11PY22HT_RXCAD11NY23
HT_RXCAD10PAA24HT_RXCAD10NAA25
HT_RXCAD9PAB25HT_RXCAD9NAB24
HT_RXCAD8PAC24HT_RXCAD8NAC25
HT_RXCAD7PN24HT_RXCAD7NN25
HT_RXCAD6PP25HT_RXCAD6NP24
HT_RXCAD5PP22HT_RXCAD5NP23
HT_RXCAD4PT25HT_RXCAD4NT24
HT_RXCAD3PU24HT_RXCAD3NU25
HT_RXCAD2PV25HT_RXCAD2NV24
HT_RXCAD1PV22HT_RXCAD1NV23
HT_RXCAD0PY25HT_RXCAD0NY24
HT_RXCLK1PAB23HT_RXCLK1NAA22
HT_RXCLK0PT22HT_RXCLK0NT23
HT_RXCTL0PM22HT_RXCTL0NM23HT_RXCTL1PR21HT_RXCTL1NR20
HT_RXCALPC23HT_RXCALNA24
HT_TXCAD15P P18HT_TXCAD15N M18
HT_TXCAD14P M21HT_TXCAD14N P21
HT_TXCAD13P M19HT_TXCAD13N L18
HT_TXCAD12P L19HT_TXCAD12N J19
HT_TXCAD11P J18HT_TXCAD11N K17
HT_TXCAD10P J20HT_TXCAD10N J21
HT_TXCAD9P G20HT_TXCAD9N H21
HT_TXCAD8P F21HT_TXCAD8N G21
HT_TXCAD7P K23HT_TXCAD7N K22
HT_TXCAD6P K24HT_TXCAD6N K25
HT_TXCAD5P J25HT_TXCAD5N J24
HT_TXCAD4P H23HT_TXCAD4N H22
HT_TXCAD3P F23HT_TXCAD3N F22
HT_TXCAD2P F24HT_TXCAD2N F25
HT_TXCAD1P E24HT_TXCAD1N E25
HT_TXCAD0P D24HT_TXCAD0N D25
HT_TXCLK1P L21HT_TXCLK1N L20
HT_TXCLK0P H24HT_TXCLK0N H25
HT_TXCTL0P M24HT_TXCTL0N M25HT_TXCTL1P P19HT_TXCTL1N R18
HT_TXCALP B24HT_TXCALN B25
C707 0.1U_0402_16V7K VGA@ 1 2
C461 0.1U_0402_16V7KVGA@1 2
C455 0.1U_0402_16V7KVGA@1 2C454 0.1U_0402_16V7KVGA@1 2
C465 0.1U_0402_16V7KVGA@1 2
C459 0.1U_0402_16V7KVGA@1 2
C902 0.1U_0402_10V7KUMA@1 2
C697 0.1U_0402_16V7K VGA@ 1 2
C471 0.1U_0402_16V7KVGA@1 2
C265 0.1U_0402_16V7K
1 2
C688 0.1U_0402_16V7K VGA@ 1 2
C295 0.1U_0402_16V7K
1 2
C698 0.1U_0402_16V7K VGA@ 1 2 C475 0.1U_0402_16V7KVGA@1 2
C476 0.1U_0402_16V7KVGA@1 2
C708 0.1U_0402_16V7K VGA@ 1 2
R75
301_0402_1%
1 2
C687 0.1U_0402_16V7K VGA@ 1 2
C268 0.1U_0402_16V7K
1 2
C903 0.1U_0402_10V7KUMA@1 2
C467 0.1U_0402_16V7K VGA@ 1 2C466 0.1U_0402_16V7K VGA@1 2
C22 0.1U_0402_16V7K
1 2
PART 2 OF 6
PCIE
I/F
GFX
PCIE I/F GPP
PCIE I/F SB
U25B
RS780M_FCBGA528
SB_TX3P AD5SB_TX3N AE5
GPP_TX2P AA2GPP_TX2N AA1GPP_TX3P Y1GPP_TX3N Y2
SB_RX3PW5SB_RX3NY5
GPP_RX2PAD1GPP_RX2NAD2GPP_RX3PV5GPP_RX3NW6
SB_TX0P AD7SB_TX0N AE7SB_TX1P AE6SB_TX1N AD6
SB_RX0PAA8SB_RX0NY8SB_RX1PAA7SB_RX1NY7
PCE_CALRP(PCE_BCALRP) AC8PCE_CALRN(PCE_BCALRN) AB8
SB_TX2N AC6SB_RX2PAA5SB_RX2NAA6
SB_TX2P AB6
GPP_RX0PAE3GPP_RX0NAD4GPP_RX1PAE2GPP_RX1NAD3
GPP_TX0P AC1GPP_TX0N AC2GPP_TX1P AB4GPP_TX1N AB3
GFX_RX0PD4GFX_RX0NC4GFX_RX1PA3GFX_RX1NB3GFX_RX2PC2GFX_RX2NC1GFX_RX3PE5GFX_RX3NF5GFX_RX4PG5GFX_RX4NG6GFX_RX5PH5GFX_RX5NH6GFX_RX6PJ6GFX_RX6NJ5GFX_RX7PJ7GFX_RX7NJ8GFX_RX8PL5GFX_RX8NL6GFX_RX9PM8GFX_RX9NL8GFX_RX10PP7GFX_RX10NM7GFX_RX11PP5GFX_RX11NM5GFX_RX12PR8GFX_RX12NP8GFX_RX13PR6GFX_RX13NR5GFX_RX14PP4GFX_RX14NP3GFX_RX15PT4GFX_RX15NT3
GFX_TX0P A5GFX_TX0N B5GFX_TX1P A4GFX_TX1N B4GFX_TX2P C3GFX_TX2N B2GFX_TX3P D1GFX_TX3N D2GFX_TX4P E2GFX_TX4N E1GFX_TX5P F4GFX_TX5N F3GFX_TX6P F1GFX_TX6N F2GFX_TX7P H4GFX_TX7N H3GFX_TX8P H1GFX_TX8N H2GFX_TX9P J2GFX_TX9N J1
GFX_TX10P K4GFX_TX10N K3GFX_TX11P K1GFX_TX11N K2GFX_TX12P M4GFX_TX12N M3GFX_TX13P M1GFX_TX13N M2GFX_TX14P N2GFX_TX14N N1GFX_TX15P P1GFX_TX15N P2
GPP_TX4P Y4GPP_TX4N Y3GPP_TX5P V1GPP_TX5N V2
GPP_RX4PU5GPP_RX4NU6GPP_RX5PU8GPP_RX5NU7
C260 0.1U_0402_16V7K
1 2
C699 0.1U_0402_16V7K VGA@ 1 2
C290 0.1U_0402_16V7K
1 2
C480 0.1U_0402_16V7KVGA@1 2
C690 0.1U_0402_16V7K VGA@ 1 2
C456 0.1U_0402_16V7KVGA@1 2C473 0.1U_0402_16V7KVGA@1 2
C700 0.1U_0402_16V7K VGA@ 1 2
C710 0.1U_0402_16V7K VGA@ 1 2
C899 0.1U_0402_10V7KUMA@1 2
C689 0.1U_0402_16V7K VGA@ 1 2
C30 0.1U_0402_16V7K
1 2
C479 0.1U_0402_16V7KVGA@1 2
C452 0.1U_0402_16V7K VGA@1 2
C474 0.1U_0402_16V7KVGA@1 2
R31 2K_0402_1%
1 2
C904 0.1U_0402_10V7KUMA@1 2
C262 0.1U_0402_16V7K
1 2
C451 0.1U_0402_16V7K VGA@1 2C681 0.1U_0402_16V7K VGA@1 2
C701 0.1U_0402_16V7K VGA@ 1 2
C23 0.1U_0402_16V7K
1 2
C460 0.1U_0402_16V7KVGA@1 2
C692 0.1U_0402_16V7K VGA@ 1 2
C702 0.1U_0402_16V7K VGA@ 1 2
C680 0.1U_0402_16V7K VGA@1 2
C691 0.1U_0402_16V7K VGA@ 1 2
C478 0.1U_0402_16V7KVGA@1 2
C477 0.1U_0402_16V7KVGA@1 2
C709 0.1U_0402_16V7K VGA@ 1 2
C682 0.1U_0402_16V7K VGA@ 1 2
C458 0.1U_0402_16V7KVGA@1 2
C472 0.1U_0402_16V7KVGA@1 2
C898 0.1U_0402_10V7KUMA@1 2
C263 0.1U_0402_16V7K
1 2
C453 0.1U_0402_16V7K VGA@ 1 2
C457 0.1U_0402_16V7KVGA@1 2
C469 0.1U_0402_16V7K VGA@1 2
C703 0.1U_0402_16V7K VGA@ 1 2
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
GMCH_LCD_DATA
GMCH_TZCLK-GMCH_TZCLK+
CLK_SBLINK_BCLKCLK_SBLINK_BCLK#
+NB_HTPVDD
+AVDD2
+AVDDQ
+VDDLTP18
+VDDLTP18
NB_THERMAL_DC
+VDDLT18
NB_THERMAL_DA
AUX_CAL
GMCH_TXCLK-GMCH_TXCLK+
GMCH_TXOUT0+
GMCH_TXOUT1-GMCH_TXOUT1+
GMCH_TXOUT2-GMCH_TXOUT2+
GMCH_TXOUT0-
NB_RESET#PLT_RST#
NB_OSC_14.318M
DAC_RSET
CLK_NBGFXCLK_NBGFX#
+NB_PLLVDD
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
GMCH_LCD_CLK
GMCH_CRT_R
GMCH_CRT_B
GMCH_ENVDD
GMCH_CRT_VSYNC
GMCH_CRT_G
GMCH_CRT_HSYNC
NB_ALLOW_LDTSTOPNB_LDTSTOP#
+VDDLT18
CLK_NBHTCLK_NBHT#
GMCH_TZOUT1-
GMCH_TZOUT2-GMCH_TZOUT2+
GMCH_TZOUT1+
GMCH_TZOUT0+GMCH_TZOUT0-
SUS_STAT#SUS_STAT_R#
GMCH_LCD_DATA
GMCH_LCD_CLK
NB_PWRGD_R
NB_LDTSTOP#
GMCH_CRT_CLKGMCH_CRT_DATA
GMCH_DDC_CLKGMCH_DDC_DATA
POWER_SEL
UMA_HPD
GMCH_DDC_CLKGMCH_DDC_DATA
NB_PWRGD_R
GMCH_CRT_DATA
NB_ALLOW_LDTSTOP
GMCH_CRT_CLK
+AVDD1
ENBKL
+3VS
+NB_PLLVDD+NB_HTPVDD
+1.8VS
+1.8VS
+1.8VS
+1.8VS
+NB_HTPVDD+1.8VS
+1.8VS
+VDDA18PCIEPLL
+VDDA18HTPLL+1.8VS
+VDDA18HTPLL
+VDDA18PCIEPLL
+1.1VS
+1.8VS
+1.1VS+NB_PLLVDD
+3VS
+1.8VS+3VS
+3VS
+1.8VS+1.8VS +3VS+1.8VS
+5VS+3VS
GMCH_CRT_R
GMCH_CRT_G
GMCH_CRT_B
GMCH_CRT_HSYNCGMCH_CRT_VSYNC
GMCH_CRT_CLKGMCH_CRT_DATA
PLT_RST#
CLK_NBHTCLK_NBHT#
NB_OSC_14.318M
CLK_NBGFXCLK_NBGFX#
CLK_SBLINK_BCLKCLK_SBLINK_BCLK#
GMCH_LCD_CLKGMCH_LCD_DATAGMCH_DDC_DATAGMCH_DDC_CLK
POWER_SEL
AUX_CAL
NB_PWRGD
LDT_STOP#
CPU_LDT_REQ#
ALLOW_LDTSTOP
NB_THERMAL_DC NB_THERMAL_DA SUS_STAT_R# SUS_STAT#
GMCH_ENVDD ENBKL
GMCH_TXCLK+ GMCH_TXCLK- GMCH_TZCLK+ GMCH_TZCLK-
GMCH_TZOUT2- GMCH_TZOUT2+ GMCH_TZOUT1- GMCH_TZOUT1+ GMCH_TZOUT0- GMCH_TZOUT0+
GMCH_TXOUT0+ GMCH_TXOUT0- GMCH_TXOUT1+ GMCH_TXOUT1- GMCH_TXOUT2+ GMCH_TXOUT2-
UMA_HPD
UMA_PNL_PWM BKOFF#
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3RS780 VEDIO/CLK GEN
Custom
11 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
NB temp to SB
Strap pin
Strap pin
AVDD=100mA
Strap pin
For RS780M A13
140
R540 1k for RS880M
C992.2U_0603_6.3V4Z
1
2
L7
FBM-L11-201209-300LMA30T_0805
1 2
C1062.2U_0603_6.3V4Z
1
2
L17
MBK2012221YZF 0805
1 2
R71 150_0402_1%
1 2 L14
FBM-L11-201209-300LMA30T_0805
1 2
R332
0_0402_5%
1 2
R3591.8K_0402_5%
1 2
G
DS
Q56FDV301N_NL_SOT23-3
@
2
13
R59 715_0402_1%
1 2
C692.2U_0603_6.3V4Z
1
2
G
DS
Q28FDV301N_NL_SOT23-3
@
2
13
R347 0_0402_5%@1 2
R511 4.7K_0402_5% 1 2
R846 0_0402_5% @1 2
C842.2U_0603_6.3V4Z
1
2
R330 0_0402_5%UMA@1 2
L42
MBC1608121YZF_0603
1 2
L12
FBM-L11-201209-300LMA30T_0805
1 2
PART 3 OF 6
PMC
LOC
Ks
PLL
PWR
MIS.
CR
T/TV
OU
TLV
TM
U25C
RS780M_FCBGA528
VDDA18HTPLLH17
SYSRESETbD8POWERGOODA10LDTSTOPbC10ALLOW_LDTSTOPC12
REFCLK_P/OSCIN(OSCIN)E11
PLLVDD(NC)A12
HPD(NC) D10DDC_CLK0/AUX0P(NC)A8DDC_DATA0/AUX0N(NC)B8
THERMALDIODE_P AE8THERMALDIODE_N AD8
I2C_CLKB9
STRP_DATAB10
GFX_REFCLKPT2GFX_REFCLKNT1
GPP_REFCLKPU1GPP_REFCLKNU2
PLLVDD18(NC)D14PLLVSS(NC)B12
TXOUT_L0P(NC) A22TXOUT_L0N(NC) B22TXOUT_L1P(NC) A21TXOUT_L1N(NC) B21TXOUT_L2P(NC) B20
TXOUT_L2N(DBG_GPIO0) A20TXOUT_L3P(NC) A19
TXOUT_U0P(NC) B18
TXOUT_L3N(DBG_GPIO2) B19
TXOUT_U0N(NC) A18TXOUT_U1P(PCIE_RESET_GPIO3) A17TXOUT_U1N(PCIE_RESET_GPIO2) B17
TXOUT_U2P(NC) D20TXOUT_U2N(NC) D21
TXOUT_U3P(PCIE_RESET_GPIO5) D18TXOUT_U3N(NC) D19
TXCLK_LP(DBG_GPIO1) B16TXCLK_LN(DBG_GPIO3) A16
TXCLK_UP(PCIE_RESET_GPIO4) D16TXCLK_UN(PCIE_RESET_GPIO1) D17
VDDLTP18(NC) A13VSSLTP18(NC) B13
C_Pr(DFT_GPIO5)E17Y(DFT_GPIO2)F17COMP_Pb(DFT_GPIO4)F15
RED(DFT_GPIO0)G18
TMDS_HPD(NC) D9I2C_DATAA9
TESTMODE D13
HT_REFCLKNC24HT_REFCLKPC25
SUS_STAT#(PWM_GPIO5) D12
GREEN(DFT_GPIO1)E18
BLUE(DFT_GPIO3)E19
DAC_VSYNC(PWM_GPIO6)B11DAC_HSYNC(PWM_GPIO4)A11
DAC_RSET(PWM_GPIO1)G14
AVDD1(NC)F12AVDD2(NC)E12
REDb(NC)G17
GREENb(NC)F18
AVDDDI(NC)F14AVSSDI(NC)G15AVDDQ(NC)H15AVSSQ(NC)H14
VDDLT18_2(NC) B15VDDLT33_1(NC) A14VDDLT33_2(NC) B14
VSSLT1(VSS) C14VSSLT2(VSS) D15
VDDLT18_1(NC) A15
VSSLT3(VSS) C16VSSLT4(VSS) C18VSSLT5(VSS) C20
LVDS_DIGON(PCE_TCALRP) E9LVDS_BLON(PCE_RCALRP) F7
LVDS_ENA_BL(PWM_GPIO2) G12
VSSLT6(VSS) E20
VDDA18PCIEPLL1D7VDDA18PCIEPLL2E7
BLUEb(NC)F19
AUX_CAL(NC)C8
GPPSB_REFCLKP(SB_REFCLKP)V4GPPSB_REFCLKN(SB_REFCLKN)V3
DDC_DATA1/AUX1N(NC)A7DDC_CLK1/AUX1P(NC)B7
DAC_SCL(PCE_RCALRN)F8DAC_SDA(PCE_TCALRN)E8
REFCLK_N(PWM_GPIO3)F11
VSSLT7(VSS) C22
RSVDG11
R350 0_0402_5%@1 2
R570
0_0402_5%
1 2
L41
MBK2012221YZF 0805
1 2
R404.7K_0402_5%
1 2
C4332.2U_0603_6.3V4Z
1
2
R414
0_0402_5%
1 2
C7522U_0805_6.3V6M
1
2
R344.7K_0402_5%
1 2
R333300_0402_5%
12
R3281.27K_0402_1%
UMA@ 12
R64 133_0402_1%
1 2
R329 4.7K_0402_5% 1 2
L10
MBK2012221YZF 0805
1 2
R512 4.7K_0402_5% 1 2
R26 10K_0402_5%@1 2
C6522U_0805_6.3V6M
1
2
C4434.7U_0805_10V4Z
1
2R
530
2.2K
_040
2_5%
@
12
C4420.1U_0402_16V4Z
1
2
R338300_0402_5%
@12
R318 4.7K_0402_5%@1 2
G
DS
Q29FDV301N_NL_SOT23-3
@
2
13
R319
0_0402_5%
1 2
R63 150_0402_1%
1 2
L46
MBC1608121YZF_0603
1 2
R847 0_0402_5% 1 2
R3131.27K_0402_1%
UMA@12
R325 4.7K_0402_5% 1 2
R5344.7K_0402_5%@
12
C1182.2U_0603_6.3V4Z
1
2
C4392.2U_0603_6.3V4Z
1
2
R3244.7K_0402_5%@
12
R317 0_0402_5%UMA@1 2
R540300_0402_5%
12
R571
0_0402_5%
1 2
L6
MBK2012221YZF 0805
1 2
R323 4.7K_0402_5%@ 1 2
R316 0_0402_5%
1 2
R41 10K_0402_5%
12
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+VDDA11PCIE
+VDDHTTX
+VDDHTRX
+VDDHT
+VDDA18PCIE
+1.1VS
+1.8VS
+1.1VS
+1.8VS
+1.2V_HT
+1.1VS
+3VS+1.8VS
+1.1VS+1.8VS
+NB_CORE
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3RS780 PWR/GND
Custom
12 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
2A
2A
2A
2A
VDDA_12=2.5A
VDD_CORE=5A
0.68A
0.68A
0.6A
1.1A
7.6A
0.64A
shape add
C11
20.
1U_0
402_
16V4
Z
1
2
C131
0.1U_0402_16V4Z
1
2
C10
40.
1U_0
402_
16V4
Z
1
2C8822U_0805_6.3V6M
1
2
C82 0.1U_0402_16V4Z
1 2
C136
0.1U_0402_16V4Z
1
2
L5 0_0805_5%
1 2C116
0.1U_0402_16V4Z
1
2
C139
0.1U_0402_16V4Z
1
2
C114
0.1U_0402_16V4Z
1
2
C73 0.1U_0402_16V4Z
1 2
C10
30.
1U_0
402_
16V4
Z
1
2
L9
FBMA-L11-201209-221LMA30T_0805
12
C34 22U_0805_6.3V6M
+
C32
330U_D
2E_2.5VM
1
2C87
0.1U_0402_16V4Z
1
2
C10
10.
1U_0
402_
16V4
Z
1
2
L21
FBMA-L11-201209-221LMA30T_0805
12
C81 1U_0402_6.3V4Z
1 2
C150
22U_0805_6.3V6M
1
2
C93
0.1U_0402_16V4Z
1
2
C92
22U_0805_6.3V6M
1
2
C97
0.1U
_040
2_16
V4Z
1
2C7222U_0805_6.3V6M
1
2
+
C33
330U_D
2E_2.5VM
1
2
C134
0.1U_0402_16V4Z
1
2
+
C29
330U_D
2E_2.5VM
1
2
C94
0.1U
_040
2_16
V4Z
1
2
C127
0.1U_0402_16V4Z
1
2
C121
0.1U_0402_16V4Z
1
2
C38
22U
_080
5_6.
3V6M
1
2
C86 1U_0402_6.3V4Z
1 2
C74 1U_0402_6.3V4Z
1 2
PART 6/6
GR
OU
ND
U25F
RS780M_FCBGA528
VSSAHT1A25VSSAHT2D23VSSAHT3E22VSSAHT4G22VSSAHT5G24VSSAHT6G25VSSAHT7H19VSSAHT8J22VSSAHT9L17VSSAHT10L22VSSAHT11L24VSSAHT12L25VSSAHT13M20VSSAHT14N22VSSAHT15P20VSSAHT16R19VSSAHT17R22VSSAHT18R24VSSAHT19R25
VSSAHT21U22VSSAHT22V19VSSAHT23W22VSSAHT24W24VSSAHT25W25VSSAHT26Y21VSSAHT27AD25
VSS2 D11VSS3 G8VSS4 E14VSS5 E15
VSS7 J12VSS8 K14VSS9 M11
VSS10 L15
VSS11L12VSS12M14VSS13N13VSS14P12VSS15P15VSS16R11VSS17R14VSS18T12VSS19U14VSS20U11VSS21U15VSS22V12VSS23W11VSS24W15VSS25AC12VSS26AA14VSS27Y18VSS28AB11VSS29AB15VSS30AB17VSS31AB19VSS32AE20
VSSAPCIE1 A2VSSAPCIE2 B1VSSAPCIE3 D3VSSAPCIE4 D5VSSAPCIE5 E4VSSAPCIE6 G1VSSAPCIE7 G2VSSAPCIE8 G4VSSAPCIE9 H7
VSSAPCIE10 J4VSSAPCIE11 R7VSSAPCIE12 L1VSSAPCIE13 L2VSSAPCIE14 L4VSSAPCIE15 L7
VSS34K11
VSSAPCIE16 M6VSSAPCIE17 N4VSSAPCIE18 P6VSSAPCIE19 R1VSSAPCIE20 R2VSSAPCIE21 R4VSSAPCIE22 V7VSSAPCIE23 U4VSSAPCIE24 V8VSSAPCIE25 V6VSSAPCIE26 W1VSSAPCIE27 W2VSSAPCIE28 W4VSSAPCIE29 W7VSSAPCIE30 W8VSSAPCIE31 Y6VSSAPCIE32 AA4VSSAPCIE33 AB5VSSAPCIE34 AB1VSSAPCIE35 AB7VSSAPCIE36 AC3VSSAPCIE37 AC4VSSAPCIE38 AE1VSSAPCIE39 AE4VSSAPCIE40 AB2
VSS1 AE14
VSSAHT20H20
VSS33AB21
VSS6 J15C91
0.1U_0402_16V4Z
1
2
C4321U_0402_6.3V4Z
1
2
C89
0.1U_0402_16V4Z
1
2
C35 22U_0805_6.3V6M
C85 1U_0402_6.3V4Z
1 2
L3 0_0805_5%
1 2
C109
22U_0805_6.3V6M
1
2
C135
0.1U_0402_16V4Z
1
2
C10
20.
1U_0
402_
16V4
Z
1
2
C36
22U
_080
5_6.
3V6M
1
2
L16
FBMA-L11-201209-221LMA30T_0805
12
L4 0_0805_5%
1 2
C147
0.1U_0402_16V4Z
1
2
SBD_MEM/DVO_I/F
PAR 4 OF 6U25D
RS780M_FCBGA528
MEM_A0(NC)AB12MEM_A1(NC)AE16MEM_A2(NC)V11MEM_A3(NC)AE15MEM_A4(NC)AA12MEM_A5(NC)AB16MEM_A6(NC)AB14MEM_A7(NC)AD14MEM_A8(NC)AD13MEM_A9(NC)AD15MEM_A10(NC)AC16MEM_A11(NC)AE13MEM_A12(NC)AC14MEM_A13(NC)Y14
MEM_BA0(NC)AD16MEM_BA1(NC)AE17MEM_BA2(NC)AD17
MEM_RASb(NC)W12MEM_CASb(NC)Y12MEM_WEb(NC)AD18MEM_CSb(NC)AB13MEM_CKE(NC)AB18MEM_ODT(NC)V14
MEM_CKP(NC)V15MEM_CKN(NC)W14
MEM_DM0(NC) W17MEM_DM1/DVO_D8(NC) AE19
MEM_DQS0P/DVO_IDCKP(NC) Y17MEM_DQS0N/DVO_IDCKN(NC) W18
MEM_DQS1P(NC) AD20MEM_DQS1N(NC) AE21
MEM_DQ0/DVO_VSYNC(NC) AA18MEM_DQ1/DVO_HSYNC(NC) AA20
MEM_DQ2/DVO_DE(NC) AA19MEM_DQ3/DVO_D0(NC) Y19
MEM_DQ4(NC) V17MEM_DQ5/DVO_D1(NC) AA17MEM_DQ6/DVO_D2(NC) AA15MEM_DQ7/DVO_D4(NC) Y15MEM_DQ8/DVO_D3(NC) AC20MEM_DQ9/DVO_D5(NC) AD19
MEM_DQ10/DVO_D6(NC) AE22MEM_DQ11/DVO_D7(NC) AC18
MEM_DQ12(NC) AB20MEM_DQ13/DVO_D9(NC) AD22
MEM_DQ14/DVO_D10(NC) AC22MEM_DQ15/DVO_D11(NC) AD21
MEM_COMPP(NC)AE12MEM_COMPN(NC)AD12 MEM_VREF(NC) AE18
IOPLLVDD18(NC) AE23
IOPLLVSS(NC) AD23
IOPLLVDD(NC) AE24
C10
70.
1U_0
402_
16V4
Z
1
2
C950.1U_0402_16V4Z
1
2
C960.1U_0402_16V4Z
1
2
C123
0.1U_0402_16V4Z
1
2
PART 5/6
POW
ER
U25E
RS780M_FCBGA528
VDDHT_1J17VDDHT_2K16VDDHT_3L16VDDHT_4M16VDDHT_5P16VDDHT_6R16VDDHT_7T16
VDDHTTX_1AE25VDDHTTX_2AD24VDDHTTX_3AC23VDDHTTX_4AB22VDDHTTX_5AA21VDDHTTX_6Y20VDDHTTX_7W19VDDHTTX_8V18
VDDHTRX_1H18VDDHTRX_2G19VDDHTRX_3F20VDDHTRX_4E21VDDHTRX_5D22
VDD18_1F9VDD18_2G9VDD18_MEM1(NC)AE11VDD18_MEM2(NC)AD11
VDDA18PCIE_1J10VDDA18PCIE_2P10VDDA18PCIE_3K10
VDDA18PCIE_10Y9VDDA18PCIE_11AA9VDDA18PCIE_12AB9VDDA18PCIE_13AD9VDDA18PCIE_14AE9
VDDA18PCIE_6W9VDDA18PCIE_7H9
VDDPCIE_1 A6VDDPCIE_2 B6VDDPCIE_3 C6VDDPCIE_4 D6VDDPCIE_5 E6VDDPCIE_6 F6VDDPCIE_7 G7VDDPCIE_8 H8VDDPCIE_9 J9
VDDA18PCIE_4M10VDDA18PCIE_5L10
VDDC_1 K12VDDC_2 J14VDDC_3 U16
VDDPCIE_11 M9
VDDC_4 J11VDDC_5 K15
VDDPCIE_10 K9
VDDC_6 M12VDDC_7 L14VDDC_8 L11VDDC_9 M13
VDDC_10 M15VDDC_11 N12VDDC_12 N14VDDC_13 P11VDDC_14 P13VDDC_15 P14VDDC_16 R12VDDC_17 R15VDDC_18 T11VDDC_19 T15VDDC_20 U12VDDC_21 T14
VDD33_1(NC) H11VDD33_2(NC) H12
VDD_MEM1(NC) AE10VDD_MEM2(NC) AA11VDD_MEM3(NC) Y11VDD_MEM4(NC) AD10
VDD_MEM6(NC) AC10VDD_MEM5(NC) AB10
VDDA18PCIE_8T10
VDDC_22 J16
VDDPCIE_12 L9
VDDA18PCIE_9R10
VDDPCIE_13 P9VDDPCIE_14 R9VDDPCIE_15 T9VDDPCIE_16 V9VDDPCIE_17 U9
VDDA18PCIE_15U10
VDDHTRX_6B23VDDHTRX_7A23
VDDHTTX_9U17VDDHTTX_10T17VDDHTTX_11R17VDDHTTX_12P17VDDHTTX_13M17
C11
00.
1U_0
402_
16V4
Z
1
2
C117
0.1U_0402_16V4Z
1
2
L25
FBMA-L11-201209-221LMA30T_0805
12
C4311U_0402_6.3V4Z@
1
2
C130
22U_0805_6.3V6M
1
2
-
A
A
B
B
C
C
D
D
E
E
1 1
2 2
3 3
4 4
+3VS
+3VS
GMCH_CRT_VSYNC
AUX_CAL
PLT_RST# SUS_STAT_R#
GMCH_CRT_HSYNC
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3RS780 STRAPS
Custom
13 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
Enables the Test Debug Bus using GPIO. (VSYNC)1 : Disable (RS780) 0 : Enable (Rs780)
DFT_GPIO5:STRAP_DEBUG_BUS_GPIO_ENABLEb
Selects Loading of STRAPS from EPROM1 : Bypass the loading of EEPROM straps and use Hardware Default Values0 : I2C Master can load strap values from EEPROM if connected, or usedefault values if not connectedRS740/RX780: DFT_GPIO1 RS780:SUS_STAT
DFT_GPIO1: LOAD_EEPROM_STRAPS
RS780 DFT_GPIO1
RS780 use HSYNC to enable SIDE PORT RS740/RS780: Enables Side port memory ( RS780 use HSYNC#)0. Enable (RS780) 1 : Disable(RS780)
RS780 use HSYNC to enable SIDE PORT
D17CH751H-40_SC76@2 1
R45 3K_0402_5%@12
R320 150_0402_1%@1 2
R340 3K_0402_5%
12
R339 3K_0402_5%@ 12
R46 3K_0402_5%
12
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
VGA_CRT_HSYNCVGA_CRT_VSYNC
VGA_TXOUT1+
VGA_TXCLK-VGA_TXCLK+
CLK_PCIE_VGACLK_PCIE_VGA#
VGA_PRSNT_L
VGA_CRT_BVGA_CRT_GVGA_CRT_R
VGA_HPD
VGA_TZCLK-VGA_TZCLK+
VGA_TZOUT2-
VGA_TZOUT0+
VGA_TZOUT1+
VGA_TZOUT0-
VGA_TZOUT1-
VGA_TZOUT2+
VGA_TXOUT1-
VGA_TXOUT0+
VGA_TXOUT2-
VGA_TXOUT0-
VGA_TXOUT2+
HDMI_TX0-_VGAHDMI_TX0+_VGA
HDMI_TX2-_VGAHDMI_TX2+_VGA
HDMI_CLK-_VGAHDMI_CLK+_VGA
VGA_HDMI_SCLKVGA_HDMI_SDATA
HDMI_TX1-_VGAHDMI_TX1+_VGA
VGA_RST#
VGA_DDC_CLKVGA_DDC_DATA
TH_OVERT#
VGA_DISABLE#
VGA_PWRGDVGA_HDMI_CEC
VGA_WAKE#
I2CC_SCLI2CC_SDA
TH_OVERT#
D_EC_SMB_CK1D_EC_SMB_DA1
ENVDD
AC_BATT#
VGA_PWRGDVGA_WAKE#
VGA_ON
VGA_PRSNT_R
VGA_DISABLE#
AC_BATT#
VGA_HDMI_CEC
D_EC_SMB_CK1
D_EC_SMB_DA1
PCIE_GTX_C_MRX_P2PCIE_GTX_C_MRX_N2
PCIE_GTX_C_MRX_N1
PCIE_GTX_C_MRX_N15PCIE_GTX_C_MRX_P15
PCIE_GTX_C_MRX_N14PCIE_GTX_C_MRX_P14
PCIE_GTX_C_MRX_N13PCIE_GTX_C_MRX_P13
PCIE_GTX_C_MRX_P0PCIE_GTX_C_MRX_N0
PCIE_GTX_C_MRX_P1
PCIE_GTX_C_MRX_P5
PCIE_GTX_C_MRX_N4
PCIE_GTX_C_MRX_P3PCIE_GTX_C_MRX_N3
PCIE_GTX_C_MRX_N5
PCIE_GTX_C_MRX_N12PCIE_GTX_C_MRX_P12
PCIE_GTX_C_MRX_P11PCIE_GTX_C_MRX_N11
PCIE_GTX_C_MRX_P10PCIE_GTX_C_MRX_N10
PCIE_GTX_C_MRX_P4
PCIE_GTX_C_MRX_N7PCIE_GTX_C_MRX_P7
PCIE_GTX_C_MRX_P6PCIE_GTX_C_MRX_N6
PCIE_GTX_C_MRX_N9PCIE_GTX_C_MRX_P9
PCIE_GTX_C_MRX_P8PCIE_GTX_C_MRX_N8
PCIE_MTX_C_GRX_P2PCIE_MTX_C_GRX_N2
PCIE_MTX_C_GRX_N1PCIE_MTX_C_GRX_P1
PCIE_MTX_C_GRX_P0
PCIE_MTX_C_GRX_N15PCIE_MTX_C_GRX_P15
PCIE_MTX_C_GRX_N14PCIE_MTX_C_GRX_P14
PCIE_MTX_C_GRX_N13PCIE_MTX_C_GRX_P13
PCIE_MTX_C_GRX_N0
PCIE_MTX_C_GRX_N4
PCIE_MTX_C_GRX_P3PCIE_MTX_C_GRX_N3
PCIE_MTX_C_GRX_N5PCIE_MTX_C_GRX_P5
PCIE_MTX_C_GRX_P4
PCIE_MTX_C_GRX_N12PCIE_MTX_C_GRX_P12
PCIE_MTX_C_GRX_P11PCIE_MTX_C_GRX_N11
PCIE_MTX_C_GRX_P10PCIE_MTX_C_GRX_N10
PCIE_MTX_C_GRX_P6PCIE_MTX_C_GRX_N6
PCIE_MTX_C_GRX_P7PCIE_MTX_C_GRX_N7
PCIE_MTX_C_GRX_N9PCIE_MTX_C_GRX_P9
PCIE_MTX_C_GRX_P8PCIE_MTX_C_GRX_N8
+3VS +5VS+3VS
+MXM_B+
B+
+3VS
+3VS
+5VS
+MXM_B++MXM_B+
+3VS
+3VS
+3VS
+3VS
+3VS
+5VS
EC_SMB_DA1
EC_SMB_CK1
PCIE_MTX_C_GRX_N[0..15]
PCIE_MTX_C_GRX_P[0..15]
PCIE_GTX_C_MRX_N[0..15]
PCIE_GTX_C_MRX_P[0..15]
EC_ACIN
I2CC_SCLI2CC_SDA
CLK_PCIE_VGACLK_PCIE_VGA#
VGA_TZCLK-VGA_TZCLK+
VGA_PRSNT_R
VGA_PWRGD VGA_ON
TH_OVERT#
ENVDDENBKL
I2CC_SDAI2CC_SCL
VGA_TZOUT2-VGA_TZOUT2+
VGA_TZOUT1-VGA_TZOUT1+
VGA_TZOUT0+VGA_TZOUT0-
VGA_HDMI_SDATAVGA_HDMI_SCLK
VGA_PRSNT_L
VGA_RST# VGA_DDC_DATA VGA_DDC_CLK VGA_CRT_VSYNC VGA_CRT_HSYNC
VGA_CRT_R VGA_CRT_G VGA_CRT_B
VGA_TXCLK- VGA_TXCLK+
VGA_TXOUT2- VGA_TXOUT2+
VGA_TXOUT1- VGA_TXOUT1+
VGA_TXOUT0- VGA_TXOUT0+
VGA_HPD
HDMI_TX0+_VGAHDMI_TX0-_VGA
HDMI_TX1+_VGAHDMI_TX1-_VGA
HDMI_TX2+_VGAHDMI_TX2-_VGA
HDMI_CLK-_VGAHDMI_CLK+_VGA
VGA_PNL_PWM
Title
Size Document Number Rev
Date: Sheet o f
Security Classification Compal Secret Data
THIS SHEET OF ENGINEERING DRAWING IS THE PROPRIETARY PROPERTY OF COMPAL ELECTRONICS, INC. AND CONTAINS CONFIDENTIALAND TRADE SECRET INFORMATION. THIS SHEET MAY NOT BE TRANSFERED FROM THE CUSTODY OF THE COMPETENT DIVISION OF R&DDEPARTMENT EXCEPT AS AUTHORIZED BY COMPAL ELECTRONICS, INC. NEITHER THIS SHEET NOR THE INFORMATION IT CONTAINSMAY BE USED BY OR DISCLOSED TO ANY THIRD PARTY WITHOUT PRIOR WRITTEN CONSENT OF COMPAL ELECTRONICS, INC.
Issued Date Deciphered Date
KBYF0 LA-5051P 0.3MXM Connector
B
14 46Tuesday, February 03, 2009
2008/11/03 2009/11/03Compal Electronics, Inc.
Increase the rise timePs. Module have 4.7K Pull-UP
160mil(4A)160mil(4A)
40mil(1A)(Pull-UP 10K at PCH)
(Reserved)(Reserved)
(Reserved)
SYSTEM
100mil(2.5A, 5VIA)
LVDS DDC Module have 4.7KPull-UP
VGA_PWRGD/TH_OVERT# Connect to EC
R2451K_0402_5%
VGA@12
R97 10K_0402_5%@1 2
R2910_0402_5% VGA@
1 2
R114 10K_0402_5%VGA@1 2
L75
FBMA-L11-201209-221LMA30T_0805
VGA@1 2
R22 4.3K_0402_5% VGA@1 2
D27CH751H-40PT_SOD323-2
VGA@
2 1
C912
0.1U_0402_16V4Z@
1
2
R336
4.7K_0402_5%@
12
R23 4.3K_0402_5%VGA@1 2
JMXM2B
JAE_MM70-314-310B1-1
GND167 GND 166
GND173 GND 172
GND179 GND 178
GND185 GND 184
VGA_DDC_DAT 190
PEX_RX2#169
PEX_RX1#175
PEX_RX0#181
PEX_TX2# 168
PEX_TX1# 174
PEX_TX0# 180PEX_RX0183
PEX_RX1177
PEX_RX2171
PEX_TX0 182
PEX_TX1 176
PEX_TX2 170
PEX_REFCLK#187 PEX_CLK_REQ# 186PEX_REFCLK189 PEX_RST# 188GND191RSVD193 VGA_DDC_CLK 192
VGA_VSYNC 194VGA_HSYNC 196
VGA_RED 200VGA_GREEN 202
GND 206
GND 212
GND 218
GND 224LVDS_LTX1# 226
LVDS_LTX2# 220
LVDS_LTX3# 214
LVDS_LCLK# 208
GND 230
GND 236
GND 242
GND 248
LVDS_LTX0# 232
DP_D_L0# 238
DP_D_L1# 244
DP_D_L2# 250DP_D_L2 252
DP_D_L1 246
DP_D_L0 240
LVDS_LTX0 234
LVDS_LTX1 228
LVDS_LTX2 222
LVDS_LTX3 216
LVDS_LCLK 210
VGA_BLUE 204
GND 198
RSVD195
RSVD201
GND207
GND213
GND219
GND225
GND231
GND237
GND243
GND249
LVDS_UCLK#203
LVDS_UTX3#209
LVDS_UTX2#215
LVDS_UTX1#221
RSVD197RSVD199
LVDS_UTX1223
LVDS_UTX2217
LVDS_UTX3211
LVDS_UCLK205
LVDS_UTX0#227
DP_C_L0#233
DP_C_L1#239
DP_C_L2#245
LVDS_UTX0229
DP_C_L0235
DP_C_L1241
DP_C_L2247
DP_C_L3#251DP_C_L3253GND255DP_C_AUX#257
GND 254DP_D_L3# 256
DP_C_AUX259 DP_D_L3 258RSVD261 GND 260RSVD263 DP_D_AUX# 262RSVD265 DP_D_AUX 264RSVD267 DP_C_HPD 266RSVD269 DP_D_HPD 268RSVD271 RSVD 270RSVD273 RSVD 272RSVD275 RSVD 274RSVD277 GND 276RSVD279 DP_B_L0# 278RSVD281 DP_B_L0 280RSVD283
DP_A_L0289
DP_A_L1295
DP_A_L2301
DP_A_L3307GND309DP_A_AUX#311DP_A_AUX313PRSNT_L#314
GND285
GND291
GND297
GND303
GND 282
GND 288
GND 294
GND 300
DP_B_HPD 306DP_A_HPD 308
3V3 3103V3 312
DP_B_L1# 284
DP_B_L2# 290
DP_B_L3# 296
DP_B_AUX# 302
DP_A_L0#287
DP_A_L1#293
DP_A_L3#305
DP_A_L2#299
DP_B_AUX 304
DP_B_L3 298
DP_B_L2 292
DP_B_L1 286
GND315 GND 316
R2920_0402_5%@
12
R128 10K_0402_5%@1 2
L74FBMA-L11-201209-221LMA30T_0805
VGA@1 2 C183
0.1U_0402_16V4ZVGA@
1
2
R322
4.7K_0402_5%@
12
R142 10K_0402_5%@1 2
G
D S
Q702N7002_SOT23VGA@
2
1 3
C399
10U_0805_6.3V6MVGA@
1
2C911
68P_0402_50V8JVGA@
1
2
G
D S
Q692N7002_SOT23VGA@
2
1 3
E1 E2
E3 E4
JMXM2A
JAE_MM70-314-310B1-1
PRSNT_R# 42WAKE# 44
PWR_GOOD 46PWR_EN 48
RSVD 50RSVD 52RSVD 54RSVD 56
PWR_LEVEL 58TH_OVERT# 60TH_ALERT# 62
TH_PWM 64GPIO0 66GPIO1 68GPIO2 70
SMB_DAT 72SMB_CLK 74
GND 76OEM 78OEM 80OEM 82OEM 84GND 86
PEX_TX15# 88PEX_TX15 90
GND 92PEX_TX14# 94PEX_TX14 96
GND 98PEX_TX13# 100PEX_TX13 102
GND 104PEX_TX12# 106PEX_TX12 108
GND 110PEX_TX11# 112PEX_TX11 114
GND 116PEX_TX10# 118PEX_TX10 120
GND 122PEX_TX9# 124PEX_TX9 126
GND 128PEX_TX8# 130PEX_TX8 132
GND 134PEX_TX7# 136PEX_TX7 138
GND 140PEX_TX6# 142PEX_TX6 144
GND 146PEX_TX5# 148PEX_TX5 150
GND 152PEX_TX4# 154PEX_TX4 156
GND 158PEX_TX3# 160PEX_TX3 162
GND 164
PWR_SRC1
5V415V435V455V475V49GND51GND53GND55GND57PEX_STD_SW#59VGA_DISABLE#61PNL_PWR_EN63PNL_BL_EN65PNL_BL_PWM67HDMI_CEC69DVI_HPD71LVDS_DDC_DAT73LVDS_DDC_CLK75GND77OEM79OEM81OEM83OEM85GND87PEX_RX15#89PEX_RX1591GND93PEX_RX14#95PEX_RX1497GND99PEX_RX13#101PEX_RX13103GND105PEX_RX12#107PEX_RX12109GND111PEX_RX11#113PEX_RX11115GND117PEX_RX10#119PEX_RX10121GND123PEX_RX9#125PEX_RX9127GND129PEX_RX8#131PEX_RX8133GND135PEX_RX7#137PEX_RX7139GND141PEX_RX6#143PEX_RX6145GND147PEX_RX5#149PEX_RX5151GND153PEX_RX4#155PEX_RX4157GND159PEX_RX3#161PEX_RX3163GND165
PWR_SRC3PWR_SRC5PWR_SRC7PWR_SRC9PWR_SRC11PWR_SRC13PWR_SRC15
PWR_SRC19PWR_SRC17
GND37
GND23
GND29GND27
GND33
GND25
GND31
GND21
GND39
GND35
PWR_SRC 10
PWR_SRC 2
PWR_SRC 18PWR_SRC 20
PWR_SRC 14PWR_SRC 16
PWR_SRC 6
PWR_SRC 12
PWR_SRC 8
PWR_SRC 4
GND 24
GND 30
GND 26
GND 40
GND 36GND 34
GND 38
GND 28
GND 22
GND 32
R3050_0402_5%
@1 2
C910
680P_0603_50V7KVGA@
1
2
C418
4.7U_0805_10V4ZVGA@
1
2
C909
0.1U_0603_25V7K
VGA@
1
2
R96 10K_0402_5%VGA@1 2
-
5
5
4
4
3
3
2
2
1
1
D D
C C
B B
A A
ICH_SMBCLK0ICH_SMBDATA0