coa 2nd m-first class

34
 Todays topics Single BUS organization of processor Instruction execution –General idea… Register transfer… AL operations… Fetching a word from memory (to processor) Storing a word in memory (from processor) 1/16/11 11 BINOSHI SAMUVEL. lect. AJCE/S5ECE -09-10

Upload: binoshi-samuvel

Post on 09-Apr-2018

220 views

Category:

Documents


0 download

TRANSCRIPT

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 1/34

 Todays topics

Single BUS organization of processor

Instruction execution –General idea…

Register transfer…

AL operations…

Fetching a word from memory (to processor)

Storing a word in memory (from processor)

1/16/11 11BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 2/34

A

INSTRUCTION 1

INSTRUCTION 2

A

A+4

MAR MDR

PC

IRREG ALU

CONTRO

L UNITREADWRITE

Memory unit

processor 1/16/11 22BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 3/34

CONTAINS MEM0RY 

 ADDRESS OF THE NEXT INSTUCTION TO BE

EXECUTED

CONTAINS ADDRESSOF THE LOCATION TO

BE ACCESSED

CONTAINS DATA TO BEWRITTEN INTO OR

READ OUT OF THEMEMORY LOCATION

 ARE general purposereg.

Programmer canconsider..

Transperent to the programmer..

Use to hold valuewhile doing some

 process

Has 2 pins ..select  4and select 

1/16/11 33BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 4/34

A

INSTR 2

A

A+4

MAR MDR

PC

IRREG ALU

CONTRO

L UNITREADWRITE

A

A

INSTR 1

INSTR 1

1/16/11 44BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 5/34

A

INSTR 2

A

A+4

MAR MDR

PC

IRREG ALU

CONTRO

L UNITREADWRITE

A

A

INSTR 1

INSTR 1

1/16/11 55BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 6/34

A

INSTR 2

A

A+4

MAR MDR

PC

IRREG ALU

CONTRO

L UNITREADWRITE

A

INSTR 1

INSTR 1

A+4

result

1/16/11 66BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 7/34

AINSTR 2

A

A+4

MAR MDR

PC

IRREG ALU

CONTRO

L UNITREADWRITE

A

INSTR 1

INSTR 1

A+4

result

1/16/11 77BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 8/34

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 9/34

REGISTER TRANSFERS

two control signals are used to place thecontents of that register on the bus or to loadthe data on the bus into the register.

Ri and Ro

All operations and data transfers within theprocessor take place within time periods

defined by the processor clock.

1/16/11 99BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 10/34

65

0

o

o

0

Reg.1

Reg.2

R1 out

R2 in

R2 out

R1 in

Move reg1,reg2

1/16/11 1010BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 11/34

0

1

o

1

Reg.1

Reg.2

R1 out

R2 in

R2 out

R1 in

R 1 out , R2 in

65

1/16/11 1111BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 12/34

1

0

1

0

Reg.1

Reg.2

R1 out

R2 in

R2 out

R1 in

65

1/16/11 1212BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 13/34

Instruction executioncycles..REGISTER TRANSFER ----------- DONE

Perform an arithmetic or a logic operation and

store the result in a processor register

1/16/11 1313BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 14/34

PERFORMING ANARITHMETIC OR LOGICOPERATIONControl signals for adding 2 numbers..

Aim add [R1]+[R2]----->R3

Step1…. R1 out , Yin

Step2… R2 out ,select Y ,Add ,Zin

Step3… Z out ,R3 in

1/16/11 1414BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 15/34

8

0

0

Reg.1

R1 out

R2 in

R2 out

R1 in

Reg.2

20

0

0O

0Reg.3

R3 in

R3 out

0

00

 Y

MUX

Z

Zout

Z in

 Y in

1/16/11 1515BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 16/34

8

0

1

Reg.1

R1 out

R2 in

R2 out

R1 in

Reg.2

20

0

0O

0Reg.3

R3 in

R3 out

1

00

 Y

MUX

Z

Zout

Z in

 Y in

R1 out , Yin

1/16/11 1616BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 17/34

0

1

Reg.1

R1 out

R2 in

R2 out

R1 in

Reg.2

20

0

0O

0Reg.3

R3 in

R3 out

1

00

 Y

MUX

Z

Zout

Z in

 Y in

8

1/16/11 1717BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 18/34

next

Step1…. R1 out , Yin

Step2… R2 out ,select Y,Add ,Zin

Step3… Z out ,R3 in

1/16/11 1818BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 19/34

0

0

Reg.1

R1 out

R2 in

R2 out

R1 in

Reg.21

0

0O

0Reg.3

R3 in

R3 out

0

0

MUX

Z

Zout

Z in

 Y in

R2 out ,select Y,Add ,Zin

 

2

8

1/16/11 1919BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 20/34

0

0

Reg.1

R1 out

R2 in

R2 out

R1 in

Reg.2

0

0

0O

0Reg.3

R3 in

R3 out

0

01

MUX

Z

Zout

Z in

 Y in

    0

   1

R2 out ,select Y,Add ,Zin

1/16/11 2020BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 21/34

next

Step1…. R1 out , Yin

Step2… R2 out ,select Y ,Add ,Zin

Step3…Z out ,R3 in

1/16/11 2121BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 22/34

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 23/34

Instruction execution

cycles..REGISTER TRANSFER ----------- DONE

AL OPERATION__________DONE

Fetching a word from memory

1/16/11 2323BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 24/34

FETCHING A WORD FROMMEMORY 

 As an exa of a read operation, consider …Move (RI ),R2

The actions needed to execute this instruction are:

1. MAR [RI]2. Start a Read operation on the memory bus

3. Wait for the MFC response from the memory

4. Load MDR from the memory bus

5. R2 [MDR]

1/16/11 2424BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 25/34

MDR

0

0

0

0

MDR OUT E

MDR in E

MDR OUT

MDR in

External busInternal

01 REG.

R1 inR1ou

R1 out, MAR in , Read

11 MAR.

1/16/11 2525BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 26/34

MDR

0

0

0

0

MDR OUT E

MDR in E

MDR OUT

MDR in

External busInternal

01

R1 inR1ou

R1 out, MAR in , Read

11 MAR.

READ

AA

1/16/11 2626BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 27/34

MDR

0

1

0

0

MDR OUT E

MDR in E

MDR OUT

MDR in

External busInternal

0o A

R1 inR1ou

MDRin E, WMFC

o1 A.

READ

WMFC

content

1/16/11 2727BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 28/34

MDR

1

0

0

0

MDR OUT E

MDR in E

MDR OUT

MDR in

External busInternal

0o A

R1 inR1ou

MDR out, R2 in

o1 A.

Reg 2

1content

Pr0cesscompleted

1/16/11 2828BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

Ti i di

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 29/34

Timing diagram

1/16/11 2929BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 30/34

Instruction execution

cycles..REGISTER TRANSFER ----------- DONE

AL OPERATION__________DONE

Fetching a word from memory----done

Storing a word in memory

1/16/11 3030BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 31/34

Storing a word inmemoryMove R2,(R1)

C signals…….

1..R1 out, MAR in

2..R2 out, MDR in, WRITE

3…MDR out E, WMFC

1/16/11 3131BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 32/34

MDR

0

0

0

0

MDR OUT E

MDR in E

MDR OUT

MDR in

External busInternal

01

R1 inR1ou

R1 out, MAR in

11 MAR.

READ

AB

5

0

1/16/11 3232BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 33/34

MDR

0

0

0

1

MDR OUT E

MDR in E

MDR OUT

MDR in

External busInternal

0o B

R1 inR1ou

R2 out, MDR in, WRITE

o1 MAR

1

5

write

5

1/16/11 3333BINOSHI SAMUVEL. lect.

AJCE/S5ECE -09-10

8/8/2019 Coa 2nd M-first Class

http://slidepdf.com/reader/full/coa-2nd-m-first-class 34/34

MDR

1

0

1

0

MDR OUT E

MDR in E

MDR OUT

MDR in

External busInternal

0o B

R1 inR1ou

MDR out E, WMFC

o1 MAR.

Reg 2

1B 5

WMFC

Pr0cesscomplete

d

1/16/11 3434BINOSHI SAMUVEL lect