cmos analog circuitshome.iitk.ac.in/~baquer/l12_cd_amplifier.pdfcmos analog circuits l12: cfcommon...

CMOS Analog Circuits

C fL12: Common Drain Amplifier and Output Stages (23.9.2013)

B Mazhari

G-NumberB. Mazhari, IITK1

B. MazhariDept. of EE, IIT Kanpur

Why do we want one more amplifier configuration?

+3.3V

v0321

vS

R = 1K-3.3V RL 1K

Low output Resistance; Rail-to-Rail voltage swing; Low distortion

High efficiency


How is CS as an output stage?1. We want rail-to-rail swing with minimal distortion

VDD = 3.3V

RD +3 HD

2 (%) 25indsat

vHDV

RD

1k

vO 0+3

-3

225in dsat

HDv V

A R R

VSS = -3 3Vvin

1k o v in m D L inv A v g R R v 2 DSQ

mI

gV V

VSS = -3.3Vin mGSQ T

gV V

211 12 5o DSQ D

HDv I RR R

( ) 0; DDo DSQ

D

VV dc IR

1 12.5QD LR R

211 12 5o DD

D L

HDv VR R

1 12.5D LR R

22

13 3.3 (1 ) 11.361 12 5 D D L

HD H R RR R


1 12.5D LR R

Output will have high distortion

CS as an output stage 2. We want low output Resistance so that outputcharacteristics are insensitive to load.

V = 3 3V

3 3

0.1DR k

RD

VDD = 3.3V

0+3

3.3 33DSQD

I mAR

RD

1k

-3vO

Small output resistancerequires large bias current.

VSS = -3.3Vvin

1k

vOmax1

3.3

V

VDSQvOmax2

~ 0.3 1dsat GSQ T dsatV V V V V V

2( )KP W L Vdsat -3.32( ) ( ) 33

2DSQ GS TNKP W LI V V mA

7333W Is this diagram still valid?


~ 7333WL Large bias current requires very large

Transistor sizes

VDD = 3.3V 1DR k

Suppose we compromise on the output Resistance

RD0

+3

3 3.3 3 3I A

1DR k

1k

-3vO

3.3 3.3DSQD

I mAR

VSS = -3.3Vvin vOmax1

3.3

V

VDSQvOmax2

~ 0.3 1dsat GSQ T dsatV V V V V V Vdsat -3.3dsat GSQ T dsat

W2( ) ( ) 3.3

2DSQ GS TNKP W LI V V mA

~ 733WL


However, the circuit will not give us the required swing 211 12.5o DD

D L

HDv VR R

Output Resistance

VO

RLVS

VO

V

RLVSVS

0V

S

VAV

0

V OS

VAV

S

Av

Avo

0.5 Avo Loading Effect


Ro RL

VinR0

+

RL AVo * Vin RLV0

-

+-

LinV RR

RVAV 00 0L

V VRA A

LRR0 0

0V V

LR R

Low output resistance is desirable and as long as load resistance is muchlarger than output resistance , it is expected that it won’t matter.


However, this is true only from a small-signal point of view

Example

1oR

Si l d i t h l th t t i t d ’t t


Since load resistors are much larger than output resistance, we don’t expectany difference in the two outputs

100mV


The difference between the twocircuits is due to different loadcurrents. In the first case the opamp is

3V

p pnot able to supply 30mA because itsoutput current is limited to 25mA only.In the second case the demand is only15mA. This highlights the importanceof output drive current.


VvOmax1

3.3

VDD = 3.3VV

VDSQvOmax2

31k 0.3mA

Vdsat -3.3

0+3

33

1k-3

3mA

VSS = -3.3Vvin

It is not j st the o tp t resistance b t o tp t c rrent dri e capabilit hich is


It is not just the output resistance but output current drive capability which isalso important. One can have very low output resistance but one may not beable to drive very low output loads because of current limitations.

VDD = 3.3V

3. We want large output current drive capability

DD

≥ 3mA

0+3

33

1k-3

3mA

VSS = -3.3VvinvOmax1

3.3

0.3 3 0 1DmA R k V

VDSQvOmax2

3 0.1DD

mA R kR

33DDVI A

Vdsat -3.3


33DDDSQ

DI mA

R

CS as an output stage 4. We want efficient amplifier where most of thepower drawn from the supply is delivered to the load

3 30.1DR k

VDD = 3.3V

+3 3.3 33DSQD

I mAR

1 T

RD0

-3v

s dd ssP P P 0

1 Tdd DD DDP V I dt

T

P V I

1kvO

( )DD DSQ dI I i Sin t dd DD DSQP V I

SS DSQP V I ( ( ))DD SS DSQP V V I

VSS = -3.3Vvin

(3.3 ( 3.3)) 218S DSQP I mW 2 23 4 5o

LvP mW

ss SS DSQP V I ( ( ))s DD SS DSQP V V I

( ( ))S DSQ 4.52 2L

L LP mW

R R100 2%L

S

PP


Amplifier is highly inefficientS

VDD = 3.3VCurrent source biasing is much better than resistive.

3.3V

+3IO ≥ 3mA v

Vbias2

M2

(W/L)P

0+3

-3

IO3

vO

vS Vbias1

3 3V

M1

(W/L)N

31k 3mA

-3.3V

VSS = -3.3Vvin 3OI mA 3DSQI mA

(3.3 ( 3.3)) 3.3 22SP m mW 2 23 4.5

2 2o

LL L

vP mWR R

2 2L LR R

100 22%LS

PP

1 1


1 1 3.8On p DSQ

R kI

3.3VCS as an output stage

VDD = 3.3V

Vbias2

M2

(W/L)P

RD

DD

0+3

3

vS Vbias1 M1

(W/L)N

vO

RL1k

-3vO

S bias1

-3.3V

1

VSS = -3.3Vvin

33DDDSQ

VI mAR

3DSQI mA

0.1 ; ~ 7333DWR kL

1( ) ~ 1500W

LQDR L

22SP mW218SP mW

~ 22%~ 2%

1 1 3.8On p DSQ

R kI

0.1O DR R k


~ 20vA ~ 17vA

VDD = 3.3V

1kvO

7330/1

0.1k

VSS = -3.3Vvin

1k

3.3V

Vbias2

M2

vO1500/1

750/1

vS Vbias1

-3.3V

M11k

1500/1

G-NumberB. Mazhari, IITK16Positive swing is poor; negative swing is good

3.3V

Vbias2

M2

vO1500/1

750/1

vS Vbias1

-3.3V

M11k

1500/1

3.3V

750/1Vbias2

M2

vO

1k1500/1

vS

Vbias1

-3.3V

M11k

G-NumberB. Mazhari, IITK17Positive swing is good; negative swing is poor

Low output resistanceV 3 3V

V

3.3V

750/1

VDD = 3.3V

Vbias2

M2

v

750/1

vO7330/1

0.1k

vS Vbias1 M1

vO

1k1500/1

v

1k

-3.3VVSS = -3.3Vvin

Resistance looking into drain is large and thus CS amplifier is notreally suitable for obtaining small output resistance


Strategy for obtaining Low output resistance

Resistance looking into source is small !

VDD

vO

RO ~ 1/(gm+gmb)vin RS

Apply input at gate, takeoutput at Source

VSS


p

Small Signal Analysis

vgs

gmvgs

ro

gmbvbs

vi

vO

RS

vin

gm gs

RS

vo

vin RS

m S ov

g R rA

1 1o SR R

g g g g

1 ( )vm mb S o

Ag g R r m mb m mbg g g g

G OG-NumberB. Mazhari, IITK

20

Gain is less than unity ! Output resistance is low !

vO

R v R

iN N m gsi g v

vin RS vin RS

1

RN

1N s

m mbR R

g g

RS

RN

1 ( )m S

vm mb S

g RAg g R


( )m mb Sg g

3 3V

Example

3.3V

Bias GSQ DSQ S SSV V I R V

vO

2/11.85V

( 2 2 )V V V

2( ) [1 ]2N

DSQ GSQ THN n DSQI V V V

vin 330k0 ( 2 2 )THN THN F SBQ FV V V

;V I R V V I R V -3.3V

;SBQ DSQ S DSQ DD DSQ S SSV I R V V I R V

10DSQI A 3.3 1.5 ; 1.85SBQ THN GSQV V V V V V 3.3DSQV V

55.57 / ; 9.67 / ; 6.6m mb og A V g A V r


0.811 ( )

m Sv

m mb S

g RAg g R

1 ~ 14.6o sm mb

R R kg g

3.3V

CD amplifier has good linearity and thus less

vO

2/11.85V

CD amplifier has good linearity and thus lessprone to harmonic distortion

vin 330k

-3.3V


HD2 ~1.6%

Why is distortion so less even though input is so large?


2)5.0( gsmTGSQ

gsmds vgVV

vgi

vO

+ vgs -

2 (%) 25gs

GSQ T

vHD

V V

vin 330kEven though vin is large, distortion is small perhapsbecause vgs is significantly smallerbecause vgs is significantly smaller


Negative feedback helps to reduce distortion

It is interesting that even though vin is pureIt is interesting that even though vin is puresinusoid, vgs is distorted in such a way thattransistor distorts it an opposite manner to giverise to drain current which is distortion free.

vO

+ vgs -

vin 330k


3.3V VDD Vsat1

vi

vO

2/1

330k

1.85VvOmax1

vO 2

VO(dc)vin

-3.3V

330k vOmax2

VSS


Good swing but input sinusoidal amplitude is 4V

Driving low impedance Load

VDD = 3 3VDD 3.3

vO

v R RL = 1K-3V

≥3mAvin RSRL 1K

3mA

≥3mA

VSS =-3.3


3 ( 3.3) 3 100SS

mA RR

3.3 ~ 33

100biasI mA

CD amplifier with current source biasing

VDD = 3.3

v

R 1K

vO-3V

vinRL = 1KIBias

3mA3.3mA

VSS =-3.3


SS

Biasing 3.3DSQI mA

VDD = 3.3

m1V

RL = 1K

vO

m2

m1VBias1

vi

VBias2L

VSS =-3.3

m2vin

(W/L) VGS1(V) VGS2(V)

50 2.6 1.8100 2 3 1 5100 2.3 1.5200 2.06 1.25500 1.85 1.05


700 1.8 11000 1.75 0.94

RVDD = 3.3

1 2

1 1 21 ( )m L o

vm mb L o

g R rA

g g R r

vOm1VBias1

11 11 ( )m L

m mb L

g Rg g R

RL = 1K

O

m2vin

VBias2 1o

m mbR

g g

VSS =-3.3

m2 m mbg g

VDD VSS

vOmax1V (d )

DD Vsat1

If Vo(dc)~0 then it appears that

vOmax2

VO(dc)

V

If Vo(dc) 0 then it appears thatswing within one saturation voltageof supply rails can be achieved.


VSSVsat2

Voltage Swing: Limitations

VDD

vIN m1

1 1O IN GS IN TN satV V V V V V

vin vO1

m2 V (d )+Vm2

VTN1

Vin(dc)+Vinmax1

VSS VDD Vsat

Vsat1

vOmax1

VIN(dc)

sat

vINmax1 vOmax2

VO(dc)

G-NumberB. Mazhari, IITK32VSS

Vsat

vINmax2 VSSVsat2

Biasing 3.3DSQI mA(W/L) VGS1(V) VGS2(V)

VDD = 3.3

1

50 2.6 1.8100 2.3 1.5

RL = 1K

vOm1

VBias2

100 2.3 1.5200 2.06 1.25500 1.85 1.05RL 1K

VSS =-3.3

m2 700 1.8 11000 1.75 0.94

SS

3 33

VTN1=1 53.3 0.3

1.2

VTN1 1.5Vsat1=0.3

vO 1=1 2

0 3

1.84.8

vOmax2

VO(dc)=0vOmax1 1.2


-3.30.3

Vsat2 VSS=-3.3

VTN1=1.5Vsat1=0.3

3

sat1

VO(dc)=-0.9vOmax1=2.1

vOmax2=2.1

VSS=-3.30.3


CD amplifier with P-MOSFET

VDD

V

Source and body are shorted so VT isconstant and smaller

VBias2

vO

(W/L) VSG1(V)

VBias1 RL=1k

O

50 2.52

100 2.04

vinVSS

200 1.69

500 1.39

700 1.31

1000 1.238

1m Lv

g RA One can get gain very close to


11vm L

Ag R

unity in this case

Biasing 3.3DSQI mA (W/L) VSG1(V)

50 2 52VDD

VBias2

50 2.52

100 2.04

200 1 69

R =1kvin

vO

m2200 1.69

500 1.39

700 1 31

VSS

RL=1km1

700 1.31

1000 1.238

3 3VDD=3.3V

V

SS

3.3 0.3

3 65

Vsat2

vOmax1=2.35VO(dc)=0.65

0 3

-0.652.35

3.65

Vsat1=0.45

OvOmax2=2.35


-3.30.3

VTN1=0.86-3

VDD=3.3VVsat2

VDD

V vOmax1=2.35VO(dc)=0.65

vOmax2=2.35

VBias2

vvO

m2

VTN1=0.86

Vsat1=0.45

3

RL=1kvin

m1

CS

-3VSS


Noisem2

iNiN

m1

2 22 2i ii i2 21 21 22 2 2 2

1 1 1 1

f ft tin

m m m m

i ii ieg g g g

Just like a CS stage


Just like a CS stage

Frequency Response

RS ||RLVDD

voCgs

S || L

vO

RS

RRG

gmvgs

Cgd

CdbVBias1

vORG

RL

vinvinVSS

1jjj CR

j

dBf2

13


G gdR C

RCgs

RG

Cgdgmvgs

vovin

CR CdbRS

1db SC Rg R

gsC 1 m Sg R( )

1gs

S Gm S

CR R

g R

1 ( ) gs S dbC R CR C R R


13 ( )

1 1gs S db

dB G gd S Gm S m S

R C R Rg R g R

1( )

szH s K

2( )1

zH s Kgs hs

CgsRG

Cgmvgs

mgs

gzC

vovin

Cgd

CdbRS CdbRS

( )1 1

gssdb gd g s G

m s m S

CRg C C R R Rg R g R

( )1

g sgd db db gs gs gd

R Rh C C C C C C

g R

1 g g g gm sg R

There are in general two poles and a zero all of which will influence 3dBThere are, in general, two poles and a zero, all of which will influence 3dBfrequency if they are close together.


Case-1: Negligible RG

3.3V C R C

330k

v

13

9

2 ( ) 1 1

1 1 10

gs S dbdB G gd S G

m S m S

C R Cf R C R Rg R g R

Hz

VBias1

RGvO

2/1

1.1 10 Hz

There is only one pole in this case since h = 0

vin-3.3V

91 1.1 10p Hz 91.38 10z Hz


3.3V

330k

VRG

330k

vO

2/1

vin

VBias1 2/1

vin-3.3V

RG (MΩ) P1 (GHz) P2 (GHz) Z(GHz)

f3DB(GHz)(est.)

f3DB(GHz)(acc.)( ) ( )

0 1.1 - 1.38 1.1 -0 1 0 89 i0 75 0 89+i0 75 1 38 0 76 1 070.1 0.89-i0.75 0.89+i0.75 1.38 0.76 1.07

1 0.35-i0.1 0.35+i0.1 1.38 0.19 0.249


5 0.047 0.56 1.38 0.043 0.04710 0.023 0.57 1.38 0.022 0.023

CS amplifier

31 1

dBf

2/1

RD = 100K 3.3V

0 14f GH 1 29mgf GH

3 2 ( (1 )) ( )dBS gs gd m D D gd db

fR C C g R R C C

2/1 VO

vin

1.2V100K 3 0.14dBf GHz 1 29

2m

zgd

gf GHzC

1 0 35m gdg Cf GH2 0.35

2m gd

pgs gd gs db gd db

f GHzC C C C C C

3 0.16dBf GHz

G-NumberB. Mazhari, IITK45CD amplifier has a superior frequency response

3.3V

330k

VRG

330k

2/1

vO

v

VBias1 2/1 CL=1pF

vin-3.3V

1 632 ( ) 5.95 10

1 1gs S db

dB G gd S Gm S m S

C R Cf R C R R Hzg R g R

66 10 H 91 38 10 H8

2 3 6 10p Hz 61 6 10p Hz 91.38 10z Hz 2 3.6 10p Hz

With large gate resistance or capacitive load, a dominant pole exists and the


With large gate resistance or capacitive load, a dominant pole exists and thesimple method gives a fairly accurate estimate of 3dB frequency.

Miller’s effect in CD amplifier

VDD

RS

VBi 1

vO

S

RGv

CgsRG

Cgdgmvgs

vi

VBias1 RLvovin

CdbRS vin

VSS

CF

Iif+

-VoVin

+

-

CMi CMo+

-Vin

+

-Vo

Iin Io

1


)11(V

FMo ACC )1( VFMi ACC

CgsRG

gmvgsRG

gmvgsCgsi

RS

vo

RS CgsoS S gso

(1 )gsi gs VC C A 1(1 )gso gsV

C CA

1m s

vg RA

g R

1 m sg R

1gs

gsi

CC

g R

gs

gso

CC

g R


1 m Sg R m Sg R

CgsRG

gmvgsRG

gmvgsCgsi

RS

vo

RS CgsoS S gso

1gs

gsim S

CC

g R

1( )

jzH j K

gsgso

m S

CC

g R

( )1

zH j Kj

p

1( )

(1 ) (1 )H j K

j j

m Sg

1 gs

m

Cz

g 1 2

(1 ) (1 )j jp p

Cmg

1 ( )1

gss G

m S

Cp R R

g R

11 1

gsG

m S

Cp R

g R

1

21

1gs

m S m

Cp

g R g


m Sg

CgsRG

gmvgsRG

gmvgsCgsi

RS

vo

RS CgsoS S gso

gs gs SC C RR ( )

1gs

S GS

CR R

g R

1 1

1( )

Gm S m S m S

gs

Rg R g R g R

CR

1 m Sg R

( )1

gsG

m S m

Rg R g


Summary3.3V VDD

VBi 2CS CDVbias2

M2VBias1

VBias2

R 1k

vO

CS CD

vS Vbias1 M1

vO

1kvin

VBias1

V

RL=1k

-3.3VVSS

1 Low Output resistance requires1. Low Output resistance requireslarge bias current

2 Rail to rail output swing

1. Significantly Lower Outputresistance can be obtained atsame value of bias current2. Rail-to-rail output swing

3. Frequency response suffersf Mill ’ ff d i

2. Swing lower by about a VT drop

from Miller’s effect and isinferior. 3. Good frequency response


Efficiency limited to < 25% for both the stages

Multistage Amplifiers with Negative feedback

Vbias2

3.3V

Vbias2

M2

vO

3 3V

M11kvS

-3.3VRfR1

N i f db k ill h l l h iNegative feedback will help lower the output resistance


Example 3.3V

700/11 99V

M2

vO00/1

700/1IBias=3.3mA

1.99V

-2.31V30 ; 817v oA R

3 3V

M11k

vS

700/1

-3.3V

3.3V

1.99V

M2

700/1

M1k

vO

vS

-100100

M2

700/1 99.94 ; 0.45v oA R

-3.3V

M1S

1k 99k


Ibias = 3.3mA

Ibias = 3.93mAbias

4 5LP mW


sup

4.5 0.1726

Lply

P mWP mW

cmos analog circuitshome.iitk.ac.in/~baquer/l12_cd_amplifier.pdfcmos analog circuits l12: cfcommon...

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