classical and quantum circuit synthesis an algorithmic approach

45
Classical and Quantum Circuit Synthesis An Algorithmic Approach

Post on 21-Dec-2015

227 views

Category:

Documents


0 download

TRANSCRIPT

Classical and Quantum Circuit Synthesis

An Algorithmic Approach

Problem

How do we synthesize efficient n-input quantum circuits using CNOT gates only ?Of the n! possible n-qubit permutations,

how many can be implemented in this way?

What is the longest such circuit?How can long chains of CNOTs be

systematically reduced?

Goals

Way to synthesize quantum circuitsCurrently, reducing chains of C-Not gates

is importantMore complex circuits (with Toffoli gates,

etc...)Larger circuits (more qubits, more gates,

etc...)

Reducing C-Nots

Want to minimize error

Need an algorithmic approach

Classical circuit approach discrete reversible case

wire 0: -------X--O-----X--X--O-

wire 1: -O--X-----X--O--O-----X-

wire 2: -X--O--O-----X-----O----

Reduces to:

wire 0: -O-

wire 1: ---

wire 2: -X-

Example

Classical program goals

Synthesize optimal classical circuitsProvides method for creating reduced

chains of C-Not gates

ScalableAs many inputs/outputs as necessary

VersatileUse various gate libraries (AND, OR, NOT,

etc...)

Refresher – Truth Tables

X Y Z=X^Y

0 0 0

0 1 0

1 0 0

1 1 1

AND gate

(Columnar format)

These can be represented in row format as well:

X = 0011 -> 3Y = 0101 -> 5--------Z = 0001 -> 1

(3^5)==1

How to Synthesize?

Inputs

X = 0011

Y = 0101

Desired result

Z = 0110

?

How to Synthesize?

Inputs

X = 0011

Y = 0101

Desired result

Z = 0110Gate Library: AND, OR, NAND

Tree Structure

Solution space representable as a tree Inputs at head of tree Each level down represents addition of

new gateBranch factor depends on number of

current gates and allowable new gates

Inputs X, Y

A=X*Y A=X+Y

B=X*Y B=X+Y B=X*A B=X+A B=Y*A B=Y+A

Level 1

Level 2(Same as left)

If we have

N inputs (N=2 here)

G gate types (G=2, we have AND and OR)

Then at level L we have a branch factor of

B = G * (N+L-1, 2) / 2

Branch and Bound

Depth-first searchFirst do topbottom, then leftrightTravel down to leaves before going to

siblingsCan be implemented by a recursive

function, passing L+1 with each call

DFS Branch & Bound

DFS Branch & Bound

DFS Branch & Bound

DFS Branch & Bound

DFS Branch & Bound

B&B Synthesis

Inputs

X = 0011

Y = 0101

Desired result

Z = 0110A=X*X=0011

B&B Synthesis

Inputs

X = 0011

Y = 0101

Desired result

Z = 0110A=X*X=0011 B=X*X=0011

B&B Synthesis

Inputs

X = 0011

Y = 0101

Desired result

Z = 0110A=X*X=0011 B=X*X=0011

C=X*X=0011

C=X+X=0011

C=(X*X)’=1100

C=X*Y=0001

...

B&B Synthesis

Inputs

X = 0011

Y = 0101

Desired result

Z = 0110A=X*X=0011 B=X+X=0011

C=X*X=0011

C=X+X=0011

C=(X*X)’=1100

C=X*Y=0001

...

B&B Synthesis

Inputs

X = 0011

Y = 0101

Desired result

Z = 0110A=X*X=0011 B=(X*X)’=0011

C=X*X=0011

C=X+X=0011

C=(X*X)’=1100

C=X*Y=0001

...

Solution Found!

Inputs

X = 0011

Y = 0101

Desired result

Z = 0110A=X+Y=0111 B=(X*Y)’=1110 C=A*B=0110

Bounding Conditions

Branch factor unnecessarily large

Need bounding conditionsDon’t need duplicate gates (A=X*X,B=X*X)Symmetrical gates done only once

Don’t need X*Y, then Y*XSymmetrical branches of solution space

can be bounded awayOptimality requirement creates a bound

Optimality Bounding

Current circuitAssume we are only allowed one more gate

This gate cannot use all three level-two gates as inputs

If added, two of the level-two gates would be used, one would be left dangling

No reason to add a gate, bound now

Don’t-caresSuppose we are interested in only part of the output. Say Z=0110 and Z=0111 are both desirable

outputs. We don’t care about the last bit. Can represent output as Z = 011X This relaxed restriction allows us to find a suitable

match more quickly

Quantum circuits can also have don’t-cares, but they are different than classical ones.

Multiple Outputs

We may desire more than one outputEx: Half adder. Has two bits as input, two

bits as output (sum, carry)

Optimal multi-output circuit may be different than circuit created by merging the individual optimal ones.Causes an approximately linear increase in synthesis time.

Reversible Synthesis

To maintain reversibility, must have same number of qubits at every stage

Fan out must be 1, so there is no expansion in the number of gates at any stage

Both the input/output functions and all the gates must be reversible

Compact Representation (Revisited)

For a three qubit function, our inputs (A, B, C) will have these values:

A B C V

0 0 0 0

0 0 1 1

0 1 0 2

0 1 1 3

1 0 0 4

1 0 1 5

1 1 0 6

1 1 1 7

A = 00001111 = 15

B = 00110011 = 51

C = 01010101 = 85

Permutation Representation

We want to synthesize the outputs A’, B’, and C’ from the inputs A, B, and C

A B C V

0 0 0 0

0 0 1 1

0 1 0 2

0 1 1 3

1 0 0 4

1 0 1 5

1 1 0 6

1 1 1 7

A’ B’ C’ V

1 0 0 4

0 1 0 2

1 1 0 6

1 1 1 7

0 1 1 3

0 0 0 0

1 0 1 5

0 0 1 1

To be reversible, all of the values of V must be distinct. This allows us to treat the outputs as permutations of the inputs.

Permutation Representation

A B C V

0 0 0 0

0 0 1 1

0 1 0 2

0 1 1 3

1 0 0 4

1 0 1 5

1 1 0 6

1 1 1 7

15 51 85

A’ B’ C’ V’

1 0 0 4

0 1 0 2

1 1 0 6

1 1 1 7

0 1 1 3

0 0 0 0

1 0 1 5

0 0 1 1

178 120 27

So the problem:

(15,51,85)->(178,120,27)

Can be expressed as:

01234567 -> 42673051

Simplified Circuit Representation

A

B

C

A’

B’

C’

(A, B) (B, C)

Simplified Circuit Representation

A

B

C

A’

B’

C’

A1

B1

C1

A2

C2

B2

(A, B) (B, C)

A B C V

0 0 0 0

0 0 1 1

0 1 0 2

0 1 1 3

1 0 0 4

1 0 1 5

1 1 0 6

1 1 1 7

A1 B1 C1 V1

0 0 0 0

0 0 1 1

0 1 0 2

0 1 1 3

1 1 0 6

1 1 1 7

1 0 0 4

1 0 1 5

(A, B) (B, C)

A2 B2 C2 V2

0 0 0 0

0 0 1 1

0 1 1 3

0 1 0 2

1 1 1 7

1 1 0 6

1 0 0 4

1 0 1 5

A’ B’ C’ V’

0 0 0 0

0 0 1 1

0 1 1 3

0 1 0 2

1 1 1 7

1 1 0 6

1 0 0 4

1 0 1 5

Results

Question: given a 3-Qubit system, what is the longest possible irreducible chain of C-Nots?Note that some longest chain *must* exist

because there are finitely many (8!) permutations.

Bounding

At each stage, we store the value on each wire. If all wire values are the same, bound

If two gates can be permuted w/o affecting the circuit, only try one of them

-O-O- -O-O--X--- = ---X----X- -X---

Answer

Longest chains:

wire 0: --O--X--O-----------

wire 1: -----------X--O--X--

wire 2: --X--O--X--O--X--O--

AND

wire 0: -----------X--O--X--

wire 1: --O--X--O-----------

wire 2: --X--O--X--O--X--O--

Why?

Recall that C-Nots act like XOR gates. That is, |x>|y> |x>|x XOR y>What does this code do?A = A xor B

B = A xor BA = A xor B

This is a variable swap. The chains on the previous page represent wire swaps.

How many C-Nots?

Experimental results:Of the 40320 (=8!) permutations, exactly

168 are achievable. 2 of them require 6 C-Not gates24 require 560 require 451 require 324 require 2 (6 * 6 - duplicates)6 require 1 (3 control choices * 2 targets)1 requires 0

Why only 168?

Not all of the 8! permutations are achievableThe permutation must be even. Recall

every C-Not caused two pairs of values to be swapped

Exactly half of the 8! permutations are even

Various other factors reduce this more

Parity of a Permutation

The number of line crossings determines the parity of a permutation. There are four in this case, and so the permutation is even.

Future Plans... Make Program:

More scalable Currently using 32-bit integers to store wire

values. 2^5 = 32; only 5 wires at a time now.

More versatile Currently only using C-Not gates. Allow n-input

Toffoli gates, other gates

Quicker Determine methods for bounding better, exploit

characteristics of quantum circuits.

Potential improvements

ScalabilityUse STL bit_vector, or bit_set... fully

expandable

SpeedSince all the gates and the functions are

reversible, the whole circuit is too.Functions can be synthesized in reverse

Reversible Synthesis

Recall that C-Not acts like XORC-Not is its own inverse (going left to right

is same as right to left)

Synthesis can be done rightleftWe already know how to achieve the input

values with several gates, because we’ve done this leftright before

This allows us to have a LUT when we get near enough to the inputs