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  • 8/7/2019 Class Notes Digital Lec05

    1/5

    May 25, 2010

    `~ivjvcbx twc,G,we,G, 9661920-73/4980

    dwjZ c`v_wevb, BjKUwbIKwgDwbKkb Bwwbqvwis wefvMXvKv wekwe`vjqXvKv-1000, evsjv`k

    Telephone :

    PABX : 9661920-73/4980

    DEPT. OF APPLIED PHYSICS, ELECTRONICS &

    COMMUNICATION ENGINEERING

    UNIVERSITY OF DHAKA

    DHAKA-1000, BANGLADESH

    FAX: 880-2-8615583

    E-MAIL: [email protected]

    Ref. No............................ Dated, the.

    In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)

    Digital-to-Analog Conversion:A digital quantity will have a value that is specified as one of two possibilities such as 0 or 1, LOW or HIGH, false ortrue, and so on. In practice, a digital quantity such as a voltage may actually have a value that is anywhere withinspecified ranges.By contrast, an analog quantity can take on any value over a continuous range of values.A D/A converter takes digital data at its input and converts them into analog voltage or current that is proportional tothe weighted sum of digital inputs.

    Fig.: Four-bit DAC with voltage output.Figure shows the symbol for a typical four-bit D/A converter. Input reference voltage V ref is used to determine the full-scale output or maximum value that the D/A converter can produce.There are 24=16 different binary numbers represented by four digital inputs D, C, B and A. For each input number,the D/A converter output voltage/current is a unique value.Proportionality factor In general,

    analog output = K x digital inputwhere K is the proportionality factor and is a constant value for a given DAC connected to a fixed reference voltage.

    Analog approximation The output of a DAC is technically not an analog quantity because it can take on only specific values. In that sense, itis actually digital. But by increasing the number of input bits it is possible to

    (I) increase the number of different possible output values and(II) decrease the difference between successive output values.

    This will allow us to produce an output that is more and more like an analog quantity that varies continuously over arange of values. That is, the DAC output can be a pseudo-analog quantity rather a pure analog quantity.Input weights Different bits in the digital input data contribute a different quantum to the overall output analog voltage/current. Thecontributions of each digital input are weighted according to their position in the binary number. Thus,

    (I) the LSB has the least weight,

    D C B A VOUT (volts)

    0 0 0 0 00 0 0 1 1

    0 0 1 0 20 0 1 1 30 1 0 0 40 1 0 1 50 1 1 0 60 1 1 1 7

    1 0 0 0 81 0 0 1 91 0 1 0 101 0 1 1 111 1 0 0 121 1 0 1 13

    1 1 1 0 141 1 1 1 15

    D/Aconverter

    (DAC)

    Vref=15V

    VOUTAnalogoutput

    MSB

    LSB

    A

    B

    C

    D

    Digitalinputs

    Lec-05, Pg-01

  • 8/7/2019 Class Notes Digital Lec05

    2/5

    May 25, 2010

    `~ivjvcbx twc,G,we,G, 9661920-73/4980

    dwjZ c`v_wevb, BjKUwbIKwgDwbKkb Bwwbqvwis wefvMXvKv wekwe`vjqXvKv-1000, evsjv`k

    Telephone :

    PABX : 9661920-73/4980

    DEPT. OF APPLIED PHYSICS, ELECTRONICS &

    COMMUNICATION ENGINEERING

    UNIVERSITY OF DHAKA

    DHAKA-1000, BANGLADESH

    FAX: 880-2-8615583

    E-MAIL: [email protected]

    Ref. No............................ Dated, the.

    In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)

    (II) the weights are successively doubled for each bit and(III) the MSB has the highest weight.

    Resolution/Step size Resolution of a D/A converter is defined as the smallest change that can occur in the analog output as a result of achange in the digital input. It is always equal to the weight of the LSB and is also referred to as the step size.Resolution can be defined as

    )12( =

    n

    fsAresolution

    where Afs is the analog full-scale output andn is the number of bits in the input digital world.

    It is useful to express resolution as a percentage of the full-scale output, known as a percentage resolution, given by

    %100)12(

    1

    %100.).(

    %

    =

    =

    n

    SFscalefull

    sizestepresolution

    BCD-input converter

    Fig.: DAC using BCD input code.A BCD-input D/A converter accepts the BCD equivalent of decimal digits at its input. A two-digit BCD D/A converter isan eight-bit D/A converter. Each four-bit code group can range from 0000 to 1001, and so such converter acceptsdecimal digits 00 to 99 at its input and has 99 steps.

    The weight of the different bits in the LSD will be 1, 2, 4 and 8. The weights of the corresponding bits in the nexthigher digit will be 10 times the weights of corresponding bits in the lower adjacent digit, that is, 10, 20, 40 and 80.The percentage resolution of such a converter is given by

    ( )%100

    110

    14/

    n

    D/Aconverterwith BCD

    inputs

    VOUT100 possible valuessince input ranges

    from 00 to 99

    MSB

    LSB

    MSB

    LSB

    D1

    C1

    B1

    A1

    D0

    C0

    B0

    A0

    BCD for mostsignificant digit

    (MSD)

    BCD for leastsignificant digit

    (LSD)

    80

    40

    20

    10

    8

    4

    2

    1

    Lec-05, Pg-02

  • 8/7/2019 Class Notes Digital Lec05

    3/5

    May 25, 2010

    `~ivjvcbx twc,G,we,G, 9661920-73/4980

    dwjZ c`v_wevb, BjKUwbIKwgDwbKkb Bwwbqvwis wefvMXvKv wekwe`vjqXvKv-1000, evsjv`k

    Telephone :

    PABX : 9661920-73/4980

    DEPT. OF APPLIED PHYSICS, ELECTRONICS &

    COMMUNICATION ENGINEERING

    UNIVERSITY OF DHAKA

    DHAKA-1000, BANGLADESH

    FAX: 880-2-8615583

    E-MAIL: [email protected]

    Ref. No............................ Dated, the.

    In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)

    Weighted Resistors D/A-Converter:

    Fig.: Simple DAC using an op-amp summing amplifier with binary-weighted resistors.The inputs A, B, C and D are binary inputs that are assumed to have values of either 0 or 5V.

    The operational amplifier is employed as a summing amplifier, which produces the weighted sum of these inputvoltages. The output voltage of an inverting op-amp is

    IN

    F

    inoutR

    RVV =

    In this circuit RF=1k and the input resistors range from 1 to 8k. The summing amplifier passes the voltage at (I) D with no attenuation,(II) C with attenuation 1/2,(III) B with attenuation 1/4 and(IV) A with attenuation 1/8.

    The amplifier output can thus be expressed as

    +++= ABCDOUT VVVVV

    8

    1

    4

    1

    2

    1

    Thus, the summing amplifier output is an analog voltage which represents a weighted sum of the digital inputs.The resolution of this D/A converter is equal to the weighting of the LSB, which is

    VV 625.058

    1=

    Input code

    D C B A VOUT (volts)

    0 0 0 0 00 0 0 1 -0.625 (LSB)0 0 1 0 -1.2500 0 1 1 -1.875

    0 1 0 0 -2.5000 1 0 1 -3.1250 1 1 0 -3.750

    0 1 1 1 -4.3751 0 0 0 -5.0001 0 0 1 -5.6251 0 1 0 -6.2501 0 1 1 -6.875

    1 1 0 0 -7.5001 1 0 1 -8.1251 1 1 0 -8.7501 1 1 1 -9.375 (Full Scale)

    -Vs

    +Vs

    Rf=1k

    8k

    4k

    2k

    1k

    D

    C

    B

    A

    MSB

    LSB

    VOUTDigital inputs:

    0V or 5V

    Lec-05, Pg-03

  • 8/7/2019 Class Notes Digital Lec05

    4/5

    May 25, 2010

    `~ivjvcbx twc,G,we,G, 9661920-73/4980

    dwjZ c`v_wevb, BjKUwbIKwgDwbKkb Bwwbqvwis wefvMXvKv wekwe`vjqXvKv-1000, evsjv`k

    Telephone :

    PABX : 9661920-73/4980

    DEPT. OF APPLIED PHYSICS, ELECTRONICS &

    COMMUNICATION ENGINEERING

    UNIVERSITY OF DHAKA

    DHAKA-1000, BANGLADESH

    FAX: 880-2-8615583

    E-MAIL: [email protected]

    Ref. No............................ Dated, the.

    In case of any query or suggestion please contact Sazzad, Lecturer, APECE, DU (url: sazzadmsi.webs.com)

    DAC with Current Output:

    Fig.: Current-output DAC connected to an op-amp current-to-voltage converter.Figure shows a four-bit DAC for generating an analog output current proportional to a binary input. The output currentis often converted into a corresponding voltage using an external op-amp wired as a current-to-voltage converter.The circuit uses four parallel current paths, each controlled by a semiconductor switch. The current through eachpath is determined by

    (I) an accurate reference voltage, VREF, and

    (II) a precision resistor in the path. The resistors divide the input current into binary weighted currents.These currents are then steered to op-amp for logic 1 by the current steering switches or the switches are left openfor logic 0. The positions of these switches are controlled by the digital input word.The total current, IOUT, will be the sum of the individual currents. The op-amp negative feedback forces current I OUT toflow through RF to produce VOUT=-IOUTRF. Thus, VOUT will be an analog voltage that is proportional to the binary inputto the DAC.The maximum analog output voltage is given by

    -2(1-2-n)Vrefwhere n is the number of bits in the input digital word.

    +VREF

    IO IO/2 IO/4 IO/8

    IOUT

    R 2R 4R 8R

    RL

    MSB LSBB3 B2 B1 B0

    Binary inputs (0 or 1)

    Switch closed when

    input bit = 1

    R

    VIwhere

    IB

    IB

    IBIBI

    REFO

    O

    OOUT

    =

    ++

    +=

    84

    2

    0

    0

    0

    1

    23

    +VREF

    IO IO/2 IO/4 IO/8

    IOUT

    R 2R 4R 8R

    MSB LSBB3 B2 B1 B0

    Binary inputs (0 or 1)

    Switch closed when

    input bit = 1RF

    IF=IOUT

    +

    -VOUT=-IOUTxRF

    Lec-05, Pg-04

  • 8/7/2019 Class Notes Digital Lec05

    5/5

    May 25, 2010

    `~ivjvcbx twc,G,we,G, 9661920-73/4980

    dwjZ c`v_wevb, BjKUwbIKwgDwbKkb Bwwbqvwis wefvMXvKv wekwe`vjqXvKv-1000, evsjv`k

    Telephone :

    PABX : 9661920-73/4980

    DEPT. OF APPLIED PHYSICS, ELECTRONICS &

    COMMUNICATION ENGINEERING

    UNIVERSITY OF DHAKA

    DHAKA-1000, BANGLADESH

    FAX: 880-2-8615583

    E-MAIL: [email protected]

    Ref. No............................ Dated, the.

    I f ti l t t S d L t APECE DU ( l d i b )

    R/2R Ladder D/A Converter:

    Fig.: Basic R/2R ladder DAC.The biggest problem, with the DAC circuits with binary-weighted resistors, is the large difference in resistor valuesbetween the LSB and the MSB, especially in high-resolution DACs. It is very difficult to produce resistance valuesover a wide resistance range that maintains an accurate ratio.For this reason it is preferable to have a circuit that uses resistances that are fairly close in value. The R/2R laddernetwork satisfies this requirement, where the resistance values span a range of only 2 to 1.The current IOUT depends on the positions of the four switches and the binary inputs B3B2B1B0 control the states of

    the switches. This current is allowed to flow through an op-amp current-to-voltage converter to develop V OUT, givenby the expression

    BV

    V REFOUT =8

    where B is the value of the binary input.[Ref.: Digital Systems Principles and Applications, R.J. Tocci and N.S. Widmer]

    +VREF

    IOUT

    2R 2R 2R 2R

    MSB LSBB3 B2 B1 B0

    Binary inputs (0 or 1)

    Switch closed wheninput bit = 1

    2R

    2R

    +

    -

    BV

    V REFOUT =

    8

    RRR

    Lec 05 Pg 05