chapter 2 and 3 opamp imperfections + intro to semiconductors

7/29/2019 Chapter 2 and 3 OpAmp imperfections + Intro to semiconductors

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Introduction to Electronics

OpAmp Offset Voltage and Current

Semiconductor Diodes

R. Khazaka 2010 ECSE330 Introduction to Electronics

Roni Khazaka

Offset Voltage

Ideal offset free opAmp

0O

v V=

Practical OpAmp

R. Khazaka 2010 ECSE330 Introduction to Electronics 2

0Ov V+

Is likely to at one of thevoltage supply levels

(positive or negative).


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Offset Voltage

Practical OpAmp

0O

v V

Is likely to at one of the

voltage supply levels(positive or negative).

Practical OpAmp


0Ov V=

+

OSV

n or er o r ng e ou pu

back to zero, we mustsupply a differential voltage

at the input. This voltage is

the offset voltage.

Circuit Model for OpAmp with offset

Actual OpAmp with offset

T ical Values:

OSVOffset-free

OpAmp

0Ov V=

1 5OSV to mV =


OSVOSV+

at ne ative terminal

Use practical opamp to implementideal one with offset voltage


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Virtual Short Principle

2RO OS OS v V V =

1R

Ov+

2 1

OSV2 2 1

O OS OS v V V

R R R

= +


2

1

1O OSR

v V R

= +

Inverting amplifier with zero input. V

OS

is amplified at the output. This Topology can be used to

measure VOS. Measure vO, thencompute VOS

Offset Nulling Terminals

DDV

+

vo

v+


-v-

SSV

For ideal one or practical op amp with off set


4/35

Eliminating dc offset throughcapacitive coupling.

2R

1

IvO

v

C

2R


Eliminating dc offset through

capacitive coupling.

2R Analysis of amplifier with zero DC input

2R

OpAamp with offset2

1

1O OSR

v VR

= +

Note: Without the capacitorwe would have had:


OSV

OSV

Replace with model

Offset free OpAmp


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Input Bias and Offset Currents

-

The OpAmp requires small DCbias currents at the inputs in

+v-

vo

v+

1BI

2BI

.


e n ons:1 2

2

B BB

I II

+=Input Bias Current:

Input Offset Current: 1 2OS B BI I I=

Typical Values:

100BI nA

10OSI nA

Effect of the input bias currents

2R

1R

IvO

v

2R


1

0Ov V=

Zero input

Ideal Case


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Effect of Input Bias Point

+

-

1BI

1R

Ov


2BI

1 2 2O B Bv I R I R=

This puts an upper limit on thevalue of resistorR2.

Modified Circuit

2R

1R

IvO

v

2R3R


1

0Ov V=

Zero input

Ideal Case3RR

3has a negligible effect on the signal.


7/35


2 31

1

BB

I RI

R

+

-

1BI

1R

Ov

2BI

2 3

1

B

R


2BI

2 32 3 2 1

1

BO B B

I Rv I R R I R

= +

3R

2 3BI R


2 3BI R

v I R R I

= + 1R

1 2B B BI I I= =If

( )2 3 2 11O Bv I R R R R = +


In order to set 2 3 2 11R R R R= +


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Silicon

Silicon

Atomic number 14electron

.

The material is the mostpurified substance man hasever attempted to produce.

It has 4 valence electrons


and if properly grown incrystal-form it takes on a

face-body cubic crystalpattern.

neutron

proton

Silicon Semiconductor.

Intrinsic silicon has a regular crystal lattice of atoms

held together by covalent bonds

each atom has four valence electrons


51022 atoms/cm3

Rubber Silicon

(semi-conductor)

Copper


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10/35

Intrinsic Silicon

The number of holes p and the number of electronsn increases equally with temperature.

At room-temperature (T>273K), n = p = 1.51010

carriers/cm3. pnni == npni =2


Electron Hole Recombination

Electrons in conduction band and holes in valence bandmay interact with each other.

A free electron and a free hole interact and annihilate each other.


Before After


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Semiconductor Doping

Extra electron Phosphorous-doping

This atom has 5 valence

Extra FREE electron

.

This creates a N-typesemiconductor. It is alsocalled a DONOR atom.

At room temperature, thereis an excess of FREE-electrons.


If the doping is significant

and T=273K, then:n = NDand p = n

i

2/ND

N-Type Silicon

In n-type silicon:

electrons are majority carriers and holes are minority carriers

phosphorous

Majority

carrier


nor y

carrier


12/35

Semi Conductor Doping

Extra hole Boron-doping

This atom has 3 valence.

This creates a P-typesemiconductor. It is alsocalled a ACCEPTOR.

At room temperature, thereis an excess of FREE-holes.

Extra FREE hole


and T=273K, then:p = N

A

and n = ni2

/NA

P-Type Silicon

In p-type silicon:

holes are ma orit carriers and electrons are minorit carriers

boron

Minority

carrier


a or y

carrier


13/35

The PN Junction

When a p-type material is brought into contact with an n-type material, the interface changes and creates a built-

.


Diffusion of holes and electrons

The FREEelectrons

The FREEholes from the

from the n-type materialdiffuse to theright

Diffusion is

p-type materialdiffuse to theleft

Just like theway perfume


thermodynamic law ofMAXIMUMENTROPY

diffuses acrossa room overtime


14/35

Diffusion and Drift


As the carriers diffuse across the junction, they recombine with themajority carriers on the opposite side, this creates local charge sitesand a depletion region.

Diffusion Electrons Diffusion Holes

Diffusion and Drift


When the rate of Diffusion equals the rate of Drift a steady-statecondition is obtained and no more macroscopic changes occur.

Drift Holes Drift Electrons


15/35

The pn Junction Equations

=

dx

dnD

dx

dpDqAI pnDiffDiffusion current

)EnpqAInpDrift

+=

DriftDiff II =

Drift current

When the externalcurrent I = 0

This produces a


= 2ln iDA

Tbin

NN

VV

q

kTVwhere T =

-

The pn Junction Reverse Biase

When a reverse-bias voltage is appliedto junction, depletion-region widens toaccommodate the hi her reverse-bias.

As the majority carriers are depletedfrom the junction, the diffusion currentdecreases, and the drift current increasesuntil the junction voltage equals theapplied reverse-bias. This stops thecurrent.


Note: explanation

neglects

saturation current IS


16/35

The pn Junction Forward Bias

Forward-bias voltage injects majoritycarrier electrons into n-type, majoritycarrier holes into -t e materialDominant current is the diffusion current.

Diffusion of carriers across the junction,and the subsequent recombinationcompletes the circuit.

The process takes-off after 0.7V andcollapses the built-in voltage to almost


zero.

1/ = TnVvS eII

PN Junction Operational Summary

Reverse bias operation dominated by: drift current

minority carriers in majority type material(e.g. holes in n-type material)

magnitude of current flow limited by abilityto reduce diffusion effects and onset of breakdown

Forward bias operation dominated by:


us on curren e ec s majority carriers in majority type material

(e.g. holes in p-type material)

magnitude of current flow limited by how manycarriers one can shove into the device before it melts


17/35

PN Junction Physics Summary

Lattice structure of intrinsic silicon

Recombination

Doping: n-type and p-type silicon

Charge carrier motion: diffusion and drift

Open-circuit p-n junction: diffusion, drift,


eplet on reg on, u lt- n voltage

Reverse-bias, reverse-breakdown andforward bias operation of pn junction

Diode Symbol and Terminal

Characteristics

v

anode

(p)

cathode

(n)

i

v


Exponential model:

= 1TnV

S eIi


18/35

Characteristic Equation

Y = (e(x) - 1)


Exponential Model Definitions

= 1TnVv

S eIi

S: reverse sa ura oncurrent VT: Thermal Voltage

k: Boltzmann constant (1.38x10-23 J/K

proportional to cross-sectional areaof current flow

discrete Si devices:IS ~ 10

-9-10-13 A

IC Si devices: IS 10-15 A

q

TkV

T

=

from device physics:


n: fitting parameter T: Temperature (Kelvin) q: electron charge

(1.6x10-19 C) normally between 1 and 2 for Si

discrete Si devices: n ~ 2

IC Si devices: n ~ 1 At room temperature,VT ~ 25 mV


19/35

Forward Bias

1exp >>

TVnvAs V increases, When diode is fully

conducting, V remains~

The voltage at which thediode starts to conduct

.for silicon diodes

TnV

v

SeIi


appreciably is called the

cut-in voltage; value is ~.5V for silicon diodes

Ideal Diode



20/35


21/35

Example


Example



22/35

Logic Gates: OR and AND


i-v Characteristic



23/35

i-v Characterisitic


Forward Bias Region

v v

In the order of1015 (strong function of temperature)

= s e

kT

Temperature in KelvinBoltzmans constant


T = q

The magnitude of the charge of one electron

vT = 0.0862T,mV


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Temperature Dependence


Reverse Bias and Breakdown

i IsReverse Bias Region



25/35

Analysis (Exponential Model)

ID =IsevD vT

ID =vDD vD

R


Analysis (Exponential Model)

ID =IsevD vT

ID =vDD vD

R


IsevD vT =

vDD vDR

Nonlinear Equation


26/35

Graphical Analysis

ID =IsevD vT ID =

vDD vDR


Iterative Analysis

ID =IsevD vTvDD = 5V R = 1k

ID =vDD vD

RvT = 26mV Is = 6.9 10

16A

Assume vD = 0.7V vD = vT lnID

Is


ID =vDD vD

R= 4.3mA

vD = vT lnID

Is

= 0.766V

vD = 0.7V

ID = 4.3mA


27/35

Iterative Analysis

ID =vDD vD

R= 4.2mAvD = 0.766V

vD = vT lnID

Is

= 0.7656VID = 4.2mA


Constant Voltage Drop Model



28/35

Constant Voltage Drop Model

+5V

1k

+

0.7V

ii =

5 0.71k

= 4.3mA


Example



29/35

Small Signal Model

v

d= r

did

rd

=v

T

ID


Voltage Regulation



30/35

Zener Diode: Reverse Breakdown


= r

z

V

Z = VZ0 + rzIz

Model For Zener Diode



31/35

Zener Diode as Shunt Regulator


Half-Wave Rectifier



32/35

Full-wave Rectifier


Bridge Rectifier



33/35

Rectifier with Filter Capacitor


Rectifier with Filter Capacitor



34/35

Full wave rectifier with filter


Precision Rectifier (Super Diode)



35/35

DC power supply


chapter 2 and 3 opamp imperfections + intro to semiconductors

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