Chapter 0 – Week 2Chapter 0 – Week 2Combinational Logic Combinational Logic

DesignDesign

What have been discussedWhat have been discussed• Design hierarchy

– Top – down – Bottom – up

• CAD• HDL• Logic synthesis

Analysis ProcedureAnalysis Procedure• Analysis

– To determine the function of a circuit• Derive Boolean equation• Derive truth table

Analyze this logic diagramAnalyze this logic diagram

T1

T3

T2

T4

T5

Boolean EquationBoolean Equation• T1 =• T2 =• T3 =• T4 =• T5 =• F1 =• F2 =

Analyze this Binary AdderAnalyze this Binary AdderR1

R2R3

Truth TableTruth TableX Y Z C C R1 R2 R3 S

Logic SimulationLogic Simulation• A fast and accurate method of

analyzing a combinational circuit• Using simulator software• Results :

– Waveforms – A complete truth table– Part of a truth table

Logic SimulationLogic Simulation• How is the circuit described in the

software ?– Schematics– HDL

Schematic for Binary Adder Schematic for Binary Adder in Xilinxin Xilinx

Waveforms for Binary AdderWaveforms for Binary Adder

Point to ponder….Point to ponder….• Why do we compare the simulation

results vs the theoretical results?

Design ProcedureDesign ProcedureGiven : Specifications of the problem1. Determine input & output2. Derive truth table3. Obtain Boolean equation (K-map)4. Draw schematics5. Verify design

Design of BCD to Excess – 3 Design of BCD to Excess – 3 Code ConverterCode Converter

Specifications :• Input in decimal numbers, 0 – 9, in

binary form• Output is excess – 3 code

• E.g – Decimal = 5 (101)– Excess – 3 code = 5 + 3 = 8 (1000)

BCD BCD Excess – 3 Excess – 3 • Step 1.

– Input :

– Output :

BCD BCD Excess – 3 Excess – 3• Step 2 : Truth Table

BCD BCD Excess – 3 Excess – 3• Step 3 : Boolean equation

BCD BCD Excess – 3 Excess – 3• Step 4 : Schematic diagram

BCD BCD Excess – 3 Excess – 3• Step 5 : Verify that schematic

diagram agrees with truth table

Design of BCD to 7 –Design of BCD to 7 –segment decodersegment decoder

Specifications :• Input in decimal numbers, 0 – 9, in

binary form• 7 Outputs – to display input number

7 – segment Display7 – segment Display

BCD to 7 –segment decoderBCD to 7 –segment decoder• Step 1 :

BCD to 7 –segment decoderBCD to 7 –segment decoder• Step 2 : Truth Table

ExerciseExercise• A traffic light system has the following

specifications for a part of its controller. There are 3 parallel lanes, each with its own red / green light. One of these lanes, the priority lane, is given priority for a green light over the other 2 lanes. On the other hand, an alternating scheme is used for the other 2 lanes, which are left and right lane. Design the circuit that determines which light is to be green at a particular time. The specifications for the controller are as follows :

ExerciseExerciseInputs :

PS – Priority Lane Sensor ( car present = 1; car absent = 0 )LS – Left Lane Sensor ( car present = 1; car absent = 0 )RS – Right Lane Sensor ( car present = 1; car absent = 0 )AS – Alternating Signal ( select left = 1; select right = 0 )

Outputs :PL – Priority Lane Light ( green = 1; red = 0 )LL – Left Lane Light ( green = 1; red = 0 )RL – Right Lane Light ( green = 1; red = 0 )

ExerciseExercise1. If there is a car in the priority lane, PL = 1.

2. If there are no cars in the priority lane and the right lane, and there is a car in the left lane, LL = 1.

3. If there are no cars in the priority lane and in the left lane, and there is a car in the right lane, RL = 1.

4. If there is no car in the priority lane, there are cars in both the left and right lanes, and AS = 1, then LL = 1.

5. If there is no car in the priority lane, there are cars in both the left and right lanes, and AS = 0, then RL = 1.

6. If any PL, LL or RL is not specified to be 1 above, then it has value 0.

The EndThe End