ch9-3

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System design techniques

Private branch exchange (PBX).

Ink-jet printer.

PDAs.

Set-top boxes.

Systems-on-silicon.

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Digital telephone switches

High-end switches are highly reliable:

30 seconds downtime per year.

Companies, homes install private branchexchanges (PBXs):

intercom features;

management of long distance charges.

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Components

Telephone switching

systems

Establish telephone calls:

within switch, find other phone line;

outside switch, find route to other line.

Route voice samples between phones.

Measure call time for billing.

Provide maintenance access to switch.

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Overheads forComputers as

Components

Telephone terminology

Line: distinct telephone connection.

Line card: PBX/subscriber line interface.

Off-hook: active telephone.

On-hook: inactive telephone.

Trunk line: phone lines between switches.

POTS: plain old telephone service (analog,no fancy services).

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Components

Computer-controlled

telephone switching

Voice data rates:

8 bits sample (m or Alaw);

125 m s period (8kHz).

Telephones are I/O

devices.Computer bus is

switch.

CPU

memory

line

card

linecard

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Components

Dialing

Dual-tone multi-frequency (DTMF):tones define row,column of key.

Must be held for 0.1sec.

1 2 3

4 5 6

7 8 9

* 0 #

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Call states

On-hook

Rcv ringing

Call

Off-hookDial

toneDialing

Place

ringing

Receive call

Place call

Incoming

call

Take off-hook

Return on-hook

Take off-hook

Dial decoder ready

Number

complete

Other phone

off-hook

Line 1

Line 2

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Components

PBX model

Calls are parallel processes:

Call coordination, billing, etc.

Call 1 Call n...

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Components

Tigerswitch system

architecture

PC platform.

Switch calls over ISA bus.

Line cards are custom devices.

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DTMF sensing

Software process onCPU.

Uses lots of CPU time.

Analog filter bank online cards.

Expensive in volume.

DSP on separatecard.

Requires new design.

CPU

memory

line

card

line

card

DTMF card

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Switching

Process-per-call isbad implementation.

Context switch per callper 125 ms.

Unroll calls into oneloop.

Each loop iteration isone call for onesample.

for (i=0; i

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Components

HP DesignJet drafting

plotter

Plots up to 36 inches wide at 300 DPI.

Combines a variety of tasks:

host communication;

graphics language interpretation;

rasterization;

device control.

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Components

The plotting process

HP-GL/2 PostScript

rasterizer

raster memory

plottercontroller

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Components

Design considerations

Memory utilization is important.

36 inches X large X 300 DPI X n bits/pixel is

a lot of memory.Requires clever algorithms to minimize raster

memory requirements.

Requires real-time control.Requires concurrency: read new data,

rasterize, control print head.

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Components

HP DesignJet hardware

architecture

i960KAadrs

latch

busif

1 MB

ROM

2 MB

DRAM

proc.

support

ASIC

||

if

RS-

422

pen

ctrl

ASIC

swath

RAM

servo

proc.(8052)

EEPROM

DRAM

ctrlfront panel steppermotor

carriage

PC board

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Components

Early architectural

decisions

Chose Intel 80960KA as main processor.

Handled parsing, rasterization control, print

engine control.Multiplexed bus reduced pin count.

Could be upgraded to floating-point ifnecessary.

Used modular I/O to host system.

Did not use disk for local storage.

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Components

System components

2 MB RAM (SIMM sockets for more).

Three ASICs:

pen interface;

processor support;

carriage.

Servo processing performed by 8052microcontroller.

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Components

Rasterization

Plot is generated in swaths.

Separate swath memory.

Pixels are generated in row order by mainprocessor.

Pixels are fed to pens in column order.

Pen interface ASIC transforms row orderto column order.

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Components

Data flows

i960KAadrs

latch

busif

1 MB

ROM

2 MBDRAM

proc.

support

ASIC

||

if

RS-

422

penctrl

ASIC

swath

RAM

servo

proc.

(8052)

EEPROM

DRAM

ctrlfront panel steppermotor

carriage

PC board

parsing and rasterization

swath generation

drawing

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Components

Operations

Servo processor controls stepper motor.

Carriage processor must write, read pen

alignment marks.Processor support ASIC provides multiple

functions: interrupt and mailbox

communication.Motion controller decodes position of print

carriage and paper; watchdogs servo.

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Components

Pen interface ASIC

Interfaces to i960 bus, swath memory,carriage ASIC.

Pen interface reads pixels from swath inpredetermined pattern using pixel addressgenerator.

Must support bidirectional printing sincehead prints both ways.

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Components

Carriage ASIC

Interrfaces to processor bus, peninterface ASIC, servo controller.

Reads timing control registers using theCPU bus.

Delay registers add correction for pen

alignment.

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Components

Development process

Pixel shuffling algorithm for peninterface/carriage ASICs was prototyped

in C.Built emulators for ASICs to allow parallel

development of i960 software and

hardware.

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Components

Software development

environment

Plotter software could be run on Unixworkstation or target platform.

Differed in I/O and print engine subsystems.Print engine was emulated on host with X

window interface showing swath state.

Used in-house RTOS.HP-GL/2 parser was legacy code.

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Components

Software development

environment, contd.

Rewrote vector/raster converter fromassembly language to C to port to i960.

Used gdb960 as monitor debugger ontarget system, communicating with host.

Front panel developed on PC, tested by

user interface designers, marketing.Paper loading designed by mechanical

engineers.

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Components

Personal digital assistant

PDA: portable, specialized informationdevice.

Characteristics:low cost for consumer market;

physically small;

battery-powered;software-rich.

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Components

Apple Newton

First modern PDA.

Original used ARM 610; later version used

StrongARM.Support operations in Runt ASIC: DMA,

real-time clock, video interface, audio,

PCMCIA.Software written in NewtonScript

language.

N t h d

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Components

Newton hardware

architecture

ARM 610 ROM RAM

Runt

ASIC

LCD

speaker

serial I/F

A/D

tablet

PCMCIA

infrared

M t l E h d

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Components

Motorola Envoy hardware

architecture

PCMCIA 1 MB DRAM 4 MB flash

Astro

system

ASIC

68439

CPU

audio

modem

infrared

power supply

A/Dtouchscreen

Magicbus

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Components

Feature creep

Designers tend to add features to systemduring design.

Increases power consuption.Changes mechanical design.

Makes software design more complex.

Software thrashing can reduce batterylife.

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PDA power supply

System must be designed to gracefullyhandle low battery power.

Abrupt power loss can destroy lots of data inRAM.

Smart Battery System puts electronics in

battery to measure battery performance.

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Components

InfoPad

Brodersen et al: advanced networkedmultimedia information appliance.

System performed many functions onremote systems to increase battery life.

Made use of specialized hardware units to

reduce power consumption over softwareimplementation.

I f P d h d

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Components

InfoPad hardware

architecture

Wireless network

interface

Speechcodec

Video

decompressor

ARM 60

display

Keyboard/pointer

other I/O

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Components

Set-top boxes

Interface between cable/satellite and TV:

digital television;

user interface;may include back channel for purchases, etc.

Very cost-sensitive market.

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Components

Set-top box in system

set-top box

IR

digital TV input

back

channel

Phili fib t b b

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Components

Philips fiber-to-curb box

hardware

Network

interfaceMPEG

demux

MPEG

audio

MPEGvideo

NTSC

CD-I

graphicsPCMCIA

DRAM

I/Okbd

IR

card

NVRAM

DRAM

DRAM

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Components

Fiber-to-curb box software

default apps custom apps

OS-9 kernel I/O manager

device driversboot/monito

rsoftware

MPEG2

demuxaudio/video

interfaces

CD-I

graphics

network

interface

processor

hardware

layer

OS

layer

application

layer

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Components

Systems-on-silicon

Can build significant embedded systemson single chip:

one or more high-performance CPUs;I/O devices;

memory.

Advantages:higher performance and lower power;

lower cost.

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Components

Moores Law (Sematech)

108

109

2000 2012

PC on chip

billion-transistor

system-on-chip

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C t

Design challenges

Core-based design: cant take time todesign gates, lines of code.

Custom architectures:heterogeneous multiprocessors;

custom memory systems.

Verification:long turnaround time;

cant probe interior directly.

ch9-3

Documents