Carl Haber

Lawrence Berkeley National Laboratory

SVX: The CDF Silicon Vertex DetectorHardware Development for the First Precision Silicon Tracker at a Hadron Collider

History

•The original CDF proposal was dated 1981 (D. Ayres et al)•Already at that time the Pisa group, most notably Aldo Menzione, discussed the addition of silicon tracking (SVX) to the vertex region

•1984 Sherwood Parker, Terry Walker, and Bernard Hyams published a description of Microplex, the 1st NMOS ASIC designed to read silicon strips•Spring 1985 A workshop was held at Fermilab to discuss the SVX upgrade inthe context of these new developments, 1st schedule presented (Figure A), Godparent committee was formed including:

Willy Chinowsky, Brig Williams, Masa Mishina, Henry Frisch, Alan Clark•Technical and other challenges were perceived

•SVX strips were long (Figure B) Microplex S/N might be insufficient•Channel count (~50K) was high – what to do with cables?•Bad experience at UA1 with a wire chamber vertex detector•Could the device do any physics?•Could precision be achieved and maintained?

•The overall zeitgeist was negative for the SVX but this was partially offsetby the fact that most of the LEP detectors were installing silicon tracking But “….these were not at a hadron collider!!!...”•October 1985 A workshop was held in Berkeley – “New Solid State DevicesHigh Energy Physics” in conjunction with the IEEE NSS and a meeting onthe CDF SVX project.

•Stuart Kleinfelder discusses the application of CMOS to SVX, offeringa potential gain in S/N – a plan is made to develop a CMOS ASIC for CDF

•April 1986 Kleinfelder proposes a CMOS ASIC “the SVX chip” (Figure C) including:

•Improved S/N for long strips•Sparse readout – only hit channels would be read: reduced cable plant!•Neighbor logic – read neighbors of hit channels•Low power

•Summer 1986 First prototype SVX chip is on the test bench (Figure D)•1987 Bench + beam tests demonstrate good performance for SVX (Figure E)

•Prototype ladders are constructed using hybrids, SVX chips, Micron detectors•A custom DAQ system is designed and built (SRS+SDA)•Prototype Beryllium bulkheads are designed and prototyped•Assembly procedures are developed and tested

At this point the project properly organized and a proposal was written to FNAL

•1988 Proposal P-775 is written and approved by the PAC (Figure F)•1989 Fermilab assumes project management, Dan Amidei (later Paul Tipton) becomes leader with,

•Fabrizio Raffaelli – mechanical engineering•Slawek Tkacyk + P.I.G. – DAQ•Mike Hyrczk and John Skarha– mechanical construction•Carl Haber – front end electronics•Aldo Menzione – detectors

•1989 Production order for 17 4” wafers of SVX chips is placed with HewlettPackard in 3 micron rad-soft CMOS

•Radiation studies on the CDF beam pipe (Figure G)•1990 Second beam test (Figure H)•1990 Project is in production (Figure I)

•Detector testing•Wafer probing•Hybrid fabrication and assembly (Figure J)•Beryllium bulkheads and cooling pipes (Figure K)•DAQ modules•Ladder assembly and test•Cooling and monitoring system•HV and LV control•Radiation exposure monitoring and control

•1991 Barrel assembly and test begins and ends, Paul Tipton becomes project leader (Figure L,M), SVX* is organized, J.Incandela is project leader•December 1991 1st attempt to insert SVX into CDF (Figure N)•Winter 1992 SVX is installed into CDF and under test•May 12, 1992 1st collisions of Run1A – SVX works! (Figure O)•1992 – 1993 Major construction and test effort for SVX*•May 1993 SVX-Prime is installed and in operation as well!

Figure N: Nicola Bacchetta (New Mexico, now Padova) looks at his 1st baby.

D. Amidei: 1st SVX Project LeaderP. Azzi: testing and analysisN. Bacchetta: testing, DAQ, commissioning, opsMark W. Bailey: DAQB.A. Barnett: JHU leadFranco Bedeschi: simulation, algorithmsD. Bisello: Padova leadV. Bolognesi: testing C. Boswell: radiation, testing, mechanics G. Busetto: softwareJ.D. Cammerata: testingW.C. Carithers: LBNL co-leadH. Carter: mechanical engineering A.Castro: software, simulationH.Y. Chao: mechanicalG.Chiarelli: simulation, detector studiesC.N. Chiou: mechanicalS. Cihangir: Sidet, assemblyS. Dell'Agnello: software, displayP.F. Derwent: radiation monitoring, protectionR. DucarA. Dunn: testingR.Ely: testing, designE. Engels Pitt co-leadB. Flaugher: mechanics, installationA.Franceschi: testingA. Barbaro-Galtieri: LBNL co-leadA.F. Garfinkel: Purdue leadG. Gillespie: mechanicsD.Glenzinski: detector testsH. Gonzalez: assembly, hands-of-goldS. Gonzalez: assemblyC.Grimm: mechanical designM.Guerea: assemblyC. Haber: front end electronicsT. Hawke: wirebondingS. Holland: detector studiesM. Hrycyk: assembly WizardD. Herrup: accelerator, rad protectionR. Hughes: DAQJ. Incandela: SVX* project leaderE. Kajfasz: testingR. KlienS. Kleinfelder: SVX chip designM.Kruse: DAQM. Loreti: softwareB. Lundberg: SiDetF.Mando: testingM. Mariotti: testing, DAQ, cooling pipesJ.A.J. Matthews: New Mexico leadA. Menzione: original design and concept, detectorsT. Merrick: electronics testing C. Nelson: DAQ, digitizerA.Paccagnella: detector developmentL. Pescara: softwareN.Praticella: softwareN. Produit: testingG. Punzi: DAQ, R&D testing, software F. Raffaelli: lead mechanical engineerP. Ratzmann: mechanical engineeringL. Ristori: DAQO. Schneider: ladder testing, calibration, s/wF.G. Sciacca: testingL.ScottS. Segler: PIG leadM. Shapiro: alignmentN.M. Shaw: detector tests, calibration, s/wT. Shaw: DAQ designP.Shepard: Pitt co-leadP.Singh: radiation damage, detector testingJ. Skarha: mechanical assembly F.D. Snider: mechanicals, power supplies, cablesT.Y. Song: testingJ. Spalding: SiDetA. Spies: testing, cablesD. Stuart: testing, DAQ, commissioning, opsP. Tipton: 2nd SVX project leader, coolingS. Tkaczyk: DAQ leadF. Tartarelli: testingK. Tollefson: cooling, installationD.Tousignant: mechanical draftingJ. Tseng: testingN. Turini: DAQ, testing, commissioning K. Turner: DAQ SEQ design S. Vejcik III: assembly, radiationG. Watts: cooling, monitoring T.R. Wesson W.C. Wester III: IC testing, port card H. Wenzel: alignment, analysisC.H.Wang: mechanicsM.J.Wang: mechanics M. Wong: chip testingS.C.Wu: Tiawan leadW. Yao: HV tests, analysisR.Yareama: electrical engineeringJ.C. Yun: mechanical assemblyF. Zetti: assembly and tests, old-world craftsman

SVX+SVX* Author List

VendorsMicron Semiconductor: detectorsPromex: wirebonding, hybrids, assemblyHughes Interconnect: flex cablesLenthor Engineering: flex cablesHardric: Be machiningElectrofusion: Be beam pipeFerro EMD: thick film materialsHewlett Packard: CMOS fabricationStellar Industries: ceramics

SVX Legacy: LHC Trackers ATLAS+CMSSilicon technology is robust!

Luminosity x 105

Crossing frequency x 100Channel count x 100-1000Dose x 400CMOS feature size x 0.1

2 m

Basic concept of silicon tracker at the Tevatron

Figure B: Concept design for CDF Vertex DetectorFigure A: 1985 Schedule for SVX Construction

Figure C: 1986 first hand sketch of SVX Chip design

Figure D: 1st prototype SVX chip under test with silicon

Figure E: SVX chip under test with Micron detector

Figure F: Page 1 of SVX Proposal to Fermilab PAC

Figure G: Hand sketch and photo of radiation test on CDF beam pipe

Figure H: beam test demonstrates sparse readout

Figure I: production plan for electronics and ladder assembly

Figure J: Layer 4 hybrid with 768 wirebonds

Figure M: one of two completed SVX barrels

Figure O: Early Run1a event seen at CDF (after 4 days of running)

Figure L: Ladders are being loaded into barrels

Figure K: Beryllium bulkhead with cooling lines in place

Special credit to Alvin Tollestrup who was an early supporter and advocate ofthe SVX project