calculator lab exercises bruce wile, ibm design automation conference sunday, june 9, 2002
TRANSCRIPT
Calculator Lab Exercises
Bruce Wile, IBMDesign Automation
ConferenceSunday, June 9, 2002
Calc Resources Web site contains:
Design source (VHDL and Verilog*) Design Specifications Bug lists and bug disables
*Verilog has minimal usage and may contain other bugs
Calc Lab Overview Series of 3 lab exercises
Each grows in complexity and builds upon previous design
“Built-in” bugs give active verification experience
Labs were created by IBM for the purpose of verification education Used internal to IBM and at Universities Calc1 in 1994; Calc2 & Calc3 in 2000
Calc1 Function Calculator has 4 functions:
Add Subtract Shift left Shift right
Calculator can handle 4 requests in parallel All 4 requestors use separate input signals All requestors have equal priority
Calc1 I/O
c_clk
out_resp2<0:1>
req1_data_in<0:31>
req1_cmd_in<0:3>
out_data1<0:31>
req4_cmd_in<0:3>
req3_cmd_in<0:3>
req2_cmd_in<0:3>
req4_data_in<0:31>
req3_data_in<0:31>
req2_data_in<0:31>
reset<0:7>
out_data4<0:31>
out_data3<0:31>
out_data2<0:31>
out_resp4<0:1>
out_resp3<0:1>
out_resp1<0:1>
calc_top (Design
Under Test)
Calc1 Port Timing
req1_data_in<0:31>
req1_cmd_in<0:3>
out_data1<0:31>
out_resp1<0:1>
Calc1 Sample Bugs Protected information…Professors
should see LABS section.
Calc2 Function Same commands as Calc1 Each port can now have up to 4
outstanding commands in the system Up to 16 total commands Out-of-order response may occur
Depends on backlog in adder and shifter Requires 2 bit “tag” identifier for each
port
Calc2 Port Timings
req1_cmd_in
req1_data_in
req1_tag_in
req_resp1req_data1req_tag1
Calc2 Sample Bugs Protected information…Professors
should see LABS section.
Calc3 Function Design now has 16 internal data registers
Arithmetic operands no longer sent by requestor Operand data is read internally from registers
Two new commands added to access registers Fetch from register x; Store to register x
Two new branch commands Successful branch causes next command from port to
be skipped Each requester can still send in up to 4 commands
2 bit tag on request Using same tag simultaneously is not supported
Calc3 Function (Pg 2) Each port requestor is sending an
instruction stream Data doesn’t accompany command anymore Example: Commands from Port 1:
ADD R1, R2 R3
SHL R3, R4 R5 All ordering rules are in the spec.
Calc 3Overall Block Diagram
Holdreg1Port1 Inputs
Priority
Holdreg2Port2 Inputs
Holdreg3Port3 Inputs
Holdreg4Port4 Inputs
scan_in
Adder inputstage
Registers
Shift input stage
Adder outputstage
Shift outputstage
reseta_clkb_clkc_clk
Adder
Shifter
Global Inputs
Mu
x_
ou
t1
Mu
x_
ou
t2
Mu
x_
ou
t3
Mu
x_
ou
t4
scan_out
reqX_cmdreqX_datareqX_tagreqX_d1reqX_d2reqX_r1
PortX Inputs
outX_respoutX_dataoutX_tag
PortX Outputs
Calc3 Overall Block Diagram
Calc3 Sample Bugs Protected information…Professors
should see LABS section.
Lab Exercise Notes Use specifications strategically
Give students enough of the spec to get started…but not necessarily the whole spec
Require a testplan for calc2 and 3 Testplans evoke spec clarifications
New lab exercises encouraged!