buk9575_9675-100a

Philips Semiconductors Product specification

TrenchMOS transistor BUK9575-100A Logic level FET BUK9675-100A

GENERAL DESCRIPTION QUICK REFERENCE DATAN-channel enhancement mode logic SYMBOL PARAMETER MAX. UNITlevel field-effect power transistor in aplastic envelope available in VDS Drain-source voltage 100 VTO220AB and SOT404 . Using ID Drain current (DC) 23 Atrench technology which features Ptot Total power dissipation 99 Wvery low on-state resistance. It is Tj Junction temperature 175 Cintended for use in automotive and RDS(ON) Drain-source on-stategeneral purpose switching resistance VGS = 5 V 75 mapplications. VGS = 10 V 55 m

PINNING

TO220AB & SOT404 PIN CONFIGURATION SYMBOLPIN DESCRIPTION

1 gate

2 drain

3 source

tab/mb drain

LIMITING VALUESLimiting values in accordance with the Absolute Maximum System (IEC 134)SYMBOL PARAMETER CONDITIONS MIN. MAX. UNITVDS Drain-source voltage - - 100 VVDGR Drain-gate voltage RGS = 20 k - 100 VVGS Gate-source voltage - - 15 VID Drain current (DC) Tmb = 25 C - 23 AID Drain current (DC) Tmb = 100 C - 16 AIDM Drain current (pulse peak value) Tmb = 25 C - 91 APtot Total power dissipation Tmb = 25 C - 98 WTstg, Tj Storage & operating temperature - - 55 175 C

THERMAL RESISTANCESSYMBOL PARAMETER CONDITIONS TYP. MAX. UNITRth j-mb Thermal resistance junction to - - 1.5 K/W

mounting baseRth j-a Thermal resistance junction to in free air 60 - K/W

ambient(TO220AB)Rth j-a Thermal resistance junction to Minimum footprint, FR4 50 - K/W

ambient(SOT404) board

1 2 3

tab

1 3

mb

2

SOT404 TO220ABBUK9675-100A BUK9575-100A

d

g

s

October 2000 1 Rev 1.200



STATIC CHARACTERISTICSTj= 25C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITV(BR)DSS Drain-source breakdown VGS = 0 V; ID = 0.25 mA; 100 - - V

voltage Tj = -55C 89 - - VVGS(TO) Gate threshold voltage VDS = VGS; ID = 1 mA 1 1.5 2.0 V

Tj = 175C 0.5 - - VTj = -55C - - 2.3 V

IDSS Zero gate voltage drain current VDS = 100 V; VGS = 0 V; - 0.05 10 A Tj = 175C - - 500 A

IGSS Gate source leakage current VGS = 10 V; VDS = 0 V - 2 100 nARDS(ON) Drain-source on-state VGS = 5 V; ID = 10 A - 60 75 m

resistance Tj = 175C - - 188 mVGS = 10 V; ID = 10 A - 55 72 mVGS = 4.5 V; ID = 10 A - 61 84 m

DYNAMIC CHARACTERISTICSTmb = 25C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITCiss Input capacitance VGS = 0 V; VDS = 25 V; f = 1 MHz - 1278 1704 pFCoss Output capacitance - 129 155 pFCrss Feedback capacitance - 88 120 pFtd on Turn-on delay time VDD = 30 V; Rload =1.2; - 13 20 nstr Turn-on rise time VGS = 5 V; RG = 10 - 120 168 nstd off Turn-off delay time - 58 87 nstf Turn-off fall time - 57 86 nsLd Internal drain inductance Measured from drain lead 6 mm - 4.5 - nH

from package to centre of dieLd Internal drain inductance Measured from contact screw on - 3.5 - nH

tab to centre of die(TO220AB)Ld Internal drain inductance Measured from upper edge of drain - 2.5 - nH

tab to centre of die(SOT404)Ls Internal source inductance Measured from source lead to - 7.5 - nH

source bond pad

REVERSE DIODE LIMITING VALUES AND CHARACTERISTICSTj = 25C unless otherwise specified

SYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITIDR Continuous reverse drain - - 23 A

currentIDRM Pulsed reverse drain current - - 92 AVSD Diode forward voltage IF = 10 A; VGS = 0 V - 0.85 1.2 V

IF = 23 A; VGS = 0 V - 1.1 - Vtrr Reverse recovery time IF = 23 A; -dIF/dt = 100 A/s; - 63 - nsQrr Reverse recovery charge VGS = -10 V; VR = 30 V - 0.22 - C




AVALANCHE LIMITING VALUESYMBOL PARAMETER CONDITIONS MIN. TYP. MAX. UNITWDSS1 Drain-source non-repetitive ID = 14.2 A; VDD 25 V; - - 100 mJ

unclamped inductive turn-off VGS = 5 V; RGS = 50 ; Tmb = 25 Cenergy

Fig.1. Normalised power dissipation.PD% = 100PD/PD 25 C = f(Tmb)

Fig.2. Normalised continuous drain current.ID% = 100ID/ID 25 C = f(Tmb); conditions: VGS 5 V

Fig.3. Safe operating area. Tmb = 25 CID & IDM = f(VDS); IDM single pulse; parameter tp

Fig.4. Transient thermal impedance.Zth j-mb = f(t); parameter D = tp/T

0 20 40 60 80 100 120 140 160 180Tmb / C

PD% Normalised Power Derating120 110 100 90 80 70 60 50 40 30 20 10 0

1 10 100 10001

10

100

RDS(ON)=VDS/ID

DC

tp =1us

10us

100us

1ms

10ms

ID/A

VDS/V

0 20 40 60 80 100 120 140 160 180Tmb / C

ID% Normalised Current Derating120 110 100

90 80 70 60 50 40 30 20 10 0

0.01

0.1

1

10

1E-07 1E-05 1E-03 1E-01 1E+01

t/s

Zth/(K/W)

0

0.020.050.10.20.5

1 For maximum permissible repetitive avalanche current see fig.18.




Fig.5. Typical output characteristics, Tj = 25 C.ID = f(VDS); parameter VGS

Fig.6. Typical on-state resistance, Tj = 25 C.RDS(ON) = f(VGS); conditions: ID = 25 A;



Fig.9. Typical transfer characteristics.ID = f(VGS) ; conditions: VDS = 25 V; parameter Tj

Fig.10. Typical transconductance, Tj = 25 C.gfs = f(ID); conditions: VDS = 25 V

0

10

20

30

40

50

60

0 2 4 6 8 10VDS/V

ID/A

2.8

3.0

5.010.0

VGS/V =

3.2

2.2

3.63.8

2.4

2.6

4.0

3.4

50

55

60

65

70

75

3 4 5 6 7 8 9 10VGS/V

RD

S(ON

) Ohm

405060708090

100110120130140

10 15 20 25 30 35 40ID/A

RD

S(ON

)/mOh

m 4.2

4.64.8

4.0

4.4

5.0

0

5

10

15

20

25

0.0 1.0 2.0 3.0 4.0VGS/V

ID/A

Tj/C= 175 25

50

55

60

65

70

75

3 4 5 6 7 8 9 10VGS/V

RD

S(ON

) Ohm

0

10

20

30

40

0 10 20 30 40 50 60ID/A

gfs/S




Fig.11. Normalised drain-source on-state resistance.a = RDS(ON)/RDS(ON)25 C = f(Tj); ID = 25 A; VGS = 5 V

Fig.12. Gate threshold voltage.VGS(TO) = f(Tj); conditions: ID = 1 mA; VDS = VGS

Fig.13. Sub-threshold drain current.ID = f(VGS); conditions: Tj = 25 C; VDS = VGS

Fig.14. Typical capacitances, Ciss, Coss, Crss.C = f(VDS); conditions: VGS = 0 V; f = 1 MHz

Fig.15. Typical turn-on gate-charge characteristics.VGS = f(QG); conditions: ID = 25 A; parameter VDS

Fig.16. Typical reverse diode current.IF = f(VSDS); conditions: VGS = 0 V; parameter Tj

0.5

1

1.5

2

2.5

3

-100 -50 0 50 100 150 200Tmb / degC

a Rds(on) normalised to 25degC

0.0

0.5

1.0

1.5

2.0

2.5

3.0

0.01 0.1 1 10 100VDS/V

Capa

cita

nc

e / n

F

Ciss

CossCrss

-100 -50 0 50 100 150 2000

0.5

1

1.5

2

2.5

Tj / C

VGS(TO) / V

max.

typ.

min.

0

1

2

3

4

5

0 5 10 15 20 25QG / nC

VGS / V

VDS = 14VVDS = 44V

0 0.5 1 1.5 2 2.5 31E-05

1E-05

1E-04

1E-03

1E-02

1E-01Sub-Threshold Conduction

2% typ 98%

0

10

20

30

40

0.0 0.2 0.4 0.6 0.8 1.0 1.2 1.4VSDS/V

IF/A

25Tj/C= 150




Fig.17. Normalised avalanche energy rating.WDSS% = f(Tmb); conditions: ID = 75 A

Fig.18. Avalanche energy test circuit.

Fig.19. Maximum permissible repetitive avalanchecurrent(IAV) versus avalanche time(tAV) for unclamped

inductive loads.

Fig.20. Switching test circuit.

20 40 60 80 100 120 140 160 180Tmb / C

120 110 100 90 80 70 60 50 40 30 20 10 0

WDSS%

1

10

100

0.001 0.01 0.1 1 10Avalanche Time, tAV (ms)

IAV

Tj prior to avanche 150C

25C

1

10

100


IAV

Tj prior to avanche 150C

25C

1

10

100


IAV

Tj prior to avalanche 150C

25C

L

T.U.T.

VDD

RGS R 01

VDS

-ID/100

+

-

shunt

VGS

0

RD

T.U.T.

VDD

RG

VDS

+

-

VGS

0

WDSS = 0.5 LID2 BVDSS/(BVDSS VDD)




MECHANICAL DATA

Dimensions in mm

Net Mass: 2 g

Fig.21. SOT78 (TO220AB); pin 2 connected to mounting base.Notes1. Observe the general handling precautions for electrostatic-discharge sensitive devices (ESDs) to prevent

damage to MOS gate oxide.2. Refer to mounting instructions for SOT78 (TO220) envelopes.3. Epoxy meets UL94 V0 at 1/8".

10,3max

3,7

2,8

3,03,0 maxnot tinned

1,3max(2x)

1 2 3

2,40,6

4,5max

5,9min

15,8max

1,3

2,54 2,54

0,9 max (3x)

13,5min




MECHANICAL DATA

Fig.22. SOT404 surface mounting package. Centre pin connected to mounting base.

Notes1. This product is supplied in anti-static packaging. The gate-source input must be protected against static

discharge during transport or handling.2. Refer to SMD Footprint Design and Soldering Guidelines, Data Handbook SC18.3. Epoxy meets UL94 V0 at 1/8".

UNIT A

REFERENCESOUTLINEVERSION

EUROPEANPROJECTION ISSUE DATE

IEC JEDEC EIAJ

mm

A1 D1D

max.E e Lp HD Qc

2.54 2.602.20

15.4014.80

2.902.1011

1.601.20

10.309.70

4.504.10

1.401.27

0.850.60

0.640.46

b

DIMENSIONS (mm are the original dimensions)

SOT404

0 2.5 5 mm

scale

Plastic single-ended surface mounted package (Philips version of D2-PAK); 3 leads(one lead cropped) SOT404

e e

E

b

D1

HD

D

Q

Lp

c

A1

A

1 3

2

mountingbase

98-12-1499-06-25




MOUNTING INSTRUCTIONS

Dimensions in mm

Fig.23. SOT404 : soldering pattern for surface mounting.

DEFINITIONSData sheet statusObjective specification This data sheet contains target or goal specifications for product development.Preliminary specification This data sheet contains preliminary data; supplementary data may be published later.Product specification This data sheet contains final product specifications.Limiting valuesLimiting values are given in accordance with the Absolute Maximum Rating System (IEC 134). Stress above oneor more of the limiting values may cause permanent damage to the device. These are stress ratings only andoperation of the device at these or at any other conditions above those given in the Characteristics sections ofthis specification is not implied. Exposure to limiting values for extended periods may affect device reliability.Application informationWhere application information is given, it is advisory and does not form part of the specification. Philips Electronics N.V. 2000All rights are reserved. Reproduction in whole or in part is prohibited without the prior written consent of thecopyright owner.The information presented in this document does not form part of any quotation or contract, it is believed to beaccurate and reliable and may be changed without notice. No liability will be accepted by the publisher for anyconsequence of its use. Publication thereof does not convey nor imply any license under patent or otherindustrial or intellectual property rights.

LIFE SUPPORT APPLICATIONSThese products are not designed for use in life support appliances, devices or systems where malfunction of theseproducts can be reasonably expected to result in personal injury. Philips customers using or selling these productsfor use in such applications do so at their own risk and agree to fully indemnify Philips for any damages resultingfrom such improper use or sale.

17.5

11.5

9.0

5.08

3.8

2.0


GENERAL DESCRIPTIONPINNINGQUICK REFERENCE DATAPIN CONFIGURATIONSYMBOLLIMITING VALUESTHERMAL RESISTANCESSTATIC CHARACTERISTICSDYNAMIC CHARACTERISTICSREVERSE DIODE LIMITING VALUES AND CHARACTERISTICSAVALANCHE LIMITING VALUEMECHANICAL DATASOT78SOT404

MOUNTING INSTRUCTIONSDEFINITIONSLIFE SUPPORT APPLICATIONS

buk9575_9675-100a

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