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Department of Electrical and Computer Engineering © Vishal Saxena -1- Dr. Vishal Saxena Electrical and Computer Engineering Department Boise State University, Boise, ID Behavioral Modeling using Verilog-A

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Page 1: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

Department of Electrical and Computer Engineering

© Vishal Saxena -1-

Dr. Vishal Saxena

Electrical and Computer Engineering Department Boise State University, Boise, ID

Behavioral Modeling using Verilog-A

Page 2: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -2-

Verilog-A

VerilogA is the standard behavioral modeling language in Cadence Spectre environment

Allows to simulate complex systems without transistor-level implementation

Some of the functionality is similar to Matlab Simulink but more circuit oriented

Can interchange VerilogA, Transistor-level and parasitic extracted circuit views for system-level simulation using the Hierarchy editor Powerful method for complex design verification

Language construct is similar to digital Verilog RTL, but not quite the same Easy to pick up, but mastery comes with experience

Can be used to model novel devices not covered by bsim

Page 3: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -3-

Verilog-AMS

Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation functionality

Works with the ams simulator instead of spectre

Need to clearly define interfaces between analog and digital circuits

bmslib and ahdlLib libs have verilogams views along with veriloga

Don’t worry about it for now….

Page 4: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -4-

Using Behavioral Cells

bmslib → dff_sr cell for a DFF with reset

Page 5: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -5-

Setting cell parameters

Select: CDF parameter of View → veriloga Connect the Set pin to GND to disable it, Reset is asserted when high.

Page 6: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -6-

Setting cell parameters

Set desired model parameters such as voltages and delays

Preferably use variables controlled from the ADE-L window (e.g. tpcq here)

Page 7: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -7-

Logic Cells

Make a local copy of the bmslib → and2 cell

Delete the cmos_sch view as it interferes with the simulation

Could also use cells from the ahdlLib library

Page 8: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -8-

Convergence Hints

Since verilog-A models are idealized models they can cause convergence problems

In a transient sim use the skipdc option if DC operating point convergence is not achieved by the simulator

Page 9: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -9-

Convergence Hints contd.

Use initial conditions to help with convergence ADE L → Simulation → Convergence Aids → Initial Condition

Can relax tolerances in the simulator options ADE L → Simulation → Options → Analog

Use common-sense when using idealized elements and models… Turn on Spectre debug mode to help fix the problem

Look into the convergence related help in the Spectre references (listed later)

Page 10: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -10-

Dff Code Synopsis

Define ports

Define model parameters

These show up in the symbol view

Define internal

variables

Page 11: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -11-

Dff Code Synopsis contd.

M

ain

an

alo

g b

lock d

efin

ing

the m

odel fu

nctio

nality

Initial step

Behavior

definitions

Output transitions

Page 12: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -12-

How to get started using Verilog-A modeling

Start with the available behavioral blocks with Spectre

Don’t create a fresh model from scratch unless you really need it Modify the existing ones

Don’t get bogged down with the code complexity of these professionally coded models Your custom behavioral codes can be really simple

Once you start using verilogA, it will get easier…..

Great skill to have for an analog designer!

All circuit design these days is at system level

Page 13: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -13-

References and Online Resources

Spectre reference libraries with behavioral cells bmslib and ahdlLib

Must read: Cadence Whitepaper, ”Creating Analog Behavioral Models” http://lumerink.com/courses/ECE614/Handouts/CDN_Creating_Analog_Behavioral_

Models.pdf

Designers Guide Community Site http://www.designers-guide.org/

Books The Designer's Guide to Verilog-AMS by Kenneth S. Kundert & Olaf Zinke, 2004.

The Designer's Guide to SPICE and Spectre by Kenneth S. Kundert, 1995.

AMS CAD Wiki

http://lumerink.com/cadwiki/doku.php

http://lumerink.com/courses/ECE614/Handouts/CDN_Creating_Analog_Behavioral_Models.pdf
http://lumerink.com/courses/ECE614/Handouts/CDN_Creating_Analog_Behavioral_Models.pdf
http://www.designers-guide.org/
http://www.designers-guide.org/
http://www.designers-guide.org/
http://www.designers-guide.org/Books/
http://www.designers-guide.org/Books/
http://www.designers-guide.org/Books/
http://www.designers-guide.org/Books/
http://lumerink.com/cadwiki/doku.php
Page 14: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -14-

Happy Circuit Modeling with VerilogA!

Page 15: Behavioral Modeling using Verilog-A - AMPIC Lablumerink.com/courses/ece504/Handouts/VerilogA Modeling.pdf · Verilog-AMS is an extension of Verilog-A to include digital Verilog co-simulation

© Vishal Saxena -15-

References

1. Ken Kundert, “The Designer’s Guide to Spice & Spectre,” Boston, Kluwer, 1995.

2. Ken Kundert, “The Designer's Guide to Verilog-AMS, 2004.

3. Cadence Whitepaper : Creating Analog Behavioral Models

4. Designers Guide Community. [Online] http://www.designers-guide.org/

5. Virtuoso Spectre DesignerReference [Online]

6. http://lumerink.com\courses\ECE614\Handouts\Spectre Designer Reference.pdf

7. Virtuoso Spectre Circuit Simulator RF Analysis User Guide [Online]

8. http://www.seas.gwu.edu/~vlsi/ece218/SPRING/reference/manual_cadence_spectreRF.pdf

9. Information on linking Matlab and Spectre in Linux environment. [Online]

http://www.lumerink.com/courses/ECE697A/docs/Cadence+Spectre+Matlab+Toolbox.pdf

1. Verilog-AMS Language Reference Manual. [Online] http://www.eda.org/verilog-ams/htmlpages/lit.html

http://lumerink.com/courses/ECE614/Handouts/CDN_Creating_Analog_Behavioral_Models.pdf
http://www.designers-guide.org/
http://www.designers-guide.org/
http://www.designers-guide.org/
http://lumerink.com/courses/ECE614/Handouts/Spectre Designer Reference.pdf
http://lumerink.com/courses/ECE614/Handouts/Spectre Designer Reference.pdf
http://lumerink.com/courses/ECE614/Handouts/Spectre Designer Reference.pdf
http://lumerink.com/courses/ECE614/Handouts/Spectre Designer Reference.pdf
http://lumerink.com/courses/ECE614/Handouts/Spectre Designer Reference.pdf
http://lumerink.com/courses/ECE614/Handouts/Spectre Designer Reference.pdf
http://lumerink.com/courses/ECE614/Handouts/Spectre Designer Reference.pdf
http://lumerink.com/courses/ECE614/Handouts/Spectre Designer Reference.pdf
http://lumerink.com/courses/ECE614/Handouts/Spectre Designer Reference.pdf
http://www.seas.gwu.edu/~vlsi/ece218/SPRING/reference/manual_cadence_spectreRF.pdf
http://www.lumerink.com/courses/ECE697A/docs/Cadence+Spectre+Matlab+Toolbox.pdf
http://www.eda.org/verilog-ams/htmlpages/lit.html
http://www.eda.org/verilog-ams/htmlpages/lit.html
http://www.eda.org/verilog-ams/htmlpages/lit.html

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