The 10th

IEEE International Conference on ASIC

www.asicon.org

ASICON 2013

FINAL PROGRAM

Oct. 28-31, 2013

Best Western Shenzhen Felicity Hotel,

Shenzhen, China

The 10th

International Conference on ASIC

ASICON2013

Oct.28-31, 2013 Best Western Shenzhen Felicity Hotel,

Shenzhen, China

Sponsored by

IEEE Beijing Section

Fudan University

Supported by

Shenzhen Graduate School of Peking University

Shenzhen University

IEEE SSCS Shanghai Chapter

National NSF of China

Chinese Institute of Electronics (CIE)

IET Beijing Branch

Organized by

Fudan University

1

Contents

Welcome to ASICON 2013 ............................................................................. 2

Conference Committee .................................................................................................. 3

General Information ....................................................................................................... 9

Conference Language ............................................................................................. 9

Conference Schedule .............................................................................................. 9

Conference Site ....................................................................................................... 9

Conference Registration........................................................................................ 10

Registration Desk .................................................................................................. 11

Transportation ....................................................................................................... 11

Weather ................................................................................................................. 11

Visa ....................................................................................................................... 11

Awards .................................................................................................................. 12

Paper Presentation Information .....................................................................12

Oral Presentation ................................................................................................... 12

Poster Presentation ................................................................................................ 12

Coffee Break ......................................................................................................... 13

Meeting Room Location ....................................................................................... 13

Tutorial Session .............................................................................................14

Technical Session ..........................................................................................15

Tuesday ................................................................................................................. 16

Wednesday ............................................................................................................ 27

Thursday ............................................................................................................... 43

Paper Submission Number v.s. Session Presentation Number ............................. 50

Authors of Paper v.s. Session Presentation Number ............................................. 53

ASICON 2013 Technical Program Overview ..................................................63

Location of Conference Hotel ........................................................................65

Tour Information ............................................................................................66

2

Welcome to ASICON 2013

On behalf of the Organizers of the Conference, it is my great pleasure and honor to

express our warm welcome to all ASICON 2013 attendees. Thank you very much for

your great support to come to Shenzhen.

ASICON 2013is the 10 th

event of this conference series since 1994.

TheConferencewill be held from October 28 to 31, 2013 at Best WesternShenzhen

Felicity Hotel,Shenzhen, China.

The conference is intended to provide an international forum for VLSI circuit

designers, ASIC users, System Integrators, IC manufacturers and CAD/CAE tool

developers to present their updated progresses, developments and research results in

their respective fields. The Conference is also intended to afford a platform for

attendees to exchange academic and technical information. Now the meaning of ASIC

has been extended to Advanced Semiconductor Integrated Circuits. That is to say it

covers all the main fields about Integrated Circuits.

According to the consuetude of international conference, ASICON 2013invites some

famous experts to give tutorials on the first day of the conference. In addition, we are

very pleased to have invited 5 worldwide famous professors and enterprisers to give

brilliant Keynote speeches on the plenary sessions from Oct.29-30.

The conference has traditionally a strong impact on both industries and academia. We

do hope the peculiar tradition can be strengthened and carried forward through this

conference.

This is the fourth time for ASICON to be held other than Beijing and Shanghai.

Shenzhen is a very beautiful city. We sincerely hope all of you will have a good time

in Shenzhen.

General Chair of ASICON 2013

Ting-Ao Tang

2013.10

3

Conference Committee

Gerneral Co-Chairs

Name Affiliation Country/Area

Ting-Ao Tang Fudan University China

Rakesh Kumar TCX , Inc. Technology Connexions USA

Satoshi Goto Waseda University Japan

Richard.M.M.Chen City University of Hong Kong Hong Kong

Advisory Committee Co-Chairs

Yangyuan Wang Peking University China

Omar Wing Columbia University USA

Ernest Kuh UC Berkeley USA

Qianling Zhang Fudan University China

Joshua Wong HK Polytechnic Univ Hong Kong

Organizing Committee Co-Chairs

Mengqi Zhou Chinese Institute of Electronics China

Huihua Yu Fudan University China

Xingdong Jia

Wenmin Wang

Shenzhen Economic,Trade and Information

Commission

Shenzhen Graduate School, Peking

University

China

China

Technical Program Committee

Co-Chairs

Xiaoyang Zeng Fudan University China

Linming Jin Brocade Communications Systems USA

Hidetoshi

Onodera Kyoto University Japan

4

C. K. Cheng UCSD USA

Cheng-Wen Wu ITRI Taiwan

Yuesheng Zhu Shenzhen Graduate School, Peking

University China

Gary Zhang Guangdong University of Technology China

Secretary-General

Yibo Fan Fudan University China

Members

Junning Chen Anhui University China

Huazhong Yang Tsinghua University China

Shuming Chen National University of Defence

Technology China

Lingli Wang Fudan University China

Guican Chen Xi’an Jiao Tong University China

Nanjian Wu Institute of Semiconductor,CAS China

Zhongyuan Chang IDT Shanghai China

Jianjun Zhou Shanghai Jiao Tong University China

Bo Zhang University of Electronic Science and

Technology of China China

Feng Ran Shanghai University China

Jinian Bian Tsinghua University China

Tianling Ren Tsinghua University China

Yinyin Lin Fudan University China

Jingfeng Kang PekingUniversity China

Xuan Zeng Fudan University China

Xing Zhang PekingUniversity China

Yiping Huang Fudan University China

Xinxin Li Shanghai Institute of Microsystem

And Information Technology China

Yongping Xu National University of Singapore Singapore

5

Chaosheng Cai Chinese University of Hong Kong China

Yue Hao Xidian University, China China

Honghua Yang Intel USA

Ahmed Jerraya France

HaiZhou Northwestern University USA

John Long Delft Netherlands

Dian zhou TEXAS A&M University USA

Sheldon X.D.Tan University of California, Riverside USA

Pengjun Wang Lingbo University China

Anyu Wu Taiwan University Taiwan

Jinguang Jiang Wuhan University China

Cheng-wen Wu Industrial Technology Research

Institute of Taiwan Taiwan

Hai Tuong Pham RENESAS

Weiren Chen Taiwan

Simon S. Ang Unviersity of ARKANSAS Britain

Keli Wu Chinese University of Hong Kong Hong Kong

Lin Jiang Xi'an Institute of Posts &

Telecommunications China

Ru Huang PekingUniversity China

Xiaoqing Wen Kyushu Institute of Technology Japan

Rongten Wang Shanghai LingTeng information

technology co., LTD China

Makoto Ikeda University of Tokyo Japan

Liangji Chen National Taiwan University Taiwan

Robert K.F. Teng California State University, Long

Beach USA

Kiyoung Choi Seoul National University Korea

Jianhua Feng PekingUniversity China

Kees Beenakker TU Delft Netherlands

6

Weiping Shi TEXAS A&M University USA

Zhigang Mao Shanghai Jiao Tong University China

Shijie Zhou National Chiao Tung University Taiwan

Gang Wei South China University of

Technology China

Gaofeng Wang Wuhan University China

Wei Zheng Zhejiang University China

Tadahiro Kuroda KEIO University Japan

Ting Zhou Chipnuts Technology China

Shibao Zheng Shanghai Jiao Tong University China

Tudor A.Murgan Technische university

DARAMSTADT Darmstadt

Zhongfeng Wang Oregon State University USA

Gerald E. Sobelman University of MINNESOTA USA

Yuhua Cheng Shanghai Microelectronics Research

Institute of Peking University China

Hongzhou Tan Sun Yat-Sen University China

Kazutoshi Kobayashi Kyoto Universtiy Japan

Masaharu Imai Osaka University Japan

Takeshi Ikenaga WASEDA Universtiy Japan

Lim Yong Ching Nanyang Technological University Singapore

Dajiang Zhou WASEDA Universtiy Japan

Youhua Shi WASEDA Universtiy Japan

Shikun Li National University of Defence

Technology China

Zhihua Wang TsinghuaUniversity China

Zhongming Shi Shanghai Sicomm RF Technology,

Inc. China

Dazhong Zhu Zhejiang University China

Ping Li University of Electronic Science and

Technology of China China

Qingan Huang Southeast University China

7

Zhiping Yu Tsinghua University China

Xianlong Hong Tsinghua University China

Yiqi Zhuang Xidian University China

Longxing Shi Southeast University China

Xiaowei Li Institute of Computing Technology,

CAS China

Runde Zhou Tsinghua University China

Yong Lian National University of Singapore Singapore

C.-J. Richard Shi University of Washington USA

CHOY Chiu-sing CUHK Hongkong

Wenjun Zhang China

YangnXu China

Youn-Long Lin National Tsing Hua University Taiwan

Xiaojing Hong Teradyne China

Axel Jantsch KTH Sweden

Mingfu Li Fudan University China

Xiaofang Zhou Fudan University China

LirongZheng Fudan University Sweden

Linming Jin Brocade USA

Junyan Ren Fudan University China

Xiaoyang Zeng Fudan University China

Bin-Da Liu National Cheng Kung University Taiwan

Zhiping Lin Nanyang Technological University Singapore

Donghui Wang Institute of Acoustics, CAS China

Sheng Liu HuazhongUniversity of Science &

Technology China

Dunshan Yu Peking University China

Jun Xu Tsinghua University China

Chorng-Kuang Wang National Taiwan University Taiwan

Sun Lingling Hangzhou Institute of Electronics

Engineeing China

8

Jun Zhu Tsinghua University China

Xia Xiao Tianjin University China

Zhenan Tang Dalian University of Technology China

XueRen Zheng The South China University of

Technology China

Yao-Wen Chang National Taiwan University Taiwan

Edward S. Yang The University of Hong Kong Hong Kong

Jun Li CCID China

Roberto Bez Micron USA

Yang Li Skyworks USA

Xingang Wang Skyworks USA

Jun Yuan IBM USA

Donald Lie Texas Tech Univesity USA

Benhard E. Boser University of California, Berkeley USA

Weifeng Sun Southeast University China

Po-Ying Chen I-Shou University Taiwan

Wen-Kuan Yeh National nUniversity of Kaohsiung Taiwan

Jye-Tsong Lin National Sun Yat Sen University Taiwan

Tan Cher Ming Nanyang Technological University Singapore

Peixiong Shi National Center for Micro and

Nanofabrication Denmark

Chailie Chornglii Hwang Being Advanced Memory Corp. USA

Xiao Wu Gong Infineon Singapore

Hsing-Huang Tseng Texas State University USA

Weiping Li IBM USA

9

General Information

Conference Language

The official language is English. No simultaneous translation is available.

Conference Schedule

Date Time Event

Oct.28

Mon.. AM & PM

Tutorial Session &

Registration

Oct.29

Tue..

AM Opening & Keynote Session

Keynote Session (K-1,K-2,K-3)

PM

Parallel Sessions

Parallel Sessions

Poster Session (1)

Evening Reception

Oct.30

Wed..

AM Keynote Session (K-4,K-5)

Parallel Sessions

PM

Parallel Sessions

Parallel Sessions

Poster Session (2)

Oct.31

Thur..

AM

Parallel Sessions

PM

Parallel Sessions

Parallel Sessions

Evening Banquet

Conference Site

The conference will be held inBest Western Shenzhen Felicity Hotel*****

Tel: 0086-755-25586333; Fax: 0086-755-25587746

Add: No.1085, Heping Road, Shenzhen,Guangdong Province, P.R China

Website: http://www.bwsz.net/chinese/js.htm

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Conference Registration

Payment by Credit Card, Bank Transfer,or Check

1. Participant: Accepted Paper ID Number（if available）:

□Mr. □Ms. First Name: Last Name:

Affiliation (Univ./Company):

Address:

Phone: Fax: Email:

2. Registration Fee

Classification Before Sep.15, 2013 After Sep.15, 2013 Amount

IEEE or IET

member★

□RMB 3500 （ or

USD 570）

□RMB 3800 (or

USD 620

Non-member □RMB 3800 (or

USD 620)

□RMB 4100 (or

USD 670)

Student □RMB2300 (or

USD 375)

□RMB 2700 (or

USD 440)

Extra banquet

ticket □RMB 300 (or USD 50)

Extra pages □RMB 400／page （or USD 65/page）

Tutorials □T-1RMB 200 (USD 30)

□T-2 RMB 200 (USD 30)

□Vegetarian □Need hardcopy Proceedings RMB 500

(or USD 80)

□Don’t need hardcopy Proceedings

TotalAmount RMB

Or USD

(★

IEEE or IETMember)★

Member Number: __________________________

The registration fee covers:

Admission to all the sessions;

Three days’ meals (Oct. 29 - Oct. 31, 2013)including the reception (Evening of Oct. 29) and the banquet (Evening of Oct. 31); Coffee Breaks;

A conference kit (with a conference bag, a program brochure, and a USB-disk).

(The tutorial fee covers the lunch (Oct. 28) and tutorial materials. Please visit the conference

website for details of the tutorials.)

3. Payment Methods

1) □ Credit Card

Date of Payment ________

（ Note: Payment by credit

card will be in RMB only）

Please Click Here for Credit Card Payment

RMB

______

11

2) □ Bank Transfer

Remit date____________

Sender’s Name_________________ Name of Bank: Bank of China Shanghai Shidong

Sub-Branch，Guo Ding Road Sub-Office Account Holder: FudanUniversity

Account No. 044159-8850-05131208093001

Swift Code: BK CH CN BJ 300

Bank address: No.288, Guo Ding Rd..Shanghai,

200433， China

Attn: ASICON 2013

RMB or USD

______

3) □ Bank Draft/Check

Remit date____________

I have enclosed herewith a bank draft/check made

payable to FudanUniversityand sent to Huihua Yu RMB or USD

______

Please send the Registration Form and Payment Receipt to Huihua Yu by Email or Fax

Email:asicon_org @fudan.edu.cn

Fax: +86-21-65643449

Mailing address: Department of Microelectronics, FudanUniversity,

220 Handan Road,Shanghai, 200433, China

Registration Desk

The conference registration desk will be located at Best Western Shenzhen Felicity Hotel. The

conference registration will be open on Oct. 28 (8:00-20:00), Oct. 29 (8:00-17:45), Oct.30

(8:00-17:45). And the registration desk will keep available at the same site throughout the whole

conference.

Transportation How to get to the Best Western Shenzhen Felicity Hotel:

Shenzhen Baoan International Airport is 40 km away from hotel, take taxi about 45-min you will arrive at

hotel.

Shenzhen Luohu Railway Station is 0.5 km away from hotel; it takes you about 5-min walking to the hotel.

More details about the conference hotel booking, please visit

http://www.discoverchinatours.com/travel-guide/shenzhen-asicon-2013-hotel.htm

Weather

The average temperature during conference time in Shenzhen is around 18℃~28℃.

Visa

All the foreign travelers to China must have a valid visa. Visas may be obtained from the Chinese

12

Embassy or Consulate in most major cities around the world. A conference attendee will be mailed an

official invitation letter for visa application after he or she fills and returns the Visa Application Form

(http://www.asicon.org) to asicon_org@fudan.edu.cntimely.

Awards

Excellent Student Paper Awards will be announced at the banquet on Oct.31. To be qualified for

the Excellent Student Paper Award, the paper must be presented by the student himself or herself (1st

author). The Technical Program Committee and Organizing Committee will choose through public

appraisal some excellent student papers from the candidates.

Paper Presentation Information

The ASICON-2013 will have oral and poster sessions. All the papers included in the conference

program should be presented in English by one of the authors at the arranged sessions.

Oral Presentation

Presentation time:

Invited paper (30 minutes): 25 min talk + 5 min Q/A

Regular paper (15 minutes): 12 min talk + 3 min Q/A

Computer and digital projector will be provided in each meeting room.

Poster Presentation

Poster size: 120 cm (high) 100 cm (wide)

Poster Session 1:

Setup time: 8:30-17:30 on Oct. 29

Presentation time: 17:45-18:45 on Oct.29 (on the spot)

Display time: 8:30-21:00 on Oct.29

Poster Session 2:

Setup time: 8:30-17:30 on Oct. 30

Presentation time: 17:45-18:45 on Oct.30 (on the spot)

Display time: 8:30-21:00 on Oct.30

Thumb pins, adhesive tapes, and scissors will be provided at the registration desk. The poster

should be taken off by 21:30 by the author if he or she would like to keep it. After that time, it will be

removed and be regarded as being discarded by the authors.

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Coffee Break

Complementary coffee/tea will be served in each morning/afternoon session. The break will take

place in general at 10:00-10:15 during morning sessions and 15:30-15:45 during afternoon sessions.

Due to time schedule of different sessions, the actual break time may have slight variation. Coffee/tea

will be served in about half-hour duration.

Meeting Room Location

Meeting Room Location

Imperial Room 3rd

Floor

Jade Room 3rd

Floor

Coral Room 3rd

Floor

Moon-Glow Room 2nd

Floor

Autumn & Winter Room 2nd

Floor

Poster Hall

14

Tutorial Session

Monday, October 28, 9:00 – 12:15

Monday, October 28, 9:00 – 12:15 Jade Room (3rd

Floor)

Tutorial Session (I)

T-1-1 Introduction to RF CMOS circuit design (9:00-10:30)

Prof. Noboru Ishihara (Tokyo Institute of Technology, Japan)

T-1-2 Electrostatic Discharge (ESD) Protection of RF Integrated Circuits (10:45-12:15)

Prof. Juin J. Liou

Pegasus Distinguished Professor, University of Central Florida, Orlando, Florida, USA

Chang Jiang Scholar Endowed Professor, Ministry of Education, China

Monday, October 28, 9:00 – 11:30 Coral Room (3rd

Floor)

Tutorial Session (II)

T-2-1 Digital Microfluidic Biochips: Towards Hardware/Software Co-Design and

Cyberphysical System Integration (9:00-11:30)

Prof. Tsung-Yi Ho (National Cheng Kung University, Taiwan)

Monday, October 28, 14:00 – 16:30

Monday, October 28, 14:00 – 16:30 Jade Room (3rd

Floor)

Tutorial Session (III)

T-1-3 RF and analog integrated circuits and systems for wireless and portable

applications (14:00-16:30)

Prof. Howard Luong (Hongkong University of Science and Technology, Hong Kong)

Monday, October 28, 14:00 – 16:30 Coral Room (3rd

Floor)

Tutorial Session (IV)

T-2-2 Layout decomposition methods for double patterning and triple patterning

lithography (14:00-16:30)

Prof.Andrew Kahng (UCSD, USA)

Dr.HailongYao (Tsinghua University, China)

15

Technical Session

Tuesday

Tuesday, October 29, 8:30 – 11:45

Tuesday, October 29, 8:30 – 10:00 Imperial Room (3rd

Floor)

Opening & Keynote Session K-1

Opening Ceremony （8:30-9:15）

K-1 High performance SiGe Bi-CMOS Technology and its application (9:15-10:00)

Dr. David Harame (IBM fellow / IEEE fellow and IBM CTO for microelectronics.

USA)

Tuesday, October 29, 10:15 – 11:45 Imperial Room (3rd

Floor)

Keynote Session K-2 & K-3

K-2 Design Margin, Scaling, and the Future of Moore’s Law (10:15-11:00)

Prof. Andrew Kahng (UC San Diego CSE and ECE Departments, Fellow of ACM and

IEEE, Chair of ITRS Roadmap on design technologies)

K-3 The Era of Exponentials Accelerating Innovation in Electronics That Impact

Everything, Everyone, Everywhere (11:00-11:45)

Dr. Rich Goldman (Vice President, Corporate Marketing & Strategic Market

Development, Synopsys, USA)

16

Tuesday, October 29, 13:30 – 15:30

Tuesday, October 29, 13:30 – 15:30 Jade Room (3rd

Floor)

Session A1 : Micro Processor

Title

A1-1 Distributed Task Migration for Thermal Hot Spot Reduction in Many-core

Microprocessors (invited paper)

13:30 Zao Liu, Xin Huang, Sheldon Tan (UC Riverside), Hai Wang, He Tang (UESTC),

A1-2 Low Power Instruction Cache Design Based on Branch Execution Tracks

14:00 Quanquan Li, Qi Wang, Tiejun Zhang, Donghui Wang, Chaohuan Hou (Institute of

Acoustics, Chinese Academy of Sciences)

A1-3 A Low-Power and High-efficiency Cache Design for Embedded Bus-based

Symmetric Multiprocessors

14:15 Xiantuo Rao, Teng Wang, Xin’an Wang, Yinhui Wang (Shenzhen Graduate School,

Peking University)

A1-4 Delay Hidden Techniques based on Configuration Contexts Reuse and

Differential Reconfiguration in Coarse-grained Reconfigurable Processor

14:30 Haopeng Liu, Weiguang Sheng, Weifeng He, Zhigang Mao (School of

Microelectronics, Shanghai Jiao Tong University)

A1-5 A High Throughput FPGA Embedded DSP Architecture Design

14:45 Hanyang Xu, Jinmei Lai (Department of Microelectronics, Fudan University)

A1-6 Energy Evaluation for Two-level On-chip Cache with Non-Volatile Memory on

Mobile Processors

15:00 Shota Matsuno, Masashi Tawada, Masao Yanagisawa, Shinji Kimura, Nozomu

Togawa (Waseda univarsity), Tadahiko Sugibayashi (NEC Corporation)

Tuesday, October 29, 13:30 – 15:30 Coral Room (3rd

Floor)

Session B1 : Amplifier

Title

B1-1 A 20 Gb/s Limiting Amplifier in 65nm CMOS Technology

13:30 Rui He, Jianfei Xu, Na Yan, Hao Min (Fudan University)

B1-2 A 16-Bit Double-Sampling Sigma-Delta modulator with Gain-boost Amplifier

13:45 Yongsheng Wang, Hongying Wang, Yonglai Zhang, Fengchang Lai (harbin institute of

technology)

17

B1-3 A 12-bit 200-MS/s Sample-and-Hold Amplifier with a hybrid Miller-feedforward

compensation technique

14:00 Yongzhen Chen, Chixiao Chen, Qiang Zhang, Fan Ye, Junyan Ren (Fudan University)

B1-4 A CMOS Synchronous Time Amplifier

14:15 Siliang Hua, Donghui Wang, Yan Liu (Institute of Acoustics, Chinese Academy of

Sciences)

B1-5 Design of A Time-Interleaved Band-Pass ΣΔ Modulator for Class-S Power

Amplifier

14:30

Yang Zhao (State Key Laboratory of ASIC & System, Fudan University), Bill Yang

Liu (Analog Device Corp),Zhiliang Hong (State Key Laboratory of ASIC & System,

Fudan University)

B1-6 Design of Dual-Wideband Low Noise Amplifier base on Common Gate Topology

14:45 Meng-Ting Hsu, Po-Yu Lee, Yu-Zhang Huang (Department and Institute of Electronic

Engineering National Yunlin University of Science and Technology)

Tuesday, October 29, 13:30 – 15:30 Moon-Glow Room (2nd

Floor)

Session C1 : CAD for system, Design for Manufacturing and Testing (I)

Title

C1-1 Developing a Design System to Help Reduce Design Cycle Time (invited paper)

13:30 Jing Li (Staff Engineer), Xingang Wang (Director, Design Enablement)

C1-2 Oscillator Phase Noise Verification Accounting for Process Variations

14:00 Liuxi Qian, Dian Zhou, Xuan Zeng, Shengguo Wang (University of Texas at Dallas)

C1-3 Weight-Based FPGA Placement Algorithm with Wire Effect Considered

14:15 Huagang Li, Jian Wang, Jinmei Lai (State Key Laboratory of ASIC and System, Fudan

University)

C1-4 Graph Steiner Tree Construction and Its Routing Applications

14:30 Jun Dong, Hengliang Zhu, Min Xie, Xuan Zeng (Department of Microelectronics,

Fudan University)

18

Tuesday, October 29, 13:30 – 15:30 Autumn & Winter Room (2nd

Floor)

Session D1 : Testing, Reliability, Fault-Tolerance (I)

Title

D1-1 Building-In Reliability in BCD (Bipolar-CMOS-DMOS) Technologies (invited

paper)

13:30 Jifa Hao, T. E. Kopley (Fairchild Semiconductor)

D1-2 Networking Industry Trends in ESD Protection for High Speed IOs (invited

paper)

14:00 Richard Wong, Rita Fung, Shi-Jie Wen (Cisco Systems)

D1-3 Two Sides of Pulse Quenching Effect on the Single Event Transient

14:30 Bin Liang, Yankang Du (College of Computer, National University of Defense

Technology)

D1-4 A Novel Test Scheme for NAND Flash Memory Based on Built-in Oscillator Ring

14:45 Si Chen, Xiaole Cui, Chung-Len Lee (Peking University Shenzhen Graduate School)

Tuesday, October 29, 15:45-17:45

Tuesday, October 29, 15:45-17:45 Jade Room (3rd

Floor)

Session A2 : Circuits and Systems for Wireless Communications (I)

Title

A2-1 Integrated Silicon RF Front-End Solutions for Mobile Communications (invited

paper)

15:45 Alvin Joseph, Randy Wolf (IBM)

A2-2 Low-Power High-Speed Communication with Short-Millimeter-Wave CMOS

Transceivers (invited paper)

16:15 Minoru Fujishima (Hiroshima University)

A2-3 Design of Low power UWB CMOS LNA using RC Feedback and Body-bias

Technology

16:45 Meng-Ting Hsu, Yu-Chang Hsieh, An-Cheng Ou (Department and Institute of

Electronic Engineering, National Yunlin University of Science and Technology)

A2-4 Implementation of a Configurable MIMO Detector with Complex K-best

Algorithm

19

17:00 Jieqiong Cheng, Junsong Zheng, Xiaofang Zhou (State Key Lab of ASIC & System),

Linshan Zhang (YunNan Electric Power Test & Research Institute Group Co., Ltd)

A2-5 Highly Flexible WBAN Transmit-Receive System Based on USRP

17:15 TianChan Guan, Jun Han, Xiaoyang Zeng (State Key Laboratory of ASIC & System,

Fudan University, Shanghai, China)

A2-6 A New Channel emulator for Low Voltage Broadband Power Line

Communication

17:30 Yan Zhao, Xiaofang Zhou (ASIC & Systems, Fudan), Chao Lu (Aseit Co., Ltd.)

Tuesday, October 29, 15:45-17:45 Coral Room (3rd

Floor)

Session B2 : Analog-to-Digital Converters (I)

Title

B2-1 Quantitative Analysis for High Speed Interpolated/Averaging ADC (invited

paper)

15:45 He Tang, Yong Peng, Xiang Lu, Hai Wang (Univ. of Elec. Sci. and Tech. of China),

Albert Wang (Department of Electrical, University of Califomia)

B2-2 Folding and Interpolation ADC Design Methodology (invited paper)

16:15 Siqiang Fan (Fairchild Semiconductor), Albert Wang (University of California,

Riverside), Bin Zhao (Fairchild Semiconductor)

B2-3 A 10-bit Pipelined ADC with Improved S/H Circuit for CMOS Image Sensor

16:45 Yiling Ding, Qi Zhang, Ning Wang, Dunshan Yuan, Guohong Li, Hui Wang, Songlin

Feng (Shanghai Advanced Research Institute, Chinese Academy of Sciences)

B2-4 An 8-bit 100KS/s Low Power Successive Approximation Register ADC for

Biomedical Applications

17:00 Xiao Yan, Lingzhi Fu, Junyu Wang (Fudan University)

Tuesday, October 29, 15:45-17:45 Moon-Glow Room (2nd

Floor)

Session C2 : CAD for system, Design for Manufacturing and Testing (II)

Title

C2-1 Lithography Hotspot Detection and Mitigation in Nanometer VLSI (invited

paper)

15:45 Jhih-Rong Gao, Bei Yu, Duo Ding, David Z Pan (University of Texas at Austin)

20

C2-2 A New Splitting Graph Construction Algorithm for SIAR Router

16:15 Jinming Zhao, Hailong Yao, Yici Cai, Qiang Zhou (Tsinghua University)

C2-3 Data Dependency Aware Prefetch Scheduling for Dynamic Partial

Reconfigurable Designs

16:30

Jixin Zhang (Tsinghua University, Wuhan University of Technology), Ning Xu

(Wuhan University of Technology), Yuchun Ma, Yu Wang, Jinian Bian (Tsinghua

University)

C2-4 Incremental 3D NoC Synthesis based on Physical-aware Router Merging

Algorithm

16:45

Yuanyuan Li (School of Computer Science and Technology, WuHan University of

Technology;Department of Computer Science and Technology, Tsinghua University),

Ning Xu (School of Computer Science and Technology, WuHan University of

Technology), Yuchun Ma, Jinian Bian (Department of Computer Science and

Technology, Tsinghua University)

Tuesday, October 29, 15:45-17:45 Autumn & Winter Room (2nd

Floor)

Session D2 : Testing, Reliability, Fault-Tolerance (II)

Title

D2-1 A Test Pattern Selection Method for Dynamic Burn-in of Logic Circuits Based on

ATPG Technique

15:45 Xuan Yang, Xiaole Cui, Chao Wang, Chung-Len Lee (Peking University Shenzhen

Graduate School)

D2-2 Gate Oxide Enhancement for Whole Chip ESD Design between Different Power

Domains

16:00 Hongwei Li, Guang Chen, Huijuan Cheng (SMIC)

D2-3 Novel Gate-Voltage-Bias Techniques for Gate-Coupled MOS (GCMOS) ESD

Protection Circuits

16:15 Guangyi Lu, Yuan Wang, Jian Cao, Song Jia, Ganggang Zhang, Xing Zhang (Insititue

of Microelectronics, Peking University)

D2-4 A Cost-Effective Method for Masking Transient Errors in NoC Flit Type

16:30 Jiajia Jiao, Yuzhuo Fu (Shanghai Jiao Tong University)

21

Tuesday, October 29, 17:45 – 18:45

Tuesday, October 29, 17:45 – 18:45 Hall

Post Session (I)

Title

P1-01 An Interference Miss Isolation Mechanism based on Skewed Mapping for Shared

Cache in Chip Multiprocessors

Anwen Huang, Chao Song, Wei Guo, Peng Li, Minxuan Zhang (School of Computer

Science, National University of Defense Technology)

P1-02 Low Power Design for FIR Filter

Gaowei Xu, Yao Zou, Jun Han, Xiaoyang Zeng (State Key Laboratory of ASIC and

System, Fudan University)

P1-03 Design and Implementation of a Dynamic Loop Buffer by Reusing the

Instruction Buffer

Qi Wang, Yingke Gao, Donghui Wang, Tiejun Zhang, Chaohuan Hou (Digital System

Integration Lab, Institute of Acoustics, Chinese Academy of Sciences)

P1-04 Design of a Hybrid Reconfigurable Coprocessor

Xiang Wang, Su Zhang, Wei Ni, Yukun Song (Institute of VLSI Design. Hefei

University of Technology), Yanhui Yang, Jichun Bu (LZeal Information Technology

Co., Ltd)

P1-05 A Novel Inverse Quantization Algorithm Based on Taylor Series for Digital Audio

Codecs

Fan Liu (Sichuan Institute of Solid State Circuits, China Electronics Technology

Group Corp.), Junfeng Zhu (Actions Semiconductor Co., Ltd., Zhuhai 519085,

P.R.China), xiaozong Huang, Xun Xiang

P1-06 Genetic Algorithm Based Pipeline Scheduling in High-level Synthesis

Xiaohao Gao, Takeshi Yoshimura (Waseda University)

P1-07 A FPGA REAL-TIME STEREO VISION SYSTEM WITH LUMINANCE

CONTROL AND PROJECTED PATTERN

XU Yuan, YAO Haodong, GONG Liwei, ZHU Mingcheng (Shenzhen University),

Robert K.F. Teng (California State University, Long Beach)

P1-08 An Adaptive Multi-modulus Frequency Divider

YUAN Hengzhou, MA Zhuo, GUO Yang(College of Computer Science, National

University of Defense Technology)

P1-09 High-Performance Dual-Edge Triggered Level Converting Flip-Flop based on

22

BiCMOS

Xianghong Zhao (School of Information Science and engineering, Ningbo Institute of

Technology, Zhejiang University), Maoqun Yao (School of Information Science and

Engineering, Hangzhou Normal University), Jizhong Shen (Department of

Information Science & Electronic Engineering, Zhejiang University)

P1-10 Implementation of H.264 Intra-frame Encoding on Clustered Stream

Architectures

Zhixiang Chen (Tsinghua University), Yi Fang, Fang Wang, Zhaolin Li

P1-11 Frame Synchronization for a Narrow-Band Power Line OFDM Communication

System

Xiaoxue Yu, Hong Liu, Hao Min (Auto-ID Lab)

P1-12 A Low-Power Ternary Content-Addressable Memory Using Pulse Current Based

Match-Line Sense Amplifiers

Meng-Chou Chang, Shih-Ju Tsai (National Changhua University of Education)

P1-13 An equalization system for 2 series-connected Li-ion batteries

Jiang Jinguang (GNSS Research Center, Wuhan University), Li Sen (School of Physics

and Technology, Wuhan University)

P1-14 A Novel Architecture of Local Memory for Programmable SIMD Vision Chip

Zhe Chen, Jie Yang, Cong Shi, Nanjian Wu (Institute of Semiconductors, Chinese

Academy of Sciences)

P1-15 Pseudo Dual Path Processing to Reduce the Branch Misprediction Penalty in

Embedded Processors

huatao zhao, Jiongyao ye, yuxin sun, Takahiro watanabe (waseda university)

P1-16 A Fast Multi-core Virtual Platform and its Application on Software Development

Zongyan Wang, Dexue Zhang, Xueqiu Yu, Zhiyi Yu, Xiaoyang Zeng (State Key

Laboratory of ASIC and System, Fudan University)

P1-17 A Turbo Decoder Implementation for LTE Downlink Mapped on a Multi-Core

Processor Platform

Qing Zhang, Xueqiu Yu, Zhiyi Yu, Xiaoyang Zeng (Fudan University)

P1-18 H.264 Video Parallel Decoder on a 24-Core Processor

Shikai Zhu, Zheng Yu, Shile Cui, Zhiyi Yu, Xiaoyang Zeng (Fudan University)

P1-19 Highly Stable Data SRAM-PUF in 65nm CMOS Process

Xuelong Zhang, Pengjun Wang, Yuejun Zhang (Ningbo University)

23

P1-20 Design and Implementation of RSA for Dual Interface Bank IC Card

Jiajia Shao, Liji Wu, Xiangmin Zhang (Tsinghua University)

P1-21 A Reconfigurable Floating-Point FFT Architecture

Chenlu Wu, Wei Cao, Xuegong Zhou, Lingli Wang (The State Key Laboratory of

ASIC and System, Fudan University), Baodi Yuan, Fang Wang (Wuxi Topwin

Technology Co. Ltd)

P1-22 A Clocked Differential Switch Logic Using Floating-Gate MOS Transistors

Guoqiang Hang, Yang Yang (Zhejiang University City College), Peiyi Zhao, Xiaohui

Hu, Xiaohu You

P1-23 An Area-Efficient Implementation of ΣΔ ADC Multistage Decimation Filter

Chenxi Deng, Yuhua Cheng (Peking University)

P1-24 A Design of Configurable Image Enhancement Unit

Zhiyuan Xue, Huan Ying, Yingke Gao, Tiejun Zhang, Donghui Wang, Chaohuan Hou

(Institute of Acoustics, Chinese Academy of Sciences)

P1-25 A Novel Energy-Oriented Reconfigurable on-chip Unified Memory Architecture

Based on Cache Behavior Phase Graph

WU Jianping, Ling Ming, Zhang Yang, Mei Chen, Wang Huan (IC Department,

Southeast University)

P1-26 Design of Real-Time Communication in Distributed Real-Time Simulation

Yong Chen (Bejing Oil Research Institute), Xinyu Yao, Wenbo Wu (National

University of Defense Technology), Xiaofeng Tang (Logistics Research Institute)

P1-27 The Decimator with Multiplier-free Realizations for High Precision ADC

Applications

Yiwu Yao, Kailiang Zhang, Hongming Chen, Yuhua Cheng (Peking University)

P1-28 Implementation of an Embedded Dual-Core Processor for Portable Medical

Electronics Applications

Yingrui Chen, Teng Wang, Xin’an Wang (Peking University Shenzhen Graduate

School), Ziyi Hu (Institute of Microelectronics of Chinese Academy of Sciences)

P1-29 A Novel Architecture Scheme with Adaptive Pipeline Coupling Technique for

DSP Processor Design

Zheng Tang, Jing Xie, Zhigang Mao (Department of Microelectronics, Shanghai Jiao

Tong University)

P1-30 A Novel Multi-direction Fast Parallel Search (MFPS) Method for Motion

Estimation in Video Compression and Its Hardware Implementation

24

Kaisheng Ma, Bing OuYang, Kai Liao, Xixin Cao (Peking Univ.)

P1-31 Positionable Wearable Fall Detection System for Elderly Assisted Living

Applications

Jie Cheng, Yun Chen, Wenxu Bao, YuanZhou Hu, Na Ding, Xiaoyang Zeng (The

State-Key Lab of ASIC and System,Fudan University)

P1-32 Mixed-Signal SoC Design and Low Power Research for Tire Pressure Monitoring

Systems

Yangyang Guo, Liji Wu, Tengfei Zhai, Xiao Yu, Xiangmin Zhang (Tsinghua

University)

P1-33 A Semi-auto Interactive 2D-to-3D Video Conversion Technique Based on Edge

Detection

Tianyi Hu (Department of Microelectronics, Fudan University)

P1-34 Secure Systolic Architecture for Montgomery Modular Multiplication Algorithm

Qi Yang (School of Computer, Wuhan University), Xiaoting Hu, Zhongping Qin

(School of Software, Huazhong University of Science and Technology)

P1-35 A GFSK transceiver for IEEE Std. 802.15.4g used in China

Maoqiang Duan (Lab of Industrial Control Network and System Shenyang Institute of

Automation, Chinese Academy of Sciences), Xiaoli Huang (Competitive Intelligence

Center Institute of Scientific & Technical Information of Liaoning Province), Zhijia

Yang

P1-36 A CMOS Low-Noise Amplifier for BCC Applications

Zhige Zou, Wuyue Wang, Jianming Lei, Guoyi Yu, Xuecheng Zou (Department of

Micro-electronic Engineering School of Optical and Electronic Information)

P1-37 Automatic Gain Control Algorithm with High-Speed and Double Closed-loop in

UWB System

Bing Jing, Yuankun Xue, Fan Ye, Ning Li, Junyan Ren (Fudan university)

P1-38 An NFC system with high sensitivity based on SDR

Longxiang Zhang, Hantian Xu, Yingbo Dai, Hao Min (AUTO-ID Laboratory of Fudan

University)

P1-39 A Configurable Distributed Systolic Array for QR Decomposition in

MIMO-OFDM Systems

Yongxu Zhu, Bin Wu, Yumei Zhou, Kaifeng Xia, Lu Sun (Institute of

Microelectronics, Chinese Academy of Sciences)

P1-40 A Collision and Tag Number Detector for UHF RFID Reader Conforming to EPC

25

Gen2 Protocol

Lingzhi Fu, Xiao Yan, Junyu Wang (Fudan University)

P1-41 A Wideband CMOS Variable-Gain Low Noise Amplifier with Novel Attenuator

Tao Cheng, Tao Yang, Xin Wang, Zhangwen Tang (ASIC & System State Key

Laboratory, Fudan University)

P1-42 Enhanced Error Correction against Multiple-Bit-Upset Based on BCH Code for

SRAM

Weijia Ma, Xiaole Cui, Chung-Len Lee (Peking University Shenzhen Graduate

School)

P1-43 A Novel Structure of Dynamic Configurable Scan Chain - Bypassing

Unconcerned Segments on the Fly

Shengye Wang, Wei Cao, Lingli Wang (State Key Lab of ASIC and System, Fudan

University), Na Wang, Ping Tao (East China Institute of Computer Technology)

P1-44 New DfT Architectures for 3D-SICs with a Wireless Test Port

Yibo He, Xiaole Cui, Chung-Len Lee (Peking University Shenzhen Graduate School),

Xiaoxin Cui, Yufeng Jin (Peking University)

P1-45 Polarity Dependent of Gate Oxide Breakdown from Measurements

Shili Wu, Xiaowei He, Yuwei Liu, Guoan Chen (CSMC Technologies Corporation)

P1-46 A Novel ESD Device for Whole-Chip ESD Protection Network of TPMS Mixed

Signal SoC

Ningyuan Yin, Liji Wu (Tsinghua University), Tengfei Zhai (Institute of Electronics of

Chinese Academy of Science), Xiangmin Zhang, Rui Zhu (Tsinghua University)

P1-47 A Current Mode Sense Amplifier with Self-Compensation Circuit for SRAM

Application

Heqing Xu, Song Jia, Jiyu Chen, Yuan Wang, Gang Du (Department of

Microelectronics, Peking University)

P1-48 Novel Operation Scheme and Technological Optimization for 1T bulk

Capacitor-less DRAM

Hui Li, Wei Zhu, Ningxi Lu, Cunlin Dong, Chao Meng, Yinyin Lin (ASIC and System

State Key Lab,Fudan university), Ryan Huang, Qingtian Zou, Jingang Wu (SOC

Technology Development Center)

P1-49 Piezoelectric force microscopy study of local bipolar diode current dependence of

preferential domain orientation in BiFeO3 thin films with different thicknesses

Long He, Zhihui Chen, Anquan Jiang (State Key Laboratory of ASIC and System,

Department of Microelectronics, Fudan University)

26

P1-50 Design and Test of an SRAM Chip

Wenbin Liu, Jinhui Wang, Ligang Hou, Hongyan Yang, Jianbo Kang (Beijing

University of Technology)

P1-51 A Hardware Implementation of DES with Combined Countermeasure against

DPA

Xiaoxin Cui, Rui Li, Wei Wei (Peking University), Juan Gu (Shenzhen University),

Xiaole Cui (Peking University Shenzhen Graduate School),

27

Wednesday

Wednesday, October 30, 8:30 – 10:00

Wednesday, October 30, 8:30 – 10:00 Imperial Room (3rd

Floor)

Keynote Session K-4 & K-5

K-4 Low Power RF Circuits for Broadband Signals

Prof. Ramesh Harjani

University of Minnesota (Twin Cities).USA, TPC Chair for IEEE CICC

K-5 Power Management Solutions Enabled by Mixed-Signal Intelligence

Dr. Bin Zhao

Fairchild Semiconductor, USA, IEEE Fellow, IEEE Distinguished Lecturer, and Vice

President of IEEE EDS

28

Wednesday, October 30, 10:15 – 12:15

Wednesday, October 30, 10:15 – 12:15 Jade Room (3rd

Floor)

Session A3 : Network on Chip

Title

A3-1 A Power-Efficient Network-on-Chip for Multi-core Stream Processors

10:15

Guoyue Jiang (Institute of Microelectronics, Tsinghua University), Fang Wang,

Zhaolin Li (Research Institute of Information Technology, Tsinghua University),

Shaojun Wei (Institute of Microelectronics, Tsinghua University)

A3-2 A Thermal-Aware Mapping Algorithm for 3D Mesh Network-on-Chip

Architecture

10:30 Gui Feng, Fen Ge, Shuang Yu, Ning Wu (College of Electronic and Information

Engineering)

A3-3 A Two-phase Floorplanning approach for Application-specific Network-on-Chip

10:45 Shuang Yu, Fen Ge, Gui Feng, Ning Wu (College of Electronic and Information

Engineering)

A3-4 MCVP-NoC: Many-Core Virtual Platform with Networks-on-Chip support

11:00

Dexue Zhang, Xiaoyang Zeng, Zongyan Wang (Fudan university), Weike Wang

(Shandong University of Science and Technology), Xinhua Chen (Qingdao ShanHai

Microelectronics Co., Ltd.)

A3-5 A 2D Mesh NoC with Self-Configurable and Shared-FIFOs Routers

11:15 Wei Zhou, Jianming Yu, Jie Lin, Zhiyi Yu, Xiaoyang Zeng (State Key Laboratory of

ASIC & System, Fudan University)

A3-6 A hybrid router combining circuit switching and packet switching with virtual

channels for on-chip networks

11:30 Jie Lin, Wei Zhou, Zhiyi Yu, Xiaoyang Zeng (Fudan University)

A3-7 Low Overhead Task Migration Mechanism in NoC-based MPSoC

11:45 FangFa Fu, Liang Wang, Lu Yu, Jinxiang Wang (Harbin Institute of Technology,

Microelectronics Center)

A3-8 Design of an Optimized Low-latency Interrupt Controller for IMS-DPU

12:00 Zijia Guo, Teng Wang, Xin’an Wang (Peking University Shenzhen Graduate School),

Ziyi Hu (Institute of Microelectronics of Chinese Academy of Sciences)

29

Wednesday, October 30, 10:15 – 12:15 Coral Room (3rd

Floor)

Session B3 : RF Circuits

Title

B3-1 A 5kV ESD-Protected 2.4GHz PA in 180nm RFCMOS Optimized by ESD-PA

Co-Design Technique (invited paper)

10:15

Zitao Shi (Marvell Tech. Group Ltd. Shanghai, China), Xin Wang(Omni Vision

Technologies), Albert Wang (Dept. of Electrical Engineering, University of California,

Riverside, USA), Yuhua Cheng (SHRIME, Peking University, China)

B3-2 RF Design and Technology Supporting Active Safety in Automotive Applications

(invited paper)

10:45 Massimo Gimignani, Mario Paparo, Domenico Rossi, Salvo Scaccianoce

(STMicroelectronics)

B3-3 A 800nW High-Accuracy RC Oscillator with Resistor Calibration for RFID

11:15 Jinhai Zhang, Bo Wang, Yi Peng, Tongning Hu, Xin’an Wang (School of ECE Peking

University Shenzhen Graduate School)

B3-4 A CMOS Passive Mixer-First Receiver Front-end for UHF RFID Reader

11:30 Zhiheng Lin, Xi Tan, Hao Min (AUTO-ID Laboratory of Fudan University)

B3-5 An adaptive Q factor tuning and input impedance matching method for ultra-low

power front end of UHF RFID tag

11:45

Chong Huang (UNICORETECH.LTD.COM.CN), Xiaochen Gu (College of electronic

science and engineering, National University of defense technology, Changsha,

China), Lei Cai (Faculty of Materials, Optoelectronics and Physics, Xiangtan

University), Cong Li, Dun Yan, Bingbing Zhang, Qin Qin, Wanghong Yi, Jiancheng Li

(College of electronic science and engineering, National University of defense

technology, Changsha, China)

B3-6 A high conversion coefficient RF front end of ultra-low power RFID tag

12:00

Chong Huang (UNICORETECH.LTD.COM.CN), Xiaochen Gu (College of electronic

science and engineering, National University of defense technology, Changsha,

China), Lei Cai (Faculty of Materials, Optoelectronics and Physics, Xiangtan

University), Cong Li, Dun Yan, Bingbing Zhang, Qin Qin, hongyi Wang, Jiancheng Li

(College of electronic science and engineering, National University of defense

technology, Changsha, China)

30

Wednesday, October 30, 10:15 – 12:15 Moon-Glow Room (2nd

Floor)

Session C3 : VLSL New Processing, New Technologies and their integration (I)

Title

C3-1 A 65-nm CMOS P-well/Deep N-well Avalanche Photodetector for Integrated

850-nm Optical (invited paper)

10:15 Quan Pan, Zhengxiong Hou, Yipeng Wang, C. Patrick Yue (Department of Electronic

and Computer Engineering, HKUST)

C3-2 PEALD Ru / RuOx Films for ULSI Applications and Its Transition Control

between Metal and Metal Oxide

10:45 Chun-Min Zhang, Qing-Qing Sun, Peng-Fei Wang, David Wei Zhang (State Key

Laboratory of ASIC and System, School of Microelectronics, Fudan University)

C3-3 An Improved Analytical Series Resistance Model for On-Chip Stacked Inductors

11:00 Wanghui Zou, Xiaofei Chen, Xuecheng Zou (Hunan University)

C3-4 Design and Implementation of Transaction Level Processor based on UVM

11:15 Yingke Gao, Diancheng Wu, Quanquan Li, Tiejun Zhang, Chaohuan Hou (Digital

System Integration Lab, Institute of Acoustics, Chinese Academy of Sciences)

C3-5 Compact and portable chemiluminescence detector for glucose

11:30 Kaidi Zhang, Guowei Tao, Xiangyu Zeng, Wenjie Sheng, Jia Zhou (Fudan University)

Wednesday, October 30, 10:15 – 12:15 Moon-Glow Room (2nd

Floor)

Session D3 : Analog-to-Digital Converters (II)

Title

D3-1 Digital Calibration Techniques for Interstage Gain Nonlinearity in Pipelined

ADCs (invited paper)

10:15 Chaojie Fan, Wenjie Pan, Ke Wang, Jianjun Zhou (Shanghai Jiao Tong University)

D3-2 Design Philosophy of Hysteretic Controller for for DC-DC Switching Converters

(invited paper)

10:45 Jian Lv, Simao S.Ang (Department of Electrical Engineering University of Arkansas,

USA)

D3-3 A High-Speed Front-End Circuit Used in a 16bit 250MSPS Pipelined ADC

10:45 Ting Li, Dongbing Fu, Yong Zhang, Yan Wang, Lu Liu, Xu Wang (Science and

Technology on Analog Integrated Circuit Lab)

D3-4 A 300MHz 10bit Time-Interleaved Pipelined-SAR ADC

31

11:00 Lu Sun, Yuxiao Lu, Tingting Mo (Center for Analog/RF IC (CARFIC), School of

Microelectronics, Shanghai Jiao Tong University)

D3-5 Calibration for Split Capacitor DAC in SAR ADC

11:15 Zhe Li, Yuxiao Lu, Tingting Mo (Center for Analog/RF IC (CARFIC), School of

Microelectronics,Shanghai JiaoTong University)

Wednesday, October 30, 13:30 – 15:30

Wednesday, October 30, 13:30 – 15:30 Jade Room (3rd

Floor)

Session A4 : Special Session (I) Ultra-Low voltage circuit design Design

Title

A4-1 Soft Error Immunity of Subthreshold SRAM (invited paper)

13:30 Masanori Hashimoto (Osaka University)

A4-2 Variation-aware Subthreshold Logic Circuit Design (invited paper)

14:00

Hiroshi Fuketa, Ryo Takahashi, Makoto Takamiya (University of Tokyo), Masahiro

Nomura, Hirofumi Shinohara (Semiconductor Technology Academic Research Center

(STARC)), Takayasu Sakurai (University of Tokyo)

A4-3 Design of an Ultra Low-Power CMOS Amplifier for Low-Voltage Power-Aware

Analog LSIs (invited paper)

14:30 Tetsuya Hirose (Kobe University)

A4-4 Statistical simulation methods for circuit performance analysis (invited paper)

15:00 Takashi Sato (Kyoto University)

Wednesday, October 30, 13:30 – 15:30 Coral Room (3rd

Floor)

Session B4 : Clock Synthesizer and Building Blocks

Title

B4-1 A 24 GHz Reconfiguarble Frequency Synthesizer for 60 GHz WPAN (invited

paper)

13:30 Nagarajan Mahalingam, Yisheng Wang, Kaixue Ma, Shou Xian Mou, Kiat Seng Yeo

(Nanyang Technological University, Singapore)

B4-2 Low Spur CMOS Phase-Locked Loop with Wide Tuning Range for CMOS Image

32

Sensor

14:00 Zhiqing Chen, Qi Zhang, Ning Wang, Dunshan Yuan, Guohong Li, Hui Wang, Songlin

Feng (Shanghai Advanced Research Institute, Chinese Academy of Sciences)

B4-3 Design of Frequency Synthesizer in Frequency-Hopping Transceiver

14:15

Yong Xu (Institue of Communication Engineering, PLA University of Science and

Technology), Fei Zhao (PLA University of Science and Technology), Chen Hu, Zheng

Sun, Yuanliang Wu, Jianwen Lu

B4-4 Design of Drain-gate Transformer Feedback VCO With Body-biasing

14:30 Meng-Ting Hsu, Jie-An Huang, Yao-Yan Lee (Department and Institute of Electronic

Engineering, National Yunlin University of Science and Technology)

B4-5 A Reference Spur Estimation Method for Integer-N PLLs

14:45 Bo Wang, Jinhai Zhang (Peking University Shenzhen Graduate School), Edouard

NGOYA (XLIM, UMR CNRS 7252, University of Limoges)

B4-6 A Fast and Accurate Automatic Frequency Calibration Scheme for Frequency

Synthesizer

15:00 Yan Dun, Jiancheng Li, Songting Li, Xiaochen Gu, Chong Huang (National

University of Defense Technology)

B4-7 A 30.4% tuning range Quadrature LC VCO using Class-C structure

15:15 Zibo Zhou, Wei Li, Ning Li, Junyan Ren (ASIC Laboratory, Department of

Microelectronics)

Wednesday, October 30, 13:30 – 15:30 Moon-Glow Room (2nd

Floor)

Session C4 : Circuits Simulation, Synthesis, Verification and Physical design (I)

Title

C4-1 Interconnect Waveform Calculation Method with Parameter Variation (invited

paper)

13:30 Goro Suzuki, Ryo Yamanaka (Univ. of Kitakyushu)

C4-2 A Sorting-Based IO Connection Assignment for Flip-Chip Designs

14:00 Ran Zhang, Xue Wei, Takahiro Watanabe (Waseda University)

C4-3 Incremental Symbolic Construction for Topological Modeling of Analog Circuits

14:15 Hanbin Hu, Guoyong Shi, Yan Zhu (Shanghai Jiao Tong University)

C4-4 Parameter and UVM, Making a Layered Testbench Powerful

14:30 Geng Zhong, Jian Zhou, Bei Xia (Department of Microcontroller, Freescale)

33

C4-5 Mixed-signal System Verification by SystemC/SystemC-AMS and HSIM-VCS in

Near Field Communication Tag Design

14:45

Zhaori Bi, Wei Li, Dian Zhou (Eric Jonsson School, The University of Texas at

Dallas, Richardson 75080, U.S.A.), Xuan Zeng (State Key Lab. of ASIC & System,

Fudan University, Shanghai 200433, China), Sheng-Guo Wang (College of

Engineering, University of North Carolina at Charlotte, Charlotte, NC 28223, U.S.A)

C4-6 Power and Resource Aware Scheduling with Multiple Voltages

15:00

Haoran Zhang (Waseda University), Cong Hao (Shanghai Jiao Tong University), Nan

Wang (Waseda University), Song Chen (University of Science and Technology of

China), Takeshi Yoshimura (Waseda University)

C4-7 The Timing Control Design of 65nm Block RAM in FPGA

15:15 Xinrui Zhang, Jian Wang, Dan Chen, Jinmei Lai (State Key Laboratory of ASIC and

System, Fudan University), Lichun Bao, Xueling Liu (BACC)

Wednesday, October 30, 13:30 – 15:30 Autumn & Winter Room (2nd

Floor)

Session D4 : Advanced Memory

Title

D4-1 High Performance Memory Devices Fabrication with Low Damage Etching

Process (invited paper)

13:30 Chao-Sung Lai, Chi-Hsien Huang, Chih-Ting Lin, Jer-Chyi Wang (Chang Gung

University)

D4-2 Conduction Mechanism of Self-Rectifying n+Si-HfO2-Ni RRAM

14:00

D.Y. Lu (State Key Lab ASIC and System, Department of Microelectronics, Fudan

University), X.A. Tran (Nanyang Technological University), H.Y. Yu (South

University of Science and Technology of China), D.M. Huang, Y.Y. Lin, S.J. Ding, P.F.

Wang, Ming-Fu Li (State Key Lab ASIC and System, Department of Microelectronics,

Fudan University)

D4-3 Low-Power High-Yield SRAM Design with VSS Adaptive Boosting and BL

Capacitance Variation Sensing

14:30 Ningxi Liu, Yu Jiang, Qing Dong, Hui Li, Xinyi Hu, Yinyin Lin (Fudan University)

D4-4 A Novel Soft Error Immunity SRAM cell

14:45 Jinming Huang, Xin Zhao, Yongqin Huang (ShangHai high performance IC design

center)

D4-5 A 2Mb ReRAM with two bits error correction codes circuit for high reliability

34

application

15:00 Jianguo Yang, Ying Meng, Xiaoyong Xue, R. Huang, Q.T. Zhou, J.G. Wu, Yinyin Lin

(Fudan University)

Wednesday, October 30, 15:45 – 17:45

Wednesday, October 30, 15:45 – 17:45 Jade Room (3rd

Floor)

Session A5 : Multimedia Circuit

Title

A5-1 A High Performance VLSI Architecture for Integer Motion Estimation in HEVC

(invited paper)

15:45 Xu Yuan, Liu Jinsong, Gong Liwei, Zhang Zhi (Shenzhen University), Robert K.F.

Teng (California State University, Long Beach)

A5-2 ASIC design for UHDTV video coding (invited paper)

16:15 Dajiang Zhou, Jinjia Zhou, Gang He, Satoshi Goto (Waseda University)

A5-3 An Optimized Hardware Architecture for Intra Prediction in H.264 Decoder

16:45 Qi Wang, Quanquan Li, Shi Chen, Tiejun Zhang, Chaohuan Hou (Institute of

Acoustics, Chinese Academy of Sciences)

A5-4 A FAST 8×8 IDCT ALGORITHM FOR HEVC

17:00 Tianlong Ma, Cong Liu, Yibo Fan, Xiaoyang Zeng (FUDAN UNIVERSITY)

A5-5 A Highly pipelined VLSI Architecture for All Modes and Block Sizes Intra

Prediction in HEVC Encoder

17:15 Cong Liu, Weiwei Shen, Tianlong Ma, Yibo Fan, Xiaoyang Zeng (State Key Lab of

ASIC and System, Fudan University)

A5-6 Transform-Based Fast Mode and Depth Decision Algorithm for HEVC Intra

Prediction

17:30 Gang He, Dajiang Zhou, Satoshi Goto (Waseda University)

35

Wednesday, October 30, 15:45 – 17:45 Coral Room (3rd

Floor)

Session B5 : Wireless transceiver and building blocks

Title

B5-1 A 10-Gb/s Simplified Transceiver with a Quarter-Rate 4-Tap Decision Feedback

Equalizer in 0.18-μm CMOS Technology

15:45 Shuai Yuan, Ziqiang Wang, Xuqiang Zheng, Ke Huang, Liji Wu, Zhihua Wang

(Institute of Microelectronics, Tsinghua University)

B5-2 A 10Gb/s Analog Equalizer in 0.18um CMOS

16:00 Linghan Wu, Ziqiang Wang, Ke Huang, Shuai Yuan, Xuqiang Zheng, Chun Zhang,

Zhihua Wang (Tsinghua University)

B5-3 A Widely-tunable Multi-standard Direct-Conversion CMOS TV Receiver for

Direct Broadcasting Satellite Service

16:15 Songting Li, Jiancheng Li, Xiaochen Gu, Dun Yan, Hongyi Wang, Zhaowen Zhuang

(National University of Defense Technology)

B5-4 Design of novel high speed dual-modulus prescaler based on new optimized

structure

16:30 Zheng Sun, Yong Xu, Chen Hu, Guangyan Ma, Yuanliang Wu, Ying Huang (PLA

University of Science and Technology)

B5-5 A Finite Gain Bandwidth Compensation Method for Low Power

Continouts-time ΣΔ Modulator

16:45 Zemin Feng, Chixiao Chen, Fan Ye, Jun Xu, Junyan Ren (Fudan University)

B5-6 A 80-dB DR, 10-MHz BWContinuous-Time Sigma-Delta Modulator with Low

Power Comparators and Switch Drivers

17:00 Yuzhong Xiao , Chixiao Chen, Rui Wei, Fan Jiang, Jun Xu, Junyan Ren (Fudan

university)

B5-7 A Novel Equalizer for the High-loss Backplane at Nyquist Frequency

17:15 You Li, Feng Zhang, Yumei Zhou (Institute of Microelectronics of Chinese Academy

of Sciences)

B5-8 Dual Control Mode AGC for Wireless Communication System

17:30 Fan Meng, Rui Guan, Dongpo Chen (Center for Analog/RF Integrated Circuits

(CARFIC), School of Microelectronics Shanghai Jiao Tong University)

36

Wednesday, October 30, 15:45 – 17:45 Moon-Glow Room (2nd

Floor)

Session C5 : Circuits Simulation, Synthesis, Verification and Physical design (II)

Title

C5-1 Compact Modeling of the Diode Reverse Recovery Effect for Leading

Developments of Power Electronic Applications (invited paper)

15:45 Masataka Miyake, Kai Matsuura, Akifumi Ueno (Hiroshima University)

C5-2 Lagrangian Relaxation Based Pin Assignment and Through-Silicon Via Planning

for 3-D SoCs

16:15 Wei Zhong(Waseda University), Song Chen (University of Science and Technology of

China), Yang Geng, Takeshi Yoshimura (Waseda University)

C5-3 An Acceleration Method by GPGPU for Analytical Placement using

Quasi-Newton Method

16:30 Syota Kuwabara, Yukihide Kohira (The University of Aizu), Yasuhiro Takashima (The

University of Kitakyushu)

C5-4 FFTPL: An Analytic Placement Algorithm Using Fast Fourier Transform for

Density Equalization

16:45

Jingwei Lu (Department of Computer Science and Engineering, University of

California, San Diego), Pengwen Chen (Department of Applied Mathematics,

National Chung Hsing University), Chin-Chih Chang, Lu Sha, Dennis Jen-Hsin

Huang, Chin-Chi Teng (Cadence Design Systems), Chung-Kuan Cheng (Department

of Computer Science and Engineering, University of California, San Diego)

C5-5 Power Grid Simulation using Matrix Exponential Method with Rational Krylov

Subspaces

17:00 Hao Zhuang, Shih-Hung Weng, Chung-Kuan Cheng (Department of Computer

Science and Engineering, University of California, San Diego)

C5-6 Interconnection Allocation Between Functional Units And Registers in High

Level Synthesis

17:15 Cong Hao, Nan Wang, Song Chen, Takeshi Yoshimura, Min-You Wu (Shanghai Jiao

Tong University)

C5-7 Timing and Resource Constrained Leakage Power Aware Scheduling in

High-Level Synthesis

17:30

Nan Wang (Graduate School of Information, Production and Systems, Waseda

University), Cong Hao (Shanghai Jiao Tong University), Nan Liu, Haoran Zhang,

Takeshi Yoshimura (Graduate School of Information, Production and Systems,

Waseda University)

37

Wednesday, October 30, 15:45 – 17:45 Autumn & Winter Room (2nd

Floor)

Session D5 : Circuits and Systems for Wireless Communications (II)

Title

D5-1 FFT Design for OFDM-based Cognitive Radio Using a Reconfigurable Baseband

Processing Architecture (invited paper)

15:45 Wenqing Lu (Fudan University), Gerald E. Sobelman (University of Minnesota),

Xiaofang Zhou, Junyan Ren (Fudan University)

D5-2 VLSI Design of Fuzzy-Decision Bit-Flipping QC-LDPC Decoder

16:15

wenzhe zhao (Institute of Artificial Intelligence and Robotics, Xi'an Jiaotong

University), minjie lv, hongbin sun, nangning zheng (Xi'an Jiaotong University), tong

zhang (Renssellar Polytechnic Institute)

D5-3 A High-Throughput LDPC decoder For Optical Communication

16:30 Di Wu, Yun Chen, Yuebin Huang, Yeongluh Ueng, Lirong Zhang, Zeng Xiaoyang

(Fudan University)

D5-4 Reduced Complexity Implementation of Quasi-Cyclic LDPC Decoders by

Parity-Check Matrix Reordering

16:45

Jianing Su (Advanced Circuit and System Lab, Suzhou Institute of Nano-tech and

Nano-Bionics, Chinese Academy of Sciences), Zhenghao Lu (Department of

Electronics and Information Science, Soochow University)

D5-5 A Novel Joint Estimation and Compensation Algorithm for Non-idealities of

Analog Front-end in DC-OFDM System

17:00 Jiasen Huang, Hao Chen, Junyan Ren, Fan Ye (Institution of Microelectronics of

Fudan University)

Wednesday, October 30, 17:45 – 18:45

Wednesday, October 30, 17:45 – 18:45 Hall

Post Session (II)

Title

P2-01 A Linearized V_BE Bandgap Voltage Reference with Wide Temperature Range

Chen Xiaofei, Liu Fanhong, Zou Xuecheng (Huazhong University of Science and

Technology), Lin Shuangxi (Wuhan Institute of Technology)

P2-02 A novel current-mode versatile filter employing CCCDCC and MO-OTA

Sen Li, Jinguang Jiang, Xifeng Zhou, Zeyu Zhang (Wuhan University)

38

P2-03 Current-mode square-wave converter with current-rectifying function employing

MOCCII

Sen Li, Jinguang Jiang, Xifeng Zhou, Zeyu Zhang (Wuhan University)

P2-04 Design of A Novel All-CMOS Low Power Voltage Reference Circuit

Yusen Xu, Wei Hu, Fengying Huang, Jiwei Huang (Fuzhou university and Fujian

Integrated Circuit Design Center)

P2-05 Background Calibration Techniques for Multistage Pipelined ADCs with

Dynamic Element Matching and Pseudorandom Noise

Que Longcheng, Du Yiying, Lv JIan, Jiang Yadong (UESTC)

P2-06 FMSSQP: An Efficient Global Optimization Tool for the Robust Design of

Rail-to-Rail Op-Amp

Minghua Li, Dian Zhou (Department of Electrical Engineering, University of Texas at

Dallas, Richardson, TX, USA), Sheng-Guo Wang (Department of Engineering

Technology, University of North Carolina at Charlotte, NC, USA), Xuan Zeng (State

Key Laboratory of ASIC & System, Fudan University , China)

P2-07 A High-Efficiency High-Power BUCK Converter Based on Fully N-type Power

Transistors

Zhuo Wang, Yuan Dong, Xia Wang, Zekun Zhou, Xin Ming, Bo Zhang (State Key

Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic

Science and Technology of China)

P2-08 Low Noise Design and Measurement of 32-channel X-ray ROIC

Dan Liu, Chuan Jin (The First Research Institute of Ministry of Public Security)

P2-09 Theory and Hardware Implementation of an analog-to-Information Converter

Based On Compressive Sensing

Sujuan Liu, Meihui Zhang, Wenshu Jiang, Junshan Wang, Peipei Qi (College of

Electronic Information and Control Engineering, Beijing University of Technology)

P2-10 A 2.4 mW ,11.7±0.4dB ,3 to 5 GHz Wide-band LNA for Super-Regenerative

IR-UWB Receiver

Yi Peng, Bo Wang, Tongning Hu, Jinhai Zhang, Xin'an Wang (Shenzhen Graduate

School of Peking University)

P2-11 A Three-Stage LDO with Active Feedback Frequency Compensation and

Slew-Rate Enhancement

Tongning Hu, Bo Wang, Ke Lin, Yi Peng, Xin'an Wang (Shenzhen Graduate School of

Peking University)

P2-12 A Folded Current-Reused CMOS Power Amplifier for Low-Voltage 3.0–5.0 GHz

39

UWB Applications

Zhengyu Qian, Xiaole Cui, Bo Wang, Xiangrong Zhang, Chung-Len Lee (Peking

University Shenzhen Graduate School)

P2-13 A DLL Based Low-Phase-Noise Clock Multiplier with Offset-Tolerant PFD

Yuwen Wang, Fan Ye, Junyan Ren (State Key Laboratory of ASIC and Systems, Fudan

University)

P2-14 Co-Design of ESD Protection and LNA in RFIC

Yueguo Hao, Qiao Zhang, Xiaopeng Bai, Zitao Shi, Huainan Ma, Yuhua Cheng

(Shanghai Research Institute of Micro Electronics (SHRIME),Peking University)

P2-15 CMOS 1.2V Bandgap Voltage Reference Design

Chao Feng, Jinhui Wang, Wei Wu, Ligang Hou (Beijing University of Technology),

Jianbo Kang

P2-16 A Novel Digital Controller for Boost PFC Converter with High Power Factor and

Fast Dynamic Response

Daying Sun, Weifeng Sun, Qing Wang, Shen Xu, Shengli Lu (National ASIC System

Engineering Research Center, Southeast University)

P2-17 A Proposed Data Converter for Current Signal with Temperature-Compensated

Sample Resistor

Xiaozong Huang, Luncai Liu, Liu Fan, Jing Zhang, Wengang Huang, Yanlin Zhang,

Lei Yu (Analog IC Design Center, Sichuan Institute of Solid-state Circuits,

Chongqing, China; State Key Laboratory of Electronic Thin Films and Integrated

Devices, UESTC, Chengdu, China)

P2-18 A 1-V Startup Circuit for DC-DC Boost Converter

Yang Wenrong, Zhuang Liang-bo (Microelectronic Research & Development Center,

Shanghai University)

P2-19 A Wideband CMOS Low Noise Amplifier for Multistandard Wireless Receiver

Yuexing Yan, Laichun Yang, Yiqiang Zhao, Jianguo Ma, Guoxuan Qin (Tianjin

University)

P2-20 Mixed-Signal Verification Methods for Multi-Power Mixed-Signal

System-on-Chip (SoC) Design

Chao Liang (freescale semiconductor)

P2-21 An Integrated Stacked Transformer with large inductance at 900MHz

Hantian Xu, LongXiang Zhang, Xi Tan, Min Hao (State Key Lab of ASIC & System,

Fudan University)

40

P2-22 Ultra-Low Noise and High PSR LDO Design

Jiangpeng Wang (School of Electronic Information, Wuhan University), Jinguang

Jiang (GNSS Research Center, Wuhan University)

P2-23 Low-resistance wide-voltage-range analog switch for implantable neural

stimulators

Yunpu Hu (Institute of Microelectronics, Tsinghua University), Songping Mai, Yixin

Zhao (Shenzhen Key Laboratory of Information Science and Technology,Graduate

School at Shenzhen, Tsinghua University), Chun Zhang (Institute of Microelectronics,

Tsinghua University)

P2-24 A 1.8-V 14-bit Inverter-Based Incremental Sigma Delta ADC for CMOS Image

Sensor

Biao Wang, Meng Zhang, Xu Cheng, Qi Feng, Xiaoyang Zeng (Fudan University)

P2-25 Low Jitter Clock Driver for High-performance Pipeline ADC

Yun Chen, Chaojie Fan, Jianjun Zhou (School of Microelectronics, Shanghai Jiaotong

University)

P2-26 A 4-mW 8-b 600-MS/s 2-b-per-cycle SAR ADC with a capacitive DAC

Jian Mei, Jixuan Xiang, Huabin Chen, Fan Ye, Junyan Ren (State Key Laboratory of

ASIC & System)

P2-27 A 7.9-fJ/Conversion-Step 8-b 400-MS/s 2-b-per-cycle SAR ADC with A Preset

Capacitive DAC

Jixuan Xiang, Jian Mei, Hao Chang, Fan Ye (State Key Laboratory of ASIC & System)

P2-28 A High-Performance Current Sensing Circuit with Full-Phase Sampling

Capability

Ze-kun Zhou, Haiwu Xie, Yue Shi, Chuankui Wu, Jiangang Huang, Xin Ming, Bo

Zhang (State key Laboratory of Electronic Thin Films and Integrated Devices)

P2-29 Design of 13.56MHz Power Recovery Circuit with Signal Transmission for

Contactless Bank IC Card

Yang Li, Liji Wu, Xiangmin Zhang (Tsinghua University)

P2-30 A Small-area Low-power ADC Array for Image Sensor Applications

Shengyou Zhong, Libin Yao, Jiqing Zhang (Kunming institute of physics)

P2-31 A Novel Operational Transconductance Amplifier with High Gm Using Improved

Differential Current Redistribution Technique (DCRT)

Jing Zhu, Yunwu Zhang, Weifeng Sun, Shengli Lu (National ASIC System

Engineering Research Center, Southeast University)

41

P2-32 An Automatic Peak-Valley Current Mode Step-Up/Step-Down DC-DC Converter

With Smooth Transition

Yanzhao Ma, Shaoxi Wang, Shengbin Zhang, Xiaoya Fan (Northwestern

Polytechnical University)

P2-33 A Single Branch Charge Pump without Overstress for RFID Tag

Lei Cai (Faculty of Materials, Optoelectronics and Physics, Xiangtan University),

Xiaocheng Gu, Jiancheng Li, (College of Electronic and Engineering, National

University of Defense Technology), Chong Huang (UNICORE Technology), Cong Li

(College of Electronic and Engineering, National University of Defense Technology),

Qin Qin, Junping Guo

P2-34 A Universal Framework of Dual-Use Model for Both Performance and

Functionality Based on the Abstract State Machine

Zheng Xie, Xin’an Wang, Zhibin Lian, Qiuping Li, Shanshan Yong (Peking

University)

P2-35 Best Polarity Searching for Ternary FPRM Logic Circuit Area Based on Whole

Annealing Genetic Algorithm

Fei Sun, Pengjun Wang, Haizhen Yu (Ningbo University)

P2-36 A Peak Power Optimization Scheduling Algorithm for Multi-cycle Operation

Sun Qiang (Engineering college Mudanjiang Normal University)

P2-37 An Open 45nm PD-SOI Standard Cell Library Based on Verified BSIM SOI

Spice Model with Predictive Technology

GONG Liwei, XU Yuan, ZHANG Zhi, SHI Weiwei (Shenzhen University), Robert

K.F. Teng (California State University, Long Beach)

P2-38 Characteristics of n-MOSFETs with Stress Effects from Neighborhood Devices

Wei Tai, Lele Jiang, Wang Lei, Song Wen, Lifu Chang, Yuhua Cheng (ShangHai

Research Institute of MicroElectronics, Peking University)

P2-39 Device Parameter Variations of n-MOSFETS with Dog-bone Layouts

Lele Jiang, Song Wen, Wei Tai, Wang Lei, Lifu Chang, Yuhua Cheng(Shrime)

P2-40 An Integrated Development Environment for Reconfigurable Operators Array

Shanshan Yong, Xin'an Wang, Ying Cao, Yawei Lu, Zheng Xie (Peking University

Shenzhen Graduate School)

P2-41 A Parallel Sparse Linear System Solver for Large-scale Circuit Simulation based

on Schur Complement

Liuxi Qian, Dian Zhou (University of Texas at Dallas), Xuan Zeng, Fan Yang (Fudan

University), Shengguo Wang (University of North Carolina)

42

P2-42 Evaluation of Cyanoethyl Pullulan material as the dielectric layer for EWOD

devices

Jianfeng Chen, Yuhua Yu, Xiangyu Zeng, Jian Li, Jia Zhou (ASIC and System State

Key Lab, Department of Microelectronics, Fudan University)

P2-43 Study of a High-order Filter Based on Hybrid SETMOS

Li Cai, Qiang Kang, Dang yuan Shi ( Air Force Engineering University of CPLA)

P2-44 Analytic Models for Electric Potential and Subthreshold Swing of the

Dual-Material Double-Gate MOSFET

Ping Xiang, Zhihao Ding, Guangxi Hu, Hui Chol Ri, Ran Liu, Lingli Wang (Fudan

University), Xing Zhou (Nanyang Technological University, Singapore)

P2-45 Three-Dimensional On-Chip Inductor Design Based on Through-Silicon Vias

Feng Liang, Si-Qi Zhao (University of Electronic Science and Technology of China),

Aobo Chen (University of Electronic Science and Technology of China), Gaofeng

Wang (Wuhan University)

P2-46 Analytical Model of the Coupling Capacitance between Cylindrical Through

Silicon Via and Horizontal Interconnect in 3D IC

Wenjian Yu, Siyu Yang, Qingqing Zhang (Tsinghua University)

P2-47 TSVs-aware Floorplanning for 3D Integrated Circuit

Jieliang Lu, Qin Wang, Jing Xie, Zhigang Mao (School of Microelectronics, Shanghai

Jiaotong University, Shanghai 200240, China)

P2-48 The Annealing Effect of Chemical Vapor Deposited Graphene

Y.L. Shen, P. Zhou, L.H. Wang, Q.Q. Sun, Q.Q. Tao, P.F. Wang, S.J. Ding, D.W.

Zhang (ASIC & System State Key Lab, School of Microelectronics, Fudan University)

P2-49 Barrier and low k Polish with a Novel Alkaline Barrier slurry combining with

FA/O chelating agent

Jing-Bo Xu, Feng-Hui, Wen-Zhong Xu, Xu-Wang, Peng-Fei Nan (Fudan University),

Yu-Ling Liu (Hebei University of Technology), Xin-Ping Qu (Fudan University)

P2-50 A New Fast Median Filtering Algorithm Based on FPGA

Leiou Wang (Institute of Acoustics, Chinese Academy of Sciences)

P2-51 A Power-Constrained Contrast Enhancement Algorithm for AMOLED Display

Using Histogram Segmentation

Wenhua Qiang ,Qi Zhang, Wei Miao, Guohong Li, Hui Wang, Songlin Feng

(Shanghai Advanced Research Institute, Chinese Academy of Sciences)

43

Thursday, October 31, 10:15 – 12:15

Thursday, October 31, 10:15 – 12:15 Jade Room (3rd

Floor)

Session A6 : Application-Specific SoCs

Title

A6-1 Efficient Implementation of 3780-point FFT on a 16-Core Processor

10:15 Haofan Yang (Fudan University), Kedong Chen (Shanghai University of Engineering

Science), Shengqiong Xie, Minge Jing, Zhiyi Yu, Xianyang Zeng (Fudan University)

A6-2 Design of a High Throughput Configurable Variable-Length FFT Processor

Based on Switch Network Architecture

10:30 Renfeng Dou, Yifan Bo, Jun Han, Xiaoyang Zeng (State Key Laboratory of ASIC and

System, Fudan university)

A6-3 A High-Resolution TDC Implemented in a 90nm Process FPGA

11:00

Jinmei Lai, Yanquan Luo, Qi Shao (State Key Laboratory of ASIC and System, Fudan

University), Lichun Bao, Xueling Liu (Beijing Aerospace Control Center)

A6-4 A Temperature Sensing Front-end Using CMOS Substrate PNP Transistors

11:15 Dexin Kong, Ting Yu, Fengqi Yu (Shenzhen Institutes of Advanced Technology,

Chinese Academy of Sciences)

A6-5 Scan-based Attack against Trivium Stream Cipher Independent of Scan

Structure

11:30 Mika Fujishiro, Masao Yanagisawa, Nozomu Togawa (Dept. of Computer Science and

Engineering, Waseda University)

Thursday, October 31, 10:15 – 12:15 Coral Room (3rd

Floor)

Session B6 : Analog Circuits (I)

Title

B6-1 A Nonlinear Weighted PID Controlled 12V to 1V DC-DC Converter with

Transient Suppression (invited paper)

10:15 Chu-Hsiang Chia, Pui-Sun Lei, Robert Chen-Hao Chang, Wei-Chih Wang (National

Chung Hsing University)

B6-2 An Integrated Zigbee Transmitter and DC-DC Converter On 0.18µm HV and RF

CMOS Technology (invited paper)

10:45 Chaojiang Li, Dawn Wang, Myra Boenke, Ted Letavic, John Cohn (IBM)

B6-3 A 25-Gb/s 32.1-dB CMOS Limiting Amplifier for Integrated Optical Receivers

44

(invited paper)

11:15 Zhengxiong Hou, Yipeng Wang, Quan Pan, C. Patrick Yue (The Hong Kong

University of Science and Technology)

B6-4 A Novel Dynamic Element Match Technique in Current-Steering DAC

11:45 Baoguang Liu, Yuan Wang, Guangliang Guo, Song Jia, Xing Zhang (Institute of

Microelectronics, Peking University)

B6-5 A Practical Method for Auto-Design and Optimization of DC-DC Buck

Converter

12:00 Guanming Huang, Dian Zhou (University of Texas at Dallas), Xuan Zeng (Fudan

University), Shengguo Wang (University of North Carolina at Charlotte)

Thursday, October 31, 10:15 – 12:15 Moon-Glow Room (2nd

Floor)

Session C6 : MEMS, Nanoelectronics, and New Device (I)

Title

C6-1 Design and Analysis of Nano-scale Bulk FinFETs (invited paper)

10:15 Jong-Ho Lee, Kyu-Bong Choi, Jongmin Shin (Seoul National University)

C6-2 Network Functions for Characterization of Semiconductor Nanostructures

(invited paper)

10:45 Thomas Wong (Illinois Institute of Tchnology), Tao Shen (Kunming University of

Science and Technology)

C6-3 Fabrication of Silicon-Based MEMS Capacitive Microphone Structure with Thin

Starting Wafer

11:15 Xiaoxu Kang, Chao Yuan, Qingyun Zuo, Changwa Yao, Shoumian Chen, Yuhang

Zhao, Yilin Yan, Yuanjun Xu, Weiping Zhou (Shanghai IC R&D Center)

C6-4 Ultra-low frequency P(VDF-TrFE) piezoelectric energy harvester on flexible

substrate

11:30

Zhaoyang Pi, Lun Zhu, Jingwei Zhang, Dongping Wu, David Wei Zhang (Department

of Microelectronics, Fudan University), Zhi-Bin Zhang, Shi-Li Zhang (Solid-State

Electronics, The Ångström Laboratory, Uppsala University)

C6-5 Ag dendrite formed on the Cu pyramids as SERS substrate

11:45 Peng-Fei Nan, Xu Wang, Xin-Ping Qu (State key lab of ASIC and system, Department

of Microelectronics, Fudan University)

C6-6 Simulation Design for Continuous Separating and 3D Focusing of Particles Based

on Inertial Microfluidics

45

12:00 Jian Li, Xiangyu Zeng, Jia Zhou (ASIC and System State Key Lab, Department of

Microelectronics, Fudan University)

Thursday, October 31, 10:15 – 12:15 Autumn & Winter Room (2nd

Floor)

Session D6 : VLSL New Processing, New Technologies and their integration (II)

Title

D6-1 Investigation on Effectiveness of Series Gate Resistor in CDM ESD Protection

Designs (invited paper)

10:15 Yuanzhong(Paul) Zhou, Alan W.Righter, Jean-Jacques Hajjar (Analog Devices Inc.)

D6-2 Layout Relocation for EUV Mask Preparation with Defects (invited paper)

10:45 Martin D.F. Wong (University of Illinois at Urbana-Champaign)

D6-3 The failure recovery of the chemiluminescence detector based on EWOD device

11:15 Xiangyu Zeng, Kaidi Zhang, Jianfeng Chen, Guowei Tao, Jia Zhou (Fudan

University)

Thursday, October 31, 13:30 – 15:30

Thursday, October 31, 13:30 – 15:30 Jade Room (3rd

Floor)

Session A7 : Special Session (II)

Advances in Parasitic Extraction and Circuit Simulation

Title

A7-1 Fast transistor-level circuit simulation and variational analysis via the

ultra-compact virtual source model (invited paper)

13:30 Yang Zhang, Quan Chen, Ngai Wong (Department of Electrical and Electronic

Engineering, The University of Hong Kong)

A7-2 pmm: A Matlab Toolbox for Passive Macromodeling in RF/mm-wave Circuit

Design (invited paper)

14:00 Zuochang Ye (Tsinghua University)

A7-3 Sparse Basis Pursuit on Automatic Nonlinear Circuit Modeling (invited paper)

14:30 Yu-Chung Hsiao, Luca Daniel (MIT)

A7-4 RWCap2: Advanced Floating Random Walk Solver for the Capacitance

46

Extraction of VLSI Interconnects (invited paper)

15:00 Wenjian Yu (Tsinghua University)

Thursday, October 31, 13:30 – 15:30 Coral Room (3rd

Floor)

Session B7 : Analog Circuits (II)

Title

B7-1 Design Automation of Analog Circuit Considering the Process Variations (invited

paper)

13:30 Dian Zhou, Guanming Huang (University of Texas at Dallas)

B7-2 A Process Variation Insensitive Bandgap Reference with Self-Calibration

Technique

14:00 Ling Du, Ning Ning, Kejun Wu, Yang Liu, Qi Yu (University of Electronic Science

and Technology of China)

B7-3 A CMOS PGA with DCOC and I/Q mismatch calibration

14:15 Xingpeng Pan, Rui Guan, Dongpo Chen (Center for Analog/RF Integrated Circuits

(CARFIC), School of Microelectronics Shanghai Jiao Tong University)

B7-4 VCCS Controlled LDO with Small On-Chip Capacitor

14:30 Qiuli Li, Yao Qian, Danzhu Lv, Zhiliang Hong (State Key laboratory of ASIC and

Systems, Fudan University)

B7-5 Analog Routing Considering Min-Area Constraint

14:45 Weijie Chen, Hailong Yao, Yici Cai, Qiang Zhou (Tsinghua University)

B7-6 3D Hybrid Modeling of Substrate Coupling Noise in Lightly Doped Mixed-Signal

ICs

15:00 Yongsheng Wang, Fang Li, Hualing Yang, Yonglai Zhang, Yanhui Ren (Harbin

Instritute of Technology)

B7-7 A VCO with F-V Linearization Techniques for CNS Application

15:15 Peng Chen, Rui Guan, Dongpo Chen (Center for Analog/RF Integrated Circuits

(CARFIC), School of Microelectronics Shanghai Jiao Tong University)

Thursday, October 31, 13:30 – 15:30 Moon-Glow Room (2nd

Floor)

Session C7 : MEMS, Nanoelectronics, and New Device (II)

Title

47

C7-1 Graphene electronics and photonics (invited paper)

13:30 Tony Low (IBM TJ Watson Research Center)

C7-2 Toward Microwave Integrated Circuits on Flexible Substrates (invited paper)

14:00 Jung-Hun Seo (University of Wisconsin-Madison), Weidong Zhou (University of Texas

at Arlington), Zhenqiang Ma (University of Wisconsin-Madison)

C7-3 An Empirical Model for Static I-V Characteristics of Double Gate Tunneling

Field Effect Transistor

14:30 Daming Huang, Chengjun Yao, Daohang Shi, Mingfu Li (Department of

Microelectronics Fudan University)

C7-4 A New High Performance RF LDMOS with Vertical n+n-p-p+ Drain Structure

14:45 Xiaofei Chen, Yading Shen, Xuecheng Zou (Department of Microelectronics,

Huazhong University of Science and Technology), Shuangxi Lin, Wanghui Zou

Thursday, October 31, 15:45 – 17:45

Thursday, October 31, 15:45 – 17:45 Jade Room (3rd

Floor)

Session A8 : Circuits and Systems for Wireless Communications (III)

Title

A8-1 Full Software Radio Transceivers (invited paper)

15:45

Yann Deval, Francois Rivet (University of Bordeaux - Bordeaux Institute of

Technology), Yoan Veyrac, Nicolas Regimbal (Atlantic Innovation), Patrick Garrec,

Richard Montigny (Thales Aerospace), Didier Belot, Thierry Taris

A8-2 Analysis inductively coupling wireless connection in 3D package (invited paper)

16:15 Baocun Wang, Guoyi Yu, Xiaofei Chen, Li Zhang, Xavier Zou (Huazhong University

of Science and Technology)

A8-3 Low-complexity Synchronizer Used in DC-OFDM UWB System

16:45 Bing Jing, Hao Chen, Fan Ye, Ning Li, Junyan Ren (Fudan university)

A8-4 A Low-Cost Fast Fourier Transform Processor for DC-OFDM System

17:00 Zhenqi Liu, Fan Ye, Ning Li, Junyan Ren (State Key laboratory of ASIC & system,

Fudan University)

A8-5 An Efficient Low-cost Fixed-point Digital Down Converter with Modified Filter

Bank

48

17:15 Hanyu Wang, Jinxiang Wang, Yu Lu, Fangfa Fu (Microelectronics Center, Harbin

Institute of Technology)

Thursday, October 31, 15:45 – 17:45 Coral Room (3rd

Floor)

Session B8 : Digital Circuits

Title

B8-1 Self-Synchronous Circuit Designs, SSFPGA and SSRSA for Low Voltage

Autonomous Control and Tamper Resistivity (invited paper)

15:45 Makoto Ikeda (University of Tokyo)

B8-2 Key Component Designs of Subthreshold Baseband Processors in Passive RF

Device (invited paper)

16:15 Weiwei Shi (Shenzhen University), Chiu-Sing Choy (Chinese University of Hong

kong), Robert Teng

B8-3 Controlling-Value-Based Power Gating Considering Controllability Propagation

and Power-off Probability

16:45 Zhe DU, Yu JIN, Shinji KIMURA (Waseda University)

B8-4 Robust Current-Mode On-Chip Interconnect Signaling Scheme in Deep

Submicron

17:00 Xinsheng Wang, Mingyang Hu, Mingyan Yu (Harbin Institute of Technology)

B8-5 An Extensible and Real-time Compressive Sensing Reconstruction Hardware

for WBANs using OMP

17:15 Weijing Shi, Yi Li, Jun Han, Xu Cheng, Xiaoyang Zeng (State Key Laboratory of

ASIC and System, Fudan University)

B8-6 Improved Unified Interconnect Unit for High Speed and Scalable FPGA

17:30 Lei Li, Jian Wang, Jinmei Lai (Department of Microelectronics, Fudan University)

Thursday, October 31, 15:45 – 17:45 Moon-Glow Room (2nd

Floor)

Session C8: MEMS, Nanoelectronics, and New Device (III)

Title

C8-1 Transition Metal Dichalcogenides – A New Material Class for Semiconductor

Electronics? (invited paper)

15:45 Frank Schwierz (Technische Universität Ilmenau)

49

C8-2 Integrated Amorphous-Si TFT Circuits for Gate Drivers on LCD Panels (invited

paper)

16:15

Nan-Xiong Huang (Feng Chia University), His Rong Han, Wen Tui Liao, Chih Hung

Huang, Wen Chun Wang (Wintek Corp.), Miin-Shyue Shiau, Ching-Hwa Cheng,

Hong-Chong Wu, Heng-Shou Hsu, Juin J. Liou (Central Florida University),

Shry-Sann Liao (Feng Chia University), Ruei-Cheng Sun, Guang-Bao Lu (Fu Jian

University of Technology), Don-Gey Liu (Feng Chia University)

C8-3 Growth of semiconducting 2D layered materials on graphene (invited paper)

16:45 W. Wang, K. K. Leung, Y. Y. Hui, P.W.K. Fong, S.P. Lau, C. Surya (The Hong Kong

Polytechnic University)

C8-4 A Novel Scaling Theory for Fully-Depleted Omega-Gate(ΩG) MOSFETs (invited

paper)

17:15 Gao, Hong-Wun, Te-Kuang Chiang (Member, IEEE)

50

Paper Submission Number v.s. Session Presentation Number

Regular Papers

ID NO

457 A6-4

459 P1-35

461 P2-05

466 B7-2

469 P1-25

470 P2-01

471 P2-34

474 P2-02

475 P2-03

476 P2-38

477 P1-26

479 P2-39

480 P1-01

481 A6-1

484 P1-27

485 P2-44

486 P2-50

487 B7-6

489 C4-2

490 C3-3

492 D1-3

493 P1-36

494 P2-04

496 B2-3

497 B4-2

498 P2-51

499 P2-40

502 P2-45

505 A5-3

507 P2-06

508 P1-02

509 P2-48

512 P2-35

514 P1-03

515 P1-37

516 C3-4

522 P2-36

525 P1-38

531 C6-3

532 P1-15

533 P2-46

534 P1-04

535 P2-07

536 B5-1

537 D1-4

538 P1-43

539 D2-1

542 B4-3

544 P1-28

547 B4-4

548 A2-3

549 A5-4

551 P1-05

553 C5-4

554 P1-06

556 A1-2

559 C7-3

560 P1-07

563 P1-29

564 D5-3

565 D5-2

567 D4-2

568 B1-6

570 C7-4

571 P2-08

572 P2-47

573 C4-4

574 B5-2

575 P2-37

576 A3-1

577 A6-5

580 P2-09

583 C4-5

584 C5-5

588 P2-10

590 P2-11

591 P2-12

592 P1-51

593 P1-08

594 P1-47

596 P1-30

600 C4-3

602 A1-3

604 P2-13

605 P1-09

611 P2-43

613 B5-3

617 P2-14

620 B5-4

621 C3-2

622 B4-5

624 P1-50

625 P1-10

627 D2-2

628 C6-4

631 B6-5

633 B3-3

634 B8-3

635 P2-15

636 P1-42

637 P2-16

639 B3-4

640 P2-17

641 C1-2

642 P2-41

643 B1-1

644 D4-3

645 B5-5

646 D5-4

647 A8-4

649 P1-39

650 P1-11

651 P2-18

51

652 C5-2

653 C4-6

655 P2-19

657 P1-31

659 P1-48

660 P1-44

661 P2-20

662 A3-2

663 P2-21

665 A3-3

667 A1-4

668 P1-12

670 P2-23

672 B8-4

678 P1-13

679 P2-22

680 P1-34

681 D5-5

682 A3-4

684 B1-2

687 C5-3

688 D2-3

690 B1-3

691 A8-3

692 P2-24

694 P2-25

696 C4-7

700 B5-6

701 C5-7

702 C5-6

703 A1-5

707 B2-4

708 A5-5

711 B8-6

712 C1-3

713 P1-14

715 B6-4

716 P2-42

717 P2-26

719 P1-16

721 A6-2

722 P1-17

723 A3-5

724 B8-5

725 D4-5

726 B5-7

727 B7-7

728 C1-4

729 P1-18

730 B5-8

733 B7-3

734 A3-6

736 B7-4

737 P2-27

738 P1-40

740 A3-7

832 P2-49

743 D2-4

744 A8-5

746 D3-3

747 A1-6

749 D3-4

750 P1-41

751 D3-5

752 A2-4

753 B4-6

754 C6-5

756 P1-32

757 A6-3

759 P1-19

760 B1-4

762 A2-6

763 B4-7

764 D4-4

765 P2-28

766 A2-5

768 P2-29

769 P2-31

770 B1-5

772 P2-30

774 P1-20

775 A3-8

776 P1-49

779 A5-6

781 P2-32

784 C6-6

785 P2-33

786 P1-45

789 P1-23

792 P1-46

793 P1-21

794 P1-22

797 B7-5

798 C2-2

803 C2-3

804 C2-4

812 P1-33

814 B3-5

815 B3-6

816 P1-24

820 C3-5

821 D6-3

52

Invited Papers

ID No

488 A2-1

491 D1-2

503 B2-2

524 D3-2

528 C4-1

529 A4-2

530 A7-1

543 C6-2

546 B4-1

552 C7-1

557 A4-1

585 D1-1

614 B6-1

615 A5-1

619 A2-2

623 B2-1

626 C7-2

629 B7-1

632 A4-4

638 C5-1

658 A7-2

671 D5-1

673 C6-1

676 B3-2

677 A1-1

683 B8-2

695 D3-1

783 C8-1

799 B3-1

808 D4-1

809 A5-2

810 B6-2

813 A8-1

818 A7-4

819 B8-1

822 A4-3

823 C8-2

824 D6-1

825 C1-1

826 D6-2

827 C3-1

829 A8-2

830 C2-1

831 B6-3

833 C8-3

837 A7-3

850 C8-4

53

Authors of Paper v.s. Session Presentation Number

Regular Papers

Author NO.

A

An-Cheng Ou A2-3

Anquan Jiang P1-49

Anwen Huang P1-01

Aobo Chen P2-45

B

Baodi Yuan P1-21

Baoguang Liu B6-4

Bei Xia C4-4

Biao Wang P2-24

Bill Yang Liu B1-5

Bin Liang D1-3

Bin Wu P1-39

Bing Jing A8-3

Bing Jing P1-37

Bing OuYang P1-30

Bingbing Zhang B3-5

Bingbing Zhang B3-6

Bo Wang B3-3

Bo Wang B4-5

Bo Wang P2-10

Bo Wang P2-11

Bo Wang P2-12

Bo Zhang P2-07

Bo Zhang P2-28

C

Changwa Yao C6-3

Chao Feng P2-15

Chao Liang P2-20

Chao Lu A2-6

Chao Meng P1-48

Chao Song P1-01

Chao Wang D2-1

Chao Yuan C6-3

Chaohuan Hou A1-2

Chaohuan Hou A5-3

Chaohuan Hou C3-4

Chaohuan Hou P1-03

Chaohuan Hou P1-24

Chaojie Fan P2-25

Chen Hu B4-3

Chen Hu B5-4

Chen Xiaofei P2-01

Chengjun Yao C7-3

Chenlu Wu P1-21

Chenxi Deng P1-23

Chin-Chi Teng C5-4

Chin-Chih Chang C5-4

Chixiao Chen B1-3

Chixiao Chen B5-5

Chixiao Chen B5-6

Chong Huang B3-5

Chong Huang B3-6

Chong Huang P2-33

Chong Huang B4-6

Chuan Jin P2-08

Chuankui Wu P2-28

Chun Zhang B5-2

Chun Zhang P2-23

Chung-Kuan

Cheng

C5-4

Chung-Kuan

Cheng

C5-5

Chung-Len Lee P1-44

Chung-Len Lee D1-4

Chung-Len Lee D2-1

Chung-Len Lee P1-42

Chung-Len Lee P2-12

Chun-Min Zhang C3-2

Cong Hao C5-6

Cong Hao C4-6

Cong Hao C5-7

Cong Li B3-5

Cong Li B3-6

Cong Li P2-33

Cong Liu A5-4

Cong Liu A5-5

Cong Shi P1-14

Cunlin Dong P1-48

D

D.M. Huang D4-2

D.W. Zhang P2-48

D.Y. Lu D4-2

Dajiang Zhou A5-6

Daming Huang C7-3

Dan Chen C4-7

Dan Liu P2-08

Dang yuan Shi P2-43

Danzhu Lv B7-4

Daohang Shi C7-3

David Wei Zhang C6-4

David Wei Zhang C3-2

Daying Sun P2-16

Dennis Jen-Hsin

Huang

C5-4

Dexin Kong A6-4

Dexue Zhang A3-4

Dexue Zhang P1-16

Di Wu D5-3

Dian Zhou C1-2

Dian Zhou B6-5

Dian Zhou C4-5

Dian Zhou P2-06

Dian Zhou P2-41

Diancheng Wu C3-4

Dongbing Fu D3-3

Donghui Wang A1-2

Donghui Wang B1-4

Donghui Wang P1-03

Donghui Wang P1-24

Dongping Wu C6-4

Dongpo Chen B5-8

Dongpo Chen B7-3

54

Dongpo Chen B7-7

Du Yiying P2-05

Dun Yan B3-5

Dun Yan B3-6

Dun Yan B5-3

Dunshan Yuan B2-3

Dunshan Yuan B4-2

E

Edouard NGOYA B4-5

F

Fan Jiang B5-6

fan liu P1-05

Fan Meng B5-8

Fan Yang P2-41

Fan Ye A8-3

Fan Ye A8-4

Fan Ye B1-3

Fan Ye B5-5

Fan Ye P1-37

Fan Ye P2-13

Fan Ye P2-26

Fan Ye D5-5

Fan Ye P2-27

Fang Li B7-6

Fang Wang A3-1

Fang Wang P1-10

Fang Wang P1-21

FangFa Fu A3-7

Fangfa Fu A8-5

Fei Sun P2-35

Fei Zhao B4-3

Fen Ge A3-2

Fen Ge A3-3

Feng Liang P2-45

Feng Zhang B5-7

Fengchang Lai B1-2

Feng-Hui P2-49

Fengqi Yu A6-4

Fengying Huang P2-04

G

Gang Du P1-47

Gang He A5-6

Ganggang Zhang D2-3

Gaofeng Wang P2-45

Gaowei Xu P1-02

Geng Zhong C4-4

GONG Liwei P1-07

GONG Liwei P2-37

Guang Chen D2-2

Guangliang Guo B6-4

Guangxi Hu P2-44

Guangyan Ma B5-4

Guangyi Lu D2-3

Guanming Huang B6-5

Gui Feng A3-2

Gui Feng A3-3

GUO Yang P1-08

Guoan Chen P1-45

Guohong Li B2-3

Guohong Li B4-2

Guohong Li P2-51

Guoqiang Hang P1-22

Guowei Tao C3-5

Guowei Tao D6-3

Guoxuan Qin P2-19

Guoyi Yu P1-36

Guoyong Shi C4-3

Guoyue Jiang A3-1

H

H.Y. Yu D4-2

Hailong Yao B7-5

Hailong Yao C2-2

Haiwu Xie P2-28

Haizhen Yu P2-35

Hanbin Hu C4-3

Hantian Xu P1-38

Hantian Xu P2-21

Hanyang Xu A1-5

Hanyu Wang A8-5

Hao Chang P2-27

Hao Chen A8-3

Hao Chen D5-5

Hao Min B1-1

Hao Min B3-4

Hao Min P1-11

Hao Min P1-38

Hao Zhuang C5-5

Haofan Yang A6-1

Haopeng Liu A1-4

Haoran Zhang C5-7

Haoran Zhang C4-6

Hengliang Zhu C1-4

Heqing Xu P1-47

Hong Liu P1-11

hongbin sun D5-2

Hongming Chen P1-27

Hongwei Li D2-2

Hongyan Yang P1-50

hongyi Wang B3-6

Hongyi Wang B5-3

Hongying Wang B1-2

Huabin Chen P2-26

Huagang Li C1-3

Huainan Ma P2-14

Hualing Yang B7-6

Huan Ying P1-24

huatao zhao P1-15

Hui Chol Ri P2-44

Hui Li D4-3

Hui Li P1-48

Hui Wang B2-3

Hui Wang B4-2

Hui Wang P2-51

Huijuan Cheng D2-2

J

J.G. Wu D4-5

Jia Zhou C3-5

Jia Zhou C6-6

Jia Zhou D6-3

Jia Zhou P2-42

Jiajia Jiao D2-4

Jiajia Shao P1-20

Jian Cao D2-3

Jian Li C6-6

Jian Li P2-42

Jian Mei P2-26

Jian Mei P2-27

55

Jian Wang B8-6

Jian Wang C1-3

Jian Wang C4-7

Jian Zhou C4-4

Jianbo Kang P2-15

Jianbo Kang P1-50

Jiancheng Li B4-6

Jiancheng Li B5-3

Jiancheng Li P2-33

Jiancheng Li B3-5

Jiancheng Li B3-6

Jianfei Xu B1-1

Jianfeng Chen D6-3

Jianfeng Chen P2-42

Jiang Jinguang P1-13

Jiang Yadong P2-05

Jiangang Huang P2-28

Jiangpeng Wang P2-22

Jianguo Ma P2-19

Jianguo Yang D4-5

Jianing Su D5-4

Jianjun Zhou P2-25

Jianming Lei P1-36

Jianming Yu A3-5

Jianwen Lu B4-3

Jiasen Huang D5-5

Jichun Bu P1-04

Jie Cheng P1-31

Jie Lin A3-5

Jie Lin A3-6

Jie Yang P1-14

Jie-An Huang B4-4

Jieliang Lu P2-47

Jieqiong Cheng A2-4

Jing Xie P1-29

Jing Xie P2-47

Jing Zhang P2-17

Jing Zhu P2-31

Jingang Wu P1-48

Jing-Bo Xu P2-49

Jinguang Jiang P2-02

Jinguang Jiang P2-03

Jinguang Jiang P2-22

Jingwei Lu C5-4

Jingwei Zhang C6-4

Jinhai Zhang B3-3

Jinhai Zhang P2-10

Jinhai Zhang B4-5

Jinhui Wang P1-50

Jinhui Wang P2-15

Jinian Bian C2-3

Jinian Bian C2-4

Jinmei Lai A6-3

Jinmei Lai C4-7

Jinmei Lai A1-5

Jinmei Lai B8-6

Jinmei Lai C1-3

Jinming Huang D4-4

Jinming Zhao C2-2

Jinxiang Wang A8-5

Jinxiang Wang A3-7

Jiongyao ye P1-15

Jiqing Zhang P2-30

Jiwei Huang P2-04

Jixin Zhang C2-3

Jixuan Xiang P2-26

Jixuan Xiang P2-27

Jiyu Chen P1-47

Jizhong Shen P1-09

Juan Gu P1-51

Jun Dong C1-4

Jun Han A2-5

Jun Han A6-2

Jun Han B8-5

Jun Han P1-02

Jun Xu B5-5

Jun Xu B5-6

Junfeng Zhu P1-05

Junping Guo P2-33

Junshan Wang P2-09

Junsong Zheng A2-4

Junyan Ren B5-6

Junyan Ren D5-5

Junyan Ren A8-3

Junyan Ren A8-4

Junyan Ren B1-3

Junyan Ren B4-7

Junyan Ren B5-5

Junyan Ren P1-37

Junyan Ren P2-13

Junyan Ren P2-26

Junyu Wang B2-4

Junyu Wang P1-40

K

Kai Liao P1-30

Kaidi Zhang C3-5

Kaidi Zhang D6-3

Kaifeng Xia P1-39

Kailiang Zhang P1-27

Kaisheng Ma P1-30

Ke Huang B5-1

Ke Huang B5-2

Ke Lin P2-11

Kedong Chen A6-1

Kejun Wu B7-2

L

L.H. Wang P2-48

Laichun Yang P2-19

Lei Cai B3-5

Lei Cai B3-6

Lei Cai P2-33

Lei Li B8-6

Lei Yu P2-17

Leiou Wang P2-50

Lele Jiang P2-38

Lele Jiang P2-39

Li Cai P2-43

Li Sen P1-13

Liang Wang A3-7

Libin Yao P2-30

Lichun Bao A6-3

Lichun Bao C4-7

Lifu Chang P2-38

Lifu Chang P2-39

Ligang Hou P1-50

Ligang Hou P2-15

Liji Wu B5-1

Liji Wu P1-20

Liji Wu P1-32

Liji Wu P2-29

56

Liji Wu P1-46

Lin Shuangxi P2-01

Ling Du B7-2

Ling Ming P1-25

Linghan Wu B5-2

Lingli Wang P1-21

Lingli Wang P1-43

Lingli Wang P2-44

Lingzhi Fu B2-4

Lingzhi Fu P1-40

Linshan Zhang A2-4

Lirong Zhang D5-3

Liu Fan P2-17

Liu Fanhong P2-01

Liuxi Qian C1-2

Liuxi Qian P2-41

Long He P1-49

Longxiang Zhang P1-38

LongXiang Zhang P2-21

Lu Liu D3-3

Lu Sha C5-4

Lu Sun D3-4

Lu Sun P1-39

Lu Yu A3-7

Lun Zhu C6-4

Luncai Liu P2-17

Lv JIan P2-05

M

MA Zhuo P1-08

Maoqiang Duan P1-35

Maoqun Yao P1-09

Masao Yanagisawa A1-6

Masao Yanagisawa A6-5

Masashi Tawada A1-6

Mei Chen P1-25

Meihui Zhang P2-09

Meng Zhang P2-24

Meng-Chou Chang P1-12

Meng-Ting Hsu A2-3

Meng-Ting Hsu B1-6

Meng-Ting Hsu B4-4

Mika Fujishiro A6-5

Min Hao P2-21

Min Xie C1-4

Minge Jing A6-1

Mingfu Li C7-3

Ming-Fu Li D4-2

Minghua Li P2-06

Mingyan Yu B8-4

Mingyang Hu B8-4

minjie lv D5-2

Minxuan Zhang P1-01

Min-You Wu C5-6

N

Na Ding P1-31

Na Wang P1-43

Na Yan B1-1

Nan Liu C5-7

Nan Wang C5-6

Nan Wang C4-6

Nan Wang C5-7

nangning zheng D5-2

Nanjian Wu P1-14

Ning Li A8-3

Ning Li A8-4

Ning Li B4-7

Ning Li P1-37

Ning Ning B7-2

Ning Wang B2-3

Ning Wang B4-2

Ning Wu A3-2

Ning Wu A3-3

Ning Xu C2-3

Ning Xu C2-4

Ningxi Liu D4-3

Ningxi Lu P1-48

Ningyuan Yin P1-46

Nozomu Togawa A1-6

Nozomu Togawa A6-5

P

P. Zhou P2-48

P.F. Wang D4-2

P.F. Wang P2-48

Peipei Qi P2-09

Peiyi Zhao P1-22

Peng Chen B7-7

Peng Li P1-01

Peng-Fei Nan C6-5

Peng-Fei Nan P2-49

Peng-Fei Wang C3-2

Pengjun Wang P1-19

Pengjun Wang P2-35

Pengwen Chen C5-4

Ping Tao P1-43

Ping Xiang P2-44

Po-Yu Lee B1-6

Q

Q.Q. Sun P2-48

Q.Q. Tao P2-48

Q.T. Zhou D4-5

Qi Feng P2-24

Qi Shao A6-3

Qi Wang A1-2

Qi Wang A5-3

Qi Wang P1-03

Qi Yang P1-34

Qi Yu B7-2

Qi Zhang B2-3

Qi Zhang B4-2

Qi Zhang P2-51

Qiang Kang P2-43

Qiang Zhang B1-3

Qiang Zhou B7-5

Qiang Zhou C2-2

Qiao Zhang P2-14

Qin Qin B3-5

Qin Qin B3-6

Qin Qin P2-33

Qin Wang P2-47

Qing Dong D4-3

Qing Wang P2-16

Qing Zhang P1-17

Qing-Qing Sun C3-2

Qingqing Zhang P2-46

Qingtian Zou P1-48

Qingyun Zuo C6-3

Qiuli Li B7-4

Qiuping Li P2-34

57

Quanquan Li A1-2

Quanquan Li A5-3

Quanquan Li C3-4

Que Longcheng P2-05

R

R. Huang D4-5

Ran Liu P2-44

Ran Zhang C4-2

Renfeng Dou A6-2

Robert K.F. Teng P1-07

Robert K.F. Teng P2-37

Rui Guan B5-8

Rui Guan B7-3

Rui Guan B7-7

Rui He B1-1

Rui Li P1-51

Rui Wei B5-6

Rui Zhu P1-46

Ryan Huang P1-48

S

S.J. Ding D4-2

S.J. Ding P2-48

Satoshi Goto A5-6

Sen Li P2-02

Sen Li P2-03

Shanshan Yong P2-40

Shanshan Yong P2-34

Shaojun Wei A3-1

Shaoxi Wang P2-32

Shen Xu P2-16

Shengbin Zhang P2-32

Sheng-Guo Wang P2-06

Shengguo Wang B6-5

Shengguo Wang C1-2

Shengguo Wang P2-41

Sheng-Guo Wang C4-5

Shengli Lu P2-16

Shengli Lu P2-31

Shengqiong Xie A6-1

Shengye Wang P1-43

Shengyou Zhong P2-30

Shi Chen A5-3

SHI Weiwei P2-37

Shih-Hung Weng C5-5

Shih-Ju Tsai P1-12

Shikai Zhu P1-18

Shile Cui P1-18

Shili Wu P1-45

Shi-Li Zhang C6-4

Shinji Kimura A1-6

Shinji KIMURA B8-3

Shota Matsuno A1-6

Shoumian Chen C6-3

Shuai Yuan B5-1

Shuai Yuan B5-2

Shuang Yu A3-2

Shuang Yu A3-3

Shuangxi Lin C7-4

Si Chen D1-4

Siliang Hua B1-4

Si-Qi Zhao P2-45

Siyu Yang P2-46

Song Chen C5-6

Song Chen C4-6

Song Chen C5-2

Song Jia B6-4

Song Jia D2-3

Song Jia P1-47

Song Wen P2-38

Song Wen P2-39

Songlin Feng B2-3

Songlin Feng B4-2

Songlin Feng P2-51

Songping Mai P2-23

Songting Li B4-6

Songting Li B5-3

Su Zhang P1-04

Sujuan Liu P2-09

Sun Qiang P2-36

Syota Kuwabara C5-3

T

Tadahiko

Sugibayashi

A1-6

Takahiro Watanabe C4-2

Takahiro watanabe P1-15

Takeshi Yoshimura C5-6

Takeshi Yoshimura C4-6

Takeshi Yoshimura C5-2

Takeshi Yoshimura C5-7

Takeshi Yoshimura P1-06

Tao Cheng P1-41

Tao Yang P1-41

Teng Wang A1-3

Teng Wang A3-8

Teng Wang P1-28

Tengfei Zhai P1-32

Tengfei Zhai P1-46

TianChan Guan A2-5

Tianlong Ma A5-4

Tianlong Ma A5-5

Tianyi Hu P1-33

Tiejun Zhang A1-2

Tiejun Zhang A5-3

Tiejun Zhang C3-4

Tiejun Zhang P1-03

Tiejun Zhang P1-24

Ting Li D3-3

Ting Yu A6-4

Tingting Mo D3-5

Tingting Mo D3-4

tong zhang D5-2

Tongning Hu B3-3

Tongning Hu P2-10

Tongning Hu P2-11

W

Wang Huan P1-25

Wang Lei P2-38

Wang Lei P2-39

Wanghong Yi B3-5

Wanghui Zou C3-3

Wanghui Zou C7-4

Wei Cao P1-21

Wei Cao P1-43

Wei Guo P1-01

Wei Hu P2-04

Wei Li B4-7

Wei Li C4-5

Wei Miao P2-51

58

Wei Ni P1-04

Wei Tai P2-38

Wei Tai P2-39

Wei Wei P1-51

Wei Wu P2-15

Wei Zhong C5-2

Wei Zhou A3-5

Wei Zhou A3-6

Wei Zhu P1-48

Weifeng He A1-4

Weifeng Sun P2-16

Weifeng Sun P2-31

Weiguang Sheng A1-4

Weijia Ma P1-42

Weijie Chen B7-5

Weijing Shi B8-5

Weike Wang A3-4

Weiping Zhou C6-3

Weiwei Shen A5-5

Wenbin Liu P1-50

Wenbo Wu P1-26

Wengang Huang P2-17

Wenhua Qiang P2-51

Wenjian Yu P2-46

Wenjie Sheng C3-5

Wenshu Jiang P2-09

Wenxu Bao P1-31

wenzhe zhao D5-2

Wen-Zhong Xu P2-49

WU Jianping P1-25

Wuyue Wang P1-36

X

X.A. Tran D4-2

Xi Tan B3-4

Xi Tan P2-21

Xia Wang P2-07

Xiang Wang P1-04

Xianghong Zhao P1-09

Xiangmin Zhang P1-46

Xiangmin Zhang P1-20

Xiangmin Zhang P1-32

Xiangmin Zhang P2-29

Xiangrong Zhang P2-12

Xiangyu Zeng C3-5

Xiangyu Zeng C6-6

Xiangyu Zeng D6-3

Xiangyu Zeng P2-42

Xiantuo Rao A1-3

Xianyang Zeng A6-1

Xiao Yan B2-4

Xiao Yan P1-40

Xiao Yu P1-32

Xiaochen Gu B4-6

Xiaochen Gu B5-3

Xiaochen Gu B3-5

Xiaochen Gu B3-6

Xiaocheng Gu P2-33

Xiaofang Zhou A2-4

Xiaofang Zhou A2-6

Xiaofei Chen C3-3

Xiaofei Chen C7-4

Xiaofeng Tang P1-26

Xiaohao Gao P1-06

Xiaohu You P1-22

Xiaohui Hu P1-22

Xiaole Cui D1-4

Xiaole Cui D2-1

Xiaole Cui P1-42

Xiaole Cui P1-44

Xiaole Cui P2-12

Xiaole Cui P1-51

Xiaoli Huang P1-35

Xiaopeng Bai P2-14

Xiaoting Hu P1-34

Xiaowei He P1-45

Xiaoxin Cui P1-44

Xiaoxin Cui P1-51

Xiaoxu Kang C6-3

Xiaoxue Yu P1-11

Xiaoya Fan P2-32

Xiaoyang Zeng A3-4

Xiaoyang Zeng A2-5

Xiaoyang Zeng A3-5

Xiaoyang Zeng A3-6

Xiaoyang Zeng A5-4

Xiaoyang Zeng A5-5

Xiaoyang Zeng A6-2

Xiaoyang Zeng B8-5

Xiaoyang Zeng P1-02

Xiaoyang Zeng P1-16

Xiaoyang Zeng P1-17

Xiaoyang Zeng P1-18

Xiaoyang Zeng P1-31

Xiaoyang Zeng P2-24

Xiaoyong Xue D4-5

Xiaozong Huang P2-17

Xifeng Zhou P2-02

Xifeng Zhou P2-03

Xin Ming P2-07

Xin Ming P2-28

Xin Wang P1-41

Xin Zhao D4-4

Xin’an Wang A1-3

Xin’an Wang P2-34

Xin’an Wang A3-8

Xin’an Wang P1-28

Xin’an Wang B3-3

Xin'an Wang P2-40

Xin'an Wang P2-10

Xin'an Wang P2-11

Xing Zhang B6-4

Xing Zhang D2-3

Xing Zhou P2-44

Xingpeng Pan B7-3

Xinhua Chen A3-4

Xin-Ping Qu C6-5

Xin-Ping Qu P2-49

Xinrui Zhang C4-7

Xinsheng Wang B8-4

Xinyi Hu D4-3

Xinyu Yao P1-26

Xixin Cao P1-30

Xu Cheng B8-5

Xu Cheng P2-24

Xu Wang C6-5

Xu Wang D3-3

XU Yuan P1-07

XU Yuan P2-37

Xuan Yang D2-1

Xuan Zeng C1-2

Xuan Zeng P2-41

59

Xuan Zeng B6-5

Xuan Zeng C4-5

Xuan Zeng C1-4

Xuan Zeng P2-06

Xue Wei C4-2

Xuecheng Zou C7-4

Xuecheng Zou C3-3

Xuecheng Zou P1-36

Xuegong Zhou P1-21

Xueling Liu A6-3

Xueling Liu C4-7

Xuelong Zhang P1-19

Xueqiu Yu P1-16

Xueqiu Yu P1-17

Xuqiang Zheng B5-1

Xuqiang Zheng B5-2

Xu-Wang P2-49

Y

Y.L. Shen P2-48

Y.Y. Lin D4-2

Yading Shen C7-4

Yan Dun B4-6

Yan Liu B1-4

Yan Wang D3-3

Yan Zhao A2-6

Yan Zhu C4-3

Yang Geng C5-2

Yang Li P2-29

Yang Liu B7-2

Yang Wenrong P2-18

Yang Yang P1-22

Yang Zhao B1-5

Yangyang Guo P1-32

Yanhui Ren B7-6

Yanhui Yang P1-04

Yankang Du D1-3

Yanlin Zhang P2-17

Yanquan Luo A6-3

Yanzhao Ma P2-32

YAO Haodong P1-07

Yao Qian B7-4

Yao Zou P1-02

Yao-Yan Lee B4-4

Yasuhiro

Takashima

C5-3

Yawei Lu P2-40

Yeongluh Ueng D5-3

Yi Fang P1-10

Yi Li B8-5

Yi Peng B3-3

Yi Peng P2-10

Yi Peng P2-11

Yibo Fan A5-4

Yibo Fan A5-5

Yibo He P1-44

Yici Cai B7-5

Yici Cai C2-2

Yifan Bo A6-2

Yilin Yan C6-3

Yiling Ding B2-3

Ying Cao P2-40

Ying Huang B5-4

Ying Meng D4-5

Yingbo Dai P1-38

Yingke Gao C3-4

Yingke Gao P1-03

Yingke Gao P1-24

Yingrui Chen P1-28

Yinhui Wang A1-3

Yinyin Lin P1-48

Yinyin Lin D4-3

Yinyin Lin D4-5

Yiqiang Zhao P2-19

Yiwu Yao P1-27

Yixin Zhao P2-23

Yong Chen P1-26

Yong Xu B5-4

Yong Xu B4-3

Yong Zhang D3-3

Yonglai Zhang B1-2

Yonglai Zhang B7-6

Yongqin Huang D4-4

Yongsheng Wang B1-2

Yongsheng Wang B7-6

Yongxu Zhu P1-39

Yongzhen Chen B1-3

You Li B5-7

Yu Jiang D4-3

Yu JIN B8-3

Yu Lu A8-5

Yu Wang C2-3

Yuan Dong P2-07

YUAN Hengzhou P1-08

Yuan Wang B6-4

Yuan Wang D2-3

Yuan Wang P1-47

Yuanjun Xu C6-3

Yuankun Xue P1-37

Yuanliang Wu B4-3

Yuanliang Wu B5-4

Yuanyuan Li C2-4

YuanZhou Hu P1-31

Yu-Chang Hsieh A2-3

Yuchun Ma C2-3

Yuchun Ma C2-4

Yue Shi P2-28

Yuebin Huang D5-3

Yueguo Hao P2-14

Yuejun Zhang P1-19

Yuexing Yan P2-19

Yufeng Jin P1-44

Yuhang Zhao C6-3

Yuhua Cheng P2-14

Yuhua Cheng P2-39

Yuhua Cheng P1-23

Yuhua Cheng P1-27

Yuhua Cheng P2-38

Yuhua Yu P2-42

Yukihide Kohira C5-3

Yukun Song P1-04

Yu-Ling Liu P2-49

Yumei Zhou P1-39

Yumei Zhou B5-7

Yun Chen D5-3

Yun Chen P1-31

Yun Chen P2-25

Yunpu Hu P2-23

Yunwu Zhang P2-31

Yusen Xu P2-04

Yuwei Liu P1-45

Yuwen Wang P2-13

60

Yuxiao Lu D3-4

Yuxiao Lu D3-5

yuxin sun P1-15

Yu-Zhang Huang B1-6

Yuzhong Xiao B5-6

Yuzhuo Fu D2-4

Z

Zekun Zhou P2-07

Ze-kun Zhou P2-28

Zemin Feng B5-5

Zeng Xiaoyang D5-3

Zeyu Zhang P2-02

Zeyu Zhang P2-03

Zhang Yang P1-25

ZHANG Zhi P2-37

Zhangwen Tang P1-41

Zhaolin Li A3-1

Zhaolin Li P1-10

Zhaori Bi C4-5

Zhaowen Zhuang B5-3

Zhaoyang Pi C6-4

Zhe Chen P1-14

Zhe DU B8-3

Zhe Li D3-5

Zheng Sun B4-3

Zheng Sun B5-4

Zheng Tang P1-29

Zheng Xie P2-34

Zheng Xie P2-40

Zheng Yu P1-18

Zhenghao Lu D5-4

Zhengyu Qian P2-12

Zhenqi Liu A8-4

Zhibin Lian P2-34

Zhi-Bin Zhang C6-4

Zhigang Mao A1-4

Zhigang Mao P1-29

Zhigang Mao P2-47

Zhige Zou P1-36

Zhihao Ding P2-44

Zhiheng Lin B3-4

Zhihua Wang B5-1

Zhihua Wang B5-2

Zhihui Chen P1-49

Zhijia Yang P1-35

Zhiliang Hong B1-5

Zhiliang Hong B7-4

Zhiqing Chen B4-2

Zhixiang Chen P1-10

Zhiyi Yu A3-5

Zhiyi Yu A3-6

Zhiyi Yu A6-1

Zhiyi Yu P1-16

Zhiyi Yu P1-17

Zhiyi Yu P1-18

Zhiyuan Xue P1-24

Zhongping Qin P1-34

ZHU Mingcheng P1-07

Zhuang Liang-bo P2-18

Zhuo Wang P2-07

Zibo Zhou B4-7

Zijia Guo A3-8

Ziqiang Wang B5-1

Ziqiang Wang B5-2

Zitao Shi P2-14

Ziyi Hu A3-8

Ziyi Hu P1-28

Zongyan Wang P1-16

Zongyan Wang A3-4

Zou Xuecheng P2-01

61

Invited Papers

Author NO.

A

Akifumi Ueno C5-1

Alan W.Righter D6-1

Albert Wang B3-1

Albert Wang B2-2

Albert Wang B2-1

Alvin Joseph A2-1

B

Baocun Wang A8-2

Bei Yu C2-1

Bin Zhao B2-2

C

C. Patrick Yue B6-3

C. Patrick Yue C3-1

C. Surya C8-3

Chaojiang Li B6-2

Chaojie Fan D3-1

Chao-Sung Lai D4-1

Chih Hung Huang C8-2

Chi-Hsien Huang D4-1

Chih-Ting Lin D4-1

Ching-Hwa Cheng C8-2

Chiu-Sing Choy B8-2

Chu-Hsiang Chia B6-1

D

Dajiang Zhou A5-2

David Z Pan C2-1

Dawn Wang B6-2

Dian Zhou B7-1

Didier Belot A8-1

Domenico Rossi B3-2

Don-Gey Liu C8-2

Duo Ding C2-1

F

Francois Rivet A8-1

Frank Schwierz C8-1

G

Gang He A5-2

Gao C8-4

Gerald E. Sobelman D5-1

Gong Liwei A5-1

Goro Suzuki C4-1

Guang-Bao Lu C8-2

Guanming Huang B7-1

Guoyi Yu A8-2

H

Hai Wang A1-1

Hai Wang B2-1

He Tang B2-1

He Tang A1-1

Heng-Shou Hsu C8-2

Hirofumi Shinohara A4-2

Hiroshi Fuketa A4-2

His Rong Han C8-2

Hong-Chong Wu C8-2

Hong-Wun C8-4

J

Jean-Jacques Hajjar D6-1

Jer-Chyi Wang D4-1

Jian Lv D3-2

Jhih-Rong Gao C2-1

Jianjun Zhou D3-1

Jifa Hao D1-1

Jing Li C1-1

Jinjia Zhou A5-2

John Cohn B6-2

Jong-Ho Lee C6-1

Jongmin Shin C6-1

Juin J. Liou C8-2

Jung-Hun Seo C7-2

Junyan Ren D5-1

K

K. K. Leung C8-3

Kai Matsuura C5-1

Kaixue Ma B4-1

Ke Wang D3-1

Kiat Seng Yeo B4-1

Kyu-Bong Choi C6-1

L

Li Zhang A8-2

Liu Jinsong A5-1

Luca Daniel A7-3

M

Makoto Ikeda B8-1

Makoto Takamiya A4-2

Mario Paparo B3-2

Martin D.F. Wong D6-2

Masahiro Nomura A4-2

Masanori

Hashimoto

A4-1

Masataka Miyake C5-1

Massimo Gimignani B3-2

Miin-Shyue Shiau C8-2

Minoru Fujishima A2-2

Myra Boenke B6-2

N

Nagarajan

Mahalingam

B4-1

Nan-Xiong Huang C8-2

Ngai Wong A7-1

Nicolas Regimbal A8-1

P

P.W.K. Fong C8-3

Patrick Garrec A8-1

Pui-Sun Lei B6-1

Q

62

Quan Chen A7-1

Quan Pan B6-3

Quan Pan C3-1

R

Randy Wolf A2-1

Richard Montigny A8-1

Richard Wong D1-2

Rita Fung D1-2

Robert Chen-Hao

Chang

B6-1

Robert K.F. Teng A5-1

Robert Teng B8-2

Ruei-Cheng Sun C8-2

Ryo Takahashi A4-2

Ryo Yamanaka C4-1

S

S.P. Lau C8-3

Salvo Scaccianoce B3-2

Satoshi Goto A5-2

Sheldon Tan A1-1

Shi-Jie Wen D1-2

Shou Xian Mou B4-1

Shry-Sann Liao C8-2

Simao S.Ang D3-2

Siqiang Fan B2-2

T

T. E. Kopley D1-1

Takashi Sato A4-4

Takayasu Sakurai A4-2

Tao Shen C6-2

Ted Letavic B6-2

Te-Kuang Chiang C8-4

Tetsuya Hirose A4-3

Thierry Taris A8-1

Thomas Wong C6-2

Tony Low C7-1

W

W. Wang C8-3

Wei-Chih Wang B6-1

Weidong Zhou C7-2

Weiwei Shi B8-2

Wen Chun Wang C8-2

Wen Tui Liao C8-2

Wenjian Yu A7-4

Wenjie Pan D3-1

Wenqing Lu D5-1

X

Xavier Zou A8-2

Xiang Lu B2-1

Xiaofang Zhou D5-1

Xiaofei Chen A8-2

Xin Huang A1-1

Xin Wang B3-1

Xingang Wang C1-1

Xu Yuan A5-1

Y

Y. Y. Hui C8-3

Yang Zhang A7-1

Yann Deval A8-1

Yipeng Wang B6-3

Yipeng Wang C3-1

Yisheng Wang B4-1

Yoan Veyrac A8-1

Yong Peng B2-1

Yuanzhong Zhou D6-1

Yu-Chung Hsiao A7-3

Yuhua Cheng B3-1

Z

Zao Liu A1-1

Zhang Zhi A5-1

Zhengxiong Hou B6-3

Zhengxiong Hou C3-1

Zhenqiang Ma C7-2

Zitao Shi B3-1

Zuochang Ye A7-2

63

ASICON 2013 Technical Program Overview Date Time

Jade Room （3

rd Floor）

Coral Room (3

rd Floor)

Moon-Glow Room

(2nd

Floor)

Autumn & Winter Room

(2nd Floor)

Oct.28

Mon.

AM 9:00 Tutorial Session T-1-1 & T-1-2 Tutorial Session T-2-1

PM 2:00 Tutorial Session T-1-3 Tutorial Session T-2-2

Oct.29

Tue.

8:30-10:00 Opening & Keynote Session K-1 (Imperial Room，3rd

Floor)

10:15-11:45 Keynote Session K-2 &-K-3 (Imperial Room，3rd

Floor)

13:30-15:30

Session A1 Micro Processor

Session Chair: Minge Jing

Session B1 Amplifier

Session Chair: Zhiliang Hong

Session C1

CAD for system, Design for Manufacturing and Testing (I)

Session Chair: Youhua Shi

Session D1 Testing, Reliability, Fault-Tolerance (I)

Session Chair: Peng Zhou

15:45-17:45

Session A2

Circuits and Systems for Wireless Communications (I)

Session Chair: Yun Chen

Session B2 Analog-to-Digital Converters (I)

Session Chair: Yajie Qin

Session C2 CAD for system, Design for

Manufacturing and Testing (II) Session Chair: Xingang Wang

Session D2 Testing, Reliability, Fault-Tolerance (II)

Session Chair: Xiaole Cui

17:45-18:45 Poster Session 1 ( Hall )

19:00-21:00 Reception (Imperial Room，3rd

Floor)

Oct.30

Wed..

8:30-10:00 Keynote Session K-4 & K-5 (Imperial Room，3rd

Floor)

10:15-12:15

Session A3 Network on Chip

Session Chair: Zhiyi Yu

Session B3 RF Circuits

Session Chair: Noboru Ishihara

Session C3

VLSL New Processing, New Technologies and their integration (I)

Session Chair: Qingqing Sun

Session D3 Analog-to-Digital Converters

(II) Session Chair: Gary Zhang

13:30-15:30

Session A4 Special Session (I)

Ultra-Low voltage circuit design

Session Chair: Masanori Hashimoto

Session B4 Clock Synthesizer and Building

Blocks Session Chair: Zhangwen Tang

Session C4 Circuits Simulation, Synthesis,

Verification and Physical design (I) Session Chair: Goro Suzuki

Session D4 Advanced Memory

Session Chair: Hongbin Sun

64

15:45-17:45

Session A5 Multimedia Circuit

Session Chair: Dajiang Zhou

Session B5

Wireless transceiver and building blocks

Session Chair: Jianjun Zhou

Session C5 Circuits Simulation, Synthesis,

Verification and Physical design (II) Session Chair: Masataka Miyake

Session D5 Circuits and Systems for

Wireless Communications (II) Session Chair:

Gerald E. Sobelman

17:45-18:45 Poster Session 2 ( Hall )

Oct.31

Thur..

10:15-12:15

Session A6 Application-Specific SoCs

Session Chair: Jun Han

Session B6 Analog Circuits (I)

Session Chair: Zhang Zhang

Session C6 MEMS, Nanoelectronics, and New

Device (I) Session Chair: Jia Zhou

Session D6

VLSL New Processing, New Technologies and their

integration (II) Session Chair: Pengfei Wang

13:30-15:30

Session A7

Special Session (II) Advances in Parasitic Extraction and Circuit

Simulation Session Chair: Wenjian Yu

Session B7 Analog Circuits (II)

Session Chair: Sujuan Liu

Session C7 MEMS, Nanoelectronics, and New

Device (II) Session Chair: T.K. Chiang

15:45-17:45

Session A8

Circuits and Systems for Wireless Communications (III) Session Chair: Xiaofang Zhou

Session B8 Digital Circuits

Session Chair: Yuanyuan Jiang

Session C8 MEMS, Nanoelectronics, and New

Device (III) Session Chair: Frank Schwierz

19:00-21:00 Banquet (Imperial Room，3rd

Floor)

65

Location of Conference Hotel

Best Western Shenzhen Felicity Hotel*****

Tel: 0086-755-25586333; Fax: 0086-755-25587746

Add: No.1085, Heping Road, Shenzhen,Guangdong Province, P.R

China

Website: http://www.bwsz.net/chinese/js.htm

66

Tour Information For the details, please visit our website: http://www.asicon.org

Shenzhen Departure

CPSHZC03 -- 1 Day(s)

One day Kaiping tour with Diaolou exploration

Destinations:Shenzhen

CPSHZC01 -- 1 Day(s)

One day Shenzhen private city tour

Destinations:Shenzhen

CPSHZC02 -- 1 Day(s)

One day Guangzhou city tour departure from Shenzhen

Destinations:Guangzhou, Shenzhen

67

CSZXC01 -- 4 Day(s)

4 days Shenzhen to Guilin tour

Destinations:Shenzhen, Guilin

CSZXC02 -- 4 Day(s)

4 Days Tour from Shenzhen to Xiamen

Destinations:Shenzhen, Xiamen

CSZXC03 -- 5 Day(s)

5 Days Tour from Shenzhen to Yunnan

Destinations:Shenzhen, Kunming, Dali, Lijiang

Hong Kong Departure

68

CPHKC01 -- 0.5 Day(s)

Half Day Hong Kong(Kowloon)City Tour--Wong Tai Sin Temple, K...

Destinations:Hong Kong

CPHKC02 -- 0.5 Day(s)

Half Day Hong Kong Island Tour--Victoria Peak,AberdeenHarbo...

Destinations:Hong Kong

CPHKC07 -- 1 Day(s)

1 Day Classic Macao Tour--the Ruin´s of St. Paul,Penha ...

Destinations:Hong Kong, Macau