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Page 1: Asian Power Electronics Journal - PERC Homeperc.polyu.edu.hk/APEJ/APEJ/Vol_6_No2.pdf · A. Maheswari and I. Gnanambal 13 ... Asian Power Electronics Journal, Vol. 6, No. 2, Dec 2012

Asian Power Electronics Journal, Vol. 6, No. 2, Dec. 2012

i

Asian Power Electronics Journal

PERC, HK PolyU

Page 2: Asian Power Electronics Journal - PERC Homeperc.polyu.edu.hk/APEJ/APEJ/Vol_6_No2.pdf · A. Maheswari and I. Gnanambal 13 ... Asian Power Electronics Journal, Vol. 6, No. 2, Dec 2012

Asian Power Electronics Journal, Vol. 6, No. 2, Dec. 2012

ii

Copyright © The Hong Kong Polytechnic University 2012 All right reserved. No part of this publication may be reproduced or transmitted in any form or by any means, electronic or mechanical, including photocopying recording or any information storage or retrieval system, without permission in writing form the publisher.

First edition Dec 2012 Printed in Hong Kong by Reprographic Unit The Hong Kong Polytechnic University

Published by

Power Electronics Research Centre The Hong Kong Polytechnic University Hung Hom, Kowloon, Hong Kong

ISSN 1995-1051

Disclaimer Any opinions, findings, conclusions or recommendations expressed in this material/event do not reflect theviews of The Hong Kong Polytechnic University

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Asian Power Electronics Journal, Vol. 6, No. 2, Dec. 2012

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Editorial board

Honorary Editor Prof. Fred C. Lee Electrical and Computer Engineering, Virginia Polytechnic Institute and State University

Editor Prof. Yim-Shu Lee Victor Electronics Ltd.

Associate Editors and Advisors Prof. Philip T. Krien Department of Electrical and Computer Engineering, University of Illinois Prof. Keyue Smedley Department of Electrcial and Computer Engineering, University of California Prof. Muhammad H. Rashid Department of Electrical and Computer Engineering, University of West Florida Prof. Dehong Xu College of Electrical Engineering, Zhejiang University Prof. Hirofumi Akagi Department of Electrical Engineering, Tokyo Institute of Technology Prof. Xiao-zhong Liao Department of Automatic Control, Beijing Institute of Technology Prof. Wu Jie Electric Power College, South China University of Technology Prof. Hao Chen Dept. of Automation, China University of Mining and Technology Prof. Danny Sutanto Integral Energy Power Quality and Reliability Centre, University of Wollongong Prof. S.L. Ho Department of Electrical Engineering, The Hong Kong Polytechnic University Prof. Eric K.W. Cheng Department of Electrical Engineering, The Hong Kong Polytechnic University Dr. Norbert C. Cheung Department of Electrical Engineering, The Hong Kong Polytechnic University Dr. Kevin K.W. Chan Department of Electrical Engineering, The Hong Kong Polytechnic University Dr. T.F. Chan Department of Electrical Engineering, The Hong Kong Polytechnic University Dr. Edward W.C. Lo Department of Electrical Engineering, The Hong Kong Polytechnic University Dr. David K.W. Cheng Department of Industrial and System Engineering, The Hong Kong Polytechnic University Dr. Martin H.L. Chow Department of Electronic and Information Engineering, The Hong Kong Polytechnic University Dr. Frank H.F. Leung Department of Electronic and Information Engineering, The Hong Kong Polytechnic University

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Asian Power Electronics Journal, Vol. 6, No. 2, Dec. 2012

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Publishing Director: Prof. Eric K.W. Cheng Department of Electrical Engineering, The Hong Kong Polytechnic University

Communications and Development Director: Ms. Anna Chang Department of Electrical Engineering, The Hong Kong Polytechnic University

Production Coordinator: Mr. Dickson Chau, Mr. T.W. Ng and Dr. James H.F. Ho Power Electronics Research Centre, The Hong Kong Polytechnic University

Secretary: Ms. Canary Tong Department of Electrical Engineering, The Hong Kong Polytechnic University

Page 5: Asian Power Electronics Journal - PERC Homeperc.polyu.edu.hk/APEJ/APEJ/Vol_6_No2.pdf · A. Maheswari and I. Gnanambal 13 ... Asian Power Electronics Journal, Vol. 6, No. 2, Dec 2012

Asian Power Electronics Journal, Vol. 6, No. 2, Dec 2012

Table of Content

AC Analysis of Resonant Converters Using PSpice –A Quicker

Approach

M. Borage and S. Tiwari

1

Optimum Cost of Generation and Active Power Loss Minimization

using GA and PSO Techniques in a Power System Network

A. R. Bhowmik, A. K. Chakraborty and P. N. Das

7

Harmonic Analysis of Cascaded H-bridge Seven Level Inverter for RL

Load Applications

A. Maheswari and I. Gnanambal

13

Review on Power Quality Solution Technology

B. Singh, G. Bhuvaneswari and S.R. Arya

19

MOHF Forward Buck DC-DC Converter Based SMPS

S. Singh, B. Singh and G. Bhuvaneswari

28

A New Simple Single Phase AC-AC Switching Voltage Regulator Cum

Power Conditioner

S. Sonar and T. Maity

34

Author Index 39

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Page 7: Asian Power Electronics Journal - PERC Homeperc.polyu.edu.hk/APEJ/APEJ/Vol_6_No2.pdf · A. Maheswari and I. Gnanambal 13 ... Asian Power Electronics Journal, Vol. 6, No. 2, Dec 2012

Asian Power Electronics Journal, Vol. 6, No. 2, Dec 2012

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AC Analysis of Resonant Converters Using PSpice –A Quicker Approach

M. Borage 1 S. Tiwari 1

Abstract–A method of AC analysis of resonant converters using general purpose simulation software, PSpice, is proposed in this paper. A method of describing a resonant network using global variables, without having to specify actual component values, is proposed. The normalized results are directly obtained from the simulation, which can then be used for comparative evaluation. Thus the method eliminates the derivation, calculations and plotting of large number of mathematical expressions. The application of proposed method is exemplified with LCL-T resonant converter. The correctness and applicability is demonstrated by comparing the results obtained using proposed method with those obtained from mathematical expressions reported earlier. The proposed method is shown to be very useful for quicker visualization of converter characteristics, calculation of component ratings in normalized form, evaluation of converter performance and optimized converter design. Keywords–Resonant converter, simulation, ac analysis

I. INTRODUCTION Resonant converters (RCs) offer low switching losses due to Zero Voltage Switching (ZVS) and/or Zero Current Switching (ZCS) making them popular for high frequency and particularly, high power applications. The applications mostly include, but not limited to, DC power supplies for industrial, commercial and domestic applications, high frequency AC power supplies for induction heating, power factor correction and discharge lamp ballast. The series [1] and parallel [2] resonant converters (SRC and PRC, respectively) are basic RC topologies with two reactive elements. Due to their simplicity, these circuits are widely used. However, they have some limitations that may preclude their application in some cases. To remove these limitations, three element RCs were investigated [3]. And, in a step further, RCs with four energy storage elements were presented [4]. Although additional reactive elements increase component count, size, weight and cost, these higher-order RCs have been reported to exhibit interesting and useful characteristics. As wide variety of topologies is available with promising characteristics and some limitations, analysis and comparative evaluation becomes necessary for proper choice of topology for a particular application. The design and analysis of RCs has been performed using different methods such as state-space approach [5], state-plane diagrams [6] and AC analysis [7]. The AC analysis of RCs is the simplest and fairly accurate method of analysis. In this method, it is assumed that only the fundamental component of the square-wave voltage input The paper first received 4 Nov 2010 and in revised form 17 Dec 2012. Digital Ref: APEJ-2012-12-308 1 Power Supplies and Industrial Accelerator Division, Raja Ramanna Centre for Advanced Technology, Indore 452013, India. E-mail: [email protected], [email protected]

to the resonant network contributes to the power transfer to output. The transformer, rectifier and filter are replaced by equivalent AC resistance. Since the AC analysis is simple, faster and fairly accurate method, it is very useful for comparative analysis [8]. Still, if a comparative evaluation is to be performed among a group of large number of circuits, deriving, plotting and examining the characteristics becomes cumbersome and time consuming. For quicker visualization of characteristics the capabilities of modern circuit simulation packages, such as PSpice [9], [10] can be used. The PSpice and most of the other simulation software are numerical simulation program for electronic circuits and therefore actual component values are required to be specified. Thus the simulator gives particular solution of the defined circuit. The results of the particular solution need to be normalized to suitable base values to extract the generalized results for comparison. In this paper, a method of generalized AC analysis of RCs using PSpice is described. The proposed method is easy to use and is fast. In the proposed method, any resonant network is defined using global variables without having to specify actual component values. Normalized results are directly obtained from the simulation, which are directly usable for comparative evaluation. Thus the method eliminates the derivation with subsequent calculations and plotting of large number of expressions for each circuit. On the other hand, the proposed method can also be used to verify the correctness of derived transfer functions. The outline of paper is as follows. The AC analysis of RCs is briefly reviewed first. The circuit description of LCL-T RC [11]-[17] is briefed in since it is used to exemplify the principal idea of proposed method. Subsequently, the proposed circuit description of a resonant network for obtaining normalized results directly from the simulation is explained. The results and validity of proposed method in analysis and design optimization of RC are discussed. Since experimental results have already been shown to be in conformity of the analytical predictions [11], the validity of proposed simpler method is demonstrated by comparing the results of proposed method with those obtained from detailed analytical derivations and calculations, without separately comparing them with experimental results once again.

II. AC ANALYSIS OF RESONANT CONVERTERS Block diagram of a dc-dc voltage-source RC is shown in Fig. 1(a). The input to the resonant network is a high-frequency square-wave voltage implemented using bridge inverter. The resonant network is composed of inductors and capacitors. The output of resonant network is rectified and filtered to get desired dc output. The filter can be an inductive filter (e.g. LC-filter) or a capacitive filter. The equivalent circuit for AC analysis is shown in Fig. 1(b).

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M. Borage et. al: AC Analysis of Resonant Converters…

2

Vd

Or Vo

+

-

Io

Bridge Inverter

ResonantNetwotk

Rectifier Filter

(a)

RacVin,rms

ResonantNetwotk

(b) Fig. 1: (a) Block diagram of a voltage-source resonant converter.

(b) AC equivalent circuit of a resonant converter.

The square-wave input voltage to resonant network is replaced by its fundamental component. The RMS fundamental component of input square-wave voltage is,

drmsin Vπ

V22

, (1)

Vd being the input dc voltage. The rectifier and filter are replaced by equivalent AC resistance, Rac. For rectifier with inductive filter:

Lac Rπ

R8

2

(2a)

And, for rectifier with capacitive filter:

Lac Rπ

R2

8 (2b)

where RL is the load resistance. For the network of Fig. 1(b), the expressions for various currents and voltages in the circuits are derived. For obtaining normalized results, typically following definitions and base values are used: Base frequency = resonant frequency (fo); Base voltage = Vd;Base current = (Vd/Zn), where Zn is the characteristic impedance of resonant network and is defined as:

C

LZ n (3)

L and C being respectively the values of inductor and capacitor in the resonant network. The voltage and current gains of the resonant network are respectively defined as,

d

o

V

VM and nd

o

ZV

IH (4)

where, Vo and Io are output dc voltage and current, respectively.

III. LCL-T RESONANT CONVERTER The analysis, optimization and design of LCL-T RC using AC analysis is reported in [11]. In this section the circuit description of LCL-T RC is briefed and salient equations

L La

C

Vd

Cf

Tr

RL

S3

S4

Vo

+

-

IoDr1

Dr2

Dr3

Dr4

S1

S2

Fig. 2: Circuit diagram of full-bridge LCL-T resonant converter.

are reproduced for ready reference and completeness since the converter is used to exemplify the principal idea of proposed method. The circuit diagram of full-bridge LCL-T RC is shown in Fig. 2. The LCL-T resonant network is composed of inductors L, La and capacitor C. The full-bridge converter (using MOSFET switches S1 – S4) drives the input port of the resonant network with high-frequency symmetrical square-wave voltage waveform of amplitude ±Vd. At the output port of the resonant network an isolation transformer, Tr, matches the required output voltage, Vo, and current, Io, to the available dc input, Vd. A diode bridge rectifier (Dr1 through Dr4) and filter capacitor (Cf) convert high-frequency ac to output dc. In the following analysis, the transformer turns ratio is assumed to be unity, without losing generality. The resonant frequency and Q of the resonant network are defined as,

LCfo

2

1 and

L

n

L R

Z

R

LfπQ o2

(5)

The ratio of inductors is defined as,

L

Lγ a (6)

The voltage and current gains can be derived as,

γffγQπ

jf

M

nnn3

22 1

81

1

(7a)

γffγπ

jfQ

H

nnn3

22 1

81

1

1

(7b)

where fn is the normalized switching frequency. We see from (7) that the load current is independent of load if operated at 1 in ff , fi being the normalized switching

frequency where H is independent of Q, and,

2

8

πH

in ff

(8)

Thus, the LCL-T RC behaves as constant current source when operated at 1 in ff ,if the input voltage is

constant. Additionally, if γ =1 the output voltage and

current of the full-bridge converter are in phase resulting in ZCS operation and the lowest conduction loss in the switches. The converter optimized for minimum (kVA/kW) rating of the resonant network at 1 nf gives:

2

8

in ffoptQ (9)

Generalized expressions for normalized voltage and current ratings of all the reactive components in the resonant network are derived and reported in [11].

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IV. PROPOSED AC ANALYSIS USING PSPICE The PSpice software is numerical simulation program for electronic circuits and therefore actual component values are required to be specified. Thus the simulator gives particular solution of the defined circuit. The results of the particular solution need to be normalized to suitable base values to extract the generalized results for comparison. In the circuit description proposed in the following paragraphs, the resonant network can be described in terms of global variables or parameters. We need not to specify actual component values. Normalized results are directly obtained from the simulation. The frequency response or AC circuit analysis of PSpice calculates all the ac node voltages and currents over a swept range of frequency. Therefore, the primary variable is chosen as fn. To make fn independent of fo, the latter is selected to be unity. Taking L=C= 0.159154943 we get from (5), fo = 1, and, from (3), Zn=1. With this choice and from (5) we simplify the definition of value of Rac in terms of another global variable Q as,

QπRac

182

(10)

Recall that LCL-T RC has capacitive output filter. For converters with inductive output filter, the value of Rac in terms of Q is given by,

Q

πRac

1

8

2

(11)

Having defined γ as another independent variable, from (6),

γLa 159154943.0 (12)

Taking Vd=1, both the base voltage and current become unity since Zn=1. Therefore, if we define the amplitude of ac voltage source in PSpice as,

πV rmsin

22, (13)

then, the amplitude of various voltages and currents calculated by PSpice will directly be equal to normalized rms value.

The circuit netlist for LCL-T RC for AC analysis in PSpice is given in appendix A. The analysis sweeps the frequency and parameter Q is also varied in the specified range.

V. RESULTS AND DISCUSSIONS The circuit netlist of appendix A was simulated on PSpice for the ac analysis of LCL-T RC. The simulation was completed in few seconds. In the graphical waveform analyzer for PSpice, Probe, the results are directly plotted in normalized form. The expression derived and reported in [11] are used for numerically calculate and plot various characteristics for direct comparison and validation of the results obtained with proposed method. The results obtained from simulation are shown in part (a) of Fig. 3 to Fig. 8. The y-axis label of these figures is same as that shown in part (b) of respective figures. Also, the x-axis

label "frequency" mentioned in the simulation results of part (a) of Fig. 3 to Fig. 7 actually correspond to the normalized switching frequency, fn, since both are same in the proposed method as discussed in the previous section. A. Converter Gain The voltage and current gains of the RC are defined by (4) and summarized by (7). The plots of M as a function of fn for γ =1 and for different values of Q are shown in Fig.3.

The results obtained using proposed method are shown in Fig. 3(a) and those obtained using mathematical analysis are shown in Fig. 3(b). Similarly, simulated and calculated plots of H as a function of fn for γ =1 and for different

values of Q are shown in Fig.4(a) and Fig. 4(b), respectively. The trace expressions to plot M and H are summarized in table 1. The plots obtained directly using proposed method are seen to match exactly with those obtained from mathematical expressions. It is interesting to note that LCL-T RC offers load independent output current when operated at fn=1. B. Component Ratings The proposed method is very useful to quickly determine the normalized rms current and voltage ratings of different reactive components in the resonant network without

Table 1: The trace expressions in Probe to plot M and H

Parameter Trace expression in Probe

M V(3)/V(1)

H I(Rac)*0.9003#

# Io is equal to the average value of full wave rectified IRac.

(a)

0.5 1.0 1.5 2.00

1

2

Q=1.0

Q=2.5

Q=1.5

Q=2.0

Q=0.5

M

fn (b)

Fig. 3: The plots of M as a function of fn for γ =1 obtained using

(a) proposed method (b) mathematical expression.

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M. Borage et. al: AC Analysis of Resonant Converters…

4

(a)

0.5 1.0 1.5 2.00

1

2

3

Q=1.0

Q=2.5

Q=1.5

Q=2.0

Q=0.5

H

fn (b)

Fig. 4: The plots of H as a function of fn for γ =1 obtained using

(a) proposed method (b) mathematical expression. having to individually derive the expressions. The trace expressions to plot normalized rms voltage and current rating of inductors and capacitor in LCL-T RC are summarized in table 2. Illustratively, Fig. 5 and Fig. 6 show the normalized rms current in inductor L and capacitor C, respectively, as a function of fn for γ =1 and

for different values of Q obtained using proposed method and from mathematical expressions reported in [11]. Once again, the plots obtained directly using proposed method are seen to match exactly with those obtained from mathematical expressions confirming the validity of proposed method. C. Converter Performance Apart from its usefulness to quickly determine the component ratings and visualize converter characteristics, the proposed method and capabilities of PSpice can be used to evaluate the performance of the converter and Table 2: Trace expressions in Probe to plot normalized rms

voltage and current rating of inductors and capacitor Parameter Trace exp.

in Probe

Normalized rms current in inductor L I(L)

Normalized rms current in inductor La I(La)

Normalized rms current in capacitor C I(C)

Normalized rms voltage across inductor L V(1,2)

Normalized rms voltage across inductor La V(2,3)

Normalized rms voltage across capacitor C V(2)

(a)

0.5 1.0 1.5 2.00

2

4

Q=1.0

Q=2.5

Q=1.5

Q=2.0

Q=0.5

No

rma

lize

d rm

s cu

rre

nt in

ind

ucto

r L

fn

(b) Fig. 5: The plots of normalized rms current in inductor L as a function of fn for γ =1 obtained using (a) proposed method (b)

mathematical expression.

(a)

0.5 1.0 1.5 2.00

2

4

6

Q=1.0

Q=2.5

Q=1.5

Q=2.0

Q=0.5

Nor

mal

ized

rm

s cu

rren

t in

cap

acito

r C

fn

(b) Fig. 6: The plots of normalized rms current in capacitor C as a function of fn for γ =1 obtained using (a) proposed method (b)

mathematical expression.

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derive the condition for its optimized design. LCL-T RC is seen to behave as constant current source when operated at fn=1. This property is very useful for its application in applications such as electromagnets, capacitor charging, battery charging, arc welding, semiconductor laser diode drivers etc. The effect of choice of Q by design on ratings of different parameters needs to be examined for operation at fn=1. The trace expressions to plot normalized rms voltage and current rating of inductors and capacitor at fn=1 in LCL-T RC are summarized in table 3. Illustratively, Fig. 7 compares the normalized rms current in inductor L and capacitor C as a function of Q for γ =1 and at fn=1

obtained using proposed method and from mathematical expressions reported in [11]. The applicability of proposed method in evaluating converter performance is thus proved. The reactive components in an RC increase its size. Therefore, the RCs are optimized for minimum size of resonant network. The (kVA/kW) rating of resonant network is considered as an index for the physical size of the resonant network. The trace expressions to plot (kVA/kW) rating of LCL-T RC in Probe can be written as:

(YatX(I(L),1)*YatX(V(1,2),1)+YatX(I(La),1) *YatX(V(2,3),1)+YatX(I(C),1)*YatX(V(2),1))/

(YatX(v(3),1)* YatX(I(Rac),1))

Fig. 8 compares the (kVA/kW) rating of LCL-T RC as a function of Q for γ =1 and at fn=1 obtained using proposed

method and from mathematical expressions reported in [11]. The optimum value of Q, where (kVA/kW) is minimum, is observed to be Q=0.81, consistent with (9).

VI. CONCLUSION A large number of two-, three- and four-element RCs topologies are reported in the literature. In order to choose a topology for particular operation, one must visualize its characteristics and compare its performance with other candidate topologies. The process involving analytical derivation of mathematical expressions describing performance characteristics and component ratings of all the candidate topologies and subsequently plotting and comparing the characteristics can be tedious, cumbersome and time consuming. For quicker evaluation of the

Table 3: Trace expressions to plot normalized rms voltage and current rating of inductors and capacitor at fn=1

Parameter at fn=1 Trace

expression in Probe

Normalized rms current in inductor L YatX(I(L),1)

Normalized rms current in inductor La YatX(I(La),1)

Normalized rms current in capacitor C YatX(I(C),1)

Normalized rms voltage across inductor L

YatX(V(1,2),1)

Normalized rms voltage across inductor La

YatX(V(2,3),1)

Normalized rms voltage across capacitor C

YatX(V(2),1)

(a)

0 1 2 3 40

2

4

6

8

No

rma

lize

d rm

s cu

rre

nts

at

f n=1

Q (b)

Fig. 7: The plots of normalized rms current in inductor L (continuous curve) and capacitor C (dotted curve) as a function

of Q for γ =1 and at fn=1obtained using (a) proposed method, and,

(b) mathematical expression.

(a)

0 1 2 3 40

10

20

kVA

/kW

Q (b)

Fig.8: The variation in kVA/kW rating of LCL-T RC as a function of Q for γ =1 and at fn=1using

(a) proposed method (b) mathematical expression.

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M. Borage et. al: AC Analysis of Resonant Converters…

6

characteristics of a particular circuit, simulation packages can be used but the results of simulation cannot directly be used for comparison with other circuits since numerical simulation software do not give results in generalized form. A quicker method of AC analysis of RCs using general purpose simulation software, PSpice, is proposed in this paper. In the proposed method, any resonant network is defined using global variables and we need not specify actual component values. Normalized results are directly obtained from the simulation, which can then directly be used for comparative evaluation. Thus the method eliminates the derivation, calculations and plotting of large number of expressions for each circuit. Additionally, the proposed method can also be used to verify the correctness of derived transfer functions. The proposed method is illustrated for LCL-T RC. The correctness and applicability is demonstrated by comparing the results obtained using proposed method with those obtained from mathematical expressions. The proposed method is shown to be very useful for quicker visualization of converter characteristics, calculation of component ratings in normalized form, evaluation of converter performance and optimized converter design.

APPENDIX A * Circuit netlist of LCL-T RC for proposed AC analysis using PSpice

****************Global Parameters**************** .param pi=3.14159265 .param gamma=1 ; Ratio of inductors La to L .param q=1 ; Circuit Q value *****************Circuit Netlist****************** Vin 1 0 ac 2*sqrt(2)/pi L 1 2 0.1591549 La 2 3 gamma*0.1591549 C 2 0 0.1591549 Rac 3 0 8/(pi*pi)*1/q *****************Analysis Setup****************** .ac dec 1000 0.5 2 .step param q 0.1 4 0.01 .probe .end

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[11] M. Borage, S. Tiwari and S. Kotaiah, “Analysis and Design of LCL-T Resonant Converter as a Constant-current Power Supply”, IEEE Trans. on Ind. Electron., vol. 52, no. 6, pp.1547-1554, December 2005.

[12] M. Borage, S. Tiwari, S. Kotaiah, "LCL-T resonant converter with clamp diodes: A novel constant-current power supply with inherent constant-voltage limit," IEEE Trans. Ind. Electron., vol. 54, no. 2, pp. 741 - 746, April 2007.

[13] M. Borage, S. Tiwari and S. Kotaiah, "A constant-current, constant-voltage half-bridge resonant power supply for capacitor charging," IEE Proc. Electr. Power. Appl., vol. 153, no. 3, pp. 343-347, May 2006.

[14] M. Borage, K. V. Nagesh, M. S. Bhatia and S. Tiwari, "Design of LCL-T resonant converter including the effect of transformer winding capacitance," IEEE Trans. Ind. Electron, vol. 56, no. 5, pp. 1420-1427, May 2009.

[15] M. Borage, K. V. Nagesh, M. S. Bhatia and S. Tiwari, "Characteristics and design of an asymmetrical duty-cycle controlled LCL-T resonant converter," IEEE Trans. Power Electron., vol. 24, no. 10, pp. 2268-2275, October 2009.

[16] Mangesh Borage, K. V. Nagesh, M. S. Bhatia and Sunil Tiwari, “Resonant immittance converter topologies”, IEEE Trans. on Ind. Electron., vol. 58, no. 3, pp. 971-978, March 2011.

[17] Mangesh Borage, K. V. Nagesh, M. S. Bhatia and Sunil Tiwari, “Approximate equivalent circuit modeling and analysis of Type-II resonant immittance converters”, Journal of Power Electronics, vol. 12, no. 2, pp. 317-325, March 2012.

BIOGRAPHIES

Mangesh Borage received B. E. degree (1993), M. Tech. degree (1996) and Ph. D. (2011) in electrical engineering. He joined Bhabha Atomic Research Centre (BARC), Mumbai, India in 1994. Since 1995, he is with Raja Ramanna Centre for Advanced Technology, Indore, India. His research interests include soft-switching and resonant converters, high-frequency magnetic components and high-frequency power converters, in general.

Dr. Borage is recipient of University Merit Certificate from Shivaji University, Kolhapur, India for First Rank in Electrical Engineering in 1993. He is also a recipient of Dr. Homi Bhabha Award at BARC, Mumbai, India in 1995.

Sunil Tiwari received B.E. Degree from Maharaja Sayajirao University, Vadodra, India in electronics engineering in 1984. He was with Bharat Heavy Electricals Limited, Bangalore, India from 1984 to 1987 and with the Ministry of Defence, Agra, India from 1987 to1989. Since 1989 he is with Raja Ramanna Centre for Advanced Technology Indore, India as Scientific Officer. His research interests include soft-switching and resonant techniques for

high power application and development of high stability power supplies for particle accelerators.

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Optimum Cost of Generation and Active Power Loss Minimization using GA and PSO Techniques in a Power

System Network

A. R. Bhowmik 1 A. K. Chakraborty 2 P. N. Das3

Abstract–This paper utilizes the application of Particle Swarm Optimization (PSO) and Genetic Algorithm (GA) techniques to find the most appropriate locations of Unified Power Flow Controller (UPFC) with optimum cost of generation for loadability limit and minimum active power loss, while satisfying the power system constraints. Two objective functions are taken as the indexes of the system performance: (i) identification of suitable buses using line loss sensitivity index and optimum cost of generation and (ii) minimization of active power losses by employing PSO and GA techniques separately. The presented methodology has been applied and tested under simulated condition on modified IEEE 14-bus system. The implementations of PSO show that it converges to better solution much faster than GA. The results obtained are quite encouraging and will be useful in electrical power system network. Keywords–Flexible AC Transmission Systems (FACTS), loss sensitivity index, optimal power flow, GA, PSO, UPFC

I. INTRODUCTION Due to the increase in power demand, modern power system networks are being operated under extremely stressed conditions. Hence, there is an interest in better utilization of available power transmission capacities by installing new devices such as Flexible AC transmission Systems (FACTS). Recently interests in FACTS devices have risen for higher controllability of the power system network worldwide [1]. Among all FACTS devices, UPFC offers significant multifunctional flexibility required to solve various problems in power system. It can control all the parameters affecting power flow in the transmission line namely voltage magnitude, phase angle and impedance. On the other hand, it can also in parallel control both the real and reactive power flow in the line [2]. However, to ensure the full potential of utilization for maintaining the stability and reliability of existing system, optimal placement of the UPFC is a major issue. Many researchers have proposed different approaches of installing UPFC in the power system network [2][3][4]. New algorithms have been planned for the suitable placement of UPFC to increase various power system parameters. Wong et al. [5] presented an evolutionary programming load flow algorithm to solve the load flow problem for systems containing UPFC. The paper first received 29 Nov 2012 and in revised form 12 Dec 2012. Digital Ref: APEJ-2012-12-401 1

Department of Electrical Engineering, National Institute of Technology, Agartala, India, E-mail: [email protected] 2

Department of Electrical Engineering, National Institute of Technology, Agartala, India, E-mail: [email protected] 3

Department of Electrical Engineering, National Institute of Technology, Agartala, India, E-mail: [email protected]

A sensitivity index based approach was proposed for the suitable placement of Thyristor Controlled Series Capacitor (TCSC) and UPFC to enhance the power system Wartana et al. [6] proposed the application of a Non-dominated Sorting Genetic Algorithm II (NSGA-II) for the optimal placement of UPFC to improve the operation of the power system loadability [7]. Saravanan et al. [8] used PSO technique for finding the optimal allocation of TCSC, SVC and UPFC to attain utmost system loadability with least cost of installation. Singh et al. [9] suggested sensitivity based approach for the suitable locations of UPFC to increase power system loadability. Majumder et al. [10] proposed minimization of power losses using FACTS devices with Modified Simulated Annealing and PSO techniques. M. Kowsalya et al. [11] proposed particle swarm optimization to find the global optimum solution for the loss minimization by optimally placed UPFC in the power system network. Esmin et al. [12] first investigated the critical area in a power system with the tangent vector and secondly, used PSO to calculate the amount of shunt reactive power compensation. In this paper the appropriate location of UPFC was identified using line loss sensitivity index. GA and PSO techniques separately applied to achieve minimum active power loss while satisfying the power system constraints. The methodology has been applied and tested under simulated condition on modified IEEE 14-bus system.

II. MODELING OF UPFC FOR OPTIMAL PLACEMENT The UPFC is used for the static and dynamic compensation of ac transmission systems. It consists of two voltage source converters (VSCs) as shown in fig. 1. These back-to-back converters, labeled ‘converter 1’ and ‘converter 2’ in the fig. 1, share a common dc link including a dc storage capacitor. The real power exchanged at the ac terminal is transformed into dc power which appears at the dc link [2].

Fig. 1: Basic circuit arrangement of UPFC

Converter 1

Converter 2

Transmission line

Shu

nt T

rans

form

er

DC link

Series transformer

I I T + I q

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The basic responsibility of converter 1 is to provide or absorb the real power demanded by converter 2 at the common dc link. This dc link power demand of converter 2 is transformed back to ac by converter 1 and coupled to the transmission line through a shunt transformer. The basic scheme of the UPFC is shown in Fig. 2.

Fig. 2: Equivalent Circuit of UPFC

The real and reactive power with the system loading (λ) is determined by the following equation [9]

bNj

ijDiGii PPPP )1(0 (1)

bNj

ijDiGii QQQQ )1(0 (2)

where 0DiP and 0

DiQ are the real and reactive power

demands. GiP and GiQ are the real and reactive power

generations at bus-I, respectively. The real power loss sensitivity index is determined using (1)

0

1

/)]sin(

)cos([)cos(2

Dijij

jijjiijiK

Pb

gVgVC

(3)

0

2

/)]cos(

)sin([)sin(2

Dijij

jijjiijiK

Pb

gVgVC

(4)

The reactive power loss sensitivity index is set according to (2)

03 /)))cos()sin((( Diiijiijik QbgVC (5)

04 /)))sin()cos((( Diiijiijik QbgVC (6)

where kC1 , kC2 are the real power loading sensitivity with

respect to the series injected voltage magnitude ( TV ) and

the series injected phase angle ( T ) of the UPFC and kC3 , kC4 are the reactive power loading sensitivity with

respect to the series injected voltage magnitude ( TV ) and

the series injected phase angle ( T ) of the UPFC

respectively ,where

ijijijij jxr

jbg

1

and qI is the reactive current

flowing in the shunt transformer to improve the voltage of the shunt connected bus of UPFC.

III. GENETIC ALGORITHM

Genetic Algorithms (GA) have recently been applied in the optimization of power systems as these are very effective and flexible optimizing techniques. These are the search algorithms, invented by Holland in the early 1970s [13]. In this paper, a binary coded GA where every control variable is prearranged into a succession of binary bits is used. In GA, Each generation belongs to a population of strings and the next generation is formed by the simulation of reproduction, gene crossover and mutation. It also effectively uses the information of new population to direct the next search [14]. In GA first a random initial population is generated, evaluated and starts creating new population by using reproduction, gene crossover and mutation as follow [15]:

1. Start

2. Generate (Old population)

3. Repeat Until limit

Evaluate (Old population) New population = select (Old population) Cross over (new population) Mutation (new population) Old population = new population

4. End.

IV. PARTICLE SWARM OPTIMIZATION PSO is developed through simulation of bird flocking in two dimensional spaces. It is a popular non conventional optimization technique with high global searching capability. The main reason behind its wide spread use in power system is its simplicity and generating high quality solutions within very short duration. PSO has the same flexibility as compared to the other heuristic algorithms for controlling the stability between the global and local investigation of the search space [16]. PSO finds the best possible solution with a population of particles where each particle represents a candidate solution to the problem [10]. The change in position depends on previous, best individual, best global and a random velocity position. The terms individual best, global best and random velocity are responsible for changes in particle position during iterations are associated with values called inertial weights. In general, maximum number of iterations for termination of the search process and inertia weight factor w is set according to the following equation:

iteriter

wwww maz

max

minmax (7)

UPFC

Bus i

jB/2 jB/2

IT + j Iq

V T < Φ T rij + j x ij

Bus j

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where w is the inertia weight, maxiter is the maximum

iteration number, “ iter ” is the current iteration number,

maxw is the initial value of inertia weight equal to 0.9 and

minw is the final value of inertia weight equal to 0.4.The

pseudo code of the procedure is as follows: Initialize particle End Do Calculate fitness value If the fitness value is better than the best fitness value (Pbest) set current value as the new Pbest End

Particle with the best fitness value of all the particles= gbest

Calculate particle velocity as the following equation V ( ) = V ( ) + c1 * rand ( ) *[(Pbest () – Present ( )] + c2 *

rand ( ) * [gbest ( ) – present ( )] Update particle position as the following equation Present ( ) = Present ( ) + V ( ) End

IV. PROBLEM FORMULATION The loss minimization problem has been mathematically formulated and is given by [10]: Objective I: Minimize u(x); Subject to v(x) = 0; and p(x) < 0; where ui xxx

where u(x) is a function of the sum of branch losses, v(x) is the functional equality constraints, p(x) is functional inequality constraints and the limits of the control variables, x is the state variable vector, ix and ux are the

lower and upper limits of variable x respectively. Two objective functions are used in this topic. They can be written as follows

LPxu )(1 (8)

where LP equal to the sum of line active power losses in

the system.

LPQ

Pxu

2

2 )(

(9)                                  

       The functional equality constraints, v(x) is

iDiGii PPPP (10)

iDiGii QQQQ (11)

The inequality constraints, p(x) represents system and equipment technical limits

maxmin VVV (12)

..2.08.0 upXXX LUPFCL (13)

maxmin

maxmin p

MVARQMVAR UPFC 100100

where the state variable vector ‘X’ is defined as

UPFCX

V

X (17)

At a time one objective function (i.e. either 1u or 2u ) is

considered.

Objective II: Minimize F, where

n

jjcj PFF

1)( (18)

where )( jcj PF is the fuel cost function of unit j and jP is

the real power generated by the unit j , subject to power

balance constraints,

n

jLjld PPP

1max (19)

where maxldP is the maximum loadability limit and LP is

the sum of line active power losses. The generator constraint is given by,

maxmin jjj PPP for nj ,,3,2,1 (20)

where minjP and maxjP are the minimum and maximum real

power output of generating unit j . The fuel cost is then

can be written as

ijijijcj cPbPaPF 2)( (21)

where ia , ib and ic are the fuel cost coefficients of

generating unit j .

IV. RESULTS AND DISCUSSION

The proposed algorithm is implemented on Matlab, version 10.2 for solving Optimal Power Flow to determine the optimal location of UPFC and is experimented on modified IEEE 14-bus system. The control variables were considered as both continuous and discrete. The system is having five generators (at buses 1, 2, 3, 6, 8) and three transformers (between buses 6-5, 9-4, 4-7). The operating range of all transformers is set between 0.9-1.05 with a discrete step size of 0.01. The results of the extreme cases (for minimum cost and for minimum real power loss) are presented after executing 100 trial runs for each test case. Using (3)-(6), the sensitivities of modified IEEE 14-bus system were measured. The lines having maximum sensitivities are shown in the Table 1. From Table 1, it can

be concluded that real power loading sensitivity Kc2 is more

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negative (i.e.-191.16) when UPFC is connected between

bus 4 and 9. The reactive power loading sensitivity kC3 is

also more negative (i.e. -698.17) for the line 4-9 with UPFC. Therefore, the optimal location of UPFC is chosen when it is connected between buses 4-9. After identifying the suitable buses a load flow is performed using GA and PSO techniques respectively and the results are given in Table 2 and 3. The total system power losses are also given with and without UPFC. Table 1: Line Loss Sensitivity Indices of Modified IEEE 14

Bus Systems Line-k (i to j)

kC1 kC2 kC3 kC4

6-13 -31.34 -68.789 -352.28 139.95

4-9 -15.98 -191.16 -698.17 311.16

4-2 -78.23 -80.569 -158.94 123.12

4-3 -84.47 -82.884 -219.69 164.92

1-5 87.45 97.828 -232.76 172.68

2-3 -27.72 -67.72 -365.13 69.64

Table 2: Generation Cost and Active Power Loss in PSO

Technique Variables Without UPFC With UPFC

Generation cost

Active power loss

Generation cost

Active power loss

1GP

48.3744 16.2532 50.9052 17.6351

2GP

56.4131 38.2815 57.8389 37.2275

3GP

32.6271 41.6905 31.7152 40.2483

6GP

46.1305 35.8461 46.1492 36.8415

8GP

29.4743 45.6352 28.0961 44.3614

Total generation

cost

683.210 651.817

Line/Bus - 4-9

Table 3: Parameter Values for GA and PSO Technique

Parameter Modified IEEE 14 Bus

GA method PSO method

No of variables 24 24

Population size 50 50

No of iterations 100 100

C1 - 2

C2 - 2

W - 0.3-0.95

Crossover probability

0.9 -

Mutation probability

0.003 -

Table 4: Comparative Performance of Different Case Studies

with GA and PSO Techniques Case study GA method PSO method

Initial loss (p.u) 0.9216 0.5806

Final loss (p.u) 0.0627 0. 0124

Total loss reduction (p.u)

0.8589 0. 5682

Simulation time in sec

297.5180 254.1740

Table 5: Total Active Power Loss With and Without UPFC

in PSO Technique Line k (i to j) Total loss reduction (p.u)

With UPFC Without UPFC

4-9 0.5201 0.8429

13-6 0.5353 0.8229

4-3 0.5732 0.8432

6-5 0.5542 0.8169

2-3 0.5425 0.8509

Table 6: Total Active Power Loss With and Without UPFC

in GA Technique Line k (i to j) Total loss reduction (p.u)

With UPFC Without UPFC

4-9 0.8721 1.1535

13-6 0.8431 1.1017

4-3 0.8214 0.8821

6-5 0.8742 0.9140

2-3 0.8514 0.9310

11-6 0.8123 0.9215

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Fig. 3: Active power loss vs bus number

Table 7: Power Flows with UPFC for PSO Technique Branch From To Losses

P (MW) Q (MVar)

1 1 2 5.977 16.45

2 1 5 3.487 13.34

3 2 3 2.453 9.53

4 2 4 1.910 6.72

5 2 5 1.092 3.54

6 3 4 0.813 1.74

7 4 5 0.657 0.52

8 4 7 0.211 0.84

9 4 9 0.012 2.82

10 5 6 0.019 3.44

11 6 11 0.174 0.99

12 6 12 0.071 0.37

13 6 13 0.283 0.58

14 7 8 0.022 0.51

15 7 9 0.349 0.77

16 9 10 0.459 0.88

17 9 14 0.832 0.02

18 10 11 0.977 0.45

19 12 13 0.048 0.52

20 13 14 0.161 0.73

Table 8: Power Flows without UPFC for PSO Techniques

From To Losses

P (MW) Q (MVar)

1 1 2 6.213 17.50

2 1 5 3.800 13.71

3 2 3 2.832 9.61

4 2 4 1.541 5.14

5 2 5 1.129 3.34

6 3 4 0.790 1.23

7 4 5 0.541 0.74

8 4 7 0.342 0.91

9 4 9 0.064 2.02

10 5 6 0.041 3.19

11 6 11 0.382 1.20

12 6 12 0.621 0.83

13 6 13 0.642 0.91

14 7 8 0.030 0.63

15 7 9 0.381 0.92

16 9 10 0.481 0.90

17 9 14 0.612 0.83

18 10 11 0.713 0.53

19 12 13 0.972 0.45

20 13 14 0.481 0.61

IV. CONCLUSION

In this paper, the appropriate position of UPFC was identified using line loss sensitivity index. GA and PSO techniques separately applied to achieve minimum active power loss while satisfying the power system constraints. The sensitivity index has been used for optimal placement of UPFC to minimize active power loss using GA and PSO techniques. The proposed methodology has been applied and tested under simulated condition on modified IEEE 14-bus system. The problem has been formulated as true multi objective optimization problem with competing and non-commensurable objectives such as generation cost and active power loss. It is clear from the results obtained by different trials that PSO is a better technique than GA for active power loss minimization problem in a power system network. It has been observed that the PSO has the ability to converge to a better quality solution and possesses better convergence characteristics and robustness than GA. Furthermore, PSO takes less simulation time than GA. From the results it is concluded that the system performs better when the UPFC is connected at its optimal location.

REFERENCES

[1] X-P. Zhang, C. Rehtanz and B. Pal, ‘Flexible AC Transmission Systems: Modelling and Control’, pp. 1-26, Springer Verlag, 2006.

[2] N. G. Hingorani and L. Gyugyi, ‘Understanding FACTS- Concepts and Technology of Flexible AC Transmission Systems’, New York: IEEE Press, 2000.

[3] J. Hao, L. B. Shi, and C. Chen, “Optimizing Location of Unified Power Flow Controllers by Means of Improved Evolutionary Programming”, IEE Proc. Gener. Transm. Distrib. vol. 151, no. 6, pp. 705–712, 2004.

[4] L. Gyugyi, T. Rietman, and A. Edris, “The UPFC Power Flow Controller: a new approach to power transmission control”, IEEE Trans. Power Delivery, vol. 10, pp. 1085–1092, 1995.

[5] K.P. Wong, J. Yuryevich, and A. Li, “Evolutionary-programming based load flow algorithm for systems containing unified power flow controllers”, IEE proceedings of Generation, Transmission and Distribution, vol. 150, issue. 4, pp. 441-446, 2003.

[6] I.M. Wartana and N.P. Agustini, “Optimal Placement of UPFC for maximizing system loadability and minimizing active power losses in system stability margins by NSGA-

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II”, International conference on electrical engineering and informatics (ICEEI), pp. 1-6, July 2011.

[7] J.G. Singh, S. N. Singh, and S. C.Srivastava, “Placement of FACTS Controllers for Enhancing Power System Loadability”, PES, IEEE Power India Conference, pp. 89-96, 2006.

[8] M. Saravanan, S.M.R. Slochanal, P. Venkatesh, and P.S. Abraham, “Application of PSO technique for optimal location of FACTS devices considering system loadability and cost of installation”, 7th international power engineering conference (IPEC’05), vol. 2, pp. 716-721, 2005.

[9] S. N. Singh and I. Erlich, “Locating Unified Power Flow Controller for Enhancing Power System Loadability”, http://www.uni-due.de/ean/downloads/papers/O04-03.pdf.

[10] S. Majumder, A.K. Chakraborty and P.K. Chattopadhyay, “Active Power Loss Minimization with FACTS Devices Using SA/PSO Techniques”, 3rd International Conference on Power Systems (ICPS’09), pp.1-5, December 2009.

[11] M.Kowsalya, K.K.Ray and D.P.Kothari, “Loss Optimization for Voltage Stability Enhancement Incorporating UPFC Using Particle Swarm Optimization”, Journal of Electrical Engineering and Technology, vol.4, no.4, pp.492-498, 2009.

[12] A.A.A. Esmin, G. Lambert-Torres and Antonio C.Zambroni de Souza, “A Hybrid Particle Swarm Optimization Applied to Loss Power Minimization”, IEEE Trans. on Power Systems, vol.20, issue.2, pp: 859 – 866, 2005.

[13] J.H. Holland, ‘Adaptation in natural and artificial systems’, The University of Michigan Press, Ann Arbor, 1975.

[14] L.L. Lai and J.T. Ma, “Power Flow Control with UPFC Using Genetic Algorithms”, Proceedings of ISAP'96, pp.373-377, 1996.

[15] V. Miranda, D. Srinivasan and L. M. Proenca, “Evolutionary Computation in Power Systems”, Electrical Power and Energy Systems, vol. 20, no. 2, pp.89-98, 1998.

[16] H.L. Shaheen, G.I. Rashed, S.J. Cheng,"Optimal location and parameters setting of UPFC based on GA and PSO for enhancing power system security under single contingencies," Power and Energy Society General Meeting - Conversion and Delivery of Electrical Energy in the 21st Century, IEEE , pp.1-8, July 2008.

ACKNOWLEDGMENT

The authors are grateful to National Institute of Technology, Agartala, Jirania-799055, Tripura (west), India for providing all facilities for this research work.

BIOGRAPHIES

A. R. Bhowmik obtained his B.Tech in Electronics and Communication Engineering from West Bengal University of Technology in 2009 and M.Tech degree in Electrical Engineering from Tripura University (A Central University), India in 2011 respectively. He is currently pursuing his PhD in the department of Electrical Engineering from National Institute of Technology, Agartala, India. His areas

of interest include Application of Soft Computing techniques to different Power System problems, Power Quality, FACTS, Optimal Power flow, Economic load dispatch and Power system Operation & Control.

A. K. Chakraborty obtained his L.L.E from state council of engg and technical education, west bengal in 1979, B.E.E from Jadavpur University in 1987, M.Tech (Power System) from IIT, Kharagpur in 1990 and Ph.D (Engg) in 2007 from Jadavpur University respectively. He is currently working as an Associate Professor in the Department of Electrical Engineering, NIT Agartala, India. Before

he joined the NIT Agartala in 2010, he was with college of Engineering & Management, Kolaghat, India as a Professor. He has 16 years of teaching and 14 years of industrial experiences. His areas of interest include Application of soft computing techniques to different power system problems, Power Quality, FACTS & HVDC and Deregulated Power System. He has published several papers in national and international conference and journals. He is a fellow of Institution of Engineers (India) and Life member of ISTE.

P. N. Das obtained his B.Tech and M.Tech in Electrical Engineering in 1994 and 2002 respectively. He has submitted his PhD thesis to Jadavpur University in 2012. He is currently working as an Associate Professor in the Department of Electrical Engineering, NIT Agartala, India. He has published several papers in national and international conference and journals. His areas

of interest include Application of FACTS & HVDC, Deregulated Power System and High Voltage Engineering.

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Harmonic Analysis of Cascaded H-bridge Seven Level Inverter for RL Load Applications

A. Maheswari1 I. Gnanambal2

Abstract– A method is presented that a cascaded H-Bridge multilevel inverter can be implemented using unequal dc power sources. A standard cascade multilevel inverter requires n dc sources for 2n + 1 level. Proposed scheme allows the use of unequal DC power source without the requirement of transformers. Cascaded H-Bridge multilevel inverter which uses the unequal dc source shows the better performance and also significantly decreases the number of required switches. High quality output power due to its high number of output levels, results in high conversion efficiency and low thermal stress as it uses fundamental frequency switching scheme. This paper mainly discusses about the control of seven level multilevel converters with fundamental frequency switching control. The performance of single phase cascaded H-Bridge multilevel inverter with unequal dc source is simulated by using MATLAB/Simulink. A detailed harmonic analysis is done on cascaded H-Bridge seven level inverter and experimental results are presented to demonstrate the superiority of the proposed system. Keywords–Fundamental frequency switching control, multilevel inverter, Total Harmonic distortion (THD), Unequal dc sources

I. INTRODUCTION

Multilevel converters have received more and more attention because of their capability of high voltage operation, reliable operation, high efficiency, and low electromagnetic interference (EMI). The desired output of a multilevel converter is synthesized by several sources of dc voltages [1], [2]. With an increasing number of dc voltage sources, the converter voltage output waveform approaches nearly sinusoidal waveform while using a fundamental frequency switching scheme. Transformerless multilevel inverters are uniquely suited for this application because of the high VA ratings possible with these inverters [1]. Unique structure of the multilevel voltage source inverters allows them to reach high voltages with low harmonics without the use of transformers or series-connected synchronized switching devices. The general function of the multilevel inverter is to synthesize a desired voltage from several levels of dc voltages [3], [4], [5], [6], [7]. Multilevel inverters also have several advantages with respect to hard switched two level pulse width-modulation (PWM) adjustable-speed drives. Motor damage and failure have been reported by industry as a result of some adjustable-speed drives (ASD) operated by the inverters which has high voltage change The paper first received 27 Oct 2012 and in revised form 20 Dec 2012. Digital Ref: APEJ-2012-12-402 1

Department of Electrical and Electronics Engineering, K.S.R College of Engineering, Tiruchengode,India. E-mail: [email protected]

2 Department of Electrical and Electronics Engineering, Government

College of Engineering, Salem, India. E-mail: [email protected]

rates (dv/dt), which produced a common-mode voltage across the motor windings. High frequency switching can exacerbate the problem because of the numerous times this common-mode voltage is impressed upon the motor each cycle. The main problems reported have been “motor bearing failure” and “motor winding insulation breakdown” because of circulating currents, dielectric stresses, voltage surge, and corona discharge [8]–[10]. Multilevel inverters can able to overcome these problems because their individual devices have a much lower stress per switching and they can operate at high efficiencies because they can switch at a much lower frequency than PWM-controlled inverters. In this work, a method is given to compute the switching angles for a multilevel converter so as to produce the required fundamental voltage while at the same time cancel out specified higher order harmonics. In particular, a complete analysis is given for a seven level converter and validated the performance with hardware.

II. CASCADED H-BRIDGE MULTILEVEL INVERTER

TOPOLOGY

A cascaded multilevel inverter consists of a series of H-bridge (single-phase full-bridge) inverter units. The general function of this multilevel inverter is to synthesize a desired voltage from separate dc sources, which may be obtained from batteries, fuel cells, or ultracapacitors [11]. Consider a single-phase structure of cascade multilevel inverter with two H-bridges as shown in Fig. 1. Separate dc source is connected to each H-bridges of a single-phase multilevel inverter. The ac output of each level is connected in series such that the synthesized voltage waveform is the sum of the inverter outputs. The output voltage of the first H-bridge is denoted by v1 and the output of the second H-bridge is denoted by v2, so that the output of this cascade multilevel inverter is denoted by

)()()( 21 tvtvtv (1)

By opening and closing the switches of bridge 1 appropriately, the output voltage v1 can be made equal to −Vdc, 0, or Vdc, while the output voltage of bridge 2 can be made equal to −Vdc/2, 0 or Vdc/2 by opening and closing its switches appropriately. Therefore, the output voltage of the inverter can have the values −3Vdc/2, −Vdc, −Vdc/2, 0, Vdc/2, Vdc, 3Vdc/2, which is seven levels and is illustrated in Fig. 2.

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With enough levels, using this fundamental frequency switching technique results in an output voltage of the inverter that quasi-square waveform by phase shifting its positive and is almost sinusoidal. Each H-bridge unit generates a quasi-square waveform by phase shifting its positive and negative phase legs’ switching timings. Note that each switching device always conducts for 180 (or 1/2 cycle) regardless of the pulse width of the quasi-square wave. This switching method makes all of the active devices’ current stress equal.

Fig.1: Structure of cascaded H-bridge multilevel inverter

Fig.2: Output waveform of seven level cascaded H-Bridge inverter

III. SWITCHING ANGLES

In conventional cascaded multilevel inverters, PWM control methods and space vector PWM method are used. These methods will cause extra losses due to high switching frequencies. To overcome this problem, low switching control methods [13],[15] are used. Here fundamental frequency switching method is used. The Fourier series expansion of the (staircase) output voltage waveform of the seven level inverter as shown in Fig. 2 is

)())()()((1

2

4

)(

35,3,1

21 tnSinnCosnCosnCosn

V

tV

n

DC

(2)

Ideally, given a desired fundamental voltage V1, one wants to determine the switching angles θ1, θ2 and θ3 so that (2) becomes )sin()( 1 tVtV . In practice, one is

left with trying to do this approximately. In this case, the desire is to cancel the 5th and 7th order harmonics as they tend to dominate the total harmonic distortion. The mathematical statement of these conditions is then

VnCosnCosnCosVDC )()()((

2

4321

0)5())5()5( 321 CosCosCos (3)

0)7())7()7( 321 CosCosCos

This is a system of three transcendental equations in the three unknown’s θ1, θ2, and θ3. There are many ways one can solve for the angles. One approach to solve the set of nonlinear transcendental (3), is to use an iterative method such as the Newton-Raphson method [12]. In contrast to iterative methods, the approach here is based on solving polynomial equations using the theory of resultants which produces all possible solutions [13], [14]. The transcendental equations characterizing the harmonic content can be converted into polynomial equations. Then the resultant method is employed to find the solutions when they exist. These sets of solutions have to be examined for its corresponding total harmonic distortion (THD) in order to select the set which generate the lowest harmonic distortion (mostly due to the 11th and 13th harmonics). The computed THD in percent is defined by

100%2

1

219

27

25

23

V

VVVVTHD

(4)

IV. SIMULATION STUDY

The simulation of single phase seven level cascaded H-Bridge multilevel inverter using unequal dc sources was done using Simulink. In this proposed multilevel inverter, only eight switches are required to obtain the output voltage. More switches are required to achieve the same output voltage in the symmetrical type where equal dc sources are used. The main advantage of the multilevel inverter over conventional two level inverter is the voltage stress on each switch is reduced due to series connection of the switches. In case of the symmetrical type, the voltage of each switch is limited to the value of DC source. Since the proposed multilevel inverter uses unequal dc sources the voltage stress among the switches will be asymmetrically distributed. Hence care should be taken while selecting power switches for this type of configuration. The simulation diagram of seven level cascaded H-Bridge multilevel inverter is shown in Fig.3. The spectrum of the output current is taken to determine the Total Harmonic Distortion (THD). The simulation results of output voltage, Load current and FFT spectrum of Load current were presented for various RL loads are shown in

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Fig.4, Fig.5 and Fig.6. From the normalized FFT analysis shown in Fig.4(c) Fig.5(c) and Fig.6(c), it can be derived that the magnitude of lower order harmonics are very low and the magnitude of higher order harmonics are nearly equal to zero. A detailed THD for the different load is tabulated in the Table I. It is seen that the percentage of harmonics in the proposed multilevel inverter is less compared to classical inverter system.

Fig.3: Simulation diagram of seven level cascaded H-Bridge

inverter

Table I: Specifications adopted for the simulated parameters

Vdc1=12 V and Vdc2=6 V

R value L value THD (%)

11 Ω 125 mH 5.75 11 Ω 30 mH 7.07

22 Ω 30 mH 9.38

0.6 0.65 0.7 0.75 0.8-20

-15

-10

-5

0

5

10

15

20

Time in sec

Vol

tage

in v

olt

(a)

0.6 0.65 0.7 0.75 0.8-0.4

-0.3

-0.2

-0.1

0

0.1

0.2

0.3

0.4

Time in sec

Cur

rent

in A

(b)

(c)

Fig.4: Simulation results for R= 11Ω, L= 125mH. (a) Output voltage (b) Load current (c) FFT Analysis

0.6 0.65 0.7 0.75 0.8-20

-15

-10

-5

0

5

10

15

20

Time in sec

Vol

tage

in v

olt

(a)

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0.6 0.62 0.64 0.66 0.68 0.7 0.72 0.74 0.76 0.78 0.8-1.5

-1

-0.5

0

0.5

1

1.5

Time in sec

Cur

rent

in A

(b)

(c)

Fig.5: Simulation results for R= 11Ω, L= 30mH.

(a) Output voltage (b) Load current (c) FFT Analysis

0.6 0.62 0.64 0.66 0.68 0.7 0.72 0.74 0.76 0.78 0.8-20

-15

-10

-5

0

5

10

15

20

Time in sec

Vol

tage

in v

olt

(a)

0.6 0.62 0.64 0.66 0.68 0.7 0.72 0.74 0.76 0.78 0.8-0.8

-0.6

-0.4

-0.2

0

0.2

0.4

0.6

0.8

Time in sec

Cur

rent

in A

(b)

(c)

Fig.6: Simulation results for R= 22Ω, L= 30mH. (a) Output voltage (b) Load current (c) FFT Analysis

V. EXPERIMENTAL RESULTS

To experimentally validate the proposed multilevel inverter output voltage, hardware of single phase cascaded H bridge multilevel inverter has been built using MOSFET as the switching devices. A multi conversion cell consists of three 6 V batteries. One stage is supplied by 6 V and the other stage is supplied by 12 V (two 6 V Batteries are connected in series). A real time variable output voltage, variable frequency inverter controller based on ATmega16 Microcontroller is used to implement the control algorithm. An ATmega16 Microcontroller is used as the main processor, which provides gate signals. According to microcontroller control signal, MOSFET gate terminal is turned on and off. Output of the inverter terminal is connected to RL load. The hardware block diagram and experimental setup of seven level Cascaded H Bridge Multilevel Inverter shown in Fig.7 and Fig.8. Hardware result of proposed multilevel inverter is exposed in Fig.9 and Fig.10. The output voltage of seven level cascaded multilevel inverter is 15 volt, with frequency of 50 Hz.

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Fig.7: Block diagram of seven level cascaded H-bridge Inverter

Fig.8: Experimental setup

Fig.9: Output voltage of seven level cascaded H-bridge inverter

Fig.10:Output current of seven level Cascaded H-bridge inverter

VI. CONCLUSION

The proposed cascaded H-Bridge multilevel inverter uses unequal dc power source for producing desired multilevel voltage is simulated and validated by hardware. A fundamental frequency switching control algorithm was developed and implemented in the microcontroller. The total harmonic distortion is very low compared to that of classical inverter. The simulation results of load current waveform shows that the lower order harmonics have been reduced considerably and also higher order harmonics are eliminated. The proposed multilevel inverter can be used for industries where the adjustable speed drives are required and significant amount of energy can be saved as the proposed system has less harmonics.

REFERENCES

[1] J. S. Lai and F. Z. Peng, “Multilevel converters—A new breed of power converters,” IEEE Trans. Ind. Applicat., vol. 32, no. 3, pp. 509–517, May/Jun. 1996.

[2] L.M. Tolbert, F. Z. Peng, and T. G. Habetler, “Multilevel converters for large electric drives,” IEEE Trans. Ind. Applicat., vol. 35, no. 1, pp.36–44, Jan./Feb. 1999.

[3] M. Klabunde, Y. Zhao, and T. A. Lipo, “Current control of a 3 level rectifier/inverter drive system,” in Conference Record 1994 IEEE IAS Annual Meeting, pp. 2348–2356, 1994.

[4] W. Menzies, P. Steimer, and J. K. Steinke, “Five-level GTO inverters for large induction motor drives,” IEEE Trans. on Ind. Applicat., vol. 30, no. 4, pp. 938–944, July 1994.

[5] G. Sinha and T. A. Lipo, “A four level rectifier-inverter system for drive applications,” in Conference Record IEEE IAS Annual Meeting, pp. 980–987, October 1996.

[6] J. K. Steinke, “Control strategy for a three phase AC traction drive with three level GTO PWM inverter,” in IEEE Power Electronic Specialist Conference (PESC), pp. 431–438, 1988.

[7] A. Maheswari, S. Mahendran and I. Gnanambal, “Implementation of fundamental frequency switching scheme on multilevel cascaded H-bridge inverter fed three phase induction motor drive ”, Wulfenia journal, vol 19, no. 8, pp. 10-23, Aug 2012.

[8] S. Bell and J. Sung, “Will your motor insulation survive a new adjustable frequency drive?,” IEEE Trans. Ind. Applicat., vol. 33, pp. 1307–1311, Sept./Oct. 1997.

[9] J. Erdman, R. Kerkman, D. Schlegel and G. Skibinski, “Effect of PWM inverters on AC motor bearing currents and shaft voltages,” IEEE Trans. Ind. Applicat., vol. 32, pp. 50–259, Mar./Apr.1996.

[10] A. H. Bonnett, “A comparison between insulation systems available for PWM-inverter-fed motors,” IEEE Trans. Ind Applicat., vol. 33, pp.1331–1341, Sept./Oct. 1997.

[11] F. Z. Peng, J. S. Lai, J. W. McKeever, and J. Van Coevering, “A multilevel voltage-source inverter with separate dc sources for static var generation,” IEEE Trans. Ind. Applicat., vol. 32, pp.1130–1138, Sept./Oct.1996.

[12] Patel. H.S. and Hoft, R.G, “Generalized techniques of harmonic elimination and voltage control in thyristor

Opto isolator

Battery

Step- down Transformer

Single phase cascaded H-

bridge multilevel Inverter

Rectifier

RL Load

Gating signal from ATmega16 microcontroller

Single phase AC

Supply

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Inverters: Part I – Harmonic Elimination”, IEEE Trans. Ind.Appl., vol. 3, pp.310-317, 1973.

[13] Chiasson, J.N., Tolbert, L.M., Mckenzie, K.J. and Du Z., “Control of a Multilevel Converter Using Resultant Theory”, IEEE Trans. Control Syst. Technol., vol. 11, no.3, pp. 345-354, 2003.

[14] J. Chiasson, L. Tolbert, K. McKenzie, and Z. Du, “Elimination of harmonics in a multilevel converter using the theory of symmetric polynomials,” IEEE Trans. Control Syst. Technol., vol. 13, no. 2, pp. 216–223, March 2005.

[15] Z. Du, L. M.Tolbert and J. N. Chaisson, “Modulation extention control for multilevel converters using triplen harmonic injection with low switching frequency,” in Proc. IEEE Appl. Power Electron. Conf., Austin, TX, pp. 419- 423, Mar., 2004.

BIOGRAPHIES

A. Maheswari was born in Tamilnadu, India, on April 7, 1983. She received her B.E degree in Electrical and Electronics Engineering from V.M.K.V Engineering College, Salem, in 2004, the M.E degree in Power Electronics and drives from Government college of Engineering, Salem, in 2008. Currently she is doing Ph.D. She has presented 4 papers in various National and

International conferences. She also published one paper in international journal. Her current research interests include simulation and control techniques of AC drives, Inverters topologies and harmonic suppression. Ms.Maheswari is an ISTE life member.

I. Gnanambal was born in Tamilnadu, India. She received her B.E degree in Electrical and Electronics Engineering from Government college of Engineering, Salem, in 1981, the M.E degree in Applied electronics in Government college of technology, Coimbatore, in 2002 and the Ph.D. degree in networking from Anna university, Chennai, in 2008.

She has presented more than 50 papers in various National and International conferences. She also published more than 20 papers in various National and International journals. Her research interests include power electronics, solid state drives, networking and special electrical machines. Dr. Gnanambal is an ISTE, IE and IETE life member.

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Review on Power Quality Solution Technology

B. Singh1 G. Bhuvaneswari1 S.R. Arya1

Abstract–This paper presents a comprehensive study of various possible solutions for power quality improvement in common applications and supply system. This includes improved power quality converters (IPQC), multi-pulse converters, active compensation, passive compensation and their hybrid configurations. Various configurations and topologies of custom power devices such as DSTATCOM (Distribution Static Compensator), DVR (Dynamic Voltage Restorer) and UPQC (Unified Power Quality Compensator) are also described in detail. Main applications of these devices are for reactive power compensation, harmonic elimination, voltage sag/swell mitigation, voltage regulation, load balancing, neutral current reduction etc. Many such cases of power quality problems have been taken up and suitable solutions have been identified for those cases. As an example, a model of DSTATCOM is developed and its performance is presented for a distribution system feeding nonlinear loads. Keywords–Custom power devices, hybrid filters, IPQC, passive filters, reactive power compensators, multi-pulse converters, power quality

I. INTRODUCTION Electrical distribution system is facing undesirable power quality disturbances due to different types of linear/non-linear loads on supply system. Some of these power quality disturbances and problems include waveform distortion, high reactive power burden, unbalanced currents in the three phases, excessive neutral current, voltage sag/swell, imbalances in supply voltage, flicker and notching etc [1]. Due to the proliferation of power converter based non-linear loads in the distribution system, power quality related problems are on the rise; further, as these converters which actually cause these power quality problems are also vulnerable to them. Voltage quality in a distribution system very much depends on various phenomena of the network disturbances and the quality of power coming from the distribution network; on the other hand, current quality mostly depends upon the nature of connected loads [2-4]. AC–DC conversion of electric power is required in adjustable-speed drives (ASDs), switch-mode power supplies (SMPSs), uninterrupted power supplies (UPSs), arc furnaces, welding systems and utility interface with non-conventional energy sources such as wind, solar PV etc. One of the major culprits causing power quality problems lies in these AC-DC uncontrolled converters. With the emphasis on electric vehicles to reduce green house gas emission, the battery charging for electric vehicles is likely to form a major chunk of the load on the distribution system. Similarly, mobile phone users are on a steep rise which makes the requirements of telecom towers to shoot up; The paper first received 19 Feb 2012 and in revised form 6 July 2012. Digital Ref: APEJ-2012-12-405 1

Department of Electrical Engineering, Indian Institute of Technology Delhi, New Delhi, 110016, India, E-mail: [email protected] 2

Department of Electrical Engineering, Indian Institute of Technology Delhi, New Delhi, 110016, India, E-mail: [email protected] 3

Department of Electrical Engineering, Indian Institute of Technology Delhi, New Delhi, 110016, India, E-mail: [email protected]

hence telecom tower power supplies are also contributing to a huge non-linearity in the distribution system. In all these systems of medium power rating (10-15 kW), conventional AC-DC converters can be replaced by improved power quality converters (IPQCs) and multi-pulse converters to grossly improve the power quality situation [5, 6]. The choice of IPQC depends upon number of phases in AC mains (single-phase, three-phase), required level of power quality at input (permitted power factor-PF, crest factor-CF and Total Harmonic Distortion-THD), type of output DC voltage required (constant, variable, etc.), direction of power-flow (unidirectional and bi-directional), number of quadrants of operation in the V-I plane (one, two or four),, requirement of DC output (buck, boost and buck-boost) etc. Very often active power factor correction (PFC) techniques are used for improving power factor in an AC-DC converter. Sometimes VAR compensators and harmonic filters are also used for power quality improvement and voltage regulation [7-10]. Proper wiring and grounding are equally important in industrial and domestic sectors especially from the safety point of view. With the help of proper grounding and wiring, safety can be sustained and equipment damage and malfunctions may be reduced [11]. The power quality at the point of common coupling (PCC) is governed by several international standards such as IEEE-519, IEC-61000-3-2, IEEE 1531 etc [12-14]. A review on improved power quality AC–DC converters for power factor correction and reduction of harmonics at the utility interface is presented in [15-16] which describe control strategies, selection of components and selection of specific converters such as buck, boost and buck–boost etc for specific applications. Multi-pulse AC–DC converters (MPC) are also used for improving the power quality to reduce harmonics at the three phase ac mains and ripples in dc output. It is mostly used in the applications of drives and telecom sectors [17]. Increased use of power converters for accurate control and improved energy efficiency have caused increase in voltage and current harmonic contents in the distribution sector. Passive and active power filters are used as solutions for harmonic filtering and reactive power compensation. In a passive filter, its components are passive elements such as capacitor, inductor and resistor. Many research publications discuss the classification of active and passive filters, their combinations and applications as solutions to different power quality problems [18-27]. Compared to traditional passive filtering, active filtering technology can have one or more of the functions as harmonic filtering, damping, isolation, voltage regulation, voltage-flicker reduction, load balancing and reactive-power control for power factor correction. The advent of

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powerful digital signal processors and their cost reduction have inspired manufactures to put active filters on the global power market. Many researchers use the term power conditioning rather than harmonic filtering, because the term “power conditioning” encompasses all the power quality solutions such as harmonic damping, reactive power control, harmonic elimination, load balancing, voltage flicker etc [28-30]. Active power filters can be categorized into shunt and series compensating devices. For e.g. distribution static compensator (DSTATCOM) is a shunt device whereas dynamic voltage restorer (DVR) is a series device. UPQC (unified power quality conditioner) is a combination of shunt and series compensating devices. Design, classification, and various topologies of different custom power devices are available in the literature [31-39]. Typical loads in a three-phase four-wire distribution system may be computer loads, lighting ballasts, small rating adjustable speeds drives (ASD) in air conditioners, fans, refrigerators and other domestic and commercial appliances etc. Because of these distributed loads on three-phases, the distribution system has a significant portion of the third harmonic current component. The iron-cored inductive ballasts as well as electronic ballasts in fluorescent lighting also contribute to third harmonic currents. One survey in the United States has revealed that in a typical distribution system, neutral currents can be as high as 1.73 times the phase current [40]. It is also revealed that 22.6% of the sites that have been surveyed have neutral currents exceeding the full load phase currents and this scenario is becoming worse in the recent years due to the proliferation of many nonlinear single-phase loads. Some of the neutral current mitigation techniques are use of a Scott or T-connected transformer, star-hexagon transformer, star polygon transformer and a zig-zag transformer. These techniques are passive in nature and can be used in combination with custom power devices [41]. Some of the practical applications of power quality solutions in industrial and domestic sectors are IPQCs (Improved Power Quality Converters) as a power factor corrected (PFC) AC-DC converter for rectifier fed loads [42], autotransformer-based 24-pulse AC–DC converter for variable frequency drives [43], PFC Cuk converter-based PMBLDCM drive for air-conditioner application [44], boost PFC electronic ballast for compact fluorescent lamps (CFL) in lighting system application [45], application of PFC converter in special motor drives as switched reluctance motor [46], installation of SVC for arc furnaces to eliminate voltage and current harmonics distortion, flicker and unbalance elimination [47-49] by using a DSTATCOM at wood saw machine. These custom power devices are installed for eliminating flicker and offering reactive power compensation in arc and induction furnaces [50]. Following section gives a brief outline of various power quality solutions available as reported in the literature.

II. SOLUTIONS FOR POWER QUALITY IMPROVEMENT Increasing pollution in supply lines has drawn the attention of power engineers and many researchers are

working for its prevention and suppression. In this regard, many standards such as IEEE-519, IEEE-1531 and IEC61000 have been developed and enforced to limit the power quality problems in industrial and domestic sectors [12-14]. There are power quality standards available from the view point of utilities and distribution companies as well. Power Quality problems can be effectively eliminated in two ways: first one is prevention- i.e., designing the upcoming power electronic systems in such a way as to make them to draw sinusoidal current in phase with the supply voltage; the other one is suppression, by means of employing power conditioners in already existing non-linear systems to nullify harmonics, to take the reactive power burden off the power supply and to eliminate imbalance. Some of the practical solutions for power quality problems are described below. A. Application of IPQC for Power Quality Improvement

[5-6, 15-17] Low and medium power domestic and commercial applications are equipped with voltage source converters fed from single or three phase AC-DC converter connected with smoothing DC capacitor. These equipments draw nonlinear current from the supply which causes many power quality problems such as low power factor, heavy harmonic distortion in AC mains current and its high crest factor (CF). For mitigation of these problems various converter configurations are reported in the literature that are classified as IPQCs [5, 15-16]. IPQCs can be categorized based on various aspects as single phase and three phase, isolated and non-isolated converters. Various type of IPQCs are buck, boost, buck-boost and multilevel in non-isolated topologies and in isolated topologies such as flyback, forward, push-pull, Cuk, SEPIC, Zeta, half-bridge and full-bridge converters. Most of these converters are employed in DC power supplies, telecommunication power supplies, improved power factor ballast, multiple output power supplies for equipment like computers, medical electronic systems, printers and scanners etc. Many non-isolated AC-DC converters such as multi-pulse and multi-phase converters are used in drives and welding applications [17]. Figs. 1(a-c) show the schematic diagrams of single phase unidirectional boost converter, three phase unidirectional boost converter and single-phase buck-boost Cuk AC-DC converter respectively. In Fig.1(c), inductances Ls,L1,L2 act as boost/filter inductors, Co,C1,C2 act as filter and charging storage capacitors. The inductive element in parallel with capacitor connected in the supply side acts as passive filters. Elements of power circuit such as semiconductor device, transformer are shown by symbols Q and T respectively

(a) Single-phase unidirectional boost converter

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(b)Three-phase single switch unidirectional boost converter

(c) Single-phase buck-boost Cuk AC-DC converter Fig. 1: Schematic of various improved power quality converters [15-16]

B. Application of Multipulse Converter for Power Quality Improvement Multipulse technique involves connection of many six-pulse converters in series or parallel such that the harmonics generated by one converter are canceled by the other converter. It is one of the simplest and most effective techniques for reducing power converter harmonics [6, 17]. These have been widely used in high power drive applications and in electro-chemical industries. The expanding the use of power converters for adjustable frequency ac motor drives has stimulated the development of multipulse converters in lower power rating as well. Major advantages of multipulse converter technique are simple uncontrolled structure, reduction of AC input line current harmonics and reduction of DC output voltage ripple. These are also used in high voltage direct current (HVDC) transmission, telecommunication power supplies, battery charging, uninterruptible power supplies (UPS) of high-capacity, magnet power supplies, high-power induction heating equipments, aircraft converter systems and plasma power supplies [17]. Multipulse converters can be classified as 6, 12, 18, 24, 30 …. pulse etc. Harmonic level in supply line may be decreased further as the number of pulses increases. Large power rating rectifiers in 12-and 18-pulse configurations are commonly used in several important processes such as DC arc furnaces, plasma torches and so on. Sometimes, non-conventional pulse numbers (not a multiple of six) are also used in multi-pulse converters. The prototypes of 14 pulse and 28 pulse converter have been developed using diode bridge rectifiers and transformer connection. These converters are connected to three phase ac supply and feeding varying loads. A Fluke (43B) power analyzer is used for recording of steady state results on a developed converter. Waveforms of uncontrolled 3-phase 14-pulse and 28-pulse bridge rectifiers are shown in Fig.2. The input current THD is

found to be around 10% in both isolated and non isolated 14-pulse converter and around 4% in 28-pulse converter.

(a) Performance of Non-isolated 14-pulse converter feeding 265W load

(b) Performance of Isolated 14-pulse converter feeding 78W load

(c) Performance of Non isolated 28-pulse converter feeding 262W load

(d) Performance of Non isolated 28-pulse converter feeding 80W load Fig. 2: Voltage and current waveforms and harmonic spectra of controlled

3-phase 14-pulse and 28-pulse bridge rectifiers

C. Application of Passive Filter for Power Quality Improvement [3-4, 18- 27]

Harmonic filtering using passive and active filters is one of the solutions to prevent the problem causing harmonics from entering the rest of the distribution system. Basically harmonic filters are two types. First is passive, where filter components are passive elements such as capacitor, inductor and resistor; second is active, where filter has a current source inverter (CSI) or voltage source inverter (VSI). Among the passive filter, there are two approaches to suppress undesired harmonic currents: first is, using a series impedance to block them; second is, diverting them by means of a low impedance shunt path. The former is called a series filter and the latter is called a shunt filter. In comparison with series filter, shunt filter carries only a fraction of the current and is also less expensive. Harmonic filter comes in many “shapes and sizes”. Most of the times, harmonic filters are “shunt” filters because they are connected in parallel with the power system and provide low impedance path to suck for harmonics currents at one or more harmonic frequencies. Shunt filters

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are designed in different basic categories as single-tuned filters, multiple (usually limited to double) tuned filters, high pass damped and undamped filter (first order, second, or third order) and bypass filter etc [3, 4]. The single and double tuned filters are usually used to filter specific frequencies, while the damped filters are used to filter a wide range of frequencies. Key point for the passive filter design is reactive power (kVAR) requirement, harmonic distortion and normal system condition, inclusive of load and source impedances. The major advantages of a passive filter are it is simple, easy to build at higher power levels, capable of providing reactive power compensation. The disadvantages of passive filter are problems associated with resonance, poor filtering characteristics resulting in power factors other than unity, dependence on source impedance, being bulky etc [21].

Passive filters can also be classified based on topology, connections and the number of phases. The topology can be tuned and damped to act as low pass and high pass for shunt filters or to act as low block and high block for series filters. These passive power filters may be connected in shunt, series or a combination of both for compensating different types of nonlinear loads. Third classification is based on the number of phases such as two wire (for single-phase) and three or four wire (for three-phase nonlinear loads). Passive filters are widely used to limit harmonic propagation, to improve power quality, to reduce harmonic distortion and to provide the reactive power compensation [22, 23]. Many such filters are in operation for HVDC transmission systems, large industrial drives, static VAR compensators etc. Passive filters are the best and viable choice in high voltage and high current applications. Figs. 3(a) and (b) show the schematic of passive filter connection in three phase three wire system and actual structure of the filter with a diode rectifier. A combination of series and shunt filter configuration is known as a hybrid filter. These individual components can be active or passive. It provides cost effective solution to problems of compensation of harmonics in current and voltage [24-27]. Hybrid filter can be classified based on the number of elements in the circuit topology and supply system. The supply system can be single phase (two-wire), three-phase three-wire and three-phase four-wire to feed a variety of nonlinear loads.

(a) Schematic of Passive filter connection in three phase three wire

system

(b) Three phase diode bridge rectifier with passive filter

Fig 3: Schematic of passive filter with supply system

The type of converters can be voltage source inverter (VSI) or current source inverter (CSI) to realize active filter part of hybrid filter with appropriate control. The number of elements in topology can either be two, three or more, which may either be active filters or passive filters. Here, the main classification is made on the basis of supply system with further sub-classification on the basis of filter elements. Fig.4. shows the classification of hybrid filters based on number of phases in the supply system and further sub-classification based on topology and passive and active filter combination. Some example of hybrid filters are unified power quality conditioner (UPQC), combination of passive and active filters and their topologies. These are most effective solution for compensation/suppression of power quality problems in various power levels. Fig. 5 shows a typical hybrid filter configuration. This hybrid filter is formed by series connection of passive filter and a small capacity active filter. The passive filter suppresses harmonic currents produced by the load, whereas the active filter improves the filtering characteristics of the passive filter. As a result, the hybrid filter system can solve the problems inherently by using only a passive filter. The series connected active filter is controlled to act as a harmonic compensator for the load by constraining all the harmonic currents to sink into passive filters. This eliminates the possibility of series and parallel resonances. By actively improving the compensation characteristics of the tuned passive filters, the need for precise tuning of the passive filters is greatly reduced and the design of the passive filter becomes insensitive to the supply impedance. This topology is suited for the harmonic compensation of the load connected to a stiff supply. This configuration effectively provides compensation for current harmonics and limited supply voltage distortions, since it acts as a harmonic voltage source, compensating for the voltage drop in passive filters at harmonic frequencies at PCC. However, the distortions in the utility voltage are added to the required voltage injected, and hence the required rating of the active filter may increase. Unlike hybrid filters having active filter in series with AC mains, these are less susceptible to problems under short circuit condition in the utility line and do not increase voltage harmonics any further. Selection of hybrid filter configuration depends upon the nature of load (voltage fed, current fed or mixed), type of supply system (single-phase, three phase three wire, three phase four wire), compensation required in current (harmonics, reactive power, balancing, neutral current) or

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voltage (harmonic flicker, unbalance, regulation, sag, swell, spikes, notches) and pattern of loads (fixed, variable, fluctuating) etc.

Fig. 4: Classification of hybrid filters for power quality improvement [24]

D. Application of Active Filter and Custom Power Devices [1, 2, 7, 8, 28-49] In order to overcome the problems associated with passive filters, active power filters have been developed since early 1970's. The operation of an active filter is based on continuous monitoring and conditioning of the distorted current created by the nonlinear loads. The same harmonic currents, but with a 180º phase shift are generated by the filter, so that harmonic components are cancelled and only fundamental component flows from the point of common coupling (PCC) towards the source. Functions of active filter are to cancel out harmonics, block resonance, reactive power management etc [28-30].

Fig. 5: Block diagram of a typical hybrid filter configuration

Improved versions of active filters are known as custom

power devices (CPDs) that are used in low and medium power distribution systems. The term custom power pertains to the use of power converters in a distribution system, especially, these devices make sure that the customers get pre-specified quality and reliability of supply. This pre-specified quality may have specifications like no power interruptions, low flicker, less reactive power demand, balanced operation, low harmonic distortion, magnitude and duration of over-voltages/ under-voltages within specified limits, zero voltage regulation and less neutral current. These can be achieved on the basis of a large individual customer or industrial/ commercial parks or a supply for a high tech community on a wide area basis. Custom power technology is a general term for equipment capable of mitigating numerous power quality problems. Basic functions of these devices are fast switching converters with current or voltage injection for correcting anomalies in supply voltages or load currents, by injecting or absorbing reactive and active powers, respectively. The power electronic controllers that are used in the custom power solution can be network reconfiguring type or compensating type. The network re-configuration devices are usually called switch gears which include current limiting, current breaking and current transferring devices. It includes solid state current limiter (SSCL), solid state breaker (SSB), and solid state transfer switch (SSTS). The compensating devices either compensate a load, i.e. its power factor, unbalance conditions or improve power quality of supplied voltage, etc. These devices are either connected in shunt or in series or a combination of both. This class of devices includes the distribution static compensator (DSTATCOM), dynamic voltage restorer (DVR), and unified power quality conditioner (UPQC) [1,7-9]. Among compensating devices, a DSTATCOM can mitigate current related power quality problems in power factor and voltage regulation mode whereas DVR can solve voltage sags and swells which are considered to have a severe impact on manufacturing industries such as plastics and semiconductor device manufacturing plants, food processing and paper mills. UPQC can be used to solve both types of problems in critical and sensitive loads such as hospitals, banks etc. Details of these devices are given below. 1) Distribution Static Compensator (DSTATCOM): This provides load current compensation in the form of reactive power compensation, load balancing and/or harmonic elimination and neutral current mitigation. Performance of DSTATCOM system depends on the algorithm used for control of the system so that dynamic compensation of the load can be provided. The important requirement for the control algorithm is that it should be simple, easy to implement and work well with non-sinusoidal and unbalanced ac mains, which is a practical situation in the present day distribution system. Depending upon supply system, the topologies of DSTATCOM are shown in Fig. 6(a, b). Power circuit of DSTATCOM includes voltage source inverter with DC bus voltage (vdc) supported by a DC bus capacitor (Cdc) and AC inductors (Lf). Three phase supply currents, compensating currents, load currents,

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supply neutral current, load neutral current are shown by (isa, isb, isc), (iCa, iCb, iCc), (iLa, iLb, iLc), isn and iLn respectively. Circuit parameters such as high value of source inductance (Ls) distort the supply voltage, smooth the current waveform and effect the mean output voltage. Diode bridge rectifier with series connected inductor and resistance is presented as current fed type nonlinear loads where maximum percentage harmonics are 31.08% and 48.34% in three wire and four wire systems respectively. In case of voltage fed type nonlinear loads, maximum percentage of harmonics is decided by value of parallel connected capacitor. For reducing ripple components in compensating currents, proper tuned valued of interfacing inductors (Lf) are connected at ac output of the VSC. A three phase series combination of capacitor (Cf) and a resistor (Rf) represent the shunt passive ripple filter which is connected at point of common coupling (PCC) for reducing the high frequency switching noise during DSTATCOM operation. Fig 7 shows a block diagram of synchronous reference frame (SRF) theory based control algorithm for DSTATCOM. Where isd* and isq* are the total active and reactive components of the reference supply currents. SRF algorithm is used for generation of reference supply currents ( isa*, isb*, isc*) using Park’s and inverse Park’s transformation from distorted three load currents (iLa, iLb, iLc). The sensed supply currents (isa, isb, isc) and reference supply currents (isa

*, isb*, isc

*) are compared and extracted current errors are amplified through PI current controller and output of these controllers are fed to comparator to generate the gating signals of VSC. DSTACOM is connected to a three phase supply feeding three phase nonlinear loads with internal grid impedance for test purpose. Three phase diode based rectifier with resistive load is modeled as nonlinear load. A Fluke (43B) power analyzer is used for recording steady state results on a developed DSTATCOM. Fig. 8 shows the performance of three-phase VSC based DSTATCOM system under nonlinear loads in power factor correction mode. After power factor correction, %THD of phase ‘a’ supply current and load current are 3.1% and 27.7 % respectively. It shows that supply currents are maintained balanced and sinusoidal in phase with the supply voltages even under highly distorted load currents.

2) Series connected DVR (Dynamic Voltage Restorer)

A DVR is connected between the supply and sensitive load, so that it can inject required compensating voltage into the distribution line [38]. Therefore, the DVR can provide an effective solution for compensating voltage sag, swell, harmonics and unbalance in supply voltages. Depending upon supply system, its topologies are depicted in Fig. 9, where (isa, isb, isc), (vca, vcb, vcc), (iLa, iLb, iLc) are shown as three phase supply currents, compensating voltages and load currents respectively. Power circuit elements as interfacing inductor and series transformer are represented as Lr and Tr.

3) Unified power Quality Conditioner (UPQC)

It is a combination of DSTATCOM and DVR. If any consumer can afford the cost, then a hybrid of these two compensators provides the best solution and thus it is known as unified power quality conditioner (UPQC) or universal active filter. Therefore, the development of hybrid filter technology has been from a hybrid of passive filters to a hybrid of active filters to provide a cost-effective solution and optimal compensation for voltage related power quality problems. For systems based on diode bridge converters with high DC link capacitive filters, series active or hybrid filter configurations are preferred. In general, when a UPQC is used in a power distribution system, the series filter is installed ahead of the shunt filter. Functions of UPQC are a hybrid of shunt and series compensators that take care of both current quality and voltage quality problems. The shunt compensator converts the load currents to balanced sinusoids, the series compensator converts the load voltages to balanced sinusoids; thus, it can mitigate the load current quality problems and the source voltage quality problems. But, it is an expensive device, as it requires two sets of power inverters. Fig. 10 shows the schematic diagram of UPQC [1, 9, 39]. It shows three phase supply currents (isa,isb,isc), compensating voltages (vca,vcb,vcc), compensating currents (iCa,iCb,iCc), load currents (iLa,iLb,iLc), interfacing inductor (Lr) and series transformer (Tr).

(a) Three phase three- wire, 3-Leg VSC Topology of DSTATCOM system

(b) Three phase four- wire, 3-Leg VSC with Zig-zag transformer topology of DSTATCOM system

Fig. 6: Supply system based DSTATCOM topologies [34, 36]

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Fig.7: Block diagram of extracting reference source currents using SRF control algorithm [8, 32].

Fig. 8: Performance of DSTATCOM under nonlinear loads (a) vab, isa (b) Harmonic spectrum of ia (d) Harmonic spectrum of vab (d) iLa (e) Harmonic spectrum of iLa (f) iCa

(a) Schematic of 3-phase 3-wire DVR system

(b) Schematic of 3-phase 4-wire DVR system Fig. 9: Supply system based DVR topologies [38]

Fig. 10: Schematic diagram of UPQC [39]

V. CONCLUSION Different types of converters and compensators have been proposed for the improvement of power quality. Some of

these power quality mitigation devices have been illustrated as passive, active or hybrid filters, multi-pulse converters and IPQCs. Passive filters are not adaptable and remain fixed once they are installed in particular application also a special switching is required to avoid the switching transients but active filter eliminates limitation of passive filter. Active filter is equally well applicable for reactive power compensation, harmonic elimination etc without any resonance problem. Major problem with active filter are cost and high rating so its applications are limited. To reduce these problems, different topologies of hybrid filters are more effective solution. Selection of these equipments depends upon requirements of the system under consideration. Passive filter and hybrid filters have been more useful in very large power applications.

IPQCs and multi-pulse converters have been found very useful in both industrial and domestic sectors such as lighting, air conditioners, SMPS and telecommunication power supplies etc. They have also been extensively used in the areas of power supplies and adjustable speed drives. For low and medium voltage domestic and commercial sectors, custom power devices have been found more

(a) (b) (c)

(d) (e) (f)

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suitable as compared to passive filters. DSTATCOM which is the shunt connected custom power devices is the most popular compensating devices for harmonic elimination, reactive power compensation, load balancing and neutral current compensation in power factor correction and voltage regulation mode. It is more suitable for current fed type loads. DVR is another custom power devices which is used for series compensation to protect critical loads from ac supply main disturbances. Generally, series filter is better suited are more suitable for voltage fed type loads because its rating is less compared to shunt filters.

REFERENCES

[1] A. Ghosh and G. Ledwich, ‘Power Quality Enhancement using Custom Power Devices’, Springer International Edition, Delhi, 2009.

[2] J. Schlabbach, D. Blume and T. Stephanblome, ‘Voltage Quality in Electrical Power Systems’, IEE Press Series on Power Engineering and Energy, 2001.

[3] Francisco De La Rosa, ‘Harmonics and Power Systems’, CRC Press, New York, 2006.

[4] Jos Arrillaga and Neville R.Watson, ‘Power System Harmonics’, John Wiley and Sons Ltd, England, 2003.

[5] M. H. Rashid, ‘Power Electronics: Circuits, Devices, and Applications’, Upper Saddle River, NJ: Prentice Hall, 2003.

[6] D. A. Paice, ‘Power Electronic Converter Harmonics:Multi-pulse Methods for Clean Power’, New York, IEEE Press, 1996.

[7] R. Sastry Vedam and Mulukutla S. Sharma, ‘Power Quality VAR Compensation in Power Systems’, CRC Press, New York, 2009.

[8] K.R. Padiyar, ‘FACTS Controllers in Power Transmission and Distribution’, New Age International, New Delhi, 2008.

[9] G. Benysek, ‘Improvement in the Quality of Delivery of Electrical Energy using Power Electronics Systems’, Springer-Verlag, London, 2007.

[10] Ambra Sannino, Jan Svensson, Tomas and Larsson, “Review power-electronic solutions to power quality problems”, Journal of Electric Power Systems Research, vol.66, pp.71-82, 2003.

[11] J.Burleson, “Wiring and grounding to prevent power quality problems with industrial equipment”, in Proc. of IEEE Annual Textile, Fiber and Film Industry Technical Conference, pp.1-6, 1991.

[12] IEEE Recommended Practices and requirement for Harmonic Control on Electric Power System, IEEE Std.519, 1992.

[13] Limits For Harmonic Current Emissions,International Electrotechnical Commission IEC-61000-3-2, 2000.

[14] IEEE Guide for Application and Specification of Harmonic Filters, IEEE Std.1531, 2003.

[15] B. Singh, B. N. Singh, A. Chandra, K. Al-Haddad, A. Pandey and D. P. Kothari, “A review of single-phase improved power quality AC–DC Converters”, IEEE Trans. Ind. Electron., vol. 50, no. 5, pp. 962-981, October 2003.

[16] B. Singh, B. N. Singh, A. Chandra, K. Al-Haddad, A. Pandey and D. P. Kothari, “A review of three-phase improved power quality AC–DC converters”, IEEE Trans. Ind. Electron., vol. 51, no. 4, pp. 641-660, June 2004.

[17] B. Singh, S. Gairola, B. N. Singh, A. Chandra and K. Al-Haddad, “Multipulse AC–DC converters for improving power quality: A review”, IEEE Trans. Power Electron., vol. 23, no. 1, pp. 260-281, January 2008.

[18] B. Singh, A. Saxena and D.P. Kothari, “Power factor correction and load balancing in three-phase distribution systems,” in Proc. of 10th International Conference on

Global Connectivity in Energy, Computer, Communication and Control , vol.2, pp.479-488, 1998.

[19] T-S. Luor, “Influence of load characteristics on the applications of passive and active harmonic filters”, in Proc of Ninth International Conference on Harmonics and Quality of Power, vol. 1, pp.128-133, 2000.

[20] A.K. Kapoor and R. Mahanty, “A quasi passive filter for power quality improvement”, in Proc. of IEEE International Conference on Industrial Technology, vol. 1, pp. 526- 529, 2000.

[21] J. Mindykowski, T. Tarasiuk and P. Rupnik, “Problems of passive filters application in system with varying frequency”, in Proc. of 9th International Conference on Electrical Power Quality and Utilisation, pp.1-4, 2007.

[22] L-C. Lao, X-L. Jiang and Z-W. Shu,“Applications of intelligent tuning technology in passive power filters”, in Proc. of China International Conference on Electricity Distribution, pp.1-9, 2010.

[23] A. Capasso, R. Lamedica and A. Prudenzi, “Estimation of net harmonic currents due to dispersed nonlinear loads within residential areas”, in Proc. of 8th International Conference On Harmonics and Quality of Power Proceedings, vol. 2, pp.700-705, 1998.

[24] B. Singh, V. Verma, A. Chandra and K. Al-Haddad, “Hybrid filters for power quality improvement”, IEE Proc.-Gener. Transm. Distrib., vol. 152, no. 3, pp. 365-378, May 2005.

[25] S. Bhattacharya, P-T. Cheng and D.M. Divan, “Hybrid solutions for improving passive filter performance in high power applications”, IEEE Transactions on Industry Applications, vol. 33, no. 3, pp. 732-747, May/Jun 1997.

[26] Vishal Verma and Bhim Singh,“Design and implementation of a current-controlled parallel hybrid power filter”, IEEE Transactions on Industry Applications, vol.45, no.5, pp.1910-1917, September/October 2009.

[27] B. Singh, V. Verma and V. Garg, “Passive hybrid filter for varying rectifier loads”, in Proc. of International Conference on Power Electronics and Drives Systems, vol. 2, pp. 1306- 1311, 2005

[28] H. Akagi, “Active harmonic filters”, Proceedings of the IEEE, vol.93, no.12, pp. 2128-2140, December 2005.

[29] N. Mohan and G. R Kamath, “Active power filters recent advances”, Journal of Sadhana, vol. 22, part 6, pp.723-732, December 1997.

[30] B. Singh, K. Al. Haddad and A. Chandra, “A review of active filters for power quality improvement,” IEEE Trans. Ind. Electron., vol. 46, pp. 960-971, Oct.1999.

[31] B. Singh, P. Jayaprakash and D.P. Kothari,“Power factor correction and power quality improvement in the distribution system,” Journal of Electrical India, pp.40-48, April, 2008.

[32] B. Singh, P Jayaprakash and D P Kothari, “A three-phase four-wire DSTATCOM for power quality Improvement” Journal of Power Electronics, vol. 8, no. 3, pp. 259-267, July 2008.

[33] B. Singh and V. Verma,“Selective compensation of power-quality problems through active power filter by current decomposition”, IEEE Trans. Power Delivery, vol. 23, no. 2, pp.792-799, April 2008.

[34] B. Singh, V. Verma and J. Solanki,“Neural network-based selective compensation of current quality problems in distribution system”, IEEE Trans. Ind. Electron., vol. 54, no. 1, pp. 53-60, February 2007.

[35] A. M. Massoud, S .J. Finney and B. W. Williams,“Review of harmonic current extraction techniques for an active power filter”, in Proc. of 11th International Conference on Harmonies and Quality of Power, pp.154-159, 2004.

[36] B. Singh, P. Jayaprakash, T. R.Somayajulu and D. P. Kothari, “Reduced rating VSC with a zig-zag transformer for current compensation in a three-phase four-wire distribution system”, IEEE Trans. Power Delivery, vol. 24, no.1, pp. 249-259, January 2009.

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[37] B. Singh, P. Jayaprakash and D. P. Kothari, “Three-phase four-wire DSTATCOM with reduced switches for power quality improvement, Journal of Asian Power Electronics, vol. 2, no. 2, pp.1-6, Nov 2008.

[38] P. Kanjiya, B. Singh, A. Chandra and K. Al Haddad,“SRF theory revisited to control self supported dynamic voltage restorer (DVR) for unbalanced and nonlinear loads”, in Proc. of Industry Applications Society Annual Meeting (IAS) pp.1-8, 2011.

[39] Y. Pal, A. Swarup and B. Singh, “A comparison of three topologies of three-phase four-Wire UPQC for power quality improvement,” in Proc. of 16th National Power Systems Conference, pp. 227-232, 2010.

[40] T.M. Gruzs, “A survey of neutral currents in three-phase computer power systems”, IEEE Trans. Ind. Applicat., vol. 26, no. 4, pp. 719-725, Jul/Aug 1990.

[41] B. Singh, P. Jayaprakash and D. P. Kothari, “Magnetics for neutral current compensation in three-phase four-wire distribution system,” in Proc. of the IEEE PEDES, 2010.

[42] B. Singh, V. Garg and G. Bhuvaneswari,“An input current waveshaping AC-DC converter for rectifier loads”, Journal of Power Electronics, vol. 8, no. 1, pp.1-9, January 2008.

[43] B. Singh, G. Bhuvaneswari, and V. Garg, “T-connected autotransformer-based 24-pulse AC–DC converter for variable frequency induction motor drives”, IEEE Trans Energy Conversion, vol. 21, no. 3, pp. 663-672, September 2006.

[44] S. Singh and B. Singh, “A voltage-controlled PFC Cuk converter-based PMBLDCM Drive for air-conditioners”, IEEE Trans. Ind. Applicat., vol. 48, no. 2, pp.832-838, March/April 2012.

[45] A. Shrivastava and B. Singh,“Boost PFC electronic ballast For 18 W compact fluorescent lamp”, International Journal of Engineering and Information Technology, vol. 2, no. 1, pp. 25-29, 2010.

[46] S-H. Lee, F-S. Kang, S-J. Park, S-E. Cho and M-H. Lee, “Single-stage power-factor-corrected converter for switched reluctance motor drive”, Journal of Electric Power Systems Research, vol. 76, pp. 534–540, 2006.

[47] M.P. Donsion and J.A. Guemes,“AC Arc furnaces voltage and current harmonics distortion. Influence of a SVC Installed,”in Proc. of 7th International Symposium on Electromagnetic Compatibility and Electromagnetic Ecology, pp.22-25, 2007.

[48] M.P. Donsión, J.A. Guemes and F. Oliveira, “Influence of a SVC on AC arc furnaces harmonics, flicker and unbalance measurement and analysis”, in Proc. of 15th IEEE Mediterranean Electrotechnical Conference, pp.1423-1428, 2010.

[49] V.B. Virulkar and M.V. Aware, “Mitigation of flicker at wood saw machine with active and reactive power compensation,”in Proc. of International Conference on Power Systems, pp.1-6, 2009.

[50] A. Alzate, A. Escobar, and J. J. Marulanda,“Application of a DSTATCOM to mitigate arc furnaces power quality problems,” in Proc. of IEEE Trondheim Power Tech, 2011, pp.1-6.

BIOGRAPHIES

Bhim Singh received Bachelor of Engineering (Electrical) degree from University of Roorkee, Roorkee, India, in 1977, and M.Tech. (Power Apparatus and Systems) and Ph.D. degrees from Indian Institute of Technology (IIT), New Delhi, India, in 1979 and 1983, respectively. In 1983, he joined Department of Electrical Engineering, University of Roorkee, as a Lecturer. He became a Reader there in 1988. In December 1990, he

joined Department of Electrical Engineering, IIT Delhi, New Delhi, India, as an Assistant Professor, where he has became an Associate Professor in 1994 and a Professor in 1997.

He has guided 40 Ph.D. dissertations 125 ME/M.Tech theses and 60 BE/B.Tech projects. He has been granted one US patent and filed nine Indian patents. He has executed more than sixty sponsored and consultancy projects. His fields of interest include power electronics, electrical machines, electric drives, power quality, FACTS (Flexible AC Transmission Systems), HVDC (High Voltage Direct Current) transmission systems and renewable energy generation. Prof. Singh is a Fellow of the Indian National Academy of Engineering (INAE), the National Science Academy (NSc), the Institute of Engineering and Technology (IET), the Institution of Engineers (India) (IE(I)), and the Institution of Electronics and Telecommunication Engineers (IETE). He is also a life member of the Indian Society for Technical Education (ISTE), the System Society of India (SSI), and the National Institution of Quality and Reliability (NIQR). He received the Khosla Research Prize of the University of Roorkee in the year 1991. He was the recipient of J.C. Bose and Bimal K. Bose Awards of the Institution of Telecommunication Engineers (IETE) for his contributions in the field of power electronics in the year 2000. He was also a recipient of the Maharashtra State National Award of the Indian Society of Technical Education (ISTE) in recognition of his outstanding research work in the area of Power Quality in the year 2006. He received the PES Delhi Chapter Outstanding Engineer Award for the year 2006. He was the General Chair of the IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES’2006) and (PEDES’2010) held in New Delhi.

G. Bhuvaneswari received the B. Tech. degree in electrical engineering from the College of Engineering Madras, India, in 1977 and the M. Tech. and Ph.D. degrees from the Indian Institute of Technology (IIT), Madras, India, in 1988 and 1992, respectively. She is working as a Professor in the Department of Electrical Engineering, IIT Delhi, New Delhi, India. Her field of interest includes power electronics, electrical machines

and drives, active filters, and power conditioning. Dr. Bhuvaneswari is a Fellow of the Institution of Electronics and Telecommunication Engineers (IETE).

S. R. Arya received his B.E. in Electrical Engineering from Government Engineering College Jabalpur, India, in 2002 and M.Tech. in Electrical Engineering with specialization in Power Electronics and ASIC Design from the Motilal National Institute of Technology, Allahabad, India in 2004. In July 2004, he joined Department of Electrical Engineering, Kalinga Institute of Industrial Technology (Deemed

University) Bhubaneswar as a lecturer. In December 2006, he joined Department of Electrical Engineering, Sardar Vallabhbhai National Institute of Technology, Surat, as an Assistant Professor. He is currently at Department of Electrical Engineering, Indian Institute of Technology, Delhi, India, where he is pursuing towards Ph.D. degree under Quality Improvement Programme. His fields of interest include power electronics, power quality and design of Custom power devices.

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MOHF Forward Buck DC-DC Converter Based SMPS

S. Singh1 B. Singh2 G. Bhuvaneswari3

Abstract–An improved power quality, cross regulated, multiple output high frequency (MOHF) isolated forward buck DC-DC converter based switched mode power supply (SMPS) is designed in the continuous conduction mode (CCM) using an average current control (ACC) for personal computer applications. The proposed SMPS is formed by using a single phase diode bridge which is connected to a MOHF isolated forward buck DC-DC converter. The output of MOHF isolated forward buck DC-DC converter is connected to multi-winding high frequency (HF) transformer. Multiple secondary windings of a HF transformer are used to provide different DC voltages and currents. The closed loop control of proposed MOHF isolated forward buck DC-DC converter based SMPS provides power factor improvement by shaping the input current to sinusoidal and in phase with input voltage. Simulated results of the proposed power supply are presented to validate its design and to demonstrate its improved performance. Keywords–Forward buck DC-DC converter, multiple outputs, ACC, power factor correction.

I. INTRODUCTION In recent years, the use of personal computers (PCs) in most of the fields is increasing massively for high and efficient work productivity. PC power supply is very sensitive and requires good power quality at the input AC mains. The reduction in size, cost and weight the modern computer power supply now calls for high frequency (HF) switching, use of minimum number of components and magnetic elements. Therefore, switched mode power supplies (SMPS) with these meritorious features are used in PCs extensively [1]. SMPS for PCs normally requires AC-DC converter, input filter, multiple output high frequency (MOHF) DC-DC converter, HF transformer for isolation and multiple outputs, output filter and power factor correction (PFC) circuit. A diode bridge is commonly used for AC-DC conversion that draws non-sinusoidal current from the AC supply which is highly undesirable resulting in deterioration of the power quality. Therefore, PFC is used at the front end in the power supplies to satisfy the power quality standards set by various international organizations such as IEC (International Electrotechnical Commission) and IEEE. These standards specify power factor and harmonic limits at the point of utility interface. The power supply for computers normally requires various DC voltages at different current ratings. These multiple voltages are obtained by adding a number of secondary windings to the HF transformer. An ACC (Average Current Control) is used such that the input current is The paper first received 7 Sep 2012 and in revised form 22 Dec 2012. Digital Ref: APEJ-2012-12-406 1

Shikha Singh, Department of Electrical Engineering, IIT, New Delhi, 110016, India, E-mail: [email protected] 2 Bhim Singh,

Department of Electrical Engineering, IIT, New Delhi,

110016, India, E-mail: [email protected] 3 G. Bhuvaneswari,

Department of Electrical Engineering, IIT, New

Delhi, 110016, India, E-mail: [email protected]

shaped to sinusoidal and remains in phase with input voltage to achieve improved power quality and less used to control the multiple DC output voltages of computer power supply which is complex. In weighted harmonic distortion. Normally weighted error approach is error approach, the weigh stages of all DC output voltages and output currents are taken into account for power quality improvement [2]. These drawbacks are overcome by using the cross regulation technique which offers very simple, cost effective control with improved power quality. Only one DC output voltage which is most sensitive to disturbances is sensed and compared with the required constant DC voltage. All the other DC outputs are regulated by the duty cycle of the MOHF isolated forward buck DC-DC converter, determined by the control loop of the sensed output. Only one stage conversion further enhances the reliability and reduces the complexity. In a multi-output forward converter, for improving cross regulation, an objective function is arrived at for each dc output to maintain the error within limits [3]. Single switch DC-DC converters consisting of isolated multiple outputs with cross regulation have been reported in the literature [4]. These converter topologies require HF transformer for isolation consisting of multiple secondary windings and a PFC circuit for achieving unity power factor (UPF) and reducing harmonics at the input. Extensive research has been carried out on single switch converter with MOHF isolated outputs and their improvements are presented in the literature [5-6]. Single switch PFC using a forward converter is widely used in industry for a variety of purposes such as computer power supplies, automotive and telecom applications. A simple isolated single output forward converter and its extension to multioutput are discussed in [7-8]. Further advancement in forward converter is proposed by adding two diodes and a capacitor at the input of the HF transformer to recycle its magnetizing energy for preventing core saturation in [9]. The magnetizing energy is absorbed by the clamping capacitance and the diode when the HF switch is turned off. The analysis and implementation of an active clamp forward converter is presented and the results are compared with the conventional forward converter in [10]. At the output of HF transformer, a synchronous rectifier is used to reduce the conduction losses. A forward converter with independently and precisely regulated multiple outputs is presented in [11-12] where each output has its own control. An improved efficiency for all load conditions with master and slave control is reported in the literature using a forward converter [13]. Xiaodong et al [14] have proposed a double forward multiple output converter with weighted time-sharing control and switch-linear hybrid technique. A control scheme for multi-output forward converter with wide variations in load provides independent and precise voltage regulation irrespective of operation mode which has been discussed in [15]. The winding power loss for a HF forward buck DC-DC converter in CCM is estimated based of Fourier series of

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the winding current waveforms in [16]. A forward converter is proposed in [17] with zero current switching where the transformer core is reset through resonance. Here, the auxiliary circuit consists of an auxiliary switch and a capacitor for obtaining zero current switching of the HF switch and to reset the transformer core. In this paper, a MOHF isolated forward buck DC-DC converter based SMPS is designed with improved power quality within the constraints of IEC and IEEE-519 standards at the utility end [18-19]. It consists of single phase AC supply, a diode bridge, connected to an MOHF isolated forward buck DC-DC converter, controlled using ACC technique. The analysis of MOHF isolated forward buck DC-DC converter is carried out and necessary design equations are derived for estimating the different components values. Only one DC output voltage is sensed, controlled and regulated. All the other DC output voltages are inherently regulated by the MOHF transformer. The analysis and design of the MOHF isolated forward buck DC-DC converter is carried out in CCM (Continuous Current Mode) and the optimum parameters are estimated to attain UPF with reduced harmonic distortion. Simulation results are presented to demonstrate that the proposed SMPS has sinusoidal UPF input current with less harmonic distortion at the utility interface over a wide range of operating conditions.

II. CONFIGURATION, ANALYSIS AND DESIGN OF FORWARD

BUCK DC-DC CONVERTER BASED SMPS

The configuration and detailed design of the MOHF isolated forward buck DC-DC converter based power supply is presented in this section for the power quality improvement at the utility. The closed loop control is used to regulate only one DC output voltage and all other DC output voltages are regulated inherently through HF transformer of MOHF forward buck DC-DC converter based SMPS. The configuration and design equations for the forward buck DC-DC converter based SMPS is described in following subsections.

A. MOHF Power Supply Configuration

Fig. 1 shows a circuit configuration of the power supply consisting of a single phase AC supply, bridge rectifier and MOHF isolated forward buck DC-DC converter. This multi-output configuration offers the benefits of buck topology with a high level of power quality. Vin and Iin are the AC supply input voltage and current respectively drawn by the single phase diode bridge rectifier. The rectified uncontrolled DC voltage Vd is given to MOHF isolated buck forward DC-DC converter. It consists of a magnetizing inductor Lm and HF switch Sw at the input side. A tertiary winding Nr with freewheeling diode D11 is connected for resetting the magnetizing flux. It should reduce to zero before the start of next switching cycle. Multiple output voltages, voltage scaling and isolation are provided by the HF transformer which consists of one primary winding Np and five secondary windings Ns1, Ns2, Ns3, Ns4, Ns5 respectively. The voltage across the primary winding is Vp1 and the secondary windings voltages are Vs1, Vs2, Vs3, Vs4 and Vs5 respectively. At the secondary side, the high frequency diodes, D1, D2, D3, D4, D5, D6, D7, D8, D9 and D10 are connected to rectify the voltage with the output filter inductors L1, L2, L3, L4, L5 respectively.

When HF switch Sw turns ON, the uncontrolled DC output voltage of the diode bridge Vd is applied to the primary winding of the HF transformer. It makes high frequency diodes D2, D4, D6, D8 and D10 to be reversed biased. When the switch SW turns OFF, the primary winding and all the secondary windings currents are suddenly brought down to zero thus high frequency diodes; D2, D4, D6, D8 and D10 provide the freewheeling path for the output currents. Output capacitors Co1, Co2, Co3, C o4 and Co5 are discharged across the loads. A feedback control is incorporated to regulate the DC output voltages by means of PWM (Pulse Width Modulation) control that supplies the gating signal for the HF switch. An ACC is used to control the DC voltages, shaping the AC input current and to achieve UPF. In ACC, two loops are used to regulate the DC output voltages and to improve the power quality. External voltage loop regulates the output DC voltages while internal loop shapes the input AC mains current. One of the most affected DC output voltage (Vo1) is sensed and compared with reference voltage Vre for error voltage generation. This error voltage is given to the voltage controller and output of the voltage controller Ib is multiplied with the unit amplitude sine wave template Vdsampled from the input voltage to obtain reference current Id*. This reference current is compared with the sensed current. The current error is fed to a current controller. The output of the current controller is compared with a HF saw-tooth ramp (Vc) to control the duty cycle of the switch Sw. Thus, the control provides regulated DC output voltages with input current shaping. Only one DC output voltage is controlled by the closed loop control, all the other DC output voltages are controlled by the duty cycle of the forward buck DC-DC converter.

Fig. 1: Circuit configuration of the power supply consisting bridge rectifier and MOHF isolated forward buck DC-DC converter

B. Analysis and Design

An improved power quality MOHF isolated forward buck DC-DC converter is analyzed to obtain the required design equations for estimating the component values. The input output voltages relationship and component values are obtained by considering only one controlled DC output voltage although the same analysis can be extended for the other DC outputs as well. The HF switch and diodes are considered ideal in nature. The output filter capacitor Co is

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considered large enough to keep the output DC voltage constant. The operation of a forward buck DC-DC converter is explained in two stages in every PWM cycle. In stage 1, a switch (Sw) is turned ON over a period and in the next stage it is turned OFF. Stage 1 is called as ON period and the second stage is called as OFF period. I. Stage 1: ON Period

When HF switch Sw is ON, the inductor currents iL1 and iLm increase. The change in inductor current iL1 is,

111 DT/L)/( opsdLION VNNVi (1)

The change in current of the magnetizing inductance Lm is expressed as

mdLmON LDTVi /)( (2)

II. Stage 2: OFF Period HF Switch Sw turns OFF but the currents in inductor L1 and Lm cannot change instantaneously. Diode D11 performs the freewheeling action so that the stored magnetic energy in Lm is feedback to input. When diode D11 is conducting, the voltage across tertiary winding Nr is

dr VV (3)

During OFF period of HF switch Sw, the change in current of inductor L1 is written as

1/)1(11 LTDoVOFFLi (4)

Under steady state condition, the change in the inductor current is zero over one PWM period. Therefore, it is as

0 LIOFFLION ii (5)

Substituting a value of change in the inductor current during ON and OFF periods, (5) is rewritten as

0/)1()/( 1111 LTDVLDTVnV ood (6) DnVV do 1 (7)

The DC output voltage of MOHF isolated forward buck DC-DC converter based SMPS depends on the duty cycle, turns ratio and the diode bridge output voltage. A value of inductance L1 for a given current ripple is estimated from (4) as

111 /)1(

Lio TDVL (8)

The output filter capacitor is designed for maintaining DC voltage constant at any desired load current. The DC output power at an instant (n) is equal to input power and is expressed as

5544332211

)(

oooooooooo

ooo

IVIVIVIVIV

IVnP

(9)

Similarly, the input power Pin(n) from the single phase ac source is expressed as

)2cos1(sinsin)( tIVttIVnP ininininin (10)

For output voltages regulation approach, a common core is used for the multi-winding HF transformer and the input output power balance is maintained. Since individual outputs have different voltage ratios, it can be denoted as,

)/()/(

)/()/()/(

5544

332211

psopso

psopsopsoin

NNINNI

NNINNINNII

(11)

oinininino VtIVIVI /)2cos( (12)

The average value of DC output current Io from (12) is written as,

oininoavg VIVI / (13)

The output filter capacitor for reducing the second order

harmonic and low voltage ripple is designed by using the relationship,

)2/( ooo VIC (14)

where, ΔVo is the ripple in output voltage.

III. DESIGN EXAMPLE USING FORWARD BUCK DC-DC

CONVERTER BASED SMPS

The components of MOHF isolated forward buck DC-DC converter based SMPS is designed through an example. The MOHF isolated forward buck DC-DC converter based SMPS using following specifications to exemplify the design procedure: Supply rms voltage of 220 V at 50Hz is given to a diode bridge. The average output voltage Vd of the diode bridge is 198V. The output voltages of MOHF forward buck DC-DC converter are Vo1=12V, Vo2=5V, Vo3=3.3V, Vo4=-12V and Vo5=-5V and the switching frequency is 50 kHz. The ripple in output voltage is considered 3% and current ripples are also considered 2%. The nominal duty ratio of the switch D=0.4. The values of inductors are calculated from (8). These are L1=0.45mH, L2=0.125mH, L3=0.0825mH, L4=9mH and L5=10mH. The output capacitor values from (14) are Co1=70 mF, Co2=254 mF, Co3=386 mF, Co4=3.5 mF and Co5=3.18 mF. These designed component values are considered in the modeling of the MOHF isolated forward converter based power supply for power quality improvement.

IV. AVERAGE CURRENT CONTROL (ACC) OF PROPOSED

SMPS

ACC is used to regulate the multiple output dc voltages against the load disturbances. It consists of a voltage controller, reference current generator and a PWM generator. In this technique, voltage error Ve, i.e. the difference between the reference voltage Vre and the sensed DC output voltage Vo1, is fed to a PI voltage controller. The outer voltage loop provides the proper current reference signal by multiplying a scaled replica of rectified voltage by the output of voltage controller. This is further multiplied with an uncontrolled DC voltage unit template to generate the reference current. The error between reference current and input sensed current is fed to another PI controller to shape the input current. The output of current controller (Vc) is compared with a HF saw-tooth ramp to control the duty cycle of the HF switch Sw. A) Voltage Controller The output of PI voltage controller is written as,

)()1()()1()( nVKnVnVKnInI eibeepbbb (15)

where Kpb and Kib are the gains of the voltage controller and Ve(n)= Vre(n)-Vo1(n) at nth instant.

B) Reference Current Generator It generates the reference current (I*d) by multiplying the output of PI voltage controller and unit template input voltage which is compared with the sensed current (Id) to generate the current error Δie=(I*d-Id). This current error is fed to a current controller. The output of current controller Vc at nth instant of time is,

)()1()()1()( niKniniKnVnV eiieepicc (16)

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C) PWM Pulse Generator The output of PI current controller is compared with HF saw-tooth ramp to get the PWM gating signals for the switch. When the saw-tooth ramp is less than the output of the current controller, the HF switch remains ON, otherwise it remains OFF. The gain parameters of the voltage controller and reference current generator are to be selected properly to ensure the constant dc voltages during dynamic conditions. The Ziegler Nichols method [20] is used for the tuning of gain parameters. A mathematical formula for tuning of gains is given where proportional and integral gains are described. Kpb=0.45Ku (17) KIb=1.2Kpb/Pu (18)

where, Ku is the ultimate gain at which the output of the control loop starts to oscillate and Pu is the oscillation period. Kpb and KIb are calculated as 0.06 and 0.24 and Kpi and Kii are 0.005 and 0.6 for the voltage loop control and reference current generator. These values are further tuned to improve the performance of the system (Kpb =0.08, Kib 0.21, Kpi=0.008, Kii=0.56).

V. SIMULATION OF MOHF ISOLATED FORWARD BUCK

CONVERTER BASED SMPS

To validate the design of the proposed power supply based on MOHF isolated forward DC-DC converter, its model is developed in MATLAB/simulink environment and extensive simulations are made to demonstrate the improved performance. Fig. 2 shows the developed MATLAB model of the single-phase MOHF isolated forward buck DC-DC converter based SMPS configuration. The single phase forward buck DC-DC converter is operated in CCM in such a way to obtain nearly UPF and low harmonic content of the input current. Table I shows the design specifications of proposed MOHF isolated forward buck DC-DC converter based SMPS. The performance of the proposed SMPS is studied at full load and light load conditions.

TABLE I MOHF ISOLATED FORWARD BUCK DC-DC CONVERTER BASED

SMPS SPECIFICATIONS Specification Values Supply rms voltage 220 V, 50 Hz

Output Voltages/ Output Currents

12V/16A 5V/24A 3.3V/24A -12V/0.8A -5V/0.3A

Switching frequency 50kHz

VI. RESULTS AND DISCUSSION

In this section, simulation results of the proposed MOHF isolated forward converter based SMPS are presented and discussed in detail. The simulated waveforms of the MOHF isolated forward buck DC-DC converter based

SMPS are shown in Figs. 3-6. Fig. 3 shows the input voltage/current, DC output voltages Vo1, Vo2,

-300

0300

v in(V

)

-404

i in(A

)

0

12

Vo1

(V)

05

Vo2

(V)

0

3.3

Vo3

(V)

-120

Vo4

(V)

-50

Vo5

(V)

0

16

I o1(A

)

0

24

I o3(A

) 0

24

I o2(A

)

0.10 0.12 0.14 0.16 0.18 0.200

0.3

I o5(A

)

Time (sec)

0

0.8

I d4(A

)

Fig. 3: Input voltage/current and output voltages/currents of forward buck DC-DC converter based SMPS

Fig. 2: MATLAB model of the single-phase MOHF buck forward dc-dc converter based SMPS

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0.10 0.12 0.14 0.16

-2

0

2

Time (s)

I in(A

)

0 5 10 15 20 25 30 35 400

20

40

60

80

100

Harmonic order

Fundamental (50Hz) = 2.871A , THD= 2.72%

Mag

(%

of F

unda

men

tal)

Fig. 4: Harmonic spectrum of input current of forward buck DC-DC converter based SMPS at full load Vo3, Vo4 and Vo5 and DC output current waveform Io1, Io2, Io3, Io4 and Io5 of the MOHF isolated forward buck DC-DC converter based 403 W SMPS at full load. All the DC output voltages are constant due to closed loop control. The input current waveform is sinusoidal and in phase with the input voltage which results in nearly UPF. Fig. 4 shows the waveform and harmonic spectrum of the input AC mains current at full load. The harmonic distortion of the input current at full load is 2.72% which is very low. To study and demonstrate the dynamic behavior of the MOHF isolated forward converter based SMPS, the load on the SMPS is varied (on +12V) and its effect on various power quality indices are depicted in Table II. Fig. 5 shows the response of proposed SMPS at varying load in the highest current rated winding. The load current corresponding to +12V suddenly decreases from 16A to 8A (50%) at 0.17 S. All the other load currents remain constant. A +12V DC output voltage takes about 0.08s to settle down to its nominal value. The input current remains sinusoidal but the harmonic distortion is increased. The power factor at light load is 0.9989 which is very close to unity. The harmonic spectrum of input current at light load is shown in Fig. 6. At light load, the harmonic distortion of input current in 4.66% which is well within the IEEE standard limit. Table II shows a comparison in terms of harmonics distortion, power factor, displacement power factor (DPF) and output voltage ripple of the SMPS. The ripples of DC output voltages have reduced, for the same allowable DC output voltage ripple. It can be observed clearly from Table II that it results in nearly UPF at full and light load.

TABLE II FORWARD CONVERTER SIMULATED PARAMETERS

Output voltage

Harmonic distortion

DPF DF PF Ripple (Vo%)

100% 50% 100% 50% 100% 50% 100% 50% 100% 50%Vo1

2.72 4.66

1

1

0.9996

0.9989

0.9996

0.9989

1.9 1.8

Vo2 1.9 1.8

Vo3 1.8 1.8

Vo4 1.8 1.8

Vo5 1.7 1.7

-300

0300

v in(V

)

-404

i in(A

)

0

12.2

Vo1

(V)

05

Vo2

(V)

0

3.3

Vo3

(V)

-120

Vo4

(V)

-50

Vo5

(V)

0

16

I o1(A

)

0

24

I o2(A

)

0

24

I o3(A

)

0

0.8

I d4(A

)

0.10 0.15 0.20 0.25 0.30 0.35 0.400

0.3 I o5

(A)

Time(sec)

Fig.5: Input voltage/current and output voltages/currents of forward buck DC-DC converter based SMPS at step change in load (+12V)

0.10 0.12 0.14 0.16-2

-1

0

1

2

Time (s)

I in(A

)

0 5 10 15 20 25 30 35 400

20

40

60

80

100

Harmonic order

Fundamental (50Hz) = 2.02 A, THD= 4.66%

Mag

(%

of F

unda

men

tal)

Fig. 6: Harmonic spectrum of the input current of forward buck DC-DC converter based SMPS at 50% load in +12V DC output

VII. CONCLUSION

An improved power quality MOHF isolated forward buck DC-DC converter based SMPS has been designed. The design of proposed power supply has been validated for improved power quality at the utility interface in terms of reduced harmonic distortion of input current and high power factor. Average current control has been applied to the MOHF isolated forward buck DC-DC converter to provide good DC output voltage regulation with input current shaping. Only single DC output is controlled and all the other DC outputs are regulated by the same duty cycle. The harmonic distortion of the power supply is found within the limits set by standards for full load as well as for varying load conditions with nearly unity power factor operation. The observed performance of MOHF forward buck DC-DC converter has been found to be a promising candidate for power supplies for PCs.

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BIOGRAPHIES

Shikha Singh received B. Tech. degree in electronics & communication engineering from Uttar Pradesh Technical University, Lucknow, in 2008. She has joined as JRF in Department of Electrical Engg., IIT Delhi, New Delhi in 2008. She is currently working for PhD Degree at the Department of Electrical Engineering, IIT-Delhi, India. Her area of interest includes power electronics & SMPS.

G. Bhuvaneswari received B. Tech. degree in electrical engineering from the College of Engineering Madras, India, in 1977 and the M. Tech. and Ph.D. degrees from the Indian Institute of Technology (IIT), Madras, India, in 1988 and 1992, respectively. She is working as a Professor in the Department of Electrical Engineering, IIT Delhi, New Delhi, India. Her field of interest includes power electronics, electrical machines and

drives, active filters, and power conditioning. Dr. Bhuvaneswari is a Fellow of the Institution of Electronics and Telecommunication Engineers (IETE).

Bhim Singh was born in Rahamapur, Uttar Pradesh, India, in 1956. He received B.E. (Electrical) degree from the University of Roorkee, Roorkee, India, in 1977, and the M.Tech. and Ph.D. degrees from the Indian Institute of Technology (IIT), New Delhi, in 1979 and 1983, respectively. In 1983, he joined as a Lecturer and in 1988 became a Reader in the Department of Electrical Engineering,

University of Roorkee. In December 1990, he joined as an Assistant Professor, became an Associate Professor in 1994, and Professor at the Department of Electrical Engineering, IIT, Delhi, in 1997. His current research interests include power electronics, electrical machines and drives, active filters, flexible ac transmission system (FACTS), high-voltage dc (HVDC), and power quality. Prof. Singh was the recipient of the Khosla Research Prize of the University of Roorkee in 1991. He is a recipient of the J.C. Bose and Bimal K. Bose Awards of The Institution of Electronics and Telecommunication Engineers (IETE) for his contributions in the field of power electronics. He is also a recipient of the Maharashtra State National Award of the Indian Society for Technical Education (ISTE) in recognition of his outstanding research work in the area of power quality. He was the recipient of the IEEE Power and Energy Society Delhi Chapter Outstanding Engineer Award for the year 2006. He was the General Chair of the IEEE International Conference on Power Electronics, Drives and Energy Systems (PEDES’2006) held in New Delhi. He is a Fellow of the Indian National Academy of Engineering, The National Academy of Science, India, The Institution of Engineers (India), Institute of Electrical and Electronics Engineering and IETE, and a Life Member of the ISTE, Systems Society of India, and National Institution for Quality and Reliability.

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A New Simple Single Phase AC-AC Switching Voltage Regulator Cum Power Conditioner

S. Sonar 1 T. Maity 2

Abstract–A new very simple single phase ac-ac voltage regulator based on LC network is proposed here that compensates wide range supply voltage variations. This has the capability of both buck and boost the input source voltage level without any change of phase angle. The number of components used in the converter circuit is minimum and smooth output waveform can be achieved without any additional filter. The proposed system employs two bi-directional switches having high frequency pulse width modulation (PWM) and one LC network along with a simple closed loop control. The source voltage level can be sensed and divided by the desired output value to find the instantaneous value of gain, which mathematically calculates the possible duty ratio of PWM switching signal based on the open loop characteristics of the converter. High speed IGBTs are used as bi-directional switch of the ac-ac converter and the circuit ultimately can easily and steadily maintain regulated voltage supply across the load terminals. The whole system operating principle and analysis are presented in this paper. Simulation and experimental results confirm the quality steady output both in dynamic and steady state conditions. Keywords–LC network, pulse width modulation, ac regulator, power conditioner.

I. INTRODUCTION Different types of power quality problems exist in our power system like transients, voltage sags/ surges, harmonics etc. Among these problems, short term voltage fluctuations i.e. voltage surge and voltage sags constitute the major disturbances and have the largest negative impact on industrial productivity as well as in rural electrification. There are also many sensitive load devices today which can not withstand this voltage fluctuation and cause frequent failures. Most voltage variations are due to different power circuit faults, line losses or major changes of load current. Many devices have been developed to perform the role of regulating, conditioning, purifying incoming power with adequate power quality standard. Ac to ac power conversion is the most popular way to generate quality ac power after the introduction of power electronics. There are two major areas where ac–ac power conversion is necessary. One is the popular v-f ac drive where output voltage and output frequency both are required to be variable. The most popular topologies for that application are indirect ac–ac converters with a dc link [1]–[3], matrix converters [4],[5]. However, in another case only voltage variation or regulation is needed with no change in frequency, the direct PWM ac–ac converters are used which perform as ac choppers or power line conditioners. The paper first received 23 Sep 2012 and in revised form 18 Dec 2012. Digital Ref: APEJ-2012-12-407 1

Department of Electrical Engineering, Indian School of Mines, Dhanbad 826004, India. E-mail: [email protected] 2 Department of Electrical Engineering, Indian School of Mines, Dhanbad 826004, India. E-mail: [email protected]

They have some advantages like the provision of better power factor, efficiency, low harmonic current in line, ease of control and smaller size and lower cost. Moreover it is a single-stage conversion with simple topology. The traditional direct PWM ac–ac converters are implemented by bi-directional ac thyristor power controllers or triac, which use phase angle or integral cycle control of the ac supply to obtain the desired output voltage. But, they have some disadvantages, such as high total harmonic distortion (THD) in the source current, low power factor, and poor power transfer efficiency. Moreover, they don’t have any facility of boosting the input voltage without using transformer in the circuit. Recently, Z-source converters applied to ac–ac conversion have been proposed in [6],[7]. In [6], the concept of z-source ac to ac converter is proposed where two switches (either bi-directional or single-directional with dc rectifier) are turned on and off alternately. The Z-network consists of two inductors and two capacitors. The circuit proposed is only meant for open loop and no control circuit is proposed to generate PWM signals with variable duty ratio. Also, the topology requires filters at the load terminal to get the smooth ac output. The possibilities of different topologies for ac-ac conversion are reviewed in [8] without detailed discussions. In this paper, the single phase voltage-fed LC network power converter is presented with a different kind of switch topology. The proposed LC network consists of single capacitor and single inductor which works as energy storage as well as filtering element in turns reduces the complexity of the system. It does not require any additional components for filtering the output. The converter is fitted with a feed-forward control which will run the converter as an ac regulator under wide range input variation condition. High frequency switching of two set of bi-directional switches through proper control of duty ratio, can provide variable boost factor and hence the required stable single phase ac voltage.

II. PROPOSED CIRCUIT MODEL The overall proposed closed loop system based on single-phase LC network ac-ac converter is shown as block diagram in Fig.1. The main ac to ac converter block consists of the ac single phase source, an LC-network and two bi-directional switches. The load may be resistive or inductive. The LC-network, a combination of one inductor and one capacitor as shown in Fig. 1(a), is the main elements here which store or release energy accordingly to drive the circuit as a perfect regulator. Each of the bidirectional switches S1 and S2 used, is having configuration as shown in Fig. 1(b). Here, a bi-directional switch is realized as a set of two IGBTs connected in common emitter mode back to back with two

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diodes. The diodes are included to provide the reverse blocking capability. Switches S1, S2 are able to block voltage and to conduct current in both directions. The S1 and S2 are provided PWM high frequency switching pulses, complement to each other. The selection of higher value of switching frequency for PWM signal is expected to keep the value of inductor and capacitor of LC network low.

(a) (b)

Fig.1: (a)Block diagram of the proposed closed loop system.

(b) Bidirectional switch configuration When the switch S1 is on, the inductor L stores electromagnetic energy from the ac source. Also, at the same time switch S2 is off and the capacitor C discharges through the load. This phase is shown as an equivalent circuit in Fig. 2(a). Again, when the switch S1 is off and S2 is on, then the stored energy of the inductor supplies current to charge the capacitor C as well as provide load current through switch S2. The equivalent circuit for this stage is shown in Fig.2 (b). (a) (b)

Fig 2: Equivalent circuit (a) when switch S1 is on and S2 is off (b) when switch S1 is off and S2 is on

Given that the switch S1 is in the conduction state for an interval of onT and in non-conduction state for an interval

of offT during a switching cycle T. From the equivalent

circuit of Fig. 2(a) one has during onT

sL Vv (1)

where sV =source voltage. Lv =voltage across the inductor

L. Now considering the interval offT , from the equivalent

circuit Fig. 2(b) one has

oL Vv (2)

where oV = voltage output across load.

The average voltage of the inductor over one switching period (T) should be zero in the steady state, from (1) and (2) thus we have

0

T

TVTVvV

offoonsL

So,

GD

D

T

T

V

V

off

on

s

o

1

(3)

where D=duty ratio of the PWM signal applied to the switch S1 and G=open loop gain of the proposed converter. Voltage gain derived in (3) shows the buck-boost property of the ac-ac converter. The open loop characteristic of the converter is plotted in Fig. 3.

Fig. 3: Gain vs duty ratio graph of buck-boost converter. Now based on this characteristics, a closed loop system is developed that can work as a perfect voltage regulator under variable source voltage condition. The control circuit proposed to work in feed-forward mode, senses the source voltage continuously through a voltage sensor. The desired output voltage rms value is the reference value here, which is divided by the source voltage to calculate mathematically the instantaneous value of gain, which calculates the possible duty ratio of PWM switching signal based on the open loop characteristics of the converter. For the generation of PWM signal, a triangular signal of desired switching frequency and dc control signal dcv are

compared in a comparator. The dcv is generated in the

process as explained below and shown in Fig. 4. From the property of similarity between the two triangles, the following can be obtained from the Fig. 4

ondc TvhTh /)(/ (4)

ondc TThvh )/( (5)

As the peak value of the triangular signal selected is unity, )/(1 TTv ondc (6)

Dvdc 1 (7)

With the help of simple mathematical blocks the value of control signal dcv is calculated which is then sent to

comparator to generate the corresponding PWM output. The PWM output is fed to bi-directional switch S1 directly and the complement of the signal to switch S2.

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Fig. 4: Pulse width modulated signal generation

III. RESULTS AND ANALYSIS

The single phase ac-ac voltage regulator has the capability to buck/boost the source voltage, and this can be used to overcome steady state or transient voltage fluctuation even voltage sag or voltage rise in power system. Simulation is carried out in MATLAB-SIMULINK environment for the proposed control system. The L-C network is selected after various observations on open loop characteristics and chosen for this simulation as C= 10 F, L= 0.5mH. An R-

L type load is selected with R=1k Ohm, L=500mH, for the first range of simulation. The frequency of the PWM switching signal is chosen as 10 kHz. First, a set of discrete input voltage is selected over a wide range of 160 volt to 350 volt. The system automatically selects the value of gain and accordingly calculates the value of control voltage dcv . This control voltage

modulates the width of pulses applied to two switches S1 and S2. The set of current and voltage are measured from different runs under different range of input voltages with a fixed load connected. The results are tabulated in Table 1. In the results, it is observed that the variation of output voltage is less than 6 volt only which supports voltage regulation within 2%.

Table 1: The Performance of the voltage regulator under

variable input

Vin (rms in volts)

Iin (rms in amps)

Vout (rms in volts)

Iout (rms in amps)

Gain (G)

Duty Ratio (D)

160 6.97 234.64 1.17 1.467 0.59 180 6.55 232.37 1.16 1.291 0.56 200 5.86 230.97 1.15 1.155 0.53 220 5.27 230.19 1.15 1.046 0.51 230 5.08 230.04 1.15 1.000 0.50 260 4.73 229.19 1.15 0.882 0.47 290 4.39 228.85 1.14 0.789 0.44 320 3.90 228.71 1.14 0.715 0.42 350 3.90 228.71 1.14 0.654 0.395

Another set of simulation is done under variable load (R-L) conditions with a constant input voltage and Table 2 represents the results of performance for the regulator. For a wide range of variation of load, it is observed output voltage variation again within 2%.

Table 2: Regulator under variable load condition

For the proposed system, dynamic stability is studied where input source voltage is suddenly varied and its performance is recorded. First, voltage sag is created from 230 volt rms to 160 volt rms and is applied momentarily to

Vin (rms volts)

R ( Ohm)

L ( mH)

Vout

(rms volts)

Iout (rms amp)

Iin

(rms amp)

Gain

230

200 1000 224.24 0.56 7.26 0.98 300 500 223.82 0.66 7.40 0.97 200 500 221.00 0.86 7.07 0.96 300 1000 223.42 0.51 7.33 0.97 400 1000 224.40 0.44 7.48 0.98 400 500 225.00 0.52 7.59 0.98 500 500 225.83 0.43 7.67 0.98 500 1000 225.17 0.38 7.57 0.98

1000 1000 228.22 0.22 7.89 0.99 2000 1000 230.68 0.11 8.23 1.01

h = 1 h -

T

Fig.5: Waveforms during input voltage sag condition (a) Source voltage (b) Source current (c) Output voltage (d) Output current

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the system at running condition. In a second stage, a voltage surge is applied suddenly from 230 volt rms to 350 volt rms. In both the cases the output voltage waveforms are recorded and it shows a steady value except some small transients during change over instants in both the cases.

(a)

(b) Fig.7: Experimental waveforms for source voltage and load output voltage for (a) Boost condition (b) Buck condition The two set of results separately shown in fig. 5 and 6 also

contain the input and output current waveforms. The output currents in both the cases contain a little high frequency harmonics, the total harmonic distortion (THD) of which is measured around 0.1%. The buck-boost capability of the above-mentioned circuit

is also observed in hardware, developed in the laboratory. Experimental results presented in Fig. 7(a) and 7(b) show source voltage and output voltage waveforms during both boost and buck conditions respectively. The waveforms are captured in 1:10 scaled down conditions.

IV. CONCLUSION A new ac single-phase voltage regulator based on a simple LC network and employing a simple closed-loop feed-forward control is presented. The proposed single-phase ac-ac converter can keep the output voltage steady by operating both in buck and boost modes. It has the capability to overcome sudden voltage sag or voltage surge in the power line. The results show that this ac-ac converter performs well during the voltage fluctuation and therefore can be used as power conditioner. Operating principle, steady-state and transient analysis of the system was presented. To verify the proposed system, the simulations were implemented to compensate voltage variation about 200 volt in steady state as well as voltage sag and surge in transient condition. Experimental results have been shown to verify the buck and boost capabilities of the proposed regulator. The regulator has some other major advantages like same phase of source and output voltages, no need of additional filtering across the load and of course the low harmonics in the source current. The inherent quick response of the system will allow rural power users, with critical loads, to better withstand the variable voltage conditions and can provide more reliable and quality power. Some instantaneous overshoot are observed in the results of dynamic characteristics and suitable modification in the control system using PID controller is required to reduce it. The system also can be

Fig.6:Waveforms during input voltage surge condition (a) Source voltage (b) Source current (c) Output voltage (d) Output current

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extended for a three phase ac-ac converter as well as with non-linear load in future.

REFERENCES

[1] W. L. Congwei, B. Wu, N.R.,Zargari., Xu, Dewei and J. Wang, “A novel three phase three-leg AC/AC converter using nine IGBTs”, IEEE Trans. Power Electronics, vol. 24, no. 5, pp. 1151–1160, 2009.

[2] T. Wijekoon, C. Klumpner, P. Zanchetta, and P.W. Wheeler, “Implementation of a hybrid ac–ac direct power converter with unity voltage transfer ratio”, IEEE Trans. Power Electronics, vol. 23, no. 4, pp. 1918–1926, 2008.

[3] W. Fei, R. Burgos, P. Yunqing., D. Boroyevich., W. Bingsen., T.A., Lipo., V. D. Immanuel, and K.J. Karimi, “A systematic topology evaluation methodology for high-density three-phase PWM ac–ac converters”, IEEE Trans. Power Electronics, vol. 23, no.6, pp. 2665–80, 2008.

[4] R. Vargas, U. Ammann and J. Rodriguez, “Predictive approach to increase efficiency and reduce switching losses onmatrix converters”, IEEE Trans. Power Electronics, vol. 24, no. 4, pp. 894–902, 2009.

[5] P. C. Loh, R. Rong, F. Blaabjerg and P. Wang, “Digital carrier modulation and sampling issues of matrix converters”, IEEE Trans. Power Electronics, vol. 24, no. 7, pp. 1690–1700, 2009.

[6] X. P. Fang, Z. M. Qian, F. Z. Peng, “Single-phase Z-source PWM ac–ac converters”, IEEE Power Electronics Letter, vol. 3, no. 4, pp. 121–124, 2005.

[7] Y. Tang ,C. Zhang and S. Xie, “Z-source ac–ac converters solving commutation problem”, IEEE Trans. Power Electronics, vol. 22, no. 6, pp. 2146–2154, 2007.

[8] Z. Fedyczak, R. Strzelecki, and G. Benysek, “Single-phase PWM AC/AC Semiconductor Transformer Topologies and Applications”, Proceedings -IEEE 33rd Annual Power Electronics Specialists Conference, Cairns, Qld., Australia, vol.2, pp.1048-1053, 2002.

BIOGRAPHIES

Santosh Sonar, born in 1979, received the Graduation and Master Degree in Electrical Engineering from National Institute of Technology Durgapur, India in 2004 and 2009 respectively. From 2004 to 2005, he was a Site Engineer with Test Metal Engineering Pvt Ltd, India. He has more than three years of academic experience. Currently pursuing PhD from Indian School of Mines Dhanbad, India.

Tanmoy Maity, born in 1969, received Graduation and Master Degree in Electrical Engineering from Calcutta University and Ph.D from Bengal Engineering & Science University, Sibpore. He has six years industrial and more than thirteen years academic experience. He is currently working as faculty in Indian School of Mines, Dhanbad, India.

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Author Index

A Page Arya, S.R.

19

B

Bhowmik, A. R. Bhuvaneswari, G.. Borage, M.

1 19 28 1

C

Chakraborty, A. K.

7

D

Das, P. N.

7

G

Gnanambal, I. 13

M

Maheswari, A. Maity, T.

13 34

S

Singh, B. Singh, S. Sonar, S.

19 28 28 34

T

Tiwari, S.

1

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