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Arithmetic & Arithmetic & Logic Unit Logic Unit

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Arithmetic & Logic Unit. Arithmetic & Logic Unit. Arithmetic & logic unit hardware implementation Booth’s Algorithm Restoring division & non restoring division algorithm IEEE floating point number representation & operations. Arithmetic & Logic Unit. Does the calculations - PowerPoint PPT Presentation

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Page 1: Arithmetic & Logic Unit

Arithmetic & Logic Arithmetic & Logic UnitUnit

Page 2: Arithmetic & Logic Unit

Arithmetic & Logic UnitArithmetic & Logic Unit

Arithmetic & logic unit hardware Arithmetic & logic unit hardware implementationimplementation

Booth’s AlgorithmBooth’s AlgorithmRestoring division & non Restoring division & non

restoring division algorithmrestoring division algorithm IEEE floating point number IEEE floating point number

representation & operationsrepresentation & operations

Page 3: Arithmetic & Logic Unit

Arithmetic & Logic Unit

• Does the calculations• Everything else in the computer is there to

service this unit• Handles integers• May handle floating point (real) numbers• May be separate FPU (maths co-processor)• May be on chip separate FPU (486DX +)

Page 4: Arithmetic & Logic Unit

ALU Inputs and Outputs

Page 5: Arithmetic & Logic Unit

Integer Representation

• Only have 0 & 1 to represent everything• Positive numbers stored in binary

—e.g. 41=00101001

• No minus sign• No period• Sign-Magnitude• Two’s compliment

Page 6: Arithmetic & Logic Unit

Sign-Magnitude Representation

• Left most bit is sign bit• 0 means positive• 1 means negative• +18 = 00010010• -18 = 10010010• Problems

—Need to consider both sign and magnitude in arithmetic

—Two representations of zero (+0 and -0)

Page 7: Arithmetic & Logic Unit

Two’s Compliment Representation

• Two's compliment representation uses the MSB as a sign bit.

• Range: -2n-1 through 2n-1 -1

• Twos compliment A= -2n-1an-1 + Σ 2iai

• In case of positive integers, an-1 =0.

Page 8: Arithmetic & Logic Unit

Two’s Compliment

• +3 = 00000011• +2 = 00000010• +1 = 00000001• +0 = 00000000• -1 = 11111111• -2 = 11111110• -3 = 11111101

Page 9: Arithmetic & Logic Unit

Benefits

• One representation of zero• Arithmetic works easily (see later)• Negating is fairly easy

—3 = 00000011—Boolean complement gives 11111100—Add 1 to LSB 11111101

Page 10: Arithmetic & Logic Unit

Geometric Depiction of Twos Complement Integers

Page 11: Arithmetic & Logic Unit

Negation Special Case 1

• 0 = 00000000• Bitwise not 11111111• Add 1 to LSB +1• Result 1 00000000• Overflow is ignored, so:• - 0 = 0

Page 12: Arithmetic & Logic Unit

Negation Special Case 2

• -128 = 10000000• bitwise not 01111111• Add 1 to LSB +1• Result 10000000• So:• Monitor MSB (sign bit)• It should change during negation

Page 13: Arithmetic & Logic Unit

Range of Numbers

• 8 bit 2s compliment—+127 = 01111111 = 27 -1— -128 = 10000000 = -27

• 16 bit 2s compliment—+32767 = 011111111 11111111 = 215 - 1— -32768 = 100000000 00000000 = -215

Page 14: Arithmetic & Logic Unit

Conversion Between Lengths

• Positive number pack with leading zeros• +18 = 00010010• +18 = 00000000 00010010• Negative numbers pack with leading ones• -18 = 10010010• -18 = 11111111 10010010• i.e. pack with MSB (sign bit)

Page 15: Arithmetic & Logic Unit

Integer Arithmetic

Page 16: Arithmetic & Logic Unit

Addition and Subtraction

• Normal binary addition• Monitor sign bit for overflow

• Take twos compliment of subtrahend and add to minuend—i.e. a - b = a + (-b)

• So we only need addition and complement circuits

Page 17: Arithmetic & Logic Unit

Hardware for Addition and Subtraction

Page 18: Arithmetic & Logic Unit

Multiplication

• Complex• Work out partial product for each digit• Take care with place value (column)• Add partial products

Page 19: Arithmetic & Logic Unit

Multiplication Example

• 1011 Multiplicand (11 dec)• x 1101 Multiplier (13 dec)• 1011 Partial products• 0000 Note: if multiplier bit is 1 copy

• 1011 multiplicand (place value)• 1011 otherwise zero• 10001111 Product (143 dec)• Note: need double length result

Page 20: Arithmetic & Logic Unit

Unsigned Binary Multiplication

Page 21: Arithmetic & Logic Unit

Execution of Example(11*13) (product in A,Q)

Page 22: Arithmetic & Logic Unit

Flowchart for Unsigned Binary Multiplication

Page 23: Arithmetic & Logic Unit

Multiplying Negative Numbers

• This does not work!• Solution 1

—Convert to positive if required—Multiply as above—If signs were different, negate answer

• Solution 2—Booth’s algorithm

Page 24: Arithmetic & Logic Unit

Booth’s Algorithm

Page 25: Arithmetic & Logic Unit

Example of Booth’s Algorithm (7*3)

Page 26: Arithmetic & Logic Unit

Division

• More complex than multiplication• Negative numbers are really bad!• Based on long division

Page 27: Arithmetic & Logic Unit

001111

Division of Unsigned Binary Integers

1011

00001101

100100111011001110

1011

1011100

Quotient

Dividend

Remainder

PartialRemainders

Divisor

Page 28: Arithmetic & Logic Unit

Flowchart for Unsigned Binary Division

Page 29: Arithmetic & Logic Unit

Floating-Point Representation

Page 30: Arithmetic & Logic Unit

Real Numbers

• Numbers with fractions• Could be done in pure binary

—1001.1010 = 23 + 20 +2-1 + 2-3 =9.625

• Where is the binary point?• Fixed?

—Very limited

• Moving?—How do you show where it is?

Page 31: Arithmetic & Logic Unit

Floating Point

• +/- Significand x 2Exponent

• Point is actually fixed between sign bit and body of mantissa

• Exponent indicates place value (point position)• Known as ‘biased representation’.• A fixed value called ‘bias’, is subtracted from the

field to get true exponent value.

Page 32: Arithmetic & Logic Unit

Floating Point Examples

Page 33: Arithmetic & Logic Unit

Signs for Floating Point

• Mantissa/Significand is stored in 2s compliment

• Exponent is in excess or biased notation—e.g. Excess (bias) 128 means—8 bit exponent field—Pure value range 0-255—Subtract 128 to get correct value—Range -128 to +127

Page 34: Arithmetic & Logic Unit

Normalization

• FP numbers are usually normalized• i.e. exponent is adjusted so that leading

bit (MSB) of mantissa is 1• Since it is always 1 there is no need to

store it• ( Scientific notation where numbers are

normalized to give a single digit before the decimal point e.g. 3.123 x 103)

Page 35: Arithmetic & Logic Unit

IEEE Standard For Binary Floating-point

Representation

Page 36: Arithmetic & Logic Unit

IEEE 754

• Standard for floating point storage• 32 and 64 bit double format,• 8 and 11 bit exponent respectively• Extended formats (both mantissa and

exponent) for intermediate results

Page 37: Arithmetic & Logic Unit

IEEE 754 Formats

Page 38: Arithmetic & Logic Unit

Special classes of numbers

• For single format 1 through 254

double format 1 through 2046

normalized nonzero floating-point numbers are

represented.

Exponent is biased.

For single format : -126 through +127

double format: -1022 through +1023.

A normalized number requires a 1-bit to the left of the binary point, this bit is implied giving 24-bit or 53-bit significand/fraction.

Exponent values

Page 39: Arithmetic & Logic Unit

Special classes of numbers

• Exponent: All zero

Fraction : All zero

• Exponent: All one

Fraction : All zero

Represents +ve or –ve zero depending on sign bit

Represents +ve or –ve infinity depending on sign bit

Page 40: Arithmetic & Logic Unit

Special classes of numbers

• Exponent: All zero

Fraction : Nonzero

• Exponent: All one

Fraction : Nonzero

Represents denormalized number depending on sign bit

Represents NaN, Not a Number & is used to signal various exception conditions.

Page 41: Arithmetic & Logic Unit

Floating-Point Arithmetic

Page 42: Arithmetic & Logic Unit

Floating-point numbers & Arithmetic Operations

Floating-Point numbers

Arithmetic Operations

X= Xs * BXE

Y= Ys * BYE

X+Y= (Xs * BXE-YE + Ys)*BYE

X-Y= (Xs * BXE-YE - Ys)*BYE

X*Y= (Xs *Ys)* BXE+YE

X/Y= (Xs/Ys) * BXE-YE

XE<=YE

X=0.3*102=30 Y=0.2*103=200

X+Y=(0.3*102-3 +0.2) *103 =230X-Y=(0.3*102-3 -0.2) *103 =-170X*Y=(0.3*0.2) *102+3 =6000X/Y=(0.3/0.2) *102-3 =0.15

Page 43: Arithmetic & Logic Unit

Conditions produced in floating-point operations

• Exponent overflow : +ve/-ve infinity• Exponent underflow: zero• Significand underflow: In aligning

significands, digits may flow off the right end of the significand. Rounding is required.

• Significand overflow: In addition of significands, carry out of MSB, realignment is required.

Page 44: Arithmetic & Logic Unit

FP Arithmetic +/-

• Check for zeros• Align significands (adjusting exponents)• Add or subtract significands• Normalize result

Page 45: Arithmetic & Logic Unit

Algorithm for addition & subtraction of FP Numbers

• Step 1: Zero Check Addition & Subtraction are same except

for sign change. If subtraction, change the sign of

subtrahend. If either operand is 0, the other is

reported as result.

Page 46: Arithmetic & Logic Unit

Algorithm for addition & subtraction of FP Numbers

• Step 2: Significant Alignment Manipulate the numbers so that two

exponents are equal.Eg. 123 * 100 + 456 * 10-2

=123 * 100 + 4.56 * 100

= 123 + 4.56

= 127.56

Page 47: Arithmetic & Logic Unit

Algorithm for addition & subtraction of FP Numbers

• Step 3: AdditionAdd two significant; result may be zero If significand overflow by 1 digit,

significand of result is shifted right & exponent is incremented.

If exponent overflow occurs as a result, this would be reported & operation is halted.

Page 48: Arithmetic & Logic Unit

Algorithm for addition & subtraction of FP Numbers

• Step 3: NormalizationNormalize the result.Shift significant digits left till MSB is

nonzero. Decrement exponent, may cause underflow.

Round off the result & report.

Page 49: Arithmetic & Logic Unit

FP Addition & Subtraction Flowchart

Page 50: Arithmetic & Logic Unit

FP Arithmetic x/

• Check for zero• Add/subtract exponents • Multiply/divide significands (watch sign)• Normalize• Round• All intermediate results should be in

double length storage

Page 51: Arithmetic & Logic Unit

A Multiplication Algorithm

• Step 1: Zero check If either operand is 0, the other is reported

as result.Add exponent. If exponent are stored in

bias format, sum would have double bias, so subtract bias value from sum.

If exponent overflow or underflow , report & end algorithm

Page 52: Arithmetic & Logic Unit

A Multiplication Algorithm

• Step 2: MultiplyMultiply significands taking into account

their signs.

• Step 3: NormalizeNormalize & round the result

Page 53: Arithmetic & Logic Unit

Floating Point Multiplication

Page 54: Arithmetic & Logic Unit

A Division Algorithm

• Step 1: Zero check If divisor is 0, an error report is issued or

result is set to infinity.A dividend of 0 results in 0.A divisor exponent is subtracted from

dividend exponent. This removes bias which must be added back in.

Check for exponent overflow or underflow.

• Step 2: DivideDivide significands & normalize & round

result.

Page 55: Arithmetic & Logic Unit

Floating Point Division

Page 56: Arithmetic & Logic Unit

QuestionnaireQuestionnaire

Page 57: Arithmetic & Logic Unit

• Explain restoring division method. Hence perform -7 ÷ -3.

• Write algorithm for floating point addition.

• Explain with an example an algorithm for 2’s compliment multiplication.

• Explain Booth Algorithm for 2’s compliment multiplication using flow-chart.

• Explain Booth Algorithm for 2’s compliment multiplication using flow-chart. Hence multiply 7 * -3 using Booth algorithm.

Page 58: Arithmetic & Logic Unit

• Explain floating point representation IEEE standard 754.

• Explain the principle of Booth Algorithm, when it is less efficient.

• A 8-bit register holds number in 2’s compliment form with leftmost bit as sign bit.– i) What is the largest positive number can be

stored, express answer in binary & decimal format.

– ii) What is the largest negative number can be stored, express answer in binary & decimal mformat.