basics of logic design arithmetic logic unit (alu)
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Basics of Logic DesignArithmetic Logic Unit (ALU)
CPS 104Lecture 9
CPS 104 2© Alvin R. Lebeck
• Homework #3 Assigned Due March 2• Project Groups form groups of 3 by Wed, I will assign
after that• Project Specification(s) will be on Web Due April 20• Building the building blocks…Outline• Review• Digital building blocks• An Arithmetic Logic Unit (ALU)Reading
Appendix B, Chapter 3
Today’s Lecture
CPS 104 3© Alvin R. Lebeck
Review: Digital Design
• Logic Design, Switching Circuits, Digital Logic Recall: Everything is built from transistors• A transistor is a switch• It is either on or off• On or off can represent True or FalseGiven a bunch of bits (0 or 1)…• Is this instruction a lw or a beq?• What register do I read?• How do I add two numbers?• Need a method to reason about complex expressions
CPS 104 4© Alvin R. Lebeck
a b c f1f20 0 0 0 10 0 1 1 10 1 0 1 00 1 1 0 01 0 0 1 01 1 0 0 11 1 1 1 1
Review: Boolean Functions
• Boolean functions have arguments that take two values ({T,F} or {0,1}) and they return a single or a set of ({T,F} or {0,1}) value(s).
• Boolean functions can always be represented by a table called a “Truth Table”
• Example: F: {0,1}3 -> {0,1}2
CPS 104 5© Alvin R. Lebeck
F(A, B, C) = (A * B) + (~A * C)
A B C F0 0 0 00 0 1 10 1 0 00 1 1 11 0 0 01 0 1 01 1 0 11 1 1 1
Review: Boolean Functions and Expressions
CPS 104 6© Alvin R. Lebeck
ab
AND(a,b) ab
OR(a,b)
XOR(a,b)ab
NAND(a,b)ab
ab
NOR(a,b) XNOR(a,b)ab
a NOT(a)
Review: Boolean Gates
• Gates are electronics devices that implement simple Boolean functions
Examples
CPS 104 7© Alvin R. Lebeck
F = ~a*b + ~b*a
a
b F
a b XOR(a,b)0 0 00 1 11 0 11 1 0
Boolean Functions, Gates and Circuits
• Circuits are made from a network of gates. (function compositions).
XOR(a,b)ab
CPS 104 8© Alvin R. Lebeck
Digital Design Examples
Input: 2 bits representing an unsigned number (n)Output: n2 as unsigned binary number
Input: 2 bits representing an unsigned number (n)Output: 3-n as unsigned binary number
CPS 104 9© Alvin R. Lebeck
More Design Examples
• X is a 3-bit quantity1. Write a logic function that is true if and only if X contains at
least two 1s.
2. Implement the logic function from problem 1. using only AND, OR and NOT gates. (Note there are no constraints on the number of gate inputs.) By implement, I mean draw the circuit diagram.
3. Write a logic function that is true if and only if X, when interpreted as an unsigned binary number, is greater than the number 5.
4. Implement the logic function from problem 3. using only AND, OR and NOT gates. (Note there are no constraints on the number of gate inputs.)
CPS 104 10© Alvin R. Lebeck
Parity Example
• The parity code of a binary word counts the number of ones in a word. If there are an even number of ones the parity code is 0, if there are an odd number of ones the parity code is 1. For example, the parity of 0101 is 0, and the parity of 1101 is 1.
• Construct the truth table for a function that computes the parity of a four-bit word. Implement this function using AND, OR and NOT gates. (Note there are no constraints on the number of gate inputs.)
CPS 104 11© Alvin R. Lebeck
Design Example
• Consider machine with 4 registers• Given 2-bit input (register specifier, I1, I0)• Want one of 4 output bits (O3-O0) to be 1
E.g., allows a single register to be accessed
• What is the circuit for this?
CPS 104 12© Alvin R. Lebeck
Circuit Example: Decoder
I0I1
Q0
Q1
Q2
Q3
I1 I0 Q0 Q1 Q2 Q3
0 0 1 0 0 0
0 1 0 1 0 0
1 0 0 0 1 0
1 1 0 0 0 1
CPS 104 13© Alvin R. Lebeck
0
1
s
ab
y
Y = (A * S) + (B * ~S)
B
A
S
Gate 3
Gate 2
Gate 1
Circuit Example: 2x1 MUX
MUX(A, B, S) = (A * S) + (B * ~S)
Multiplexor (MUX) selects from one of many inputs
CPS 104 14© Alvin R. Lebeck
Example 4x1 MUX
0
1
s0
ab
y0
1
0
1cd
s1
0
1
2
3a
b
c
d
y
S
2
CPS 104 15© Alvin R. Lebeck
Arithmetic and Logical Operations in ISA
• What operations are there?• How do we implement them?
Consider a 1-bit Adder
CPS 104 16© Alvin R. Lebeck
Truth Table for 1-bit Addition
a b Cin Sum Cout0 0 0 0 00 0 1 1 00 1 0 1 00 1 1 0 11 0 0 1 01 0 1 0 11 1 0 0 11 1 1 1 1
What is the circuit for Sum and for Cout?
0110110001101101
+0010110010011001
CPS 104 17© Alvin R. Lebeck
A 1-bit Full Adder
a b Cin Sum Cout0 0 0 0 00 0 1 1 00 1 0 1 00 1 1 0 11 0 0 1 01 0 1 0 11 1 0 0 11 1 1 1 1
0110110001101101
+0010110010011001
a
b
Cin
Cout
Sum
CPS 104 18© Alvin R. Lebeck
b0b1b2b3 a0a1a2a3
Cout
S0S1S2S3
Full AdderFull AdderFull AdderFull Adder
Example: 4-bit adder
Cin
0
CPS 104 19© Alvin R. Lebeck
Adder
Cin
Cout
F
20
1
2
3a
bQ
F Q0 a + b1 NOT b2 a OR b3 a AND b
ALU Slice (Almost)
CPS 104 20© Alvin R. Lebeck
Subtraction
• How do we perform integer subtraction?• What is the HW?
CPS 104 21© Alvin R. Lebeck
ALU Slice
Binv F Q0 0 a + b1 0 a - b- 1 NOT b- 2 a OR b- 3 a AND b
Adder
Cin
Cout
F
20
1
2
3a
bQ
01
BinvertSub
CPS 104 22© Alvin R. Lebeck
Example: Adder/Subtracter
Add/Sub = 0 => AdditionAdd/Sub = 1 => Subtraction
Full AdderFull AdderFull AdderFull Adder
b0b1b2b3 a0a1a2a3
Cout
S0S1S2S3
Add/Sub
Cin
CPS 104 23© Alvin R. Lebeck
OverflowExample1:010000001101012 (= 5310)
+01010102 (= 4210)10111112 (=-3310)
Example2:100000010101012 (=-4310)
+10010102 (=-5410)00111112 (= 3110)
Example3:110000001101012 (= 5310)
+11010102 (=-2210)00111112 (= 3110)
Example4:000000000101012 (= 2110)
+01010102 (= 4210)01111112 (= 6310)
CPS 104 24© Alvin R. Lebeck
Add/Subtract With Overflow detection
Full AdderFull AdderFull AdderFull Adder
S0S1Sn- 2Sn- 1
b0b1 a0a1bn- 2an- 2bn- 1an- 1
Add/Sub
OVERFLOW
CPS 104 25© Alvin R. Lebeck
Add/sub
Cin
Cout
Add/sub F
20
1
2
3a
bQ
A F Q0 0 a + b1 0 a - b- 1 NOT b- 2 a OR b- 3 a AND b
The new ALU Slice
CPS 104 26© Alvin R. Lebeck
The ALU
ALU SliceALU SliceALU SliceALU SliceALU control
a0 b0a1 b1an-2 bn-2an-1 bn-1
Q0Q1Qn-2Qn-1
Overflow = Zero
CPS 104 27© Alvin R. Lebeck
Abstraction: The ALU
• General structure• Two operand inputs• Control inputs
Input A
Input B
ALU Operation
Carry Out
ResultOverflow
ZeroALU
CPS 104 28© Alvin R. Lebeck
The Shift Operation
• Consider an 8-bit machine• How do I implement the shift operation?
CPS 104 29© Alvin R. Lebeck
Shifter
010101010101
010101010101
010101010101
01 01
01 01
01 01
a0a1a2a3a4a5a6a7
Q0Q1Q2Q3Q4Q5Q6Q7
Shift-1
Shift-2
Shift-4
1
0
1
CPS 104 30© Alvin R. Lebeck
Summary thus far
• Given Boolean function, generate a circuit that “realizes” the function.
• Constructed circuits that can add and subtract.• The ALU: a circuit that can add, subtract, detect
overflow, compare, and do bit-wise operations (AND, OR, NOT)
• ShifterNext up: Storage Elements: Registers, Latches, Buses
CPS 104 31© Alvin R. Lebeck
Memory Elements
• All the circuit we looked at so far are combinational circuits: the output is a Boolean function of the inputs.
• We need circuits that can remember values. (registers)
• The output of the circuit is a function of the input AND a stored value (state) .
• Circuits with memory are called sequential circuits.
CPS 104 32© Alvin R. Lebeck
R S Q0 0 Q0 1 11 0 01 1 -
Set-Reset Latch
R
S
Q
Q
CPS 104 33© Alvin R. Lebeck
Set-Reset Latch (Continued)
R
S
Q
Q
01 0
100
R
S
Q
Q
00 1
010
R S Q0 0 Q0 1 11 0 01 1 -
CPS 104 34© Alvin R. Lebeck
R
S
Q
Q
01 0
100
R
S
Q
Q
00 1
011
Set-Reset Latch (Continued)
Time
S 01
R01
Q01
CPS 104 35© Alvin R. Lebeck
Data Latch (D Latch)
Data
Enable
Q
Q
D E Q0 1 01 1 1- 0 Q
Time
D 01
E01
Q01
Does notaffect Output
CPS 104 36© Alvin R. Lebeck
On C D is transferred to the first D latch and the second is stable.
On C the output of the first stage is transferred to the second(output), and the first stage is stable.
D Flip-Flop
Dlatch
D Q
E
Dlatch
D Q
E Q Q
QD
C
CPS 104 37© Alvin R. Lebeck
1 0 0 0 01 11
Clock
D
Q1
Q1 0 0 0 01 11
D Flip-Flop Timing
Dlatch
D Q1
E
Dlatch
D Q
E Q Q
QD
C Time
CPS 104 38© Alvin R. Lebeck
D E Q0 1 01 1 1- 0 Z
Z :- High Impedance
D Q
E
The Tri-State driver is like a (one directional) switch:When the Enable is on (E=1) it transfers the input to the output.When the Enable is off (E=0) it disconnects the output.
D Q
E
Tri-State Driver
CPS 104 39© Alvin R. Lebeck
The Bus: Many to many connections.Mutual exclusion: At most one Enable is on!
D0
E0
D1
E1
Dn-2
En-2
Dn-1
En-1
Bus Connections
CPS 104 40© Alvin R. Lebeck
Register Cells on a bus
One can “source” and “sink” from any cell on the busby activating the right controls (WE and RE).
D
E
Q
Q
D latch
RE WE
D
E
Q
Q
D latch
RE WE
D
E
Q
Q
D latch
RE WE
D
E
Q
Q
D latch
RE WE
CPS 104 41© Alvin R. Lebeck
3-Port Register Cell
Q
Q
Data-In
DinEnable OutA OutB
Bus-B
Bus-A
Bus-C
Complement Q
• Stores one bit of a register• Can Read onto Bus-A & Bus-B and Write fromBus-C
Simultaneously
CPS 104 42© Alvin R. Lebeck
Q
Q
Bus-B
Bus-A
Bus-C
Q
Q
Bus-B
Bus-A
Bus-C
Bit-0
Bit-1
EA EBEC
3-Port Register File
CPS 104 43© Alvin R. Lebeck
Address Decode Circuit
A0A1EAB0B1EBC0C1EC
Q
Q
Data-in
OutA OutBDEnable
Bus-A
Bus-BBus-C
Register address: 01
CPS 104 44© Alvin R. Lebeck
Reg-0Reg-1Reg-2Reg-3
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
One-bit Cell
A3B3C3
A-EnAdd-A1Add-A0
B-EnAdd-B1Add-B0
C-EnAdd-C1Add-C0
A1B1C1
A2B2C2
A0B0C0
Register File (Four 4-bit Registers)
CPS 104 45© Alvin R. Lebeck
Summary
• Given Boolean function, generate a circuit that “realize” the function.
• Constructed circuits that can add and subtract.• The ALU: a circuit that can add, subtract, detect
overflow, compare, and do bit-wise operations (AND, OR, NOT)
• Shifter• Memory Elements: SR-Latch, D Latch, D Flip-Flop• Tri-state drivers & Bus Communication• Register Files• Control Signals modify what circuit does with inputs
ALU, Shift, Register Read/Write