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Arithmetic CPSC 321 Computer Architecture Andreas Klappenecker

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Arithmetic. CPSC 321 Computer Architecture Andreas Klappenecker. Signed Numbers (3bits). Two’s complement. The unsigned sum of an n-bit number with its negative yields? Example with 3 bits: 011 2 = 3 101 2 = -3 1000 2 = 2 n => negate(x) = 2 n -x 101 2 = -2 2 + 2 0. - PowerPoint PPT Presentation

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Page 1: Arithmetic

Arithmetic

CPSC 321 Computer Architecture

Andreas Klappenecker

Page 2: Arithmetic

Signed Numbers (3bits)sign magnitude one’s

complementtwo’s complement

0002 = 0 0002 = 0 0002 = 0

0012 = 1 0012 = 1 0012 = 1

0102 = 2 0102 = 2 0102 = 2

0112 = 3 0112 = 3 0112 = 3

1002 = -0 1002 = -3 1002 = -4

1012 = -1 1012 = -2 1012 = -3

1102 = -2 1102 = -1 1102 = -2

1112 = -3 1112 = -0 1112 = -1

Page 3: Arithmetic

Two’s complement The unsigned sum of an n-bit

number with its negative yields? Example with 3 bits:

0112 = 3 1012 = -3 10002 = 2n => negate(x) = 2n-x

1012 = -22 + 20

Page 4: Arithmetic

Negating Signed Integers Suppose that you have an n-bit

integer in two’s complement representation

Negate positive to negative: 00112 = 3 11012 = -3 invert bits and add 1

Negate negative to positive Trick: invert bits and add 1 -3 = 11012 00102 00112

Page 5: Arithmetic

Just like in grade school (carry/borrow 1s) 0111 0111 0110+ 0110 - 0110 - 0101

1101 0001 0001 Two's complement operations easy

subtraction using addition of negative numbers 0111 = 7+ 1010 = -6

0001

Addition & Subtraction

Page 6: Arithmetic

Detecting Overflow

Operation

Operand A

Operand B

Overflow if result

A+B >=0 >=0 <0

A+B <0 <0 >=0

A-B >=0 <0 <0

A-B <0 >=0 >=0

Page 7: Arithmetic

MIPS instructions lb loads a byte and stores the sign-

extended version in a word. lbu loads a byte and stores it in a

word Which of these two is typically

used to process characters?

Page 8: Arithmetic

Logic Gates: AND

AND

a b c

0 0 00 1 0

1 0 0 1 1 1

ab c

Page 9: Arithmetic

Logic Gates: OR

OR

a b c

0 0 00 1 1

1 0 1 1 1 1

ab c

Page 10: Arithmetic

Let's build an ALU to support the andi and ori instructions

Selection of operation 0 = and, 1 = or we'll just build a 1 bit ALU, and use 32 of them

Possible Implementation (sum-of-products):

b

a

operation

result

An ALU (arithmetic logic unit)

Page 11: Arithmetic

Selects one of the inputs to be the output, based on a control input

Build (and/or) ALU using a MUX

S

CA

B

0

1

The Multiplexor

note: it is called a 2-input mux even though it has 3 inputs!

Page 12: Arithmetic

Not easy to decide the “best” way to build something Don't want too many inputs to a single gate for our purposes, ease of comprehension is important Don’t want to have to go through too many gates

Let's look at a 1-bit ALU for addition:

Different Implementations

cout = a b + a cin + b cin

sum = a xor b xor cinSum

CarryIn

CarryOut

a

b

Page 13: Arithmetic

Different Implementations

How could we build a 1-bit ALU for add, and, and or?

How could we build a 32-bit ALU?

Page 14: Arithmetic

Building a 32 bit ALU

Result31a31

b31

Result0

CarryIn

a0

b0

Result1a1

b1

Result2a2

b2

Operation

ALU0

CarryIn

CarryOut

ALU1

CarryIn

CarryOut

ALU2

CarryIn

CarryOut

ALU31

CarryIn

b

0

2

Result

Operation

a

1

CarryIn

CarryOut

Page 15: Arithmetic

Two's complement approach: just negate b and add.

How do we negate? A solution:

What about subtraction (a – b) ?

0

2

Result

Operation

a

1

CarryIn

CarryOut

0

1

Binvert

b