applied signal processing and implementation (aspi) introduction for 7th semester fall 2005 embedded...
TRANSCRIPT
![Page 1: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/1.jpg)
APPLIED SIGNAL PROCESSING AND IMPLEMENTATION
(ASPI)
Introduction for 7th semesterFall 2005
Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo
Dicom group: kjh, pr, uh, ....
![Page 2: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/2.jpg)
2ASPI Introduction
Outline
1. Rationale for ASPI2. Basic ASPI Model (A3)3. Trends: S8 -> S9 -> S104. Course structure 5. Project examples: S8 – S9/S106. Lab facilities7. Demonstrations 8. Conclusion
![Page 3: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/3.jpg)
3ASPI Introduction
Rationale for ASPI/1
Embedded System:• a collection of heterogeneous parts• subject to stringent design constraint such as ...
![Page 4: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/4.jpg)
4ASPI Introduction
Rationale for ASPI/2
Embedded Systems
Nokia 7710
From To
![Page 5: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/5.jpg)
5ASPI Introduction
Rationale for ASPI/3
Shannon Beats Moore’s Law and Energy Plays a Major Role
1
10
100
1000
10000
100000
1000000
10000000
Processor Performance (~Moore’s Law)
Battery Capacity
Source: Jan Rabaey, Summer Course, 2000
Algorithmic Complexity(Shannon’s Law)
1G
2G
3G
![Page 6: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/6.jpg)
6ASPI Introduction
Basic ASPI Model (A3)
ApplicationsApplications
AlgorithmsAlgorithms
ArchitecturesArchitectures
For each application => many candidate algorithms
For each algorithm => many implementation architectures =>
Large no. of solutions => Large Design Space
=> ASPI challenge
Equalizer
FIR/IIR
DSP/FPGA
![Page 7: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/7.jpg)
7ASPI Introduction
FPGA
FPGA components:
1. Dedicated I/O blocks
2. Programmable LogicArrayBlocks (LAB)- combinatorial / seqential circuits- routing resources
3. Dedicated blocks- RAM blocks- multipliers- processors (ARM/PowerPC)
4. Development tools
![Page 8: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/8.jpg)
8ASPI Introduction
FPGA
![Page 9: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/9.jpg)
9ASPI Introduction
ASPI Design Principle
Serial Parallel
Transform a serial specification into a combination of:
• Serial, parallel and pipelined units
That satifies the design constraints: Area, Time => Power
Pipelined
![Page 10: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/10.jpg)
10ASPI Introduction
Trends: S8 -> S9 -> S10
Application: Non-Linear Signal Processing/Mobile Communication 1.1. Algorithm selectionAlgorithm selection2.2. SimulationSimulation3. Architecture selection and mapping
Example later
ApplicationsApplications
AlgorithmsAlgorithms
ArchitecturesArchitectures
2
3
1
![Page 11: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/11.jpg)
11ASPI Introduction
Solution Space for FIR filter
14892
1289011962
20652065 2065
504 504 924
31
45
4552
5256
76
95
52
0
2000
4000
6000
8000
10000
12000
14000
16000
Optimizations
Cyc
le C
ou
nt
0
10
20
30
40
50
60
70
80
90
100
Co
de
Siz
e
Cycle Count
Code SizeCompiler optimiserC code modifications
Compiler optimization
![Page 12: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/12.jpg)
12ASPI Introduction
Trends: S8 -> S9 -> S10
Application: Non-Linear Signal Processing/Mobile Communication
• Algorithm selection• Simulation• Architecture selection and modelling• Design Space Exploration• HW/SW Co-Design
ApplicationsApplications
AlgorithmsAlgorithms
ArchitecturesArchitectures
2
34 5
1
![Page 13: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/13.jpg)
13ASPI Introduction
Design Space Exploration
Constraints: Area, Time => Power = Area*fclock
Area
TimeTmax
Amax
Possible solutions (A*T ~ K)
![Page 14: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/14.jpg)
14ASPI Introduction
HW/SW Co-Design
![Page 15: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/15.jpg)
15ASPI Introduction
Trends: S8 -> S9 -> S10
ApplicationsApplications
AlgorithmsAlgorithms
ArchitecturesArchitectures
• Implementing a complete design trajectory • With solutions where properties satisfies
constraints
Constraints
Properties
![Page 16: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/16.jpg)
16ASPI Introduction
ASPI Course Structure
Design Methodology8.sem 9.Sem
Algorithm analysis
HW compilers
HW Platform analysisSW Platform analysis
SW compilers
Design Space Expoloration
![Page 17: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/17.jpg)
17ASPI Introduction
8th Semester Courses
F8-1FP8-12FP8-9FP8-13
Engineering ResponsibilitiesHigher Order Statistical AnalysisJoint Time Frequency AnalysisDSP Algorithms and Architectures
1 ECTS1 ECTS1 ECTS1 ECTS
SESESESE
FP8-16FP8-19FP8-18
Adaptive SystemsInverse Filtering and DeconvolutionMultidimensional Signal Processing
2 ECTS1 ECTS1 ECTS
PEPEPE
ASPI8-4FP8-17
DSP Design Methodology
Software Programmable Platform Analysis
0.6 ECTS1.4 ECTS
PEPE
Project 20 ECTS
![Page 18: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/18.jpg)
18ASPI Introduction
9th Semester Courses
FP9-2 Discrete-Time Kalman Filtering 2 ECTS SE
ASPI9-2AASPI9-2BASPI9-3ASPI9-4Mob9-2
HW/SW CoDesignHW Platform Analysis, Comp. & Optim.Non-linear Signal ProcessingNeural NetworksRadio Communication III
2 ECTS2 ECTS1 ECTS1 ECTS1.4 ECTS
PEPEPEPEEL
Project 22 ECTS
EL : ELective Course
![Page 19: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/19.jpg)
19ASPI Introduction
Technology
Simulation tools / Language:• Matlab/M• Ptolemy/(M)any• Design Trotter/C
Processors / Language:• ARM/ C++, ASM• TI 320-6413/C++, ASM • Blackfin/ C++, ASM• Microblaze/ C++, ASM• NIOS/ C++, ASM
Programmable Logic:• Xilinx FPGA/ Handel-C• Altera FPGA/ Handel-C
![Page 20: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/20.jpg)
20ASPI Introduction
Technology
Lab facilities
Celoxica RC203 board Xilinx Virtex FPGA
![Page 21: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/21.jpg)
21ASPI Introduction
Technology
Lab facilities
Altera Stratix board Altera Stratix FPGA
![Page 22: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/22.jpg)
22ASPI Introduction
Technology
Lab facilities
Analog Devices Blackfin board Analog Devices Blackfin DSP
![Page 23: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/23.jpg)
23ASPI Introduction
Project Examples: S8/S9/S10
1. S8 Noise Suppression in Speech
2. S9 FPGA implementation of a JPEG 2000 encoder/decoder
3. Reed Solomon Decoder for DVB-H
Most projects involves external contacts in other research groups or companies
![Page 24: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/24.jpg)
Noise Suppression in Speech
ASPI 8, Gruppe 840Søren Birk Sørensen
Andreas PoppMichael Smed Kristensen
![Page 25: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/25.jpg)
25ASPI Introduction
Agenda
ApplikationSystemoversigt
AlgoritmePrincip i algoritmeResultater
ArkitekturImplementation
![Page 26: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/26.jpg)
26ASPI Introduction
Systemoversigt
KravForbedring af taleforståelighedForbedring af signal-støj-forhold (SNR)Acceptabel forsinkelse i systemet (latenstid)
![Page 27: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/27.jpg)
27ASPI Introduction
Princip
![Page 28: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/28.jpg)
28ASPI Introduction
Resultater
SNR ikke væsentligt forbedretTaleforståelse: Fra ”Very poor” til ”Good”Latenstid: 35 ms
![Page 29: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/29.jpg)
29ASPI Introduction
Implementation
Dele af algoritmen blev implementeret på et TI TMS320C6713 udviklingsboard
Floating pointVarierende pipeline dybde8 instruktioner i parallel
Analysere resultat af compileringEfterfølgende optimering
![Page 30: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/30.jpg)
30ASPI Introduction
Foretagede optimeringer
EksekveringstidAnden algoritme til autokorrelationsberegning
Loop unrolling giver mere parallelitet
Informere kompiler om dataafhængighedUdnyttelse af pipeline
Anden divisionsberegningKortere eksekveringstid
![Page 31: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/31.jpg)
31ASPI Introduction
Resultat af optimering
Autokorrelationsberegning24096 cycles 2624 cycles153% mere end estimeret minimum antal cycles
Levinson funktion3842 cycles 1122 cycles26% mere end estimeret minimum antal cycles
![Page 32: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/32.jpg)
9th semester project example
”FPGA implementation of a JPEG 2000
encoder/decoder”
![Page 33: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/33.jpg)
Motivation
• JPEG2000 is up to six times more complex to implement than JPEG
• 2 complex DSP algorithms at the heart of JPEG2000• Discrete Wavelet Transform (DWT)• Embedded Block Coding with Optimized Truncation (EBCOT)
• FPGAs provide the ability to accelerate arithmetic operations via parallel processing
FPGA implementation of a JPEG2000 encoder/decoder
JPEG2K Block diagram (encoder)
![Page 34: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/34.jpg)
Project flow
• Analysis of reference C-code• processing analysis (search for potential parallelism)• memory analysis (memory requirements)
• Sketch an architecture based on the analysis (architectural exploration)
• FPGA implementation • Handel-C language to describe the architecture• Handel-C to FPGA (Celoxica Design-suite)• Analysis -> architectural refinement
FPGA implementation of a JPEG 2000 encoder/decoder
![Page 35: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/35.jpg)
35ASPI Introduction
Application:
• from DVB-T to DVB-H• FEC: RS(n,k,t) => RS(255, 191, 64)
• Constraints:• Frame size: upto 2 MB• Data rate: 2 MB/S• Time constraint: ASAP
S10 Project: Reed-Solomon Decoder
Dat
a
Parit
y
Dat
a
Nokia 7710
![Page 36: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/36.jpg)
36ASPI Introduction
S10 Project: Reed-Solomon Decoder
Complexity:
• Execution on ARM: 22 min/2MB frame
![Page 37: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/37.jpg)
37ASPI Introduction
S10 Project: Reed-Solomon Decoder
Algorithm:
• Galois field arithmetic GF(28)• Data: 8 bit bytes• operators: binary +, *, not• Properties:
• no carry, overflow or rounding error =>• bitwise operations In parallel• Short critical path (delay) => high clock rate
• Identification of parallelism• coarse grain @ function level• fine grain @ operations level
![Page 38: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/38.jpg)
38ASPI Introduction
S10 Project: Reed-Solomon Decoder
Results:
• Execution on ARM: 22 min/2MB frame• Parallelism: the error locator and the evaluator polynomial can be computed concurrently• Reusable DataPath: Syndrome computation, Chien Search, polynomial evaluation and error correction can be performed on the same parallel DataPath
![Page 39: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/39.jpg)
39ASPI Introduction
S10 Project: Reed-Solomon Decoder
Results:
• DataPath: 65 8 bit blocks•
• Design Space Exploration:
![Page 40: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/40.jpg)
40ASPI Introduction
S10 Project: Reed-Solomon Decoder (DSE)
![Page 41: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/41.jpg)
41ASPI Introduction
Conclusion
ASPI salient features:• based on Models and Methods• application independent but also• application related• encompasses new technologies and tools• driven by current research projects• local & global industry cooperation
Any questions - before student presentation continues
![Page 42: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/42.jpg)
42ASPI Introduction
Reklame
Min A3 'opdragelse' er kommet rigtig til gavn – vi veksler frem og tilbage mellem applikation, algoritme og arkitektur noejagtig som vi gjorde i de gode gamle dage i VLSI gruppen.
Desvaerre faar vi ikke gjort meget ved aritmetikken – syntese vaerktoejerne kommer med meget effektive modulgeneratorer for multipliers, adders etc. – og I den 0.18u teknologi vi arbejder i er de mere end rigeligt hurtige.
Saa aritmetikken er mere en del af min baggrund for at forstaa hvad modul generatorerne spytter ud - og hvordan vi bedst udnytter dem.(Og dog - det lysner - jeg skal til at designe en divider for naeste generation IC !-)
Uddrag af e-mail fra: Jack Andersen <[email protected]>
![Page 43: APPLIED SIGNAL PROCESSING AND IMPLEMENTATION (ASPI) Introduction for 7th semester Fall 2005 Embedded Systems group: pk, yml, abo, ssc, jmk, dlc, rab, oo](https://reader036.vdocuments.mx/reader036/viewer/2022062515/56649c535503460f948fd83b/html5/thumbnails/43.jpg)
43ASPI Introduction
ASPI Home Page, Staff etc
Home Page:http://kom.aau.dk/~dsp/aspi-05/sites/default/ Secretary:
Dorthe Sparre, NJV12 A5-214, Tlf. 9635 8616, [email protected]
Staff:Peter Koch, Yannick LeMoullec, Ole OlsenDaniel Lázaro Cuadrado, Anders B. Olsen, Jesper Michael Kristensen, Søren Skovgaard Christensen, Rasmus Abildgren
Location:Offices: B1-208, -211, -213, NJV12 A5-207Lab: NJ14 3-015Students: A6-108