appendix a: table of acronyms - link.springer.com978-1-4615-6029-6/1.pdf · aoi automatic optical...

Appendix A: Table of Acronyms

Group or Acronym Description Category Comments

AAAS American Association for the ORG Advancement of Science

ABC Activity Based Costing Cost analysis AC Alternate Current ACAF Anisotropic Conductive Adhesive

Films ACCF Anisotropic Conductive Compliant

Films AES Auger Electron Spectroscopy AF Acceleration Factor Reliability testing ALIVH Any Layer Inner Via Hole PCB technology ALT Accelerated Life Testing Reliability testing AMI Acoustic Micro Imaging AMR Anisotropic Magnetoresisti ve AOI Automatic Optical Inspection Inspection ARQ Automatic Repeat Request ATC Accelerated Thermal Cycle (Test) Reliability testing ATE Automated Test Equipment BEM Boundary Element Modeling BGA Ball Grid Array BIT Bump Interconnect Technology Fujitsu BLM Ball Limiting Metallurgy BSM Bottom Surface Metallurgy BT Bismaleimide Triazine C-SAM C-Mode Scanning Acoustic

Microscopy C4 Controlled Collapse Chip Connection IBM flip chip

technology

327

328 / Failure Modes and Mechanisms in Electronics Packages


CAD Computer Aided Design CAE Computer Aided Engineering CAF Conductive Anodic Filament CAM Computer Aided Manufacturing CBGA Ceramic Ball Grid Array CCA Circuit Card Assemblies Packaging CCC Ceramic Chip Carrier CCD Central Composite Designs DOE, STAT CD-ROM Compact Disk-Read Only Memory cm Cumulative Damage Index CDM Charge Device Model ESD testing CE Cyanate Ester CERDIP Ceramic Dual Inline Package CFD Computational Fluid Dynamics CIQC Computer Industry Quality Council CIT Computerized Industrial Tomography CMS Custom Manufacturing Services CMSB Contract Manufacturing Strategy

Board CNC Central Numerical Control Machinery

ControU Automation COB Chip on Board COF Chip on Flex COG Chip on Glass COT Chip on Tape COTS Commercial off the Shelf CPC Corrosion Prevention & Control CPMT Components, Packaging & ORG IEEE

Manufacturing Technology CPP Current Perpendicular to the Plane HDD technology CPSI Compliant Plug & Socket

Interconnect CR Contact Resistance Connector testing CSAM C-Mode Scanning Acoustic

Microscopy CSMR Comprehensive Surface Mount

Reliability CSP Chip Scale Package, Chip Size

Package CTE Coefficient of Thermal Expansion See also TCE DC Direct Current DCA Direct Chip Attach DEPTH Design Evaluation for Personnel,

Training and Human Factors

Appendix A / 329


DFA Design for Assembly DFE Design for the Environment DFM Design for Manufacturing DFR Decreasing Failure Rate; Design for Statistics, DFM

Reliability DFf Design for Test DIP Dual Inline Package DNP Distance to Neutral Point Stress analysis-Rip

Chip attachment DOA Dead on Arrival Time zero assembly

Failure DOE Design of Experiments Stats dpi Dots per Inch Resolution specification

for printers DPM Defect per Million Quality measurement DPU Defect per Unit Quality measurement DRAM Dynamic Random Access Memory DTE Differential Thermal Expansion DUT Device Under Test DWV Dielectric Withstanding Voltage Insulation test EC Engineering Change (to a specification or a

drawing) ECCB Electronics Component Certification ORG

Board ECO Engineering Change Orders ECU Electronic Control Unit Rack system containing

driver electronics ED Electrophoretically Deposited (Solder

Mask) EDS Energy Dispersive Spectroscopy EDM Engineering Document Management

(System) EIA Electromagnetic Interference ORG

Analysis, Electronics Industries Association

EFf Electrical Fast Transients ESD EM Electromigration EMI Electro Magnetic Interference; Early Reliability; DFM

Manufacturing Involvement EMSI Electronics Manufacturing Services ORG

Industry EOS Electrical Over Stress IC Reliability Test EPA Environmental Protection Agency EPBGA Enhanced Plastic Ball Grid Array HDW



ESCA X-ray Photoelectron Spectroscopy for Chemical Analysis

ESD Electrostatic Discharge ESS Environmental Stress Screen EST Environmental Stress Test EUT Equipment Under Test Testing EV Electrical Verification Electrical test FCA Flip Chip Attach FCOB Flip Chip on Board Packaging FCOF Flip Chip on Flex Packaging FEXT Far-end or Forward Crosstalk Noise analysis FIB Focused Ion Beam FIT One Fail in 109 Component Hours FM Figure of Merit Stress reliability FMA Failure Mode Analysis FMEA Failure Modes and Effects Analysis FMECA Failure Mode Effect and Criticality

Analysis FMG Flowing Mixed Gas Corrosion testing FPM Feet per Minute FT-NIR Fourier Transform Network Infrared

Microscopy FTIR Fourier Transform Infrared

Microscopy GMR Giant Magnetoresistive Technology used by

IBM HDDs HALT Highly Accelerated Life Test HASL Hot Air Solder Level A copper coating on

PCB HASS Highly Accelerated Stress Screen HAST Highly Accelerated Stress Test HATR Horizontal Attenuated Total

Reflectance HAZ Heat Affected Zone Laser drilling HCFC Hydrochlorofluorocarbon HDD Hard Disk Drive HFC Hydrofluorocarbon HFE Hydrofluoroether HIC Hybrid Integrated Circuits HiDec High-Density Electronics Center ORG Arkansas University HSM Hermetically Sealed Microcircuits 110 Input and Output (pins) ICT In Circuit Test IDC Insulation Displacement Connector Connector technology

Appendix A / 331


IEC International Electrotechnical ORG Commission

IEEE Institute of Electronics & Electrical ORG Engineers

IECQ International Electrochemical ORG Commission Quality (Assessment)

IEPS International Electronics Packaging ORG Now called IMAPS Society

IFR Intrinsic Failure Rate; Increasing Statistics Failure Rate; Instantaneous Failure Rate

ILD Inter Layer Dielectric, Inner Layer Dielectric

ILE Inner Layer Etching IMAPS International Microelectronics and ORG IEPS & ISHM

advanced Packaging Society Combined organization

IPC Institute of Printed Circuit IR Insulation Resistance, Infrared

(Reflow) ISHM International Society of Hybrid & ORG Now known as IMAPS

Microelectronics ISO International Organization for

Standardization JEDEC Joint Electronics Development ORG Standards body

Engineering Council KGD Known Good Die KPOH Thousand Power on Hours Reliability, failure rate LCCC Leadless Ceramic Chip Carrier LGA Land Grid Array LIMS Laser Ionization Mass Spectroscopy

Laser Induced Mass Spectrometry LLNL Lawrence Livermore National Lab ORG LOC Lead on Chip LEE Layered Elastomeric Elements LPISM Liquid Photoimageable Solder Mask LRNC Low-Residue No-Clean (flux) MBGA Metal Ball Grid Array MCC Microchip Carrier MCM Multichip Modules MCM-C Multichip Module-Ceramic

Substrate Thick Film MCM-D Multichip Module-Ceramic

Substrate Deposited Thin Film



MCM-L Multichip Module-Laminate Substrate

MCM-V Vertical-Stack MCM MCP Multichip Package MCR Molded Carrier Ring MDA Manufacturing Defects Analyzer MDC Miniature Device Carrier MELF Metal Electrode Leadless Face (SMT A round SMT device

Component) MGRS Migrative Resistive Shorts Metal migration MIDS Molded Interconnect Devices MITI Ministry of International Trade and ORG Japan

Industry MIE Metal-in-Elastomer Connector technology MLC Multilayer Ceramic (Capacitor) MM Machine Model ESD testing MOE Metal on Elastomer Connector technology MOTS Military off the Shelf Components MS Mass Spectroscopy MSDS Materials Safety Data Sheets MTBF Mean Time Between Failures STAT, reliability MTIF Mean Time to Failure STAT, reliability NCMS National Center for Manufacturing ORG

Sciences NCSP Near Chip Scale Package Packaging NDF No Defect Found NDT Nondestructive Test NECQ National Electronics Component

Qualification NEMA National Electronics Manufacturers' ORG

Assocation NEXT Near-end or Backward Crosstalk Noise analysis NFF No Fault Found NPI New Product Introduction (Team) DFM NSI National Inspectorate ORG NSO National Standards Organization ORG NSOM Near-field Scanning Optical

Microscope NSMD Non-solder mask defined (pads) OA Organically Activated (Flux) OB Organic Bases ODPs Ozone-Depleting Compounds OEP Optoelectronic Packaging OE-MCMs Optoelectronic multichip modules

Appendix A / 333


OLE Outer Layer Etching OSEE Optical Stimulated Electronics

Emission OSHA Occupational Safety & Health

Administration OSP Organic Solderability Preservatives PAA Pad Area Array PII Packaging Interconnect PBGA Plastic Ball Grid Array, Perimeter

Ball Grid Array PCB Printed Circuit Board See also PWB PCLP Printed Circuit Leadless Package developed by Fuzitsu PDIP Plastic Dual Inline Package PDM Product Data Management

(System) PEEC Partial Element Equivalent Circuits PEMs Plastic Encapsulated Microcircuits PGA Pin Grid Array; Pad Grid Array PID Photoimageable Dielectric PIH Pin in Hole PIND Particle Impact Noise Detection Reliability testing PLCC Plastic Leaded Chip Carrier PolyHIC Polymer Hybrid Integrated Circuit ppb Parts per Billion ppm Parts per Million; Pages per Minute PQFP Plastic Quad Flat Pack PTH Plated-Through-Hole PWB Printed Wire Board QFP Quad Flat Pack QML Qualified Manufacturer List RA Rosin Activated (flux) RAM Random Access Memory RAMES Reliability, Availability, and

Maintainability Expert System RAWP Reliability Assurance Warranty

Program RET Reliability Enhancement Testing RGA Residual Gas Analysis Failure analysis, IC RH Relative Humidity RMA Rosin Mildly Activated (flux) ROI Return on Investment ROM Read Only Memory ROTS Ruggedized off the Shelf Components SAM Scanning Acoustic Microscopy



SCC Stress Corrosion Cracking, Solder Column Connect (IBM Column Grid array)

SCI Scalable Coherent Interface IEEE Standard SCR Silicon Control Rectifier IC Device SDRAM Synchronous DRAM SEC Solvent Extract Conductivity SEM Surface Electron Microscopy SERA Sequential Electrochemical Reduction Failure analysis

Analysis SFA Standard Fabrication Allowance PCB manufacturing SIMM Single Inline Memory Module SIR Surface Insulation Resistance Reliability testing SLAM Scanning Laser Acoustic Microscopy SLICC Slightly Larger than Integrated Packaging (Motorola)

Circuit Carrier SLR Single Layer Routing SM Surface Mount SMDs Surface Mount Devices; Solder Mask

Defined (Pads) SMEMA Surface Mount Equipment ORG

Manufacturers' Association SMOBC Solder Mask on Bare Copper SMOP Solder Mask on Pads SMT Surface Mount Technology SMTA Surface Mount Technology ORG

Association SO Small Outline (Devices) SMT SOG Small Outline Gull Wing Package

with Wide Body SOl Silicon on Insulator SOIC Small Outline Integrated Circuits SOLIC Small Outline Leaded IC SOP Standard Operating Procedure/

Process SOT Small Outline Transistor SPC Statistical Process Control STAT SPICE Simulation Program with Integrated

Circuit Emphasis SQC Statistical Quality Control STAT SRAM Static Random Access Memory SSIMS Static Secondary Ion Mass

Spectrometry STH Synchronized Traversing Head Flux spray technique

Appendix A / 335


STRIEF Stress plus Life Reliability (life) testing SWOT Strength-Weakness-Opportunity and Contract Manufacturing

Threat Strategy TAB Tape Automated Bonding TARGET Thermal Accelerated Reliability Go- Reliability testing

No-go Environmental Testing TBGA Tape Ball Grid array TC Thermal Cycle; Test Chamber Reliability testing TCE Thermal Coefficient of Expansion see also CTE TDR Time Domain Transmission TDR Time Domain Reflection Tg Glass Transition Temperature TGA Thermal Gravimetric Analysis THB Temperature Humidity Bias Reliability testing TIA Telecommunication Industries ORG

Association TLVs Threshold Limiting Values TM Test Media TOF Time of Flight TOSA Transmitter Optical Assemblies TQFP Thin Quad Flat Pack TQM Total Quality Management (System) TR Technical Report, Terminating

Resistor TRL Thru-Reflection Line Cross talk testing TS Thermal Shock, Test Substrate; Test Reliability testing

Specimen TSM Top Surface Metallurgy TVS Transient Voltage Suppressor ESD TSS Thermal Stress Screen Reliability testing UBM Under Ball Metallurgy VASE Variable Angle Spectroscopic

Ellipsometry VCC-SB Very Controlled Collapse Solder

Bumps VOCs Volatile Organic Compounds VME Versa Module Eurocard WIP Work in Progress Inventory XPS X-Ray Photoelectric Spectroscopy ZIP Zero Insertion Force Connector technology ZIP Zig-Zag Inline Package Package type Zo Circuit Impedance

Appendix B: Supplemental References

Tin Whisker Growth References

1. N. Lycoudes, Tin Plated Surfaces and the Whisker Growth Phenomenon, Reliability Report RIC-1695, Motorola Inc., May 1976.

2. L. Zakraysek, Microelectronic component lead finishes, Plating and Surface Finishing, Vol. 68, No.9, pp. 72-76, September 1981.

3. Spontaneous growth of whiskers on tin coatings: 20 years of observations, S. C. Britton, Transactions, Institute of Metal Finishing, Vol. 52, pp. 95-102, 1974.

4. T. Werner, et aI., Whiskers from the In-Pb system: growth, handling, and characteristic properties, Journal of Crystal Growth, Vol. 27, No.7, pp. 467-481, July 1988.

5. R. Kawanaka et aI., Influence of impurities on the growth of tin whiskers, Japanese Journal of Applied Physics, Vol. 22, p. 917, 1983.

6. T. Kakeshita et aI., Grain size effect of electroplated tin coatings on whisker growth, Journal of Material Science, Vol. 17, p. 2560, 1982.

7. I. A. Blech, P. M. Petroff, K. L. Tai, V. Kumar, Whisker growth in Al thin films, Journal of Crystal Growth, Vol. 32, pp. 161-169, 1975.

8. P. Lund, Section 5.2.2: Metallic growth in Quality Assessment of Printed Circuit Boards, Bishop Graphics, Inc., p. 75, 1985.

Tin-Plating References

1. C. J. Thwaites, C. A. Mackay, Some effects of abrasive cleaning on the solderability of printed circuits, Metal Finishing Journal, pp. 291-294, Tin Research Institute Publication 386, September 1968.

2. N.1. Spiliotis, Tin lead plating practices that assure proper wetting upon reflow, Insulation/Circuits, pp. 64-71, June 1978.

336

Appendix B / 337

Connector References

1. J. L. Marshall, Scanning Electron Microscopy Characterization of Connector Failures, Dept. of ChernistrylMaterial Sciences, University of North Texas, Denton, TX 76203, pp. 192-197, 1988.

2. S. Miyazawa, J. Eilers, New Reliable Socket for Today's PLCC Packages, KEL Corp., Tokyo, Japan.

3. J. H. Whitley, R. S. Mroczkowski, Concerning Normal Force Requirements for Gold Plated Contacts, Report P296-87, AMP Inc., Harrisburg, PA 17105.

4. J. H. Dutoit, Methods for evaluating the effects of connector intermittencies, Connection Technology, pp. 23-26, December 1988.

5. R. Mroczkowski, Connectors: choosing the right contact materials, pp. 51-56, Electronic Packaging and Production, September 1990.

6. J. D. Herard, A desktop analysis of electrical connectors, Connection Technology, pp. 19-21, July 1990.

7. H. S. Fluss, Hertzian stress as a predictor of contact reliability, Connection Technology, pp. 12-21, December 1990.

Appendix C: Electronics Packaging Components, Component Assembly, and Reliability Test Standard and Specifications

A list of many applicable standards and specifications for electronics components, printed circuit carriers, components assembly, quality inspection and assessment, reliability, and qualification tests is provided for the reader's reference. Since the standards are continuously being updated or revised, the reader is advised to contact the responsible organizations to obtain the latest update or revision of the standard of interest.

ANSI/J-STD-OOI

ANSI/J-STD-002

ANSI/J -STD-003

ANSI/J -STD-004

ANSI/J-STD-005

ANSI/J-STD-OI2

ANSI/J-STD-013

EIA-186-(1E-14E)

EIA-25 I-A

Requirements for Soldered Electrical and Electronic Assemblies

Solderability Tests for Component Leads, Terminations, Lugs, Terminals, and Wires

Solderability Tests of Printed Boards

Requirements for Soldering Fluxes

General Requirements and Test Methods for Electronic Grade Solder Paste

Implementation of Flip Chip and Scale Chip Technology

Implementation of Ball Grid Array and Other High-Density Technology

Test Methods for Passive Electronic Component Parts

Test to Determine the Temperature as a Function of Current in Printed Circuit Conductors

338

EIA-364-C

EIA-406

EIA-429

EIA-448-19

EIA-448-23

EIA-469-B

EIA-506

EIA-507

EIA-510

EIA-CB-ll

EIA-JEDEC TM A1l2-A

EIA-JEDEC TM AlOO-A

EIA-JEDEC TM AlOI-A

EIA-JEDEC TM A102-B

EIA-JEDEC TM AI03-A

EIA-JEDEC TM A104-A

Appendix C / 339

Electrical Connector Test Procedures Including Environmental Classifications (Series format consisting of over 60 Electrical Connector test procedures.)

General Requirements for Connectors

Industry Standard for Connectors, Electrical Flat Cable Type IPC-FC-218B

Method 19 Test Standard for Electromechanical Components Environmental Effects of Machine Soldering Using a Vapor Phase System

Surface Mountable Switches, Qualification Test

Standard Test Method for Destructive Physical Analysis of High Reliability Ceramic Monolithic Capacitors

Dimensional and Functional Characteristics Defining Sockets for Leadless Type A Chip Carriers (.050 Spacing)

Dimensional Characteristics Defining Edge Clips for Use with Hybrid and Chip Carriers

Standard Test Method for Destructive Physical Analysis of Industrial Grade Ceramic Monolithic Capacitors

Guidelines for the Surface Mounting of Multilayer Ceramic Chip Capacitors

Moisture Induced Stress Sensitivity for Plastic Surface Mount Devices

Cycled Temperature Humidity Bias Life Test

Steady-State Temperature Humidity Bias Life Test

Accelerated Moisture Resistance Unbiased Autoclave

High-Temperature Storage Life

Temperature Cycling


EIA-JEDEC TM A105-A

EIA-JEDEC TM A106-A

EIA-JEDEC TM Al07-A

EIA-JEDEC TM A108-A

EIA-JEDEC TM A109

EIA-JEDEC TM A110

EIA-JEDEC TM Al13-A

EIA-JEDEC Method B 102

EIA-JEDEC Method B 105-A

EIA-JEDEC Method B 108

EIA-JEP-95

EIA-JESD-26A

EIA-JESDII

EIA-JESD2l-C

EIA-JESD22-B

EIA-JESD30

EIA-JESD95-l

EIA-PDP-lOO

EIAlIS-28

Power and Temperature Cycling

Thermal Shock

Salt Atmosphere

Bias Life

Hermeticity

Highly Accelerated Temperature and Humidity Stress Test (HAST)

Preconditioning of Plastic Surface Mount Devices Prior to Reliability Testing

Surface Mount Solderability Test (JESD22-B)

Lead Integrity-Plastic Leaded Chip Carrier (PLCC) Packages

Coplanarity (intended for inclusion into JESD22-C)

JEDEC Registered and Standard Mechanical Outlines for Semiconductor Devices

General Requirements, PEM, Rugged Environments

Chip Carrier Pinouts Standardized for CMOS 4000, HC, and HCT Series of Logic Circuits

Configurations for Solid-State Memories

Test Methods and Procedures for Solid-State Devices Used in Transportation/Automotive Applications Series Format (Consists of over 16 different test procedure documents.)

Descriptive Designation System for Semiconductor Device Packages

Design Requirements for Outlines of SolidState and Related Products

Registered and Standard Mechanical Outlines for Electronic Parts

Fixed Tantalum Chip Capacitor Style 1 Protected-Standard Capacitance Range

EIAlIS-29

EIAlIS-34

EIAlIS-35

EIAlIS-46

EIAlIS-47

EIAlIS-49-A

IPC-Ino

IPC-InO

IPC-230l

IPC-300l

IPC-3406

IPC-630I

IPC-920I

IPC-950I

IPC-A-24

IPC-A-36

IPC-A-38

IPC-A-48

IPC-A-600E

IPC-A-61OB

IPC-AC-62A

IPC-AI-640

IPC-AI-64I

Appendix C / 341

Fixed Tantalum Chip Capacitor Style I Protected-Extended Capacitance Range

Leaded Surface Mount Resistor Networks Fixed Film

Two-Pin Dual Inline Capacitors

Test Procedure for Resistance to Soldering (Vapor Phase Technique) for Surface Mount Devices

Contact Termination Finish Standard for Surface Mount Devices

Solderability Test Method for Leads and Terminations

Assembly Qualification Profile-Auditing

Assembly Qualification Profile

Design Standard for Organic Multichip Modules (MCM-L) and MCM-L Assemblies

Component Qualification for the Assembly Process

Guidelines for Electrically Conductive Adhesives.

Performance Specification for Organic Multichip Module Structures (MCM-L)

Surface Insulation Resistance Handbook

PWB Assembly Process Simulation for Evaluation of Electronic Components

FluxIBoard Interaction Board

Cleaning Alternatives Artwork

Fine Line Round Robin Test Pattern

Surface Mount Artwork

Acceptability of Printed Boards

Acceptability of Printed Board Assemblies

Post Solder Aqueous Cleaning Handbook

User Requirements for Automatic Inspection of Unpopulated Thick Film Hybrid Substrates

User Guidelines for Automated Solder Joint Inspection Systems

342 I Failure Modes and Mechanisms in Electronics Packages

IPC-AI-642

IPC-AI-643

IPC-AJ-820

IPC-C-406

IPC-CA-821

IPC-CC-II0

IPC-CC-830

IPC-CD-615

IPC-CF-148

IPC-CF-152

IPC-CH-65

IPC-CM-770D

IPC-D-249

IPC-D-275

IPC-D-279

IPC-D-317

IPC-D-326

IPC-D-859

User Guidelines for Automated Inspection of Artwork and Innerlayers

User Guidelines for Automatic Optical Inspection of Populated Packaging and Interconnection

Assembly and Joining Handbook

Design and Application Guidelines for Surface Mount Connectors

General Requirements for Thermally Conductive Adhesives

Guidelines for Selecting Core Constructions for Multilayer Printed Wiring Board Applications

Qualification and Performance of Electrical Insulation Compounds for Printed Board Assemblies

Electronic Assembly Evaluation

Resin Coated Metal for Multilayer Printed Boards

Metallic Foil Specification for CopperlInvar/ Copper (CIC) for Printed Wiring and Other Related Applications

Guidelines for Cleaning of Printed Boards and Assemblies

Guidelines for Printed Board Component Mounting

Design Standard for Flexible Single- and Double-sided Printed Boards

Design Standard for Rigid Printed Boards and Rigid Printed Board Assemblies

Reliability Design Guidelines for Surface Mount Technology Printed Board Assemblies

Design Standard for Electronic Packaging Utilizing High-Speed Techniques

Information Requirements for Manufacturing Printed Circuit Boards

Design Standard for Multilayer Hybrid Circuits

IPC-DRM-18

IPC-DW -425/424

IPC-DW-426

IPC-FA-25I

IPC-FC-250

IPC-H-855

IPC-HM-860

IPC-L-I08B

IPC-L-I09B

IPC-L-115B

IPC-MC-324

IPC-MC-790

IPC-MC-790

IPC-MF-150F

IPC-MS-81O

IPC-0l-645

IPC-PC-90

IPC-QE-615

IPC-QL-653

IPC-QS-95

IPC-R-700c

IPC-RB-276

IPC-RF-245

Appendix C / 343

Desk Reference Manual

Discrete Wiring Technology

Specification for Assembly of Discrete Wiring Boards

Guidelines for Assembly of Single Sided and Double Sided Flexible Printed Circuits

Performance Specification for Single- and Double-Sided Flexible Printed Boards

Hybrid Microcircuit Design Guide

Performance Specification for Hybrid Multilayer

Specification for Thin Metal Clad Base Materials for Multilayer Printed Boards

Specification for Resin Preimpregnated Fabric (Prepreg) for Multilayer Printed Boards

Specification for Rigid Metal Clad Base Materials for Printed Boards

Performance Specification for Metal Core Boards

Guidelines for Multichip Module Technology Utilization

Multichip Modules

Metal Foil for Printed Wiring Applications

Guidelines for High Volume Microsections

Standard for Visual Optical Inspection Aids

General Requirements for Implementation of SPC

Electronic Assembly Evaluation Handbook

Qualification for Facilities that Inspectffest Printed Boards, Components & Materials

General Requirements for Implementation of ISO-9000 Quality Systems

Guidelines for Repair and Modification of Printed Board Assemblies

Performance Specification for Rigid Printed Boards

Performance Specification for Rigid-Flex Multilayer Printed Boards


IPC-S-816

IPC-SA-61

IPC-SC-60

IPC-SM-780

IPC-SM-782A

IPC-SM-784

IPC-SM-785

IPC-SM-786A

IPC-SM-817

IPC-SM-839

IPC-SM-840C

IPC-T-50F

IPC-TM-650

IPC-TR-460A

IPC-TR-462

IPC-TR-464

IPC-TR-551

IPC-TR-580

MIL-P-50884

MIL-P-55110

Troubleshooting for Surface Mount Soldering

Post Solder Semiaqueous Cleaning Handbook

Post Solder Solvent Cleaning Handbook

Electronic Component Packaging and Interconnection with Emphasis on Surface Mounting

Surface Mount Land Patterns (Configuration and Design Rules)

Guidelines for Direct Chip Attachment

Guidelines for Accelerated Surface Mount Attachment Reliability Testing

Recommended Procedure for Handling of Moisture Sensitive Plastic IC Packages

General Requirements for SMT Adhesives

Pre and Post Solder Mask Application Clearing Guidelines

Qualification and Performance of Permanent Polymer Coating (Solder Mask) for Printed Boards

Terms and Definitions for Interconnecting and Packaging Electronic Circuits

Test Methods Manual

Trouble Shooting Checklist for Wave Soldering Printed Wiring Boards

Solderability Evaluation of Printed Boards with Protective Coatings over Long-term Storage

Accelerated Aging for Solderability Evaluations

Quality Assessment of Printed Boards Used for Mounting and Interconnecting Electronic Components Reliability

Cleaning and Cleanliness Test Program Phase 1 Test Results

Military Specification Printed Wiring, Flexible, and Rigid Flex

Military Specification Printed Wiring Boards, General Specification for

MIL-P-RRRRR

MIL-STD-1165

MIL-STD-2118

MIL-STD-81OE

MIL-STD-883

SMC-TR-OOI

MIL-HDBK-217F

MIL-HDBK-263A

MIL-HDBK-344

MIL-HDBK-729

MIL-HDBK-883D

Appendix C / 345

Printed Circuit BoardlPrinted Wiring Board Manufacturing, General Specification for

Glossary of Environmental Terms

Design Standard for Flexible Printed Wiring

Environmental Test Methods and Engineering Guidelines

Methods and Procedures for Microelectronics

An Introduction to Tape Automated Bonding and Fine Pitch Technology

Reliability Prediction of Electronic Equipment

ESD Control Handbook for Protection of Electrical and Electronics Part, Assemblies and Equipment

Environmental Stress Screening of Electronic Equipment

Corrosion and Corrosion Prevention of Metals

Test Methods and Procedures for Microelectronics

The organizations responsible for the referenced standards and specifications are listed below:

ANSI EIA IEC IPC

ISO JSTD JEDEC

MIL

American National Standards Institute Electronic Industries Association International Electrotechnical Commission Institute for Interconnecting and Packaging Electronic Circuits International Standards Organization Joint Industry Standards Joint Electron Devices Engineering Council of the EIA Military, Department of Defense (DoD)

Getting the Standards and Specifications

To obtain a copy of the above standards or specifications, contact the responsible organization at the address provided below.


Following are addresses for the IPC, EIA, and other organizations:

INSTITUTE FOR INTERCONNECTING AND PACKAGING ELECTRONIC CIRCUITS (IPC) 2215 Sanders Road, Ste. 250 Northbrook, IL 60062-6135 Phone: 708-509-9700 Fax: 708-509-9798 Web Site: http://www.ipc.org/

ELECTRONIC INDUSTRIES ASSOCIATION (EIA) 2001 Pennsylvania Avenue, NW Washington, DC 20006-1813 Phone: 703-907-7500 Fax: 703-907-7501 Web Site: http://www.eia.org/

EIA Standards can be ordered from:

GLOBAL ENGINEERING DOCUMENTS 2805 McGaw Avenue Irvine, CA 92713 Phone: 1-800-854-7179 Fax: 314-726-6418

Military documents are available from:

STANDARDIZATION DOCUMENTS ORDER DESK Building 4D, Customer Service 700 Robbins Avenue Philadelphia, PA 19111-5094 Tel.: 215-697-2667 Fax: 215-697-1462 Web Site: httpllwww.dtic.dla.miVdps-philal

Central Office of the IEC:

INTERNATIONAL ELECTROTECHNICAL COMMISSION (1EC) 3 Rue de Varembe 1211 Geneva 20, Switzerland Web Site: http://www.iec.ch/

Appendix C / 347

For IEC documents contact:

AMERICAN NATIONAL STANDARDS INSTITUTE (ANSI) 11 West 42nd Street New York, NY 10036 Tel: 212-642-4900 Web Site: http://www.ansi.org/

Appendix D: Selected Glossary of Terms Used in Electronic Packaging

Several unique tenns in describing the physicochemical, mechanical, and electrical phenomena associated with failure modes and mechanisms in electronic packages are discussed in the book. A quick ready reference guide in the fonn of a glossary is considered useful. The reader is referred to the references given at the end for more exhaustive lists. The definitions provided in this list are intended to enable the reader to refer to the text for a more detailed description of the tenns, as well as their role in electronic packaging.

A

Accelerated Stress Test A test that is conducted at higher stress conditions and for shorter durations than what the product experiences in the field so that its field perfonnance can be evaluated.

Anisotropic Conductive Adhesive A conductive adhesive that when used as an interconnection medium exhibits conductivity, after curing, only along the axis of interconnection and remains nonconductive in all other directions. It is also called Z-axis conductive adhesive, and uniaxial conductive adhesive.

Artwork A detailed layup of the circuit design that is used to prepare the master for the fabrication of the printed circuit board.

Auger Electron Spectroscopy A surface analytical technique to identify elemental composition at nanogram levels; a powerful tool for contamination and failure analysis.

Automated Optical Inspection (AOI) Systems for inspecting the card assemblies, which converts optical imaging to electrical signals in order to control and address areas of concern.

Automatic Test Equipment Programmable systems used for testing and analyzing printed circuit cards and assemblies for defects such as opens, shorts, etc.

348

Appendix D / 349

B

Base Metal Metal from which the connector or contact is made and usually is coated with one or more metal platings for corrosion protection. Also called basis metal.

Bed-of-Nails A device or fixture to perform in-circuit test. The fixture generally has spring loaded contact pins that contact on the board. Each fixture can test only one particular card design or circuit pattern.

Block Connector housing.

Blow-hole A void or cavity in a solder joint due to outgassing.

Body Main portion of a connector, comprising the shell and insert, to which other components are attached.

Bow Distortion of the printed circuit board from planarity, resulting in a curved surface.

Burn-In A test where the components are devices subjected to tests at elevated temperatures to detect and eliminate components of marginal performance quality.

Butt Connector A connector in which two conductors come together, end to end, but do not overlap with their axes in line.

C

Cantilevered Contact A spring contact in which the contact force is provided by one or more cantilevered springs. It permits more uniform contact pressure and is used almost exclusively in PC board connections.

Card Edge Connector A connector that mates with printed wiring leads running to the edge of a PC board. Also known as Edge Board Connector.

Chip-on-Board A method of attaching the silicon device directly on the carrier surface.

Coefficient of Thermal Expansion (CTE) Change of length in a material per unit original length per degree rise in temperature.

Cold Weld A weld achieved by pressure only, i.e., without electrical current or elevated temperature.

Compression Connector Connector crimped by an externally applied force; the conductor is also crimped by such force inside the tube such as the connector body. Compression connectors are in very intimate contact with the two ends of the conductors being crimped.

Computer Aided Design (CAD) A software methodology to accomplish the physical layout of a printed wiring board with component footprints, vias, and circuit lines in the different layers.


Connector Discontinuity An ohmic change in contact resistance that interferes with current flow in the circuit.

Constriction Resistance The portion of the contact resistance that is due to the contact interface.

Contact Chatter Connector discontinuities due to contact resistance changes.

Contact Fingers Common term used to describe etched contacts on PCB that mate with an edge connector.

Contact Length Length of travel during engagement or disengagement of two contacts. Also called "wipe length," "contact mating length," or "contact wipe."

Contact Pressure The force exerted by two mating surfaces against each other and is affected by normal force, contact geometry and the modulus of elasticity of the contact material.

Cool Down The period after the maximum reflow temperature that facilitates rapid solidification of the molten solder to give optimum solder microstructure.

Coplanarity The deviation of the component lead feet from the seating plane on the printed wiring board, or alternatively the spread in the distance between the highest and lowest contact points of package leads on the board.

Crossed Wire The measurement method where all resistance is eliminated except the true contact resistance.

D

Dead Face The method(s) used to protect contacts when not in use.

Dead Front The mating surface of a connector designed to protect the contacts by recessing them below the connector insulator body to prevent accidental shortcircuiting of the contacts.

Differential Scanning Calorimetry An analytical technique to determine the physicochemical changes in materials through the measurement of heat changes; these include determination of heat capacities, phase changes, melting and glass transition temperatures, etc.

Direct Chip Attach See Flip Chip Attach.

Dross The insoluble oxides of metals that are left floating on the molten solder in a solder pot or on a wave solder machine.

Dry Circuit A circuit where current and voltage are so low that there is no arcing during contact mating. A dry circuit can develop an insulating film that may prevent circuit continuity.

E

Edge Connector A one-piece receptacle with female contacts that receives the edge of the PCB on which the male contacts are printed.

Appendix D / 351

Electromigration The electrolytic transport of a metal from one conductive element to the other across an insulating surface under the influence of applied DC potential and in the presence of moisture.

Environmental Testing A methodology to determine the electrical and mechanical performance of the system under the influence of temperature, humidity, corrosive elements, and other external factors.

Etch Back The extent of side wall etching from the vertical of a circuit line.

Etch Factor The ratio of depth of etching to the side wall attack in the circuitization process.

Eyelet A repair procedure for lifted lands around bare holes for component insertion.

F

Failure Cessation of the ability of a component or system to perform the intended function according to the specification.

Failure Mechanism The detailed process at a molecular level that offers a physical explanation of the observed failure mode in the system.

Failure Mode The discernible feature of a failure in a system such as an open, short, or an intermittent change in a particular parameter of interest.

Fatigue Effect of a repetitive stress on a component or system.

Fatigue Test Test to evaluate components or assemblies for performance under repetitive external stresses such as thermal, shock, torque, and vibration conditions.

Fillet The concave segments of the solder joints between the footprint on the board and the component lead at the heel and toe of a surface mount joint.

Flat Cable Connector A connector designed to terminate flat cable. The conductors may be flat or round.

Flip Chip Attach (FCA) A method of attaching a silicon device to the carrier. The interconnection pads/bumps on the active side of the silicon device are brought into direct contact with the bumps/pads on the carrier and reflowed to effect the interconnection. The gap between the silicon and the substrate is filled with an encapsulant material for reliability and protection from the environment. Sometimes also called Direct Chip Attach (DCA).

Flux A material that either dissolves or displaces surface oxides from the interface of two joining metallurgies and facilitates the flow of the interconnecting alloy for the circuit card assembly. Alternatively called Blue Wire.

Fretting A condition when mated contacts move slightly due to vibration or CTE mismatch of materials and expose fresh metal to oxidation. Oxide buildup occurs, leading to loss of electrical discontinuity.


Functional Test An actual operational evaluation test to ensure that the product is performing according to its functional specifications.

G

Gas-Tightness The design characteristic of a contact system where the interface is impervious to corrosive gases or fumes.

Glass Transition Temperature See Tg•

Gull wing The shape of the lead form in one of the surface mount component types. The shape of the lead form is akin to a gull wing.

H

Hertz Stress The stress in psi that is developed during elastic deformation of mating.

Hipot Test to evaluate the effect of high voltages on the substrate or carrier materials for dielectric breakdown.

Hot Air Solder Leveling A surface finish consisting of a thin layer of eutectic solder applied to the printed circuit card to protect the copper surface from atmospheric degradation as well as ensure good solderability during the packageto-board interconnection.

Hysteresis An effect induced by the internal friction in a material similar to physical strain causing heating of material. The heating continues for some time even after the cessation of the causing force.

I

Insulation Resistance The value of the electrical resistance offered by the insulating layer between two conductors. If the conductors are in the same plane as the dielectric it is termed surface insulation resistance. If the dielectric layer separates conductors in parallel planes it is termed vertical insulation resistance.

Intermetallics These are phases consisting of two or more metals which may have unique stoichiometric composition with properties different than those of pure metals. These properties, i.e., melting point, density, ductility, brittleness, hardness, etc. have a profound influence on the behavior of the system.

Ion Chromatography A qualitative and quantitative method of identifying organic and inorganic species in a solution by an elution technique. The technique has the ability to detect ions at the parts per billion level.

Isotropic Conductive Adhesive An adhesive filled with conductive particles such as silver that exhibits electrical conductivity along the three coordinate axes.

Appendix D / 353

It is used as a die attach material in packaging. The percent loading of the filler is around 80%.

J

J-Lead A surface mounted component whose leads resemble the letter J with the end to be attached to the board folding under the component body.

K

Kirkendahl Effect Migration or diffusion of intermetallics along the interface of two dissimilar metallurgically bonded surfaces, creating voids in the process.

L

Laminate The organic material reinforced with such materials as glass fibers that is attached to the copper foil to create electrical circuits.

M

Mean Time Between Failures (MTBF) Average time between two consecutive failures of a device, package, assembly, or system under normal operating conditions. It is a measure of reliability.

Measling A noncatastrophic defect on the printed circuit board that is characterized by the presence of bubbles or spots representing a delamination of glass fibers from the epoxy.

Multichip Module (MCM) A functional island package to accomplish a number of functions by packaging several devices, both active and passive, into one single package onto a substrate.

N

Nail head A phenomenon where copper of the internal planes in a multilayer board is flared along the hole walls during the hole drilling process.

o Oil Canning The movement of an entry material in the vertical direction that occurs concurrent with the movement of the pressure foot. The bulging and blistering of the component footprint area during component rework operation that occurs due to excessive heat during rework, resembling an oil can.

Open A situation where a disjoint is caused between two connecting elements such as lead and pad, due to insufficient solder, noncoplanarity of leads, wicking


of solder away from the zone, or nonwettability of the joining elements. Alternatively, a break in the circuit line due to overetching of the metal.

Organic Solder Preservatives (OSP) Organic complexing agents such as benzotriazoles, polyalkylbenzimidazoles, etc. that form complexes with copper surfaces and protect the copper from atmospheric degradation and preserve the solderability of surface for package-to-board interconnection.

P

Passive Components Components that provide simple functions such as acting as a resistor element or capacitance in contrast to complex functions such as amplification, switching, rectification, etc.

Photoresist A photosensitive resist material that is applied to the laminate, exposed to short wavelength radiation and developed to create a specific circuit pattern.

Pink Ring A defect in the bonding of copper to the prepreg that manifests itself as pinkish ring around the through hole or a via. The oxide layer that is used to promote the bond between copper and the prepreg is attacked by subsequent acidic processes such as etch-back, copper plating etc., resulting in a visible gap that appears as a pink ring.

Pits Tiny surface imperfections on the copper surface of the card that do not penetrate all the way through.

Plated-Through-Hole (PTH) A drilled and plated hole in a printed wiring board to accomplish electrical interconnection to the circuit lines of the different layers of the board or to effect interconnection between a component and the board.

Plating Void The area devoid of plating in an otherwise continuous area of a plated surface. Generally produced due to contamination either on the surface or in a plated through hole.

Plowing Furrows generated along the hole walls during drilling operation of the printed circuit board.

Pot Life The maximum duration up to which a material maintains its application properties once it has been prepared for application. These properties may include rheology, consistency, surface tension, etc. The preparation of the material may consist of adding curing agents, catalysts, promoters, etc.

Pressure Connection A connection that uses a resilient member to provide a continuous pressure between two flat contacting members such as in elastomeric connectors.

Pressure Connector A connector system where connection is maintained by mechanical pressure such as in a twist-on connector.

Pro-Coat See Solder Mask.

Appendix D / 355

Profile A time vs. temperature graph of a solder reftow process.

Pull Test A test to determine the strength of an interconnection, generally a lead-to-pad joint.

Purple Plague A phenomenon observed in gold wire bonding, consisting of the formation of brittle gold-aluminum intermetallic compounds due to high temperature. The presence of silicon enhances the effect due to formation of ternary compounds. It is considered to induce time-dependent gold wire bond failures.

Q

Quad Flat Pack (QFP) A square surface mount component with gull wing shape leads emanating from all four sides.

R

Reftow A method or technique of effecting an interconnection between components and the printed wiring board, subsequent to placement of the parts in the corresponding locations.

Relative Humidity The ratio of the amount of moisture in a given amount of air to the amount of moisture required to saturate the same amount of air; it is expressed as a percentage.

Reliability Reliability is the quality of product through time. It is the ability of the system, product, or component to perform the required functions according to the specifications over the intended life of the product.

Resist A layer of material designed to protect the underlying layer from certain chemicals in a given process step in the fabrication of printed circuit board. The material is either organic or metallic in nature.

S

Scanning Electron Microscopy A qualitative as well as a quantitative analytical technique for obtaining extremely high magnification views of objects for contamination and failure analysis using an electron beam as the probe.

Smear Unwanted epoxy-glass debris left on the copper or adhering to the hole walls due to excessive heat during drilling.

Snap-otT Distance The distance between the bottom side of the stencil and the top side of the PCB when the squeegee is not touching the stencil.

Solder Balls Tiny spheres of solder that separate from the main solder bulk that constitutes the joint and lodged between leads and on the underside of the component during reftow operation. These are generally caused by excessive oxides in the solder paste that prevent coalescence of solder.


Solder Bridge The interconnection of two conductive elements separated by a dielectric due to the spreading of solder, causing an electrical short.

Solder Mask Over Bare Copper A method or technique to protect copper conductors with a mask exposing only the component footprints for interconnection purposes.

Solder Masks An organic polymer coating that is applied to protect the circuit line patterns from the environment, chemicals, and solder, leaving the component footprint patterns for interconnection with solder.

Solderability A measure of the ability of the pad or component lead to be wetted by the molten solder. It is generally measured in units of time to wet, or the area of spread on a surface.

Squeegee A straight edge metal or polymeric blade that is used to force the solder paste through the stencil opening or screen onto the footprint patterns on the board.

Stencil A metal mask with defined openings of component footprints used to deposit solder paste on the printed circuit card.

Strain Strain is the consequence of a stress. It is the deformation produced due to the application of stress. Strain is measured as the change per unit original value.

Stress Energy producing or tending to produce a deformation in a material; it could be thermal, mechanical, or electrical in nature.

Substrate Any insulating dielectric material onto which circuit lines are deposited, or components are attached.

Surface Mount Device A component or device that is attached to the printed wiring board or a substrate by placement onto the surface and refiowing, as opposed to insertion of the component into the board. It is also called surface mount component.

Surface Tension Property of the material which is a measure of spreading onto a surface.

T

Tape and Reel A format in which components are supplied for surface mount assembly. The components are packaged in the form of a continuous plastic tape on a spool. This type of packaging is amenable to automatic inspection and placement automation.

Tenting A method to cover vias and plated through holes and neighboring circuitry with a resist material.

Tg Glass transition temperature. Temperature at which amorphous materials soften before reaching the completely molten stage. Crystalline materials have sharp melting points, whereas amorphous materials have a range.

Appendix D / 357

Thermomechanical Analysis A technique is used to measure the physical changes and deformations in materials such as coefficients of thermal expansion.

Thermogravimetric Analysis An analytical technique to measure weight changes in substances brought about by the application of heat. An example is loss of water of crystallization, loss of absorbed moisture or solvents.

Thixotropy Property of the material in which the viscosity diminishes due to shear forces induced by motion.

Tombstoning A phenomenon in which a passive device such as a chip capacitor or resistor stands erect on one of the terminals during the reflow process. This may occur due to lack of wettability of the terminal metallurgy, pad metallurgy, placement errors etc.

U

Undercut Cross-sectional reduction of a circuit line feature due to the removal of material by the etchant from under the edge of the resist.

v Vapor Phase Reftow A reflow method in which the latent heat of vaporization of an inert fluid is used as the source of heat to reflow solder and effect interconnection of components to the printed circuit card.

Vias The vertical hole providing an electrical path connecting two or more layers of the printed circuit card. When the hole is all the way through the board it is called through via. A hole that does not pass all the way through the board is termed a blind via. A via that connects only the internal planes in a multilayer board is called a buried via.

Viscosity A measure of a material's resistance to motion or shape which is expressed in centipoises; a centipoise is one milliPascal.

Voids These are similar to blowholes and are voids inside a solder joint caused by the entrapped fluids and flux residues during the reflow process.

W

Warpage Irregular deviations from planarity in a printed wiring board (see bow).

Wave Soldering An interconnection technique for the insertion mount or pinin-hole assemblies. The printed wiring board with the components inserted in designated locations is brought into contact with flux applicators and onto a continually flowing fluid hump or wave of molten solder to effect interconnection.

Wetting Agent A material added to a liquid to enhance the spreading of the liquid by lowering the surface tension of the fluid.


Whiskers Hairlike growths emanating from some metal surfaces, notably from tin, silver, zinc, cadmium etc. These can be pure metals or metal sulfides. These grow as single crystals, and are believed to be due to internal stresses.

Wicking The movement of liquid solder up a lead or along a conductordielectric interface, or through a via hole, due to capillary action during a reflow operation.

Wiping Action The action that occurs when two contacts are mated with a sliding action. A good wipe removes the small amounts of particulate and film debris, allowing better conductivity between interfaces.

Wirebonding The device is mechanically attached to the substrate by a conductive epoxy and the electrical interconnection is made by aluminum or gold wire. The interconnection area is covered with suitable encapsulant for mechanical and environmental protection, or a method to directly attach a silicon device to a printed circuit card via wire bonding followed by epoxy encapsulation.

Y

Yellow Wire Copper wires with yellow plastic insulating sheath that are used to interconnect different points on a card. They are generally used as part of a repair process.

Z

Z-axis Conductive Adhesive An alternative interconnection material for joining two conductive elements such as lead and pad. The material is conductive only along the joining axis, which is designated as the z-axis. The material is nonconductive along the x and y directions, i.e., the surface. See also anisotropic conductive adhesive.

ZIF Connector Connectors where the mating parts are brought together with little or no force during the insertion step. The contact is made subsequent to insertion by an actuating mechanism or simply a connector when no force is used during insertion or withdrawal of contacts.

References

1. 1. H. Lau (Ed.), Ball Grid Array Technology, McGraw-Hill, New York, 1995.

2. C. F. Coombs Jr., Printed Circuits Handbook, McGraw-Hill Book, New York, 1988.

3. R. Tummala, E. Rymaszewski (Eds.), Microelectronic Packaging Handbook, Van Nostrand Reinhold, New York, 1988.

4. D. Seraphim, R. Lasky, C. Y. Li., Principles of Electronic Packaging, McGraw-Hill, New York, 1989.

Appendix E: List of Books on Electronic Packaging Technology

1. J. H. Lau, An Introduction to Chip on Board Technology, Van Nostrand Reinhold, New York, 1993.

2. J. H. Lau (Ed.), Ball Grid Array Technology, McGraw-Hill, New York, 1995.

3. 1. H. Lau (Ed.), Chip on Board Technologies for MultiChip Modules, Van Nostrand Reinhold, New York, 1994.

4. J. H. Lau (Ed.), Handbook of Fine Pitch Surface Mount Technology, Van Nostrand Reinhold, New York, 1994.

5. M. G. Pecht, Handbook of Microelectronic Package Design, Marcel Decker, New York, 1991.

6. C. A. Harper, Handbook of Microelectronics Packaging Design, McGraw-Hill, New York, 1991.

7. S. W. Hinch, Handbook of Surface Mount Technology, Longman, New York, 1988.

8. J. H. Lau (Ed.), Handbook of Tape Automated Bonding, Van Nostrand Reinhold, New York, 1992.

9. R. Tummala, E. Rymaszewski (Eds.), Microelectronic Packaging Handbook, 2nd edition, Chapman and Hall, New York, 1997.

10. J. H. Lau, Yi-H. Pao, Solder Joint Reliability of BGA, CSP, and Fine Pitch SMT Assemblies, McGraw-Hill, New York, 1997.

11. K. J. Wassink, Soldering Electronics, Electrochemical Publishing Co., Isle of Man, U.K. 1994.

12. MG. Pecht, L. T. Nguyen, E. B. Hakim, Plastic Encapsulated MicroelectronicsMaterials, Processes Quality, Reliability and Applications, John Wiley & Sons, New York,1995.

13. D. P. Seraphim, R. Lasky, and C.-Yu Li (Eds.), Principles of Electronic Packaging, McGraw-Hill, New York, 1989

14. C. F. Coombs, Jr. (Ed.), Printed Circuit Handbook, featuring Surface Mount Technology, 4th edition, McGraw-Hill, New York, 1994.

359

360 I Failure Modes and Mechanisms in Electronics Packages

15. C. Lea, Scientific Guide to Surface Mount Technology, Electrochemical Publications, Scotland, 1988.

16. C. Hutchins, SMT: How to Get Started, Hutchins and Associates, Raleigh, NC, 1990.

17. J. H. Lau (Ed.), Solder Joint Reliability, Theory and Applications, Van Nostrand Reinhold, New York, 1991.

18. J. Hwang, Solder Paste in Electronic Packaging, Van Nostrand Reinhold, New York, 1989.

19. H. H. Manko, Soldering Electronics, McGraw-Hill, New York, 1979.

20. H. H. Manko, Soldering Handbook for Printed Circuits and Surface Mount Technologies, Van Nostrand Reinhold, New York, 1986.

21. D. R. Frear, H. S. Morgan, S. N. Burchett, J. H. Lau, The Mechanics of Solder Alloy Interconnects, Van Nostrand Reinhold, New York.

22. J. H. Lau (Ed.), Thermal Stress and Strain in Electronic Packaging, Van Nostrand Reinhold, New York, 1994.

23. P. Lund, Quality Assessment of Printed Circuit Board, Bishop Graphics, Inc., Westlake Village, CA, 1985.

24. N. S. Einarson, Printed Circuit Technology, Printed Circuit Technology, Burlington, MA,1977.

About the Authors

Puligandla Viswanadham-member of the technology development team in the Circuit Card Assembly unit-Texas Instruments Inc., Lewisville TX. He is currently involved in the Ball Grid Array and other technology implementation projects. Prior to joining Texas Instruments he worked at the International Business Machines Corporation in Austin TX, Endicott NY, and Rochester MN facilities. He was involved in the process development and qualification of Surface Laminar Circuitry, Assembly and Reliability of fine-pitch quad flat-packs, Thin Small-Outline Packages, and Tape Automated Bonding.

While at IBM Austin he was also site analytical laboratories manager during 1989-1990. As a member of the Materials and Process Engineering group at IBM Rochester Viswanadham was involved in corrosion studies, analytical methods development, plating and contamination control. Prior to joining IBM his research activities included high temperature chemistry and thermodynamics of binary and ternary chalcogenides, atomic absorption, slag-seed equilibria in coal fired magnetohydrodynamics energy generation, and astrophysics.

He has authored or co-authored over 65 technical publications in journals, symposium proceedings, and trade magazines. He has authored or co-authored four book chapters in the areas of microelectronic packaging, tape automated bonding, fine pitch surface mount technology and ball grid array technology. He received the first and second IBM Invention Achievement awards, an IBM Excellence award, and fourth level Technical Author Recognition award. During 1974-78 he was on the faculty of Ohio Dominican College, Columbus, Ohio as Assistant Professor and taught physics and chemistry.

Puligandla Viswanadham has a Ph.D., degree in chemistry from University of Toledo, Ohio, and an M.Sc., degree in chemistry from Saugor University, Saugor, India. He co-authored three patents and 15 invention disclosures.

His current institutional affiliation is Raytheon TI Systems, Lewisville, Texas.

361


Pratap Singh, president RAMP Labs, Round Rock, Texas, is a consultant in the area of PCB assembly, packaging reliability and failure analysis.

Prior to this, he worked at IBM for 27 years in PCB manufacturing, SMT and PIH assembly processes, and electronics packaging reliability. Pratap has three patents, and was recipient of first and second level IBM Invention Awards.

He has published more than 30 technical disclosures, technical reports and papers. He is coauthor of Chapter 'Package-To-Board Interconnections' in Microelectronics Packaging Handbook, 2nd Edition, 1997.

He received his BS in mechanical engineering from University of Ujjain, India in 1962 and MS in industrial engineering from the University of Iowa in 1969 before joining IBM.

Index

A

Absorbance, 113 Absorption

atomic, 113 cleaning fluids, 24 of moisture, 179, 185, 194

Accelerated tests assumptions, 72, 79 conditions, 86-87 drop test, 88 dust test, 73, 89 environmental, 7 flowing gas test, 90 highly accelerated stress test (HAST), 83, 7 insulation resistance, 83 radiation, 73 salt fog test, 73, 88 strife testing, 80 temperature. humidity and bias test, 7, 73, 87 thermal cycling, 81 thermal shock, 82, 7 torque test, 73, 89 typical tests, table, 84-85 vibration, 88, 7

Acceleration, 301 and temperature, 302 and transforms, 301 at different activation energies, 303 due to voltage, 303

Acceleration factor, 301 Accept! Reject criteria

pth plating, 158, 160-163 Acoustic imaging, 101

C-Scanning acoustic microscopy (C-SAM), 103

imaging modes, 105 scanning laser acoustic microscopy (SLAM),

103 Activation energy models, 291 Adhesion, 245

pre-preg copper adhesion, 169 Adsorption, 222 Alignment

contact mating, 37 forces, 37, 56

Ammonia, 67, 91 Analytical and material characterization, 119 Analytical modeling, 6, 70, 72-75 Manhattan effect, 175 Anisotropic conductive compliant film

(ACCF),34 Arrhenius model, 286, 287 Auger electron spectroscopy (AES), 125, 7

B

Ball bonding, gold 2,6,21,37, 184, 189 ceramic, 21 failure modes, 186 moisture related cracking, 186 pitches, 21 plastic, BOA 21, 66, 183, 184 tape BOA, 183, 184

Bending, 57 Benzotriazole, 28 Beryllium-beryllium oxide, 256 Bismuth-tin solders

lead contamination in bismuth tin solders, 67, 215

brittle fracture under shock, 215 Black's model, 299

363

364/ Index

Blistering, 99, 141, 170 Blooming, 153 Blow hole, pth, 195 Box level package, 45 Brickwall, 54

c Cables, 30-31 Capacitors, 21, 256, 258

electrolytic, MLC, ceramic disc, 258 failure modes, 261 tantalum capacitors, 258

Chemical analysis 112 bulk analysis, 112 gravimetric analysis, 112 volumetric analysis, 112

Chip-on-board, 99 Chip cracking, 176 Chip level packaging, 15 Chip on board, 34,43 Chip scale package (CSP), 2, 6, 21 Chip scale packages (see also micro BGA) Chip skewing, 176 Chip-on-glass, 43 Chlorine, 67, 90-92 Chromatography, 123

high performance liquid chromatography, 123

ion chromatography, 123 Circuit line

damage, 142 pits, 58 trace, 26

Coefficient of thermal expansion (CTE) Coefficient of thermal expansion, 29

Coffin-Manson model, 71,286, 295 Components

clearance between component and PCB, 54

component spacing, 6 orientation, 54 spacing, 54 thermal margin, 64

Components and packages, 172-193 surface mount components, I, 173 insertion mount !PIH components, I, 173

Concurrent engineering, 311 and design for manufacturing, 53, 311 approach to product development, 313

Conductive adhesives, 24

Conductive anode filament caf, 8, 68 conducive conditions, 226

Connector failures, 236-253 bent pins and contacts, 238, 239 due to card warpage, 240 handling and shipping, 240 mechanical failures, 238 modes and mechanisms, table 237 tolerance acuumulation, 240

Connectors, 23, 30-31 and PCB assemblty, 34 characteristics of elastomeric, 44 classification table, 34-35 connector body, 236 connectors, cables and sockets, 31-45 corrosion, 244, 245 elastomeric connectors, 43 factors affecting failures, 237 failure mechanism, 41, 236-253 flat or ribbon connectors, 41 housing, functions, 237, 247 insertion stress, 36 MIE,43 MOE,43 optical connectors, 41-42 pin-in-hole connector, 35 plating wear, 245, 246 polarization, 37 surface mount connector, 34 temperature induced failure mechanism, 242 tolerance and interference, 242 wipe, 240 wiping action, 240

Contact arcing (see also hot plugging), 252 Contact arcing, 252 Contact metallurgy 36, 38 Contamination

conformal coating contamination 36 corrosion, contact 245 dust 36, 247 effect on surface insulation resistance, 83 electro migration flux contamination, 35 ionic contamination, 83 manufacturing contamination, 245 particulate, 143, 151

Controlled collapse chip connection (C4), 18 Coplanarity

leads, 29 surface finish, 29

Copper copper etch opens, 141, 146-148 copper etch shorts, 141, 145 copper grain structure, 158 copper plating defects folds, 158, 168 voids, 168-169

Copper-invar-copper, 256 Corrosion, 8, 220

bond pad corrosion, 187 conditions for, 221 electrode potentials, 220 environmental, 67 failures, 123 fretting, 249 fretting corrosion and variables, 249 galvanic corrosion, 220 indium solder, 215, 216

Corrosion and electromigration, 8, 218-236 conditions for measurement of propensity, 226 copper, 230 factors affecting, 219 failure analysis, 231 gold, 231 lead,230 prevention, 232 silver, 228 tin, 230

Cost of failures, 6, 45 Cracks

ball bond, 10 1 ball grid Array Joints, 211 chip, 176 chip capacitors, 324 dye penetrants, 109 gull-wing joints, 194 j-1eaded joints, 207 types, 179

Crazing, 139 Creep, 253, 254 Crystals, 256

D

Decapsulation, 100, 105 dry decapsulation or plasma decapsulation,

106 wet decapsulation, 106

Defect defect management, 324 elimination pcb defects, 170

Index / 365

encapsulation, 190 manufacturing defects summary table partially drilled holes, 151 prepreg, 139 signal/power plane defects solder mask defects, 170-172 summary of process defects affecting PTH

reliability, 153 through hole defects, 150

Delamination, 141, 167, 170, 183 inner plane, 157 package, 180

Dendrites, 223-224 Design

defects related to electrical design considerations, 61-65 for assembly, 311, 317-319 for manufacturability, 10, 311 for qualification, 311, 320 for reliability, 311, 322 for test, 10, 311, 320 land patterns, 315 pads, 316 poor design practices, 53-58 team structure, 313 under-design effects, 6, 57

Design characteristics, 12 Design for assembly

basic concepts, 317, 319 Design for manufacture

component orientation, 314 geometry, 314 shadowing, 316

Discretes, 21 Doub1e-in-1ine-memory-module, 32 Draw bridging, 56, 175 Drill smear, 167 Dye penetrants, 109

E

Electrical design capacitance-localized and distributed,

61-63 overshoot, 63 power and ground impedance, 61-63 PWB size, 63 signal integrity, 61, 63 signal return paths, 61-63 spice, 63 undershoot, 6, 63

366/ Index

Electromigration 8, 221 PTH to inner plane, 222 conditions for, 222 line to line, line to pad, pad to pad, 222 PTH to PTH, 222-223

Electron beam analysis, 7, 124-133 Electron spectroscopy for chemical analysis

(ESCA),125 Electrostatic discharge, 9, 262

and human activity, 265 draining, 267 failures and mechanism, voltage induced,

current induced, 262 field and discharge effects, 268 generation, 263 minimization, prevention methods, 266 neutralization, 266-267 shielding, 268 susceptibly of devices, table 266 triboelectric series, 264

Encapsulation, 192 Englemeir model, 297, 298 Environmental stress tests, 70, 71, 78 Environmental testing, 6 Environments

worst case emvironments table, 82 Epoxy

epoxy glass, FR-4, 37, 67 smear, 155

Eutectic solder, 24 Eyring humidity model, 290 Eyring model, 286, 287

F

Failure analysis, 7 detection, 6 distributions and applications, 286 electrical opens, 137 electrical intermittants, 138 electrical shorts, 137 gull wing, 193, 205, 208 j-Iead, 205, 207 mechanism, 3, 8 modes, 7, 137 popcorn effect, 66 printed circuit board, 138 radiation induced, 271 tsop, 208

wedge bond, 190 why failure occur, 51-69 wire bond, 188

Failure analysis, 7, 96-135 Failure models

analytical, 7 conductive anode filament model, 294 current model, 286 finite element, 7 humidity model, 289, 290 Introduction and criteria, 284 power models, 286 statistical, 7, 284 survey of models, 285-307 temperature cycling, 286, 289 voltage and field effect, 286, 288

Failure modes and mechanisms, 136-282 Fatigue, 9, 191

solder fatigue and creep, 51, 191, 253, 295 test

Finite element modeling stress analysism, 72

First level packaging, 13, 15 Flat cable connector, 41 Flexible circuits

flexible circuits, 6, 24, 29 Flip chip attach 16, 255 Flip chip packaging, 6, 18-20 Flux, 35

contamination, 35 residue, 51

Fowler-Nordheim model, 299 FR-4 laminates, 37 Fretting, 251

mechanism, 251 Frictional polymerization, 252

G

Gold

H

as a solderable surface, 203 Intermetallics, 206, 209

Halleck model, 286 Haloing, 139 Handling defects, 142, 152, 170 Hole fill, 196 Hot air solder leveling (HASL), 28-29, 205 Hot plugging, 237, 252

Hughes model, 286, 296 Hydrogen sulfide, 67, 91

I Imaging techniques capability, 107 Indium solders, 215

corrosion, 215-216 Inductors, 256, 260 Inner plane delamination, 157 Insertion mount technology (see also plated-

through-holes) Insertion mount technology (IMT), I, IS Insulation resistance, 227 Interconnection failures

bond-pad corrosion, 187 wire bond fails, 188, 190, 193

Intermetallics, 201-206 copper-tin, 203 tin-gold, 204, 209 tin-nickel, 204 efect on joint strength, 205 effect on solderability, 205 formation, 203

Ion chromatography, 123

K Kato-Niwa model, 300

Kidson model, 300 Kirkendahl effect, 188

L

Laminate adhesion, 153 Laser induced ionization mass spectrometry

(LIMS),132 Lawson model, 290 Layered elastomeric connector, 44 Lead chloride, 231 Lead free solders, 213-218

indium solder, 215 tin-bismuth solder, 214

Lead related fails, 191-193 Leadless ceramic chip carriers (LCCC), 2 Localized joule heating, 101

M Manufacturing defects, 58-60

circuit line pits, 58 contamination, 59, 60

mouse bite, 58 pin holes, 59 summary table, 60 warpage, 59

Material characteristics, 65-68 CTE,65 reliability, 66

Index / 367

Material related defects, 139 Materials and package reliability, 30 Maximum stress, 53 Mean strength, 52 Measling Measling, 139 Mechanical damage, 149, 152, 323 Mechanical deflection system (MDS), 304 Melting point Melting point, 68 Melting point heirarchy, 68 Memis model, 286, 294 Mercaptans, 91 Metal migration, 68 Metal-in-elastomer (MIE) or metal on elasto-

mer (MOE), 34, 43 Metallurgical analysis, 110 Metallurgical examination, III Micro-ball grid array packages, 2, 21 Moire intereferometry, 107 Moisture absorption, 66, 191 Moisture baking, 183 Molded circuits Molded circuits, 6, 30 Molybdenum-graphite-molybdenum, 256 Mother board, 13 Mouse bites, 58 Multichip module (MCM), 32-33

N

Nail heading, 156, 157 Nickel, 29 Nitrogen dioxide, 67, 91 Nonsemiconductor components, 9

o Optical

connector, 42 inspection, 99

Organic solder preservative, 28, 29 benzotrizole, 28, 202 polyalkyl-benzimidizole, 28, 202

368 I Index

Oscillators, 260 Overshoot, 6

p

Package failures, 3, 6, 178 delamination, 179, 183 popcorning, 179

Package function, 13 Packaging

failures, 178 first level, 13 heirarchy, 5 levels,S nomenclature,S, 13 second level, 13, 23-24 third level, 13

Palladium, 28 organic polymerization, 252

Passive components (see also discretes) Peck -Zierdt model, 286, 291 Physics of failure methodology, 284 Physics of failure (POF), 9, 284 Pink ring, 164 Pits and scratches, 145 Plasma etch parameters, 108 Plastic leaded chip carriers (PLCC), 2 Plated through holes

burrs, 161, 181 copper grain structure, 158 defects, 8, 25 nodules, 160--161 process defects, 153 reliability, 153 solder joint, voids 195 solderability, 159, 164

Plating adhesion, 25 brittle copper, 158 contamination, 158 copper nodules, 158 etch opens, 141, 146-148 etch shorts, 141, 144 gold, 36 nickel,36 surface defects, 141, 145 voids, 25 wear, 245, 246

Popcorn effect 66, 179, 190 Printed wiring board (PWB) or Printed circuit

board (PCB), 3 assembly, 21

materials, 28 reliability, 30

PWB processes, 26 additive and subtractive etch processes, 27

Q Quad flat pak, 2

R Radiation damage, 9, 270--272

electron flux, 9, 271 gamma-ray, 9, 271 neutron flux, 9, 272 x-ray, 9, 271

Reduced conductor spacing, 145 Reduced sulfur, 91 Reliability, 3,12 Resistors, 256, 257

failure modes, 259 Ribbon bond, 16 Ringing, 6, 63-64

s Sbar-Kozakiewicz model, 286 Scanning electron microscopy (SEM), 8, 127,

128 Second level packaging, 23-24 Seconday ion maspectrometry (SIMS), 127 Sim-Lawson model, 286 Simulation, 6, 75-78

electrical simulation, 7, 75 mechanical simulation, 7, 78 simulation parameters, 76 statistical, 71 tools, 77 values for key parameters, 76-77

Single-in-line-memory-module (SIMM), 32 SMT components, 16 (see SMT pacakges) Sockets, 31-37

device walk out, 251 production versus test sockets, 40 pros and cons table, 40 selection, 38 sockets or solder attachment, 39

Solder ball, 8, 210 factors affecting solder ball formation, 213 formation, 210 test, 213 and surface mount reflow, 210 and wave soldering, 210

Solder fatigue, 9, 253 (see also creep) Solder joints

ball grid array, 201, 202, 211 gullwing 200, 192-194 j-Iead, 207

Solder mask, 28 Solder webbing, 213 Solderability

hasl,28 metal finishes, 28 osp, 28

Spectroscopy atomic absorption, 113 atomic emission, 113 infrared, 114 scanning electron microscope, 128 scanning electron microscopy (SEM), 8, 127 secondary ion mass, 127 seconday ion maspectrometry (SIMS), 127 uv-visible spectroscopy, 113 x-ray photoelectron spectroscopy (XPS), 125

SPICE 63, Stand-off, 2, 6 Statistical models, 9, 283

application, 286 Statistical simulation, 70-71

monte-carlo simulation, 71 Steinberg model, 286, 297 Stonehenge effect, 175 Stress

concentration, 55 depaneling, 323 insertion, 36 relief, 55 solder joint, 323 stress versus strength relation 6, 52-53

Stress analysis 75 Strief test, 80 Strohle model, 293, 286 Sulfur dioxide 67, 91 Surface mount assembly, 212 Surface mount technology (SMT), 2, 8, 15 Surface tension

T

Tape automated bonding (TAB), 2, 6, 16, 20 Technology comparison

comparison of SMT and PTH table, 17 Test method innovations, 93 Thermal imaging (see infra-red microscopy),

100

Thermal ratcheting

ball grid array joints, 211 plated through hole, 211

Thermoanalytical methods, 115

Index / 369

differential scanning calorimetry (DSC), 115, 117

thermogravimetric analysis (tga), 115, 122 thermomechanical analyzer (TMA), 115,

117 Third level packaging, 14 Tin commandments, 250 Tin whiskers, 8, 67, 233

factors affecting, table, 235 growth mechanism, 8, 234 prevention, 8, 234

Tolerance, 74 accumulation, 57

Tolerance analysis Monte-Carlo methods, 74 statistical tolerances, 74

Tombstoning, 15, 56, 175

u

factors that cause force imbalance, 178 failures modeling, 176

Undershoot, 6, 63-64

v Vias, 24

blind, 25 buried, 25 copper corrosion, 198 pads, 55 plated through, 25

Vibration, 88 acceleration, 304

Visual inspection, 7, 97 bond failures, bum outs, deformation, discoloration and residues, 99 cracks, fishers and delamination, 97

Voids contaminants, 138 enapsulation, 190, 196, 199-200 in ball grid array joints, 200, 201 in PIH joints, 195 in SMT joints, 193, 196, 199 laminate, 165-166 overetching, 138 solder joint, 59, 193, 194

370/ Index

w

Warpage, 59 Wave soldering, 15 Wedge bonding, 189 Weick model, 286, 292 Wheelies, 175 Whiskers, 7, 67, 233, 244 Wire bond, 16, 189

wire sweep, 190 wire wash, 190

x X -ray inspection, 99, 100 X-ray photoelectron spectroscopy (XPS),

125

z ZIF

connector, 35 insertion force, 67

appendix a: table of acronyms - link.springer.com978-1-4615-6029-6/1.pdf · aoi automatic optical...

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