data acquisition issues at the international linear collider front end readout issues ● large...

Data Acquisition Issues at theData Acquisition Issues at the IInternational nternational LLinear inear CColliderollider

Front End Readout Issues

● Large channel counts require low power consumptionpower cycling ?

● 1 ms active pipeline for up to 5000 bxlocal buffering digital or analog

● hit finding, zero suppression on detector itselfACICs on the detector VFE

● high multiplexing to reduce signal cables (material)

Gas Amplification R&DGas Electron Multiplier (GEM) Micro Mesh (MICROMEGAS)

TPC R&D Efforts● ~200 3-dim tracking points● Low material budget● Particle ID via dE/dx● Track reconstruction at large radii● avoid Ion feedback without gating● occupancy may be an issue

(Aachen, LBNL, Carleton, Montreal, Victoria, DESY, Hamburg, Karlsruhe, Cracow, MIT, MPI Munich, NIKHEF, Novosibirsk, Orsay, Saclay, Rostock)

ECAL SiW sampling calorimeter Segmentation: 1cm x 1 cm, 40 layers, 24X

0

ΔE/E =0.11/√E(GeV) + 0.01 ~30Milllion channels

HCAL● Option I: Stainless steel and scintillator tiles with advanced photo detectors● Option II: Stainless steel and digital readout

(RPCs, wire chambers, GEMs)

Calorimeter R&D Examples

G. Eckerlin (DESY), P. le Du (DAPNIA CEA Saclay), U. Mallik (University of Iowa) and H. Matsunaga (University of Tsukuba) for the DAQ working group of the Worldwide Study of the Physics and Detectors for Future Linear e+e- Colliders

The world HEP community has reached consensus that an e+e- Linear Collider with an energy reach of 500GeV to 1TeV should be the next machine to be built and operated before the end of the LHC area. A global R&D and design effort has started aiming for a design report in 2006 of this machine called International Linear Collider. Three detector design studies have so far been launched to elaborate the possible phase space of the detectors to be built. The detector designs are driven by the operational parameters and the physics potentials of this high luminosity machine. The bunched operation of the ILC with a roughly 1ms long pulse train at a rate of 3-5 Hz leading to more than 100ms between trains and very little time between bunches in the train lead to the proposal of a completely trigger less data acquisition system. This 'software trigger' architecture and its consequences to the detector design, the front end electronics and the data acquisition system are presented. Some examples on detector R&D are shown.

Today’s ILC Data Collection Network

Run Control

MonitoringHistograms

Event Display

DCS

Databases

...

AnalysisFarm

Mass storage Data logging

ConfigManager

Local/worldwide

Remote(GDN)

Synchronisation

NO On line – Off line boundary

Local/Global Network(s)Wordlwide!

Machine BxBT feedback

Local partition

Data collectionSw triggers

Sub DetectorRead-Out

Node (COTS boards)

FPGA

receiver Buffer

FPGA

receiver Buffer

FPGA

receiver Buffer

Proc

receiver Buffer

Data link(s) Services

Networking Hub

On detector Front EndOn detector Front End

FPGA

Possible Common RO Architecture

Preamp.ShaperDigitizer

VTXCCDMAPSDEPFET…..

TRKSiTPC

ECALSiWOther

HCALDigitalAnalog

MuonRPCScint

VFD & Lumi…..

Detectors technology

FPGA

ReceiverSignal Processing

Buffer

localdata collection

node

Standard links & protocolUSB,Firewire …..

LaptopPC Board

Intelligent mezzaninePC…

NETWORK

Ethernet

Services SynchroCalibrationMonitoring

? Integration

to be studied!

on detectorvery FE

LOCAL

BUFFER

common/uniformInterface

DAQ Architecture (TDR 2003)

VTX SIT FDT ECALFCHTPC HCAL MUON LCALLAT

799 M 1.5 M40 M300 K 40 K75 K200 K32 M20 K 20 K

20 MB 1 MB 3 MB90 MB110 MB2 MB 1 MB1 MB 1 MB 1 MB

P PPPP PPPP PPPPP P P

Computing ressources (Storage & analysis farm)

Event buildingNetwork

10 Gbit/sec

Processor farm (one bunch train per processor)

Event manager & Control

Detector Buffering (per bunch train in Mbytes/sec)

Detector Channels

(LHC CMS 500 Gb/s)

30 Mbytes/sec 300TBytes/year

Links

Select Bunch Of Interest

Evolution of DAQ Parameters

SociologySociologyExp.Exp.

UA’sUA’s

LEPLEP

3 µsec3 µsec

10-20 µsec

10-20 µsec

--

250 - 500K250 - 500K

--

--

--

10 Mbit/sec

10 Mbit/sec

5-10 MIPS5-10 MIPS

100 MIPS100 MIPS

150-200150-200

300-500300-500

Collision rate

Channel count

L1Arate

Event building

Processing.Power

1980

1989

Year

LHCLHC

ILCILC

25 ns25 ns

330 ns330 ns

200 M*200 M*

900 M*900 M*

100 KHz100 KHz

3 KHz3 KHz

20-500 Gbit/s

20-500 Gbit/s

10 Gbit/s10 Gbit/s

>106 MIPS>106 MIPS

~105 MIPS~105 MIPS

2007

2015 ?

BaBarBaBar

Tevatron

4 ns4 ns

396 ns

150K150K

~ 800 K

2 KHz2 KHz

10 - 50 KHz

400 Mbit/s400 Mbit/s

4-10 Gbit/sec

1000 MIPS1000 MIPS

5.104 MIPS

400400

500500

1999

2002

20002000

> 2000 ?> 2000 ?

* including pixelsSub-Detector

Pixel

Microstrips

Fine grain trackers

Calorimeters

Muon

LHC

150 M

~ 10 M

~ 400 K

200 K

~1 M

ILC

800 M

~30 M

1,5 M

30 M

The vertex detector design :

● 5 layer pixel detector● Inner Radius: 15mm● Pixel: 20 x 20 μm2

● 800 mio channels● High occupancy for Layer 1 needs fast readout

Vertex Detector R&D Examples

Monolithic Active Pixel Sensors

Depleted Field Effect Transistor

CCD

(IReS, LEPSI, RAL, Liverpool, Glasgow, Geneva, NIKHEF)

(Bonn, MPI HLL Munich)

(LCFI Collaboration: Bristol, Glasgow, Lancaster, Liverpool, Oxford, RAL) p+

p+ n+

n

n+

tota lly dep letedn --substrate

internal gate

rear contact

source top gate drain bulk potentia l via ax istop-gate / rear contact

V

potentia l m in im umfor electrons

p-channel

p+

Some sensor R&D examples

Moderate physics rates

e+e- WW → 930 / houre+e- tt → 70 / houre+e- HX → 17 / hour

top pair productionseen by the LDC detector

cms energy 500 800 GeVrepetitionrate 5 4 Hzbunches/pulse 2820 4886pulse length 950 860 μsbunch spacing 337 176 nsluminosity 3.4x1034 5.8x1034 cm-2s-1

(Parameters are under reconsideration. Values from TESLA TDR are shown)

/ /199 ms

1ms

2820 bunches 5 Hz

ILC Operation

→ up to 20kHz bunch crossing rate

Detector Concept Studies

• TPC• High granularity calo• High precision microvertex • 4Tesla

LDCGLDSiD

• Si Strips • SiW EM• 5 Tesla

• Large gaseous Tracker (JET or TPC)

• W/Scint EM cal• 3 Tesla

Main Tracker EM Calorimeter Had Calorimeter Cryostat/Coil Iron Yoke

for further information see:

● Worldwide Study of the Physics and Detectorshttp://physics.uoregon.edu/~lc/wwstudy

● SiD http://www-sid.slac.stanford.edu http://sid.fnal.gov● LDC http://www.ilcldc.org● GLD http://ilcphys.kek.jpReadout ASIC on wafer 1-2k channels

A Combined ECAL/HCAL prototype is under construction and will be used in test beams.(CALICE Collaboration: 26 Institutes from 9 countries)

VME/…

HCAL

Movable table

ECALBeam

monitoring

BEAM

VME/…

HCAL

Movable table

ECALBeam

monitoring

BEAM

ASICmulti channel (18)preampshapingmultiplexinglow noiselow power (5mW/ch)

next steps :power cyclingADC integrateddyn. Range >104

Event size comparable to ATLAS/CMS

105

104

103

102

LHCb

KLOE

HERA-B

CDF/DO II

CDF

H1ZEUS

UA1

LEP

NA49ALICE

Event Size (bytes)

104 105 106

ATLASCMS

106

107

BtevKtev

ILC

Event Rate