adaptive digital slope compensation-v2 handout - ibm · 1 adaptive digital slope compensation for...
TRANSCRIPT
1
Adaptive Digital Slope Compensation for Peak Current Mode Control
Peter Ide, Frank Schafmeister, Tobias Grote
IBM Power and Cooling Technology Symposium
2
Digital Control at DES CD-BU
2005 2006 2007 2008 2009 2010
HCS08
Per
form
ance
Year
Freescale
Texas Instruments
F2806
F2808
Fu
ll D
igit
alS
emi-
Dig
ital
32-bit
100 MHz
100-LQFP
32-bit
60 MHz
64-TQFP
16-bit
16 MIPS
28-QFN
44-TQFP
8-bit
8 MHz
32-LQFP
32-bit
100 MHz
100-LQFP
8-bit
16 MHz
32-LQFP
44-TQFP
8-bit
16 MHz
8-SOIC
20-QFN
700 kHz
24-QSOP
Co
st, S
ize
Co
mm
./L
og
ic
MicrochipdsPIC33F
Analog
Devices
ATmega
ATtiny
ADP1043
16-bit
40 MHz
28-SOIC
44-TQFP
Atmel
PIC24F
Piccolo
F28027
Piccolo
F2803x
32-bit
60 MHz
CLA, CAN
64-TQFP
New Concepts Focus
Full Digital Control
Development ongoing
3
Digital Control at DES CD-BU
2005 2006 2007 2008 2009 2010
HCS08
Per
form
ance
Year
Freescale
Texas Instruments
F2806
F2808
Fu
ll D
igit
alS
emi-
Dig
ital
32-bit
100 MHz
100-LQFP
32-bit
60 MHz
64-TQFP
16-bit
16 MIPS
28-QFN
44-TQFP
8-bit
8 MHz
32-LQFP
32-bit
100 MHz
100-LQFP
8-bit
16 MHz
32-LQFP
44-TQFP
8-bit
16 MHz
8-SOIC
20-QFN
700 kHz
24-QSOP
Co
st, S
ize
Co
mm
./L
og
ic
MicrochipdsPIC33F
Analog
Devices
ATmega
ATtiny
ADP1043
16-bit
40 MHz
28-SOIC
44-TQFP
Atmel
PIC24F
Piccolo
F28027
Piccolo
F2803x
32-bit
60 MHz
CLA, CAN
64-TQFP
New Concepts Focus
Full Digital Control(DC/DC)
GUI-Configurable Full Digital Controller
4
Digital Control at DES CD-BU
Processors withOn-Chip Comparators
2005 2006 2007 2008 2009 2010
HCS08
Per
form
ance
Year
Freescale
Texas Instruments
F2806
F2808
Fu
ll D
igit
alS
emi-
Dig
ital
32-bit
100 MHz
100-LQFP
32-bit
60 MHz
64-TQFP
16-bit
16 MIPS
28-QFN
44-TQFP
8-bit
8 MHz
32-LQFP
32-bit
100 MHz
100-LQFP
8-bit
16 MHz
32-LQFP
44-TQFP
8-bit
16 MHz
8-SOIC
20-QFN
700 kHz
24-QSOP
Co
st, S
ize
Co
mm
./L
og
ic
MicrochipdsPIC33F
Analog
Devices
ATmega
ATtiny
ADP1043
16-bit
40 MHz
28-SOIC
44-TQFP
Atmel
PIC24F
Piccolo
F28027
Piccolo
F2803x
32-bit
60 MHz
CLA, CAN
64-TQFP
Processors withOn-Chip Comparators
Semi Digital Control(PFC)
Digital Peak Current Control
���� Today’s Topic
5
Overview
• Motivation
• Review of Peak Current Control with Slope Compensation
• Digital Slope Compensation
• Simulation Results
• Practical Implementation & Measurement Results
• Conclusion
6
Motivation
Advantages of
Peak Current Control & Digital Control
� high control dynamics
� inherent cycle by cycle currentlimiting
� good current balancing of parallel converters
� flexibility and programmability
� feasible for adaptive and nonlinear control algorithms
� decreased number of componentsand PCB space
Idea: Combine these two control techniques
���� Realizable with µController containing on-chip comparators
Challenge: Peak current control needs slope compensationto avoid subharmonic oscillation at D > 0.5
7
Overview
• Motivation
• Review of Peak Current Control with Slope Compensation
• Digital Slope Compensation
• Simulation Results
• Practical Implementation & Measurement Results
• Conclusion
8
t
i
m1
iL
iL_min
i*
DTs
Ts
-m2
(1-D)Ts
Peak Current Mode Control
Boost converter example
clock
R
SQ
EA
Vref
voutvin
iL comparator
L
C
D
i*
D
D
m
m
−=
11
2
(steady state)
9
Peak Current Mode Control
Disturbed inductor current (without slope compensation)
0
1
2i
m
mi
n
n ∆⋅
−=∆Disturbance after n cycles:
t
i
m1
steady statei*
-m2
i0
i1
i2
disturbed
( )5.021 <> DmmCondition for stable operation:
10
Peak Current Mode Control
Disturbed inductor current (with slope compensation)
0
1
2i
mm
mmi
n
sc
sc
n ∆⋅
+
−−=∆
Disturbance after n cycles: Required compensation:
( )122
1mmmsc −>
����
t
i
steady state
i*
i0
i1
i2
disturbed
m1 -m2
-msccompensation ramp
11
Overview
• Motivation
• Review of Peak Current Control with Slope Compensation
• Digital Slope Compensation
• Simulation Results
• Practical Implementation & Measurement Results
• Conclusion
12
Digital Slope Compensation
t
i
m1
iL_min
icmp
i*-msc
in in+1
-m2
comparator threshold
DTs
Idea: Use iL_min and i* to compute the comparatorthreshold level including slope compensation
sncmp DTmii ⋅+= 1
ssccmp DTmii ⋅−=*
sc
n
sccmpmm
iimii
+
−−=
1
*
*
13
LV
LV
m
mk scsc
sc⋅
⋅==
11
Digital Slope Compensation
Usage of a compensation factor:
1m
mk
sc
sc =
( )nsc
sc
cmp ikik
i ++
=*
1
1Threshold level:
What is the proper value for ksc?
Buck-Boost
Boost
Buck
optimum ksc(for dead beat)
minimal required ksc(for stable operation)
outin
inout
VV
VV
−
− 5.0
in
inout
V
VV −5.0
( )
in
inout
V
VV −5.0
outin
out
VV
V
−
in
inout
V
VV −
in
out
V
V
���� No knowledge of inductance required!
14
Overview
• Motivation
• Review of Peak Current Control with Slope Compensation
• Digital Slope Compensation
• Simulation Results
• Practical Implementation & Measurement Results
• Conclusion
15
Simulation Result (1)
0
5
10
15
i /
A
5 10 15 20 25 30 35 400
5
10
15
t / µs
i /
A
a)
b)
i* iswitch
iL
icmp
i* iswitch i*- ramp i
L
Comparison with equivalent conventional slope compensation
(steady state)
Conventional
analog slope compensation
Digital slope compensation
16
Simulation Result (2)
0
5
10
15
i / A
10 30 50 70 90 1100
5
10
15
t / µs
i / A
i* iswitch i*- ramp i
L
i* iswitch
iL
icmp
a)
b)
Comparison with equivalent conventional slope compensation
(disturbed inductor current)
Conventional
analog slope compensation
Digital slope compensation
17
Simulation Result (3)
0
5
10
15
20
i / A
i*
iswitch
i*- ramp
iL
5 10 15 20 25 30 35 40 45 500
5
10
15
20
t / µs
i /
A
i*
iswitch
icmp
iL
0
a)
b)
Comparison with equivalent conventional slope compensation
(disturbed inductor current & optimum kSC value)
Conventional
analog slope compensation
Digital slope compensation
18
Overview
• Motivation
• Review of Peak Current Control with Slope Compensation
• Digital Slope Compensation
• Simulation Results
• Practical Implementation & Measurement Results
• Conclusion
19
Practical Implementation
+_vout
vref
voltage controller
i L_min
PWM
compensation factor
ksc
microcontroller
i *A/D
digital slope compensation
i L A/D
verr
D/A
ADC trigger
i L
gate
drive
i cmp
Use PWM unit to turn on at
each new cycle and to trigger current sampling.
Use input and output voltage to apply adaptive
compensation factor.
This Block is optional –to gain Dead Beat only
This Block contains a very simple Formula –Current Control is
achieved with lowest
computational Effort
���� No DSP core required!
20
Practical Implementation
• Controlled boost converter
• Current measurement
in switch path
+_
vref
voltage controller
i L_min
PWM
adaptive slope compensation
factor
microcontroller
i *
A/D
A/D
digital slope compensation
A/D
verr
D/A
ADC trigger
ksc
i cmp
voutvin
L
C
D
current transformer
21
Practical Implementation
Problem: reverse recovery current spike
1. Impedes instantaneouscurrent sampling
���� Delay current sampling
2. Can force faulty trigger
of the comparator���� Implement leading
edge blanking
~iswitch(1A/div)
current spike
~iswitch(1A/div)
sampling instance
sample delay
turn-on instance
~iswitch(2.5 A/div)
turn-off due to reverse recovery current spike
threshold (icmp)
24
Overview
• Motivation
• Review of Peak Current Control with Slope Compensation
• Digital Slope Compensation
• Simulation Results
• Practical Implementation & Measurement Results
• Conclusion
25
Conclusion
• Microcontroller with on-chip comparators make digital peak currentmode control feasible with little effort
• Slope compensation can be realized with digital algorithms���� No knowledge of inductance required
• Adaptive algorithms features adjustable dynamic performance
• Problems due to reverse recovery current spike can be handled withsimple measures