a power system stabilizer design using digital control

9
IEEE Transactions on Power Apparatus and Systems, Vol. PAS-101, No. 8 August 1982 A POWER SYSTEM STABILIZER DESIGN USING DIGITAL CONTROL F. P. deMello, L. N. Hannett, D. W. Parkinson, Fellow Member Member Power Technologies, Inc. Schenectady, New York ABTRACr J. S. Czuba Member Stabilizer Design The design of a microprocessor based power system stabilizer operating through excitation control is de- scribed. The stabilizer draws all necessary informa- tion from sampled values of voltage and current It pro- vides the desired modulating action for damping of ma- chine oscillations by operation of optically isolated switching of taps in an autotransformer interposed in .the feedback from potential transformers to the auto- matic voltage regulator. Included are derivations of algorithms for power and slip used in stabilization control, and demonstration by simulation of the effec- tiveness of the device. INTRDUCION Supplementary stabilizing of synchronous machines through excitation controls has been extensively de- scribed in literaturel. Several variables which can be used to derive the stabilizing signal working through the reference of automatic voltage regulators have been proposed such as rotor speed 2, bus frequency 3, elec- trical power 4, and accelerating power 5,6. In practi- cally all applications implementation has been with solid state analog components which receive the input signal from transducers and produce an analog signal which is fed into the reference of the AVR. With the rapid progress in electronics and microprocessor technology it is evident that the stabi- lizing function can today be implemented digitally with the use of analog-digital cornerters and microproces- sors. This paper describes the developnent of a micro- processor based stabilizer and documents its perfor- mance characteristics compared with those obtainable with an analog counterpart. VOL TRGE REGULATOR1 A conceptual design of a universally applicable stabilizer with all intelligence derived from the stan- dard output of potential and current transformers and with the signal introduced as a modulation of the stan- dard 115 ac voltage feedback to the AVR was presented in an earlier paper 6, At that time the implementation was conceived using frequency and power transducers and analog hardware. Progress in A/D conversion, micropro- cessors and optically isolated solid state switching now makes it logical to provide the stabilizing fmc- tion digitally as described in Figure 1. Tbe device is outlined within the dashed lines. Inputs to the device are three leads from the potential transformer, and four leads from current transformers measuring two line currents. Outputs from the device are two voltages derived from taps on an open delta au- totransformer and the commn voltage on the V of the open delta. The choice of the taps on the autotrans- former is controlled by the microprocessor at appropri- ate intervals compatible with bandwidth requirements and the sampling rate of voltages and currents. The tap range would be ±10% with an exponential distribu- tion yielding .25% taps around the mid range. An AD converter transfers to the microprocessor sampled values of voltages and currents from the unit's potential and current transformers. The digitized data is processed by appropriate algorithms to produce the desired signal which is then translated by logic into the appropriate autotransformer tap. IThis in effect accomplishes a stepwise modulation of the voltage feed- back to the voltage regulator. Figure 1 Microprocessor Based Digital Stabilizer 82 WM 119-6 A paper recommended and approved by the IEEE Power System Engineering Committee of the IEEE Power Engineering Society for presentation at the IEEE PES 1982 Winter Meeting, New York, New York, January 31- February 5, 1982. Manuscript submitted May 27, 1981; made available for printing December 11, 1981. 0018-9510/82/0800-2860$00.75 © 1982 IEEE 2860

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Page 1: A Power System Stabilizer Design Using Digital Control

IEEE Transactions on Power Apparatus and Systems, Vol. PAS-101, No. 8 August 1982

A POWER SYSTEM STABILIZER DESIGN USING DIGITAL CONTROL

F. P. deMello, L. N. Hannett, D. W. Parkinson,Fellow Member Member

Power Technologies, Inc.Schenectady, New York

ABTRACr

J. S. CzubaMember

Stabilizer Design

The design of a microprocessor based power systemstabilizer operating through excitation control is de-scribed. The stabilizer draws all necessary informa-tion from sampled values of voltage and current It pro-vides the desired modulating action for damping of ma-chine oscillations by operation of optically isolatedswitching of taps in an autotransformer interposed in.the feedback from potential transformers to the auto-matic voltage regulator. Included are derivations ofalgorithms for power and slip used in stabilizationcontrol, and demonstration by simulation of the effec-tiveness of the device.

INTRDUCION

Supplementary stabilizing of synchronous machinesthrough excitation controls has been extensively de-scribed in literaturel. Several variables which can beused to derive the stabilizing signal working throughthe reference of automatic voltage regulators have beenproposed such as rotor speed 2, bus frequency 3, elec-trical power 4, and accelerating power 5,6. In practi-cally all applications implementation has been withsolid state analog components which receive the inputsignal from transducers and produce an analog signalwhich is fed into the reference of the AVR.

With the rapid progress in electronics andmicroprocessor technology it is evident that the stabi-lizing function can today be implemented digitally withthe use of analog-digital cornerters and microproces-sors. This paper describes the developnent of a micro-processor based stabilizer and documents its perfor-mance characteristics compared with those obtainablewith an analog counterpart.

VOL TRGEREGULATOR1

A conceptual design of a universally applicablestabilizer with all intelligence derived from the stan-dard output of potential and current transformers andwith the signal introduced as a modulation of the stan-dard 115 ac voltage feedback to the AVR was presentedin an earlier paper 6, At that time the implementationwas conceived using frequency and power transducers andanalog hardware. Progress in A/D conversion, micropro-cessors and optically isolated solid state switchingnow makes it logical to provide the stabilizing fmc-tion digitally as described in Figure 1.

Tbe device is outlined within the dashed lines.Inputs to the device are three leads from the potentialtransformer, and four leads from current transformersmeasuring two line currents. Outputs from the deviceare two voltages derived from taps on an open delta au-totransformer and the commn voltage on the V of theopen delta. The choice of the taps on the autotrans-former is controlled by the microprocessor at appropri-ate intervals compatible with bandwidth requirementsand the sampling rate of voltages and currents. Thetap range would be ±10% with an exponential distribu-tion yielding .25% taps around the mid range.

An AD converter transfers to the microprocessorsampled values of voltages and currents from the unit'spotential and current transformers. The digitized datais processed by appropriate algorithms to produce thedesired signal which is then translated by logic intothe appropriate autotransformer tap. IThis in effectaccomplishes a stepwise modulation of the voltage feed-back to the voltage regulator.

Figure 1 Microprocessor Based Digital Stabilizer

82 WM 119-6 A paper recommended and approved by theIEEE Power System Engineering Committee of the IEEEPower Engineering Society for presentation at the IEEEPES 1982 Winter Meeting, New York, New York, January 31-February 5, 1982. Manuscript submitted May 27, 1981;made available for printing December 11, 1981.

0018-9510/82/0800-2860$00.75 © 1982 IEEE

2860

Page 2: A Power System Stabilizer Design Using Digital Control

The processing of sampled values of voltagecurrent involve the following operations:

1. Formulation of instantaneous values ofsynthetically derived machine internal voltaFCbc = Vbc + IaXq and EQab = Vab + IcXq

2. Processing of these instantaneous valuesinternal voltage using the algorithm in Appendito develop the value of slip frequency of thovoltages in relation to rated frequency.

3. Calculation of instantaneous three ]phase power,= VabIa + VcbIc.

4. Calculation of accelerating power from the ratechange of frequency and electrical powerdescribed in Figure 2 and developed in Refere.6.

5. Processing this value of accelerating power wdigital algorithms to yield, with appropriihase lead conpensation, the value of the stallizing signal from which the proper tap on thetotransformer is to be selected.

6. Outputting control signals to the selectedduring each control period.

w

1 + ST

Figure 2 Derivation of Accelerating Power PIAfrcom Electrical Pow~er PE and Speed W

and

a.ges

ofx Iose

p

ofas

2861

Additional functions involve self-checking anddiagnostics using two out of three voting logic to by-pass the stabilizer and alarm in case of malfunction.

The software system allows for a change instabilizer gain as function of load and also includesprovision for a gain of zero for load levels below setvalues.

The digital algorithm emulates an analog transferfunction operating on the inferred accelerating powerP A Of the type:

y(s) KK(+sT1) (l+sT3)A(s)- (l+sT2)(l+sT4)(1+sT5) (1)

with parameters adjustable.

rih Sample Systemrithate The effectiveness of the stabilizer schemebi- presented above was tested out by simulation on a sam-au- ple system shown in Figure 3. The generator and system

constants used in this study are listed. The zero se-tap quence parameters of the trananission line in relationP to positive sequence were assumed as: RPC/Rt = 6;

Xn/Xt = 3; BO>/Bt = .6

In this study the governor was not modeled, andPR the mechanical power remained constant.

Figure 4 shows the block diagram of the excitationsystem. The stabilizing signal is fed into the excitermodel at the first summing junction as the signallabeled VOTHER- The variable VOTHER is equal to Vt*(l

PE - Tap Ratio) so that the net input of AVR is(V]RE-Vt*Tap Ratio).

The parameters for the stabilizer transferfunction given in equation 1 and as shown in Figure 2are listed below:

M = 9 Tl = 0.25 secT = 0.20 sec T2 = 3.00 secK = 10 T3 = 0.25 secT5 = 0.O0ssec T4= 0.05.sec

JXT R + JX J. 10

XT = 0. 10 PU

R = 0.05 PU

X = 0. 50 PU

8 = 0.80 PU

GENERRTOR CONSTRNTS

T 'DO = 5.00 SECT"O = 0.06 SECT IQ = 0.80 SECT"Qo = 0. 10 SECH = 4.50

Figure 3 Sample System Simulated

LoL I

L"DLoL 'oL"0LL

= 1.600 PU= 0.350 PU= 0.200 FU= 1.500 PU= 0.500 PU= 0.200 P'U= 0. 100 PU

la

Page 3: A Power System Stabilizer Design Using Digital Control

EMAXI VREF

EFD

K = 200 TE = 0.05 SEC.Tp = 1.00 SEC. EMIN = -3. 2 PUTo = 10.00 SEC. EMRX = 4.0 PU

Figure 4 High Initial Response Excitation Systan

TIhe output of the transfer function was used toassign a value for the auto transformer's tap ratio asfollows:

Tap Ratio = f(y(t))

where

f(y(t)) =

1.1,1.04,1.02,1.01,1.005,1.002,1.000,.998,.995,.990,.980,.960,.900,

-.100-.040-.020-.010-.005-.002.002.005.010.020.040..100

y(t)< y(t) <

<y(t) <

<y(t) << y(t) << y(t) << y(t) << y(t) <<y(t) <<y(t) <<y(t) <

' y(t) <

<y(t) <

-.100-.040-.020-.010-.005-.002.002.005.010.020.040.100

The computer program used for the simulationmodels the electrical network in full three ]Ehase dif-ferential equation form 7. Thus, the instantaneousvalues of voltages and currents are available for in-puts as if they were the raw signals fran the PT's andcr's.

Slip Computation Algorithm

The equations for the algorithm for derivation ofslip (Appendix I) were derived for positive sequencequantities. With system unbalances there is a mixtureof positive, negative and zero sequence quantities.Zero sequence quantities are not a problem because thegenerator is connected on the delta side of the step uptransformer and there is a high impedance placed on thegenerator' s neutrals to ground. Negative sequencequantities can have undesired effects on the resultsfron the slip camputation algorithm. Runs were madefor the condition of one phase open for the transnis-sion line in Figure 3. Using a sampling period of 10milliseconds the output of the frequency transducershown in Figure 5 is oscillating with growth in ampli-tude, symptcmatic of a beat. With a sampling period of0.025 sec the oscillations do not appear. As shown inFigure 6 the output of the slip algorithm tracks therotor slip quite closely. The reason for this effectof the sampling rate is that the .025 sec time intervalis equal to three cycles of 120 Hz produced by negativesequence. Thus, the error introduced by negative se-quence is kept at a minimum if the time period is dho-sen as an odd numer of periods of the 120 Hz oscilla-tion.

The lead lag compensation described in (1) wasimplemented digitally with a digital integration algo-rithm using a time step equal to the sampling period.

0.0 0.2000 0.'000 0.b0000.1000 0.3000 0.5000

TIME

Figure 5 Output of Slip Algorithn

ROTOR SLIP:o

JOUTPUT OF ALGORITHM

_ ~~~~~~~~~~~~~~~~~~~~~~~_D

lllll l l l l o~~~~~~~~~~~~~~~~~~~~~~~~~~r

0.8000 1.00000.7000 0.9000

Calculated Every 10 mns

t

.1A

;

2862

Page 4: A Power System Stabilizer Design Using Digital Control

1.0 0.20000.1000 0.3000

0.4000 O.b0000.5000TIME

0.8000 1.00000.7o0 0.9000

Figure 6 Output of Slip Algorithn Calculated Every 25 ms

Ceck Out of Power Computation Algorithm

The algorithm for cmputation of power was checkedout for possible adverse effects caused by negativesequence. The sampling period for reading the data wasset at .0125 seconds which is 1.5 cycles of 120 Hz.Some filtering was performed with the current value ofelectrical power added to the previous value and the

0.0o .o1000 0.2000 0.30000.0500 0.1500 0.2500 0.3500

TIME

sun halved. The plot of the instantaneous electricalpower as calculated by the two watt meter method forevery time step in the simulation (.0001 sec) and thatof the output of the algorithm are shown in Figure 7.Note that the algorithm output is following the averageof the power trace calculated at every time step of thesimulation.

0.4000 0.50000.4500

-

Figure 7 Output of Filtered Power Algoritln Calculated Every 12.5 ms

2863

0

_ el lI

ROTOR SLIP

OUTPUT OF

ALGORITHM

'XOUTPUT OFSTABILIZER (TAP RATIO)

I I L

¶I t

-A

0 D

0o

ALGORITHM OUTPUT

|Pe AS CALCULATED BY TWO WATT METER METHOD_

I~~~~~~~~~~~~~~~~~~~~~~~~~~ I IIIIt _ ,

Ln Lo

pcn000

w__

C}Z

-

_ o

Page 5: A Power System Stabilizer Design Using Digital Control

2864

Perfor e Under Disturbance Conditions

Using the canplete machine and networkrepresentation, which yields solutions of instantaneousvoltages and currents,, a single phase to ground stubfault was placed on the high side of the step-up trans-former for 6 cycles (60 Hz). No lines were trippedwhen the fault was cleared. The plots in Figures 8 and9 show the response of the stabilizer and generator tothe disturbance.

This case was repeated using a stability typefundamental frequency program. The stabilizer modelused the same control transfer function as in the pre-vious case, except that it represented a stabilizermade up of analog cmponents whose continuous output isfed into the suni=ing junction of the AVR. The plotsfor this run are shown in Figures 10 and 11. Comparingwith the plots in Figures 8 and 9 it is apparent thateither stabilizing scheme, i.e. digital or analog, per-forms equally well.

-

0I

O -

v)g)O

0

4

Figure 8 Digital Stabilizer and Excitation Performance for Stub Fault

0.5000

Figure 9 Oscillations

1.5000 2. swoTIME

'I 1,41.0000

3.5000 1.5000

O

-1

01:-

of Machine Output and Voltage Damped by Digital Stabilizer

Solution with Machine and Network Transients Representation

xm0

ug

D

z

u

cl

z

rn--4

rnz

II

.0

6C3C30

Page 6: A Power System Stabilizer Design Using Digital Control

_o u00

~t

-

aIL-0

Figure 10 Analog Stabilizer and Excitation Performancefor Stub Fault

U.0U0.5000 I .0000 2.0000 .3.0000 1.00002.5000 2.5000 3.5000TIME

5.0000.5000

_4>

t

-

zL1_z

Figure 11 Oscillations of Mlachine Output and Voltage Danmed ByAnalog Stabilizer. Solution with Fundamental FrequencySimulation Program

2865

! i o

Vt

oI_n i nnnn nnnz

Icccc

c

zrlr

(A)

t

D

O

Io

zrz

tf

n,

Page 7: A Power System Stabilizer Design Using Digital Control

2866

A digital microprocessor based design' of a powersystem stabilizer has been demonstrated. It makes useof advanced concepts of stabilization from acceleratingpower and has the following mique features.

1. The stabilizer is inserted between the potentialtransformer voltage feedback and the voltage regu-lator and provides the AVR with a signal of thesae type as the normal AC 115 volt feedback uni-versally used on all automatic voltage regulators.Accordingly, it can be used universally with anytype or vintage of excitation system.

2. All required intelligence for stabilization isderived from sampled values of machine terminalvoltage and current signals as provided from PT'sand CT's without need for transducers. The possi-bility of interactions with shaft torsional modesis eliminated.

3. Cmputations are performed by digital techniquesin a microprocessor. A novel technique for compu-tation of slip from sampled values of voltageeliminates the hardware normally used to measurefrequency from pulse counts between zero cross-ings. Adjustments are digital and thus not sub-ject to drift or calibration problems.

4. Logic is provided for self-checking and forautomatic bypassing of the stabilizing function incase of malfunction detection.

Logic is also provided to change gain of the sta-bilizing action as function of load, including theelimination of the action as function of loadlevel.

1. F. P. de Mello, "Modern Concepts of Power SystemDynamics - The Effect of Control", IEEE SummerPower Meeting, 1970, Tutorial Paper 70 M62-EWR.

2. F. P. de Mello, C. Concordia, "Concepts ofSynchronous Machine Stability as Affected bty Exci-tation Control*, IEEE Trans. PAS Vol. 88, April1969, pp. 316-329.

3. F. W. Keay, W. H. South, "Design of a Power SystemStabilizer Sensing Frequency Deviation", IEEETrans. PAS,, Vol. 90, pp. 707-713.

4. R. M. Shier, A. L. Blythe, "Field Tests of DynamicStability Using a Stabilizing Signal and CmputerProgram Verification", IEEE Trans. PAS, Vol. 87,February 1968, pp. 315-322.

5. J. P. Bayne, D. C. Lee, W. Watson, "A Power SystemStabilizer for Thermal Units Based on Derivationof Accelerating Power", IEEE Trans. PAS, Vol, 96,November/December 1977, pp. 1777-1783.

6. F. P. de Hello, L. N. Hannett, J. M. Undrill,"Practical Approaches to Supplementary Stabilizingfrom Accelerating Power", IEEE Trans. PAS,Vol. 97, September/October 1978, pp. 1515-1522.

7. F. P. de Mello, L. N. Hannett, D. Birfet andJ. Toulemonde, "Thyristor-ControlledReactors. Analysis of Fundamental Frequency andHarmonic Effects", IEEE conference paper 78 CH1295-5-EWR, 1979 Winter Power Meeting.

5. The modulating device is rugged, simple andreliable involving merely tap changing of an auto-transformer with solid state optically isolatedswitching.

The performance of this digital implementation ofthe stabilizing function has been checked with detailedsimulations yielding instantaneous values of voltagesand currents including effects of unbalances.

Page 8: A Power System Stabilizer Design Using Digital Control

2867

APPENDIX I

Derivation of Slip fran Sampled Valuesof Three Phase Voltages

Starting with three voltages va, vb, vc, and lettingthem be equal to

va(t) = Va Cos (t+&) A.1

vb(t) = Va cos(wt+6-27r/3) A.2

vat) = Va cos (t+6+2¶r/3) A. 3

Transform these quantities to alpha, beta, zero quanti-ties to give

vo(t) = 1/3(Va+b+Vc) A.4

v(t) = 1/3(2%-vb-vc) A.5

vat) = / 3/3 (vb- vc) A.6

T¶e zero sequence quantity is equal to zero for a bal-anced system. Because vo = 0, then vb+vc must equal to-va giving

va(t)= Va (t) = Va cos (t+6) A. 7

Substituting A.2 and A.3 into A.6 and expanding thetrigonometric functions for arguments of ut+6 and 2ir/3givesv(t) = v/33 Va (cos (t+6)cos 21r/3+sin(wtt6 sin 2rr/3

-cos (t+6) as 2iT/3+sin(wt+6) sin 2rf/3)A.8

Combining like terms and recognizing that sin 2wr/3 isequal to /3/2 gives

v(t) = Va sin(wt+6) A.9

The values of V. and vg can be transformed into twoquantities vas and vas which are sinusoidal functionsoscillating at slip frequency as in A.10.

v (t) cosuet sinuet1 v (t)

V:s (t) -sinwut coswt v(t)

Substituting A.7 and A.9 into A.10, performing the mul-tiplication, and using appropriate trigoncmetric iden-tities gives

v S(t) = v cOs((u- )t+6) A.llv (t) = Va sin((w-w )t+6) A.12SsheSalues o

The values of vas(t+At) and v~5(t+,At) are the followi'ng

vS (t+At) = Va cos((u-w )(t+At)+6)v (t+At) = Va sin( (u-ue) (t+At)S+6)~~~aS

Expanding these terms gives

vas(t+At) = Va cos"(-(ue)t+6)cos(w-we)At-Va sin (. (w-e) t+6 ) sin (w-e) Lt

V3s (t+At) = V, sin ( (w-) t+- ) cos (-w) Atfsa e e+Va cos((-e)t+6)sin(w-we)At

A.15

A.16

Substituting A.ll and A.12 into equations A.15 and a.16gives

v (t+At) = v (t) Cos ((u-u )At '-vjt) sin((u )At A.17as as ee/w-=(t+At)=v (t) cos ((-we)At)A+vJt) sin (( ) )A.18

Equations A.17 and A.18 can be expressed in matrix formgiving

V (t+At) Vas (t) -v (t) cos(£-u)t] A.19

vas (t+Ah) v (t) v (t) sin(u-u)tLs Os as wwe)

Using Crammer's Rule to solve for sin (w-we)At andcos(w-we)At gives

v5 (t+/At)V8 (t)+v (t+At)V (t)cos Cu-u )A t

s a es_ _ __ __ _ __ _

S_Cos(we 2()> 2(- A.20

V (t) vs (t)

vBs (t+At)vas tt) -va,s (t+At)vas (t) A2sin(w-we)At = S as s s A.21V 2(t) V (t)

Note that the trigonanetric functions in equations A.20and A.21 are independent of time, and they are func-tions of the difference in frequency. By taking theinverse trigonometric function and dividing by At givesthe difference in frequency. For snall arguments(u-we)At the algorithm for slip becames:

( V s(t+At)Vas(t)-Vas (t+At)v« (t)@e) At 2 ~~we v 2(t)+ v 2 (t)

as a

A.13A.14

Page 9: A Power System Stabilizer Design Using Digital Control

2868

Discussion

D. C. Lee and R. E. Beaulieu (Ontario Hydro, Toronto, Ontario,Canada): The authors are to be complimented for an interesting paperon the hardware implementation of a power system stabilizer with somenovel features.The use of digital techniques offers the ability to self-check almost

100% of the hardware and this may be the most significant advantageof the approach presented by the authors. In a generating station wherepower system stabilizers are essential, severe operating limits may be re-quired under certain operating conditions to cater to the possibility ofan undetected failure in a stabilizer. Digital implementation lends itselfto more extensive self testing than analog implementation. Could theauthors elaborate on the extent of self-checking included in theirdesign?The derivation of the electrical power and slip signals from voltage

and current signals is an advantage, particularly in applications involv-ing hydraulic units. Speed probes and toothed wheeles are not normallyprovided on these units and retrofits are expensive.The use of an autotransformer with optical couplers does make the

system universally applicable, but at the cost of increased complexityfor some systems and increased space requirements. The authors statethat the tap range around the mid-point is 0.25%. We would expect thatthe machine terminal voltage and reactive power will be noisy, leadingto operator complaints. Have the authors selected a deadband in theoutput algorithm to prevent this problem and if so, what are the conse-quences of using a small deadband in a situation where the generatorwould be dynamically unstable without the stabilizer in service? Thenoisy terminal voltage problem may be aggravated further by the 25 mssampling interval used in the slip computation algorithm. Since slip isused to offset the effects of mechanical power changes, the cancellationmay not be adequate with the selected sampling interval, particularly ona unit with a noisy governor.For the power computation algorithm the authors mention a sampl-

ing period of 12.5 ms. It would seem to us that the longer this samplingperiod, the more phase lead will be required later on. Would this notresult in more severe noise problems? Could the authors elaborate ontheir selection of the sampling period? Is the hardware used dictatingthe sampling periods for both power and slip? Could the stabilizer besupplied with a direct digital-to-analog output for systems which haveoperational amplifier summing points available for stabilizer input?Have prototypes of complete stabilizers been tested on either thermal

or hydraulic units? Would the authors like to comment on the possibleintegration of a digital stabilizer in a complete digital excitation

regulator?Manuscript received February 26, 1982.

F. P. de Mello, L. N. Hannett, D. W. Parkinson and J. S. Czuba: Theauthors thank Messrs. Lee and Beaulieu for their valuable commentsand questions.They correctly identify self-checking logic as one of the most impor-

tant advantages of digital implementation. Self checking is plannedwith complete redundancy using 2 out of 3 voting, up to the tap selec-tion electronics. A separate monitoring logic module is used to checkthe integrity of the system. Any failure would cause actuation of thebypass relay with appropriate alarm message.We concur that derivation of control intelligence purely from sampl-

ed values of voltages and currents is an advantage. This eliminates theneed for special transducers and should result in improved reliability.The autotransformers are not large and actually represent the least

costly component of the entire package. The tap resolution of 0.25%around center tap is quite adequate. One should note that stabilizer ac-tion should be zero in the steady state. Due to inevitable process noise,it will bounce back and forth but essentially average out at the nominaltap. The rotor flux time constants are such that reactive power fluctua-tions due to the discrete rather than continuous nature of the stabilizerwould be imperceptible. Since the stabilizer output is steady stateshould be zero, there is no need to provide any deadband other thanthat which is inherent in tap selection logic (stabilizer algorithm outputmust be larger than the discrete step before the tap selection commandis given).As noted in Ref. 6 of the paper, dealing with the derivation of ac-

celerating power from measurement of electrical power and rotorspeed, the bandwidth requirements for speed are not high. Further-more, the use of electrical power already provides a 900 phase leadrelative to speed. Hence the phase lead compensation requirements aremodest. The sampling rate for calculation of power was selected tofilter out negative sequence effects. Hardware does not place limitationson sampling rates. These were selected to eliminate aliasing and to filterout the normal noise to be expected in voltages and currents.We see no reason why digital to analog output could not be provided

for use on systems which have operational amplifier summing pointsavailable for stabilizer input.The concept was completely tested by simulation, and prototype

parts of the system hardware have been assembled and checked for per-formance. The next step is the development of commercial grade unitsfor actual installation and test on generating units. We look forward totaking this next step in the near future.

Manuscript received March 24, 1982.