a digital timer implementation using 7 segment displays
TRANSCRIPT
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DIGITAL CLOCK A Digital Timer Implementation using 7 Segment Displays
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GROUP MEMBERS
Arsalan Arif Maryam Ikram Fahad Tariq
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A digital display which consists of seven LED segments is commonly utilized to display decimal numerals in digital systems. Various familiar illustrations are electronic calculators and watches where one 7-segment display device is utilized for displaying one numeral 0 through 9. To use this display device, the data has to be converted by some binary code to the code essential for the display. Frequently the binary code utilized is Natural BCD.
BCD-TO-SEVEN-SEGMENT DECODER:
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BLOCK DIAGRAM
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TRUTH TABLE
Decimal Digits Input Output A B C D a b c d e f g
0 0 0 0 0 1 1 1 1 1 1 01 0 0 0 1 0 1 1 0 0 0 02 0 0 1 0 1 1 0 1 1 0 13 0 0 1 1 1 1 1 1 0 0 14 0 1 0 0 0 1 1 0 0 1 15 0 1 0 1 1 0 1 1 0 1 16 0 1 1 0 0 0 1 1 1 1 17 0 1 1 1 1 1 1 0 0 0 08 1 0 0 0 1 1 1 1 1 1 19 1 0 0 1 1 1 1 0 0 1 1
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K-mappingi) K-map and Logic Diagram for Digital Output ‘a’
A = B‾ D‾ + BD + CD + A
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K-mappingi) K-map and Logic Diagram for Digital Output ‘b’
B = B‾ + C‾D‾ + CD
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K-mappingi) K-map and Logic Diagram for Digital Output ‘c’
C = B + C‾ + D
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K-mappingi) K-map and Logic Diagram for Digital Output ‘d’
D = B‾D‾ + CD‾ + B‾C +BC‾D
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K-mappingi) K-map and Logic Diagram for Digital Output ‘e’
E = B‾D‾ + CD‾
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K-mappingi) K-map and Logic Diagram for Digital Output ‘f’
F = A + C‾ D‾ + BC‾ +BD‾
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K-mappingi) K-map and Logic Diagram for Digital Output ‘g’
G = A + BC‾ + B‾C+ CD‾
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CIRCUIT DIAGRAM
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COMPONENTS USED 7 SEG COM ANODE 74LS90 COUNTER
AND GATES BCD TO 7 SEG DECODER
ALTERNATOR INVERTER
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TOOL USED
PROTEUS DESIGN SUITE 8.0
PROFESSIONAL
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THANKS FOR YOUR
ATTENTION.