a 230mv-to-500mv 375khz-to-16mhz 32b risc core in 0.18 µm cmos

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1 A 230mV-to-500mV 375KHz-to-16MHz 32b RISC Core in 0.18µm CMOS in out V DD V DDV V GP V PW V NW slpd S tandard cell Body Bias Driver V DD Power switch V PW (M1) V NW (M1) Combinational circuit V DD (M3) GND (M3) V DDV (M3) Flip-Flop GND (M3) V DDV (M3) in V P V DD V DD 1 0 1 0 CLK int CLK ext pslpi pvgp pslpi pvgp V P V GP slpd BF1 BF1 sleep mode wakeup mode M P4 M P2 M P3 active mode V DD D-NPSBB Split-Style Clock Generator Multi-Rail Standard Cells

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DESCRIPTION

A 230mV-to-500mV 375KHz-to-16MHz 32b RISC Core in 0.18 µm CMOS. D-NPSBB. Split-Style Clock Generator. Multi-Rail Standard Cells. 32b RISC Core and Sub-V T Operation. Chip Photo and Summary. Vibrations on V DD and V DDV. 230mV (Sub-V T ) Operation. ULV-CMOS Performance and Summary. - PowerPoint PPT Presentation

TRANSCRIPT

Page 1: A 230mV-to-500mV 375KHz-to-16MHz  32b RISC Core in 0.18 µm CMOS

1

A 230mV-to-500mV 375KHz-to-16MHz 32b RISC Core in 0.18µm CMOS

in out

VDD

VDDV

VGP

VPW

VNW slpd

Standard cell Body Bias Driver

VDD

Power switch

VPW (M1)

VNW (M1)

Combinational circuit

VDD (M3)

GND (M3)

VDDV (M3)

Flip-Flop

GND (M3)

VDDV (M3)

inVP

VDD VDD

1

0

1

0

CLKint

CLKext

pslpi

pvgp

pslpi

pvgp

VPVGP

slpd

BF1 BF1

sleep mode

wakeup mode

MP4

MP2

MP3

active mode

VDD

D-NPSBB

Split-Style Clock Generator Multi-Rail Standard Cells

Page 2: A 230mV-to-500mV 375KHz-to-16MHz  32b RISC Core in 0.18 µm CMOS

2

32b RISC Core and Sub-VT Operation

230mV (Sub-VT) OperationBSC

doretd

ALU

Multiplier

Barrel shifter parent

Control .Logic .

dir RegisterBank

AR

Hard Block

Test circuits and Level converters

Coupling Capacitors

800μm

1050μm

570μm

Level Converters

Power Switch

250μm

TechnologyTarget circuit

Transistor countDie size

CPU Core areaHard Block area

ARM7-like RISC core(3-stage pipeline)

179k1.5mm * 1.5mm

0.84mm2

0.1243mm2

Chip SummaryVT (H/L)

Operation frequency

Power(per MHz)

520mV/250mV16MHz@500mV5MHz@350mV

[email protected]μ[email protected]μW@350mV

122.67μW@230mV

0.18μm CMOS 1P6M

RESET

CLKint

Out[2] &

Out[3]

H/W Reset

S/W Reset Normal Operation

(375KHz)

1.5V

230mV

1.5V

VDD

VDDV

±33mV

±62mV

min. VDD =230mV±33mV

min. VDDV =197mV±62mV

Vibrations on VDD and VDDVChip Photo and Summary

Page 3: A 230mV-to-500mV 375KHz-to-16MHz  32b RISC Core in 0.18 µm CMOS

3

ULV-CMOS Performance and Summary

Acknowledgements:- Thank the CIC for support the chip fabrication- Thank the teammates of SoC group of National Chung-Cheng University for great helps

Achievements: - at least 3X faster than the competitors- Reach the lowest voltage (230mV) of all

Applicability:- Single solar cell- Similar work: a handheld game console (GBA) at 16.78MHz

Without P

ower Gatin

g

With Power G

ating

37.34X

801

230

3.02

14.61X

VDD (mV)

44.11

21.45