Microprocessor 8085 Instruction Set* By Ch. Praveen Kumar Assistant. Prof in ECE Dept. GITAM University, Hyderabad

OutlineIntroductionMachine Control InstructionsData Transfer InstructionsArithmetic InstructionsLogical InstructionsBranch Control InstructionsStack data transfer InstructionsSummery

INTRODUCTIONA microcomputer performs a task by reading and executing the set of instructions written in its memory. This set of instructions, written in a sequence, is called a program. Each instruction in the program is a command, in binary, to the microprocessor to perform an operation. *

MACHINE CONTROL OPERATIONS*

DATA TRANSFER OPERATIONSThe data transfer instructions copy data from a source into a destination without modifying the contents of the source.

The previous contents of the destination are replaced by the contents of the source. *

DATA TRANSFER OPERATIONS*

Contd.*

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EXAMPLE 1*

EXAMPLE 2Load the accumulator A with the data byte 82H (the letter H indicates hexadecimal number), and save the data in register B.*Instructions: MVI A, 82H, MOV B,AThe first instruction is a 2-byte instruction that loads the accumulator with the data byte 82H, and the second instruction MOV B,A copies the contents of the accumulator in register B without changing the contents of the accumulator.

Move Immediate Instructions *

Move Immediate Instructions *The memory location, which is indirectly addressed by the HL register pair, appears as the letter M in all instructions.

Direct Data Transfer Instructions Direct data transfer instructions are useful if only one byte or word of data is transferred to or from the memory. If more than one byte or word is transferred, it is more efficient to use indirectly addressed instruction. *

Direct Data Transfer Instructions *

Direct Data Transfer Instructions *

Direct Data Transfer Instructions *Copies the contents of location 1000H into the L register and the contents of location 1001 H into the H registerstores the contents of the L register at memory location I200H and the H register at location 1201H

INDIRECT DATA TRANSFER INSTRUCTIONS With register indirect addressing, a register pair holds the address of the memory location accessed by the instruction.The contents of the register pair indirectly addresses a memory location.Whenever, the letter M appears instead of a register, the HL register pair indirectly addresses a memory location.

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INDIRECT DATA TRANSFER INSTRUCTIONS *

INDIRECT DATA TRANSFER INSTRUCTIONS *

REGISTER DATA TRANSFER INSTRUCTIONS*

REGISTER DATA TRANSFER INSTRUCTIONS*

Arithmatic InstructionsADD r. (Add register to accumulator) [A] [A] + [r].ADD M. (Add memory to accumulator) [A] [A] + [[H-L]].ADC r. (Add register with carry to accumulator). [A] [A] + [r] + [CS].ADC M. (Add memory with carry to accumulator) [A] [A] + [[H-L]] [CS].ADI data (Add immediate data to accumulator) [A] [A] + data.ACI data (Add with carry immediate data to accumulator). [A] [A] + data + [CS].DAD rp. (Add register paid to H-L pair). [H-L] [H-L] + [rp].SUB r. (Subtract register from accumulator). [A] [A] [r].SUB M. (Subtract memory from accumulator). [A] [A] [[H-L]].SBB r. (Subtract register from accumulator with borrow). [A] [A] [r] [CS].

Contd.SBB M. (Subtract memory from accumulator with borrow). [A] [A] [[H-L]] [CS].SUI data. (Subtract immediate data from accumulator) [A] [A] data.SBI data. (Subtract immediate data from accumulator with borrow). [A] [A] data [CS]. INR r (Increment register content) [r] [r] +1. INR M. (Increment memory content) [[H-L]] [[H-L]] + 1.DCR r. (Decrement register content). [r] [r] 1.DCR M. (Decrement memory content) [[H-L]] [[H-L]] 1.INX rp. (Increment register pair) [rp] [rp] 1.DCX rp (Decrement register pair) [rp] [rp] -1.DAA (Decimal adjust accumulator) .

Logical InstructionsANA r. (AND register with accumulator) [A] [A] ^ [r].ANA M. (AND memory with accumulator). [A] [A] ^ [[H-L]].ANI data. (AND immediate data with accumulator) [A] [A] ^ data.ORA r. (OR register with accumulator) [A] [A] v [r].ORA M. (OR memory with accumulator) [A] [A] v [[H-L]]ORI data. (OR immediate data with accumulator) [A] [A] v data. XRA r. (EXCLUSIVE OR register with accumulator) [A] [A] v [r] XRA M. (EXCLUSIVE-OR memory with accumulator) [A] [A] v [[H-L]]XRI data. (EXCLUSIVE-OR immediate data with accumulator) [A] [A] v data. CMA. (Complement the accumulator) [A] ~[A]

Contd.CMC. (Complement the carry status) [CS] ~[CS]STC. (Set carry status) [CS] 1.CMP r. (Compare register with accumulator) [A] [r]CMP M. (Compare memory with accumulator) [A] [[H-L]]CPI data. (Compare immediate data with accumulator) [A] data.RLC (Rotate accumulator left) [An+1] [An], [A0] [A7], [CS] [A7].RRC. (Rotate accumulator right) [A7] [A0], [CS] [A0], [An] [An+1].RAL. (Rotate accumulator left through carry) [An+1] [An], [CS] [A7], [A0] [CS].RAR. (Rotate accumulator right through carry) [An] [An+1], [CS] [A0], [A7] [CS]

Branch InstructionsJMP addr (label). (Unconditional jump: jump to the instruction specified by the address). [PC] Label.Conditional Jump addr (label): After the execution of the conditional jump instruction the program jumps to the instruction specified by the address (label) if the specified condition is fulfilled. The program proceeds further in the normal sequence if the specified condition is not fulfilled. If the condition is true and program jumps to the specified label, the execution of a conditional jump takes 3 machine cycles: 10 states. If condition is not true, only 2 machine cycles; 7 states are required for the execution of the instruction.JZ addr (label). (Jump if the result is zero)JNZ addr (label) (Jump if the result is not zero)JC addr (label). (Jump if there is a carry)JNC addr (label). (Jump if there is no carry)JP addr (label). (Jump if the result is plus)JM addr (label). (Jump if the result is minus)JPE addr (label) (Jump if even parity)JPO addr (label) (Jump if odd parity)

Contd.CALL addr (label) (Unconditional CALL: call the subroutine identified by the operand)CALL instruction is used to call a subroutine. Before the control is transferred to the subroutine, the address of the next instruction of the main program is saved in the stack. The content of the stack pointer is decremented by two to indicate the new stack top. Then the program jumps to subroutine starting at address specified by the label.RET (Return from subroutine)RST n (Restart) Restart is a one-word CALL instruction. The content of the program counter is saved in the stack. The program jumps to the instruction starting at restart location.

STACK DATA TRANSFER INSTRUCTIONSThe Intel 8085A microprocessor has a LIFO (last-in, first-out) stack memory.The stack memory stores both return addresses from subroutines and data temporarily.The microprocessor cannot locate the stack memory when power is first applied to the system because the number in the SP is unknown.The location of the stack must be initialised after the application of system power.

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STACK DATA TRANSFER INSTRUCTIONS

The programmer decides what portion of the read/write memory is to function as the stack, and then loads the SP with the top location plus one byte. The byte location above the stack is never used, but must be the initial value of the stack pointer. The SP always points to the current exit point. The stack is a LIFO stack.

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STACK DATA TRANSFER INSTRUCTIONSIf data are pushed (placed) onto the stack, they move into the memory locations addressed by SP-1 and SP-2.Note that pairs of registers always move to the stack.A PUSH instruction stores the high-order register first (SP - 1), followed by the low-order register (SP -2). *

STACK DATA TRANSFER INSTRUCTIONSThe SP then decrements by two so that the next push occurs below the first.Notice that when the PUSH occurs, nothing is placed at the location addressed by the stack pointer. This is why the SP is initialised at one byte above the top of the stack.

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STACK DATA TRANSFER INSTRUCTIONS

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STACK DATA TRANSFER INSTRUCTIONS

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STACK DATA TRANSFER INSTRUCTIONS It is also important to note that PUSHes and POPs must occur in pairs: one PUSH, one POP, two PUSHes, two POPs, and so on. *Note: POP PSW will copy the data from location pointed by SP into flag register and data from (SP+1) will copy into A. The SP=SP+2.

MISCELLANEOUS DATA TRANSFER INSTRUQTIONS Exchange DE with HL (XCHG)The XCHG instruction exchanges the contents of the HL register pair with the contents of the DE register pair. Load SP from HL (SPHL)Is a one-byte instruction, copies the contents of the HL register pair into the SP.*

MISCELLANEOUS DATA TRANSFER INSTRUQTIONS Exchange HL with Stack Data (XTHL)This instruction exchanges the contents of the HL pair with the most recent data on the stack. Input/Output Data Transfer Instructions IN : instruction inputs data from an I/O device into the accumulator. OUT : sends accumulator data out to an I/O device.*

SUMMARY Data transfer instructions transfer information from register to register, from register to memory, from memory to register. Data transfer instructions also allow data transfer between registers and stack or the I/O devices in a system.The Intel 8085A uses four different addressing modes: direct, register, register indirect, and immediate.*

SUMMARY Direct addressing accesses a memory location to transfer data between memory and the accumulator or HL register pair. The address of the data follow with the instruction in the memory.Register addressing allows either a single 8-bit register (B, C, D, E, H, L, or A) or a 16-bit register pair (BC, DE, HL, and SP).Register indirect addressing allows the instruction to address memory through the address held in a register pair. *

SUMMARY Immediate addressing is used whenever the data (8 or 16 bits) are a constant. Immediate data immediately follow the opcode in the program.The M register or operand indirectly addresses memory through the HL register pair.The LDA and STA instructions load or store the accumulator. The LHLD and SHLD instructions load or store the HL register pair.*

SUMMARY Besides M for indirectly addressing the memory, the DE and BC register pairs are also available. The LDAX and STAX instructions allow the accumulator to be indirectly stored or loaded from the memory by using the BC or DE register pairs. *

SUMMARY Register data transfer instructions are the most numerous form of data transfer: 63 instructions.The stack memory is a LIFO (last-in, first-out) memory that stores data and return addresses from subroutines.The SP register indirectly addresses the stack. The stack functions with the stack data transfer instructions PUSH, POP, and XTHL.*

SUMMARY The PSW is the processor status word that contains both the accumulator and the flag byte. The accumulator is the high-order register and the flag bits are the low-order register.IN and OUT effect data transfers between an external I/O device and the accumulator. I/O devices are often called I/O ports and are addressed by an 8-bit I/O port address. *

Thank youQ & A*