8 7 6 5 4 3 2 1 k36 mlb schematic - assistenza apple · func test 1 of 2 tp 7 8 06/15/2006 ... prt...

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DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL


TABLE_TABLEOFCONTENTS_HEAD









ANGLES

3. ALL CRYSTALS & OSCILLATOR VALUES ARE IN HERTZ.2. ALL CAPACITANCE VALUES ARE IN MICROFARADS.1. ALL RESISTANCE VALUES ARE IN OHMS, 0.1 WATT +/- 5%.

DATE

APPDENG

DATE

APPDCK

ECNZONEREV

DO NOT SCALE DRAWING

X.XXX

X.XX

XX

DIMENSIONS ARE IN MILLIMETERS

THIRD ANGLE PROJECTIOND

SIZE

APPLICABLENOTED AS

MATERIAL/FINISH

NONE

SCALE

DESIGNER

MFG APPD

DESIGN CK

RELEASE

QA APPD

ENG APPD

DRAFTER

METRIC

OFSHT

DRAWING NUMBER

TITLE

NOTICE OF PROPRIETARY PROPERTY

I TO MAINTAIN THE DOCUMENT IN CONFIDENCE

III NOT TO REVEAL OR PUBLISH IN WHOLE OR PARTII NOT TO REPRODUCE OR COPY IT

AGREES TO THE FOLLOWINGPROPERTY OF APPLE COMPUTER, INC. THE POSSESSORTHE INFORMATION CONTAINED HEREIN IS THE PROPRIETARY

Apple Computer Inc.

12345678

12345678

B

C

D

A

B

C

D

A

REV.

DESCRIPTION OF CHANGE

7/10/2007

K36 MLB SCHEMATICREFERENCED FROM M70

K36 EE DRIS:

LD

RX

RX

ES

RX

RX MK

MKRX

LD

RXRXRX

RX

ES

MK

RX

MK

ES

LD

RX

DKDK

RXRXES

LT

LTLT

LT

LD

LT

DKRX

LTLTLDLD

LDESES

RXRXRX

MKMKMKMK

ES

ESRXES

RXRXDK

RXRX

ESES

LD

ES

RX

ES

RX

MK

MK

MK

MK

ES

ES

LT

RX

LD

LT

Schematic / PCB #’s

ES

MK

RX-RAYMOND XUDK-DINESH KUMARRC-RAY CHANGMK-MARC KLINGELHOFERLT-LAWRENCE TANLD-LINDA DUNNMM-MARY(YUAN) MA

SCHEM,MLB,K36

?? ?? ?

761

01051-7455

10/30/200624 25T9_MLBSB Pwr Mgt, GPIO, Clink

CPU/FSB Constraints70 06/08/2006WFERRY

100MINI-DVI CONNECTOR69 05/21/05

EUGENE94

3.42V/1.25V Switcher64 12/06/2005ENET

77

POWER1.8V/0.9V Supplies62 07/13/200575

POWER5V/3.3V Supplies63 07/13/200576

INVERTER,LVDS,TMDS67 06/23/2006GPU

90

IMVP6 CPU VCore Regulator59 07/13/2005POWER

71

ContentsPage Sync(.csa) Date

07/17/200640 45GPUSATA CONNECTOR

PCBF,MLB,K36820-2279 CRITICALPCB1

06/29/200642 47USBCONNECTOR MISC

09/14/200636 39USBETHERNET CONNECTOR

10/07/200634 37USBEthernet (Yukon)

10/07/200635 38USBYukon Power Control

06/20/200532 33MEMORYMemory Active Termination

06/20/200531 32MEMORYDDR2 SO-DIMM Connector B

06/20/200530 31MEMORYDDR2 SO-DIMM Connector A

07/26/200527 28NBSB Misc

06/01/200626 27WFERRYSB Decoupling

S0 FETS & Power Sequencing58 05/31/2006DSIMON-WF

70

06/06/200629 30DSIMON-WFClock Termination

06/30/200641 46USBUSB EXTERNAL CONNECTORS

07/17/200638 43GPUFIREWIRE PORT

08/30/200537 40ENETFIREWIRE CONTROLLER

26SB Power & Ground T9_MLB

10/30/200625

SB Constraints (2 of 2)74 06/12/2006WFERRY

104

SPI ROMs52 04/26/2006WFERRY

61

SCHEM,MLB,K36051-7455 CRITICALSCH1

Page Contents Sync(.csa) Date

09/05/20061 1USBTable of Contents 46 06/01/2006

WFERRY51

LPC+ Debug ConnectorSMBUS CONNECTIONS47 06/01/2006

WFERRY52

CPU Current & Voltage Sense48 07/17/2006GPU

53

TEMPERATURE SENSE49 06/21/2006GPU

55

Fan50 11/10/2005ENET

56

53 03/12/2007M70AUDIO

62

AUDI0: SPEAKER AMP54 03/12/2007M70AUDIO

66

AUDIO: JACK55 03/12/2007M70AUDIO

67

DC-In & Battery Connectors57 07/13/2005POWER

69

Render VCore Supplies60 06/29/2006GPU

72

1.5V / 1.05V Supplies61 07/13/2005POWER

73

S3 FET & S3/S5 Control65 06/12/2006DSIMON-WF

78

EXTERNAL TMDS68 06/06/2005GRAPHIC

92

NB Constraints71 06/12/2006WFERRY

101

Memory Constraints72 06/08/2006WFERRY

102

SB Constraints (1 of 2)73 06/12/2006WFERRY

103

Clock Constraints75 06/12/2006WFERRY

105

FireWire & SMC Constraints76 06/12/2006WFERRY

106

05/11/20062 2WFERRY-WFSystem Block Diagram

06/30/20053 3POWERPower Block Diagram

07/18/20054 4SMCCONFIGURATION OPTIONS

N/A5 5N/ARevision History

07/25/20056 7TPFUNC TEST 1 OF 2

06/15/20067 8WFERRYPower Aliases

07/17/20068 9GPUSIGNAL ALIAS /RESET

11/12/20069 10T9_MLB_NOMECPU FSB

11/12/200610 11T9_MLB_NOMECPU Power & Ground

04/26/200611 12MSARWARCPU Decoupling & VID

5/23/0512 13MASTERCPU ITP700FLEX DEBUG

10/30/200613 14T9_MLBNB CPU Interface

10/30/200614 15T9_MLBNB PEG / Video Interfaces

10/30/200615 16T9_MLBNB Misc Interfaces

10/30/200616 17T9_MLBNB DDR2 Interfaces

10/30/200617 18T9_MLBNB Power 1

10/30/200618 19T9_MLBNB Power 2

10/30/200619 20T9_MLBNB Grounds

06/15/200620 21WFERRYNB Standard Decoupling

06/15/200621 22WFERRYNB Graphics Decoupling

10/30/200622 23T9_MLBSB Enet, Disk, FSB, LPC

10/30/200623 24T9_MLBSB PCI, PCIe, DMI, USB

06/06/200628 29DSIMONClock (CK505)

08/19/200533 34ENET

07/17/200639 44GPUPATA CONNECTOR

09/05/200643 48USBIR CONTROLLER & BT INTERFACE

10/30/200644 49T9_MLBSMC

07/17/200645 50GPUSMC SUPPORT

PBUS Supply/Battery Charger66 08/19/2005SMC

79

AUDIO: JACK TRANSLATORS56 03/12/2007M70AUDIO

68

SMS51 08/23/2005SMC

59

www.vinafix.vn

DSIZE

OFSHT

DRAWING NUMBER



III NOT TO REVEAL OR PUBLISH IN WHOLE OR PART

II NOT TO REPRODUCE OR COPY IT


12345678

12345678

B

C

D

A

B

C

D

A

REV.

APPLE COMPUTER INC.SCALE

NONE

ConnPG 67

Int Disp

PG 69

U4900

SMCADCBSBBSAB,0A

Pg 10

Pg 9

Pg 28

TERMS

Pg 29

CK 505U2900

Clocks

Misc

ParallelTermPg 32

CLnk 0

Pg 15

Pg 15

DDR2 - Dual Channel

1.8V - 64 Bits

DIMM

Pg 15/16

SATAConn

UATA

Conn

DMI SPIPg 23

65

12

34

CorePg 25

E-NETPg 22

CLnk 1Pg 24

PCIPg 23

AZALIA

USB

Pg 23

DIMM’s Clk Gen

U2900

UC500

U6100/50

SPI

Fan Ser

Prt

LPC Conn

J6900/50

Power

Temp Sense

CPU

U6200

J3400

Pg 33

Mini PCI-EAirPort

U3700

NINEVEHE-NET

ConnE-NET

33 MHz

32-Bit

U4000

FireWireConn

Ln1

Ln2

Ln3

Ln4

Ln5

Ln6

Pg 22

UATA

PCI-E

Pg 23

SATA-1

SATA-2

SATA

Pg 22

Pg 24

SMB

LPC

Pg 24

Pg30,31533/667/800? MHz

Conn SupplyDC/Batt

Boot ROM

TV

2.5 GHz

x4 DMI

Main Memory

FSB

J1302

PG 12ITP CONN

J3101J3201

PG 54

J4401

J3900

FW32306

J4300

J6750/00 LINE IN/OUT

J6701 INTERNAL MICJ6702/03 INTERNAL SPEAKER

JACKTRANSLATORS

U6600/10/20

SpeakerAmps

AudioConns

AudioCodec

Pg 23

U2300

SATA-0

CAMERA

79

Pg 24

CLnk 0

SB-ICH8Core 1.05V

8

J5601

U5520

U5500

Pg 13

J3101

J3201

Pg 22

PG 44

IR CONNECTOR

3GTrackpad/Keyboard

GeyserJ4700

J4601

ConnectorsUSB

J4600

64-Bit

U1400

Pg 17,18,19

DMIPg 14

LVDS

RGB

Out

MUX

J9001

Pg 15

Pg 22

U4800

CONTROLLERGPIOs

PG 68

GPIO

DVI-I

J9401

SDVO

U9200

TMDSPg 14

800/1066? MHz

CPU

NB-GMCHCore

1.05 - 1.25V

PCI-E

PG 57 PG 57-67

J4501

PG 40

PG 39

Pg 36

Pg 34

PG 38

Pg 37

Pg 53

PG 54

PG 55

PG 56

J4850

PG 43 PG 42 PG 43 PG 41

J4810

Bluetooth

PG 46

FAN CONN PG 50

POWER SENSE PG 48

PG 44

J5100

U5920 SUDDEN MOTION DETECT PG 51

HEAT-PIPE/FIN

PG 49

PG 49

U1000

2.? GHzCore ~1.2V

051-7455

SYNC_MASTER=WFERRY-WF

2

System Block DiagramSYNC_DATE=05/11/2006

76

01

www.vinafix.vn

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PGOOD_1V5S0PGOOD_1V05S0

16PP3V3_S0_FET

PP3V3_S3

PP1V25_S0_FET

17-1

10-1

06-1

01

23

BATTERY CHARGERPBUS CONVERTER/

UVLO_D

UVLO_C

UVLO_B

UVLO_A

PGOOD_SEQUENCER

(PAGE 35)

1V25S0_RUNSS

P3V3S3_EN_L

(PAGE 53)VOUT

U7720

(PAGE 64)

1.9V S3TPS79501DRB

U3820VOUT

MR*

(PAGE 58)

12

P3V3S0_EN

GATE A

16

PP3V3_ENET_FETENA

VIN

VIN

U7200TPS3808-1.25V

PWRGD(P12)

RSMRST_PWRGD

18

17PP1V9_ENET_REG

PP1V25_S0_REG

SENSERESET*

19

RST*

GATE C

P3V3_ENET_FET

PM3V3ENET_SS

PP5V_S0_FET

VR_PWRGD_CK505U2803

18

V25

VR_PWRGOOD_DELAY

U1000

PWROK

VIN

PWRGD

CK_PWRGD

VRMPWRGD

ICH8M

1.5V

Q5350

(PAGE 61)

PBUSB_VSENSE LT3470

(PAGE 45)

(PAGE 64)

ENABLE

SMC PWRGDRN5VD30A-FU5000

SMC_RESET_L

V

U3830

ENA

SMC

CPU_PWRGD

ENA2

ENA1

PLT_RST_L

RESET*

VIN

CPU

CRESTLINE

U1400(PAGE 13)

SLP_S3_L(P93)

SLP_S4_L(P94)SLP_S4_L

VIN

1.05V

VIN

P60

PM_PWRBTN_L

PM_RSMRST_L

SLP_S5_L(P95)

SMC_RESET_L

(PAGE 44)

U7600

U7790

MAX8516

Q7859

99ms DLY

HCPURST*

IMVP_VR_ON

VIN

ENA

ENA

1.2V YUKON

VREG3

ADAPTER IN :VIN

SOFT

(S0)1V05S0_RUNSS

Q7007

U4900

SMC

(S5)

1V05S0_RUNSS(S0)

(S0)1V5S0_RUNSS

VOUT1

PGOOD1

3.425V G3HOT

R7302PP1V05_S0_REG_R

CLOCK

SLG8LP537VU2900

(PAGE 28)

PLTRST*

PWRBTN*

RSMRST*

(PAGE 22)U2300

PWRGOOD

(PAGE 9)

RSMRST_IN(P13)

RST*

U4900

SMC_CPU_ISENSE

VOUT

P5VS0_EN

U7000

ENA*

(PAGE 58)

PP5V_S0_FET

PGOOD_1V8S3

PP3V3_S0_FET

PM_SLP_S3_L

PP1V8_S0_FET

U2801

ALL_SYS_PWRGD

SMC_ONOFF_L

BATTERY ONLY:

SLP_S5_L

SLP_S3_L

P17(BTN_OUT)PWR_BUTTON(P90)

PLT_RST*

IMVP_VR_ON(P16)

RSMRST_OUT(P15)

FSB_CPURST_L

7A FUSE

02

02

03

04

07

08

VR_PWRGOOD_DELAY

PP5V_S5

08

05

09

PWROKCPUPWRGD(GPIO49)

10

12

13

5V

ISL6130IRZARUNSS_GATE_D

P1V8S0_EN

P3V3S0_EN

GATE D

GATE B

14

15

15

15

15

13

1517

17

PM_SB_PWROK

CLK_PWRGD

PP3V3_S5

(PAGE 35)VOUT

U7300TPS51124

U6201TPS79501

4.5V AUDIO

PP5V_S3

P5VS3_EN_L

16

P1V8_S0_FET

13VLDOIN

(PAGE 45)

14

VOUT1

19

20

22

23

30

26

27

28

29

24

PP5V_S5_REG

(5A MAX

Q7866

Q7000

SMC_CPU_VSENSE

PGOOD_1V5S0

(8A MAX CURRENT)PP1V5_S0_REG(4A MAX CURRENT)

Q7865

PP3V3_S5_REGCURRENT)

09

(7.5A MAX CURRENT)

P5VS0_EN

(36A MAX CURRENT)PPVCORE_CPU_S0

U5300

PP0V9_S0_REG

U7500

STARTSOFT

1715

16

18

18

17

18

14

U7870

S3

12

A

17

17

(S5)

06

P25

SOFTSTART

04-1

WOL_EN

(S0)1V5S0_RUNSS

S51V8S3_RUNSS

PM_SLP_S3_L

SMC_ADAPTER_EN

D6901PPDCIN_G3H

PPBUS_G3H

02

VOUT1

VOUT2

PP3V42_G3H_REG

VOUT2

PGOOD2

PGOOD_1V05S0

VR_PWRGD_CK505_L

PP1V05_S0_REG

3V3S5_RUNSS

(S5) ENA1

DCINADAPTERAC

IN

PM_ENET_EN_L

Q3801

Q3802

12P5VS3_EN_L(S3)DELAY

RC

RC P3V3S3_EN_L12(S3)DELAY

ICHPM_S4_STATE_L

PM_SLP_S3_L

PM_SLP_S4_L

11 Q7860

BATT_POS_F

3S2PBATTERY

ASMC_DCIN_ISENSE

VOUT

(PAGE 66)U7900

ISL6257HRZ

VIN

ENABLES

(S5)CHGR_EN

VINISL9504

CPUVCOREVOUT

CLKEN#

PGOOD

02

VR_ON

U7100(PAGE 59)

PGOOD1,2

RSMRST_PWRGD

PP1V2_ENET_REG

(PAGE 63)

TPS51120

ENA2

IMVP_VR_ON

PPVBAT_G3H_CHGR_REG

LOGIC

SMC_PM_G2_EN

P1V8S0_EN

15

02

1.8V

TPS51116(PAGE 62)

PPVCORE_S0_NB_GFX_IMVP(7.7A MAX CURRENT)

21VIN

ENA

02

(PAGE 60)

ISL6263U7200

GPU_VCORE

VOUT

(PAGE 66)SHGN*

6A FUSE

SMC_ENRGYSTR_LDO_EN

ENRGYSTR LDO

U7975

D7950U7950

VINMAX8719

VOUT

AU7970

01

SMC_BATT_ISENSE

PPBUS_G3H

PM_ENET_EN_L17-1

Q7860

CHGR_EN

Q7004

GFX_VR_EN(S0)START

Q7006

RUNSS_GATE_D

1V25S0_RUNSS

0.9V(10.75A MAX CURRENT)

Q7007

15

P1V25_S0_NB_DPLL

15PP3V3ENET_SS

PP1V8_S3_REG_R

15

19

Q7006

PP1V8_S3_REG

PP1V5_S0_REG

VOUT2 18

R7502

MCH DPLLTPS731125U2265

(PAGE 21)VOUT

PP4V5_AUDIO_ANALOG

ENA

1.25V S0TPS62510

Q7001

Q3810

3.3V

5VS5_RUNSS07Q7859

K36 POWER SYSTEM ARCHITECTURE

051-745576

Power Block DiagramSYNC_MASTER=POWER SYNC_DATE=06/30/2005

01

3

www.vinafix.vn

CRITICAL BOM OPTIONTABLE_5_HEAD

PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM




PART# DESCRIPTIONQTY REFERENCE DESIGNATOR(S)



TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

BOARD STACK-UP AND CONSTRUCTION

Signal aliases required by this page:

NBCFG_PEG_REVERSE

0.031

0.076

Page Notes(NONE)

LOCKED BOOTROM PN 341S2197

NBCFG_DMI_X2

>

>> >

>

>

>

BOMOPTION

0.014

0.014

L11 GROUND

L9 SIGNAL

TOTAL

0.014

L8-L9

>>

>>

BOM OPTION 630-7935

TRACE WIDTH(MM)

>>

>>

>>

>>

>

>>

>>

>

>>

>>

>>

>>

>>

>

CONCEPT>

L4 SIGNAL

INVERTER_UNBUF

>ISL6130

NBCFG_SDVO_AND_PCIE

ITP

0.1

YUKON_ULTRA

>>

>>

>>

>>

LAYER

COMMON

LPCPLUS

0.018

L7-L8

BETTERL1-L2

YUKON_EC

ISL6126

NBCFG_DMI_REVERSE

L1 SIGNAL(TOP)

CONFORMAL_COAT

GOOD

BEST

---

0.07

L11-L12

L9-L10

L12 SIGNAL(BOTTOM)

CONFORMAL_COAT

L6-L7L7 POWER

L5-L6

L4-L5L5 GND

L6 POWER

L8 GROUND

L2 GROUND

L2-L3L3 SIGNAL

THICKNESS

0.014

0.076

0.014

0.014

1.276

0.156

0.047

0.018

0.07

0.0760.014

(MM)

0.047

0.1

0.1

---

0.1

0.1

---

---

---

(NONE)

(NONE)

L3-L4 0.1560.0140.076

0.07

MLB STACKUP

---

0.079

ODD_PWR_RESUMEODD_PWR_CORESTANDOFFFANCYNORMAL

M70 GOOD

ARB_ONLY

BOM OPTION REMOVED

BOM OPTION REMOVED

BOM OPTION REMOVED

BOM OPTION REMOVED

BOM OPTION REMOVED

BOM OPTION REMOVED

BOM OPTION REMOVED

BOM OPTION REMOVED

BOM OPTION REMOVED

BOM OPTION REMOVED

BOM OPTION REMOVED

BOM OPTION REMOVED

K36

K36_PGM

K36 GOOD K36 BETTER K36 BEST630-9104 630-9105 630-9106EVT EVT EVT

L10-L11L10 SIGNAL

0.0310.076

0.07

0.079

NBCFG_DYN_ODT_DISABLE

NO_REBOOT_MODE

INVERTER_BUF

ALTERNATE

Power aliases required by this page:

BOM options provided by this page:

SIGNAL(High Speed) SIGNAL(High Speed) GROUND POWER POWER GROUND SIGNAL(High Speed) SIGNAL(High Speed) GROUND SIGNAL

GROUND SIGNAL

BOTTOM111098765432Top

LBL,P/N LABEL,PCB,28MMX6MM GOODCRITICAL1826-4393 EEE:Z55

LBL,P/N LABEL,PCB,28MMX6MM826-4393 BETTER1 CRITICALEEE:Z56

826-4393 BESTCRITICAL1 LBL,P/N LABEL,PCB,28MMX6MM EEE:Z57

341S2198 K36_PGM1 CRITICALIC,SMC,HS8/2116 U4900

341S2196 K36_PGMU6100 CRITICAL1 IC,16MBIT 8PIN SPI SERIAL FLASH,SOIC8

341S2093 K36_PGMCRITICALU48001 IC,CYPRESS,CY7C63833,ENCORE_II,USB_CONTR

1 U1000 CRITICAL GOODIC,MDC,SR,E1,2.0G,800FSB,4M,BGA337S3463

K36CRITICALU14001 IC,CRESTLINE,GM965,667343S0448

K362 J3101,J3201 CRITICALIN-LINE SODIMM CONNECTOR516-0162

341S2060 K36_PGMU3780 CRITICAL1 IC,EEPROM,SERIAL IIC,8KBIT,SO8

K36IC,ICH8,BGA CRITICALU23001338S0434

U1000 BEST1 CRITICALIC,MEC,SR,E1,2.4G,800FSB,4M,BGA337S3465

U1000 BETTERCRITICAL1 IC,MDC,SR,E1,2.2G,800FSB,4M,BGA337S3464

051-7455

SYNC_DATE=07/18/2005

76

CONFIGURATION OPTIONS

4

01

SYNC_MASTER=SMC

PAGE_BORDER=TRUE

www.vinafix.vn

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

7/10/2007

- SMC MANAGEMENT SMBUS CONNECTION:- SMB_ME_CLK AND SMB_ME_DATA ON SOUTHBRIDGE DISCONNECTED FROM SMB_MGMT_CLK AND SMB_MGMT_DATA FROM SMC.B

CSA PAGE 50:

- CHANGE BOM STUFFING TO ENABLE ON-BOARD MICROPHONE CONNECTOR (M42/M42A SOLUTION) INSTEAD OF ROUTING- CHANGE BOM STUFFING TO SPEED UP PORT POWER SHUT-OFF RESPONSE TIME DURING ACTIVE LATE-VG EVENT (RADAR: 4985252)

- FIX LINDA CARD POWER ALIAS (NEED TO CONNECT TO PP3V42_G3HOT INSTEAD OF PP3V3_S5) - RADAR: 4927858- HIGH-PRECISION 0.1% RESISTORS TO INCREASE OUTPUT VOLTAGE REGULATION (5V, 3.3V, PBUS_LDO) ACCURACY - RADAR:4972500

- CHANGE R7208 FROM 8.66K TO 15.8K.CSA PAGE 72:- NO STUFFED R6854CSA PAGE 68:- MADE DZ6702, DZ6703, DZ6704, DZ6705, DZ6752, DZ6753, DZ6754, DZ6755, DZ6770, DZ6771B CRITICAL.- STUFFED R6740.- REMOVED NO STUFF RESISTORS R6730, R6731, AND R6732. ALSO REMOVED L6774.CSA PAGE 67:- MADE NO_TEST ATTRIBUTE VISIBLE FOR NET NC_VRP CONNECTED TO PIN 37 OF U6200.- CHANGED C6210 FROM A CASE-R 10UF TANT. CAP. TO A SMA-LF 3.3UF TANT. CAP.CSA PAGE 62:-ADD 2ND SMS (U5930).CSA PAGE 59:- THE PULL-UP RESISTORS SHOULD BE CONNECTED BETWEEN SMB_MGMT_CLK AND SMB_MGMT_DATA TO =I2C_SMS_SCL AND =I2C_SMS_SDA OF THE NEW ACCELEROMETER.- ADD TWO NEW 10K PULL-UP RESISTOR (R5232 & R5233) TO =PP3V3_S3_SMBUS_SMC_MGMT.B - THE 10K PULL-UP RESISTORS (R5230 AND R5231), AND STILL REMAIN CONNECTED TO PP3V3_S5_SMBUS_SB_ME AND STAY ON THE SB SIDE.- ICH8-M ME SMBUS:CSA PAGE 52:- CHANGE R5077 FROM PULL-UP TO A PULL-DOWN RESISTOR AND NAME IT SMC_SMS_INT.- REMOVE ALIAS FOR =SMC_SMS_INT TO SMC_PG1 - SIGNAL SHOULD JUST BE CALLED SMC_SMS_INT.CSA PAGE 49:- ADD R4670 & R4671. (USB BYPASS ROUTING).- CHANGE U4675 FROM APN 353S1505 TO APN 353S1742. (SMALL PACKAGE)CSA PAGE 46:- ADD CRITICAL TO U4401.CSA PAGE 44:- ADD CRITICAL TO U2900.CSA PAGE 29:- ADD ALIAS =PP3V3_S3_SMBUS_SMC_MGMT TO PP3V3_S3.CSA PAGE 8:- UPDATE EEE CODES, Z55 FOR GOOD, Z56 FOR BETTER, Z57 FOR BEST.- SMC PART NUMBER CHANGES FROM 341S2088 TO 341S2198.- BOOTROM PART NUMBER CHANGES FROM 341S2085 TO 341S2196.CSA PAGE 4:

- ADD ISOLATION BUFFER FOR ODD_RESET_L SIGNAL, ADD 100K PULL-DOWN TO ODD_PWR_EN_L, ADD ’DRAG’ CIRCUIT TO

- LOWER RDS(ON) MOSFET (FDC606P - APN: 376S0552) FOR ODD AND LCD POWER - RADAR: TBD

PROPERLY DISCHARGE ODD POWER WHEN IT’S TURNED OFF - RADAR: 4923903

- WAKE-ON-WIRELESS SUPPORT - RADAR: 4954357

Revision History

- TEST POINT MOVEMENTS REQUESTED BY ICT AND MAC-1 GROUPS - RADAR: 4924481- MODIFY FIREWIRE CONNECTOR SYMBOL TO SUPPORT MINI-DVI CONNECTOR WITH TAB- MOVE SMC RESET BUTTON PAD TO TOP SIDE OF MLB - RADAR: 4920913- CHANGE 10UF, 16V CPU VCORE CAPS TO 10UF, 6.3V CAPS - RADAR: 4952553

- 4954357 BREAK OUT =PP3V3_S3_AIRPORT_AUX(J3400,PIN 24) FROM PP3V3_S3_AP_AUX AGAIN.

- 4999533 SWAP PIN 2 AND PIN 3 OF MIC CONNECTOR, BACK TO M42 PIN OUT.- 5029811 CHANGE Q7940 FROM 376S0326 TO 376S0558.

M70 EVT TO DVT CHANGES

- ADD 270K PULL-DOWN RESISTOR ON HTPLG - RADAR: 4888755

- 4954357 ADD =PP3V3_S3_AIRPORT_AUX BACK TO PP3V3_S3 ALIAS.CSA PAGE 34:- 4954357 MOVE C3409 AND C3410 FROM PP3V3_S3_AP_AUX RAIL TO =PP3V3_S3_AIRPORT_AUX RAIL.

MICROPHONE THROUGH LVDS CABLE

CSA PAGE 94:- SYNC FROM AUDIO TEAM.CSA PAGE 62,66,67,68:

CSA PAGE 25:

3/8/2007

CSA PAGE 25:

CSA PAGE 67:CSA PAGE 62,66,67,68:

- NO STUFF 3G CONNECTOR CIRCUITRY

CSA PAGE 22:

- UPDATE SYMBOL FOR J4501.

CSA PAGE 79:

CSA PAGE 94:

CSA PAGE 47:3/14/2007

- SYNC FROM AUDIO TEAM.

CSA PAGE 77:

- ADD TEXT NOTE TO CHANGE L9404 FROM 155S0303 TO 155S0348 WHEN SYMBOL IS READY.- DELETE LVDS_VREFH AND LVDS_VREFL TO GROUND TO FIX LVDS GLITCH.- ADD TEXT NOTE TO UPDATE J6900 FROM 518S0287 TO 518S0526 WHEN SYMBOL IS READY.

- 4986074 CHANGE R9469 FOR CRT_TVO_IREF FROM 1.3K TO 1.21K.

- ADD TEXT NOTE TO UPDATE J4700 FROM 516S0251 TO 516S0588 WHEN SYMBOL IS READY.CSA PAGE 69:

- 4986074 CHANGE L2205 TO R2205(100OHM,5%,1/10W,0603).- 4924443 CHANGE R2514 FROM 100K PULL-DOWN TO 10K PULL-UP TO 3.3V_S5.

CSA PAGE 45:- 4924443 CHANGE R2514 FROM 100K PULL-UP TO 47K PULL-UP.

3/12/2007

AND REVERT REFERENCE DESIGNATORS. (CHANGE FROM TPS62510 TO LTC3412A)C7723 FROM 2.2NF TO 10000PF, C7724 FROM 22PF TO 100PF, C7728 FROM 2.2NF TO 10000PF,

- 5048817 SYNC 1P25V REGULATOR CIRCUIT FROM M82, CHANGE R AND C TO 0402, CHANGE =PP3V3_S5_P1V25S0 TO =PP3V3_S5_1V25S0,

3/5/2007CSA PAGE 8:

- 5040728 STUFF C9421 FOR EMI.CSA PAGE 49:

CSA PAGE 4:- CHANGE GOOD CPU FROM 337S3471(1.8G) TO 337S3463(2.0G).- CHANGE BETTER CPU FROM 337S3456(2.0G) TO 337S3464(2.2G).- CHANGE BEST CPU FROM 337S3457(2.2G) TO 337S3465(2.4G).- CHANGE NB FROM 338S0426(500M) TO 343S0448(667M).CSA PAGE 16:- DISCONNECT GFX_VID<0> TO GND.- CONNECT GFX_VID<0:3> TO GFX_VID0:3 ON NB.- ADD R1600 (0OHM, 0402) TO CONNECT GFX_VID<4> TO GND.CSA PAGE 22:- 5282756 ADD C2207 (0.1UF, 0402).- SIZING DOWN R2205 FROM 0603 TO 0402 FOR PLACEMENT.- CHANGE GFX_VID<1:4> TO GFX_VID<0:3>.- CHANGE STRAPPING FROM 0010 ON GFX_VID<1:4> TO 0001 ON GFX_VID<0:3>.CSA PAGE 39:- EDIT BOM OPTION TABLE.CSA PAGE 46:- CHANGE U4600 FROM 353S1245 TO 353S1728.- REMOVE MIN_NECK_WIDTH=0.3MM FROM PP5V_S3_USB2_EXTA/B.- ADD NOSTUFF R4660 AND R4661.CSA PAGE 47:- CHANGE J4700 FROM 516S0251 TO 516S0588.CSA PAGE 69:- CHANGE J6900 FROM 518S0287 TO 518S0526.- REPLACE BATTERY INTERFACE CIRCUIT WITH THE ONE ON M42B ESTAR.CSA PAGE 94:- 5040728 CHANGE L9404 FROM 155S0303 TO 155S0348.

CSA PAGE 4:- REPLACE ALL M70 WITH K36 (TEXT, BOM OPTIONS, 630 NUMBERS).CSA PAGE 21:- CHANGE C2173 FROM 128S0051 TO 128S0113 PER CE.CSA PAGE 27:CSA PAGE 28:- CHANGE J2800 FROM 518S0487 TO 518S0519.CSA PAGE 46:- REMOVE R4660 AND R4601 (U4675 BYPASS RESISTORS).

M70 DVT TO K36 CHANGES6/29/2007

CSA PAGE 48:CSA PAGE 55:- J5550 CHANGES FROM 2PIN TO 4PIN.CSA PAGE 56:- CHANGE J5601 FROM 518S0369 TO 518S0521.CSA PAGE 67:- CHANGE J6702 FROM 518S0487 TO 518S0519.- CHANGE J6703 FROM 518S0369 TO 518S0521.CSA PAGE 90:- CHANGE J9000 FROM 518S0369 TO 518S0521.

CSA PAGE 8:- REMOVE NO_TEST=TRUE FOR CK505_PCI4_CLK_SPN, CK505_SRC1_N/P_SPN, CK505_SRC3_N/P_SPN, CK505_SRC7_N/P_SPN, CK505_SRC_CLKREQ1/3_L?SPN.- ADD FUNC_TEST=TRUE FOR PP1V05_S0_R.CSA PAGE 9:- REMOVE ALIAS FOR =FWPWR_PWRON.- ADD SPN ALIASES FOR TP_CK505_SRC7_N/P.- ADD SPN ALIASES FOR CK505_PCI2/4_CLK.CSA PAGE 12:- REMOVE R1290 TO R1296 ON CPU_VID<0:6>.CSA PAGE 13:- DELETE TEXT NOTE AND WITH RESET BUTTON.CSA PAGE 15:- RENAME LVDS_VREFH/L TO TP_LVDS_VREFH/L.CSA PAGE 25:- ADD R2597 AND R2596 FOR 10K PU ON GPIO6 AND GPIO17(EXTGPU_RST_L).

- CHANGE L2902 AND L2903 FROM 155S0302 TO 0OHM R2906 AND R2907.- NOSTUFF C2907, C2910, C2916, C2911, C2914.- CHANGE R2900, R2901 FROM 2.2OHM TO 0OHM.- CHANGE R2902 FROM 1OHM TO 0OHM.CSA PAGE 44:- REMOVE TEXT NOTE WILL CHANGE TO 606P.CSA PAGE 53:- RE-DRAW CPU VOLTAGE SENSE RC FILTERING.CSA PAGE 62:- RE-CONNECTED /SHDN INPUT OF U6801 SO THAT IT’S CONTROLLED BY U6200 PORTA VREF. - DISCONNECTED GPIO1 AND TERMINATED IT WITH A 10K PULL DOWN.- ADDED A NO STUFF PULL-UP TO CODEC_DVDD AT GPIO1.- ADDED SMALL 15PF COMPENSATION CAP. TO U6201 FEEDBACK NETWORK (C6224).CSA PAGE 67:- CHANGED ALL TRANSIENT SUPPRESSORS TO 6.8V/100PF DEVICES (WERE ORIGINALLY 8V/100PF DEVICES).- ADDED L6771 AND L6773 TO MIC INPUT EMI FILTER.- REMOVED DZ6772.- ADDED R6740 NO STUFF.CSA PAGE 68:- CONNECTED MIC_SHLD_CONN TO GND_CHASSIS_AUDIO_MIC THROUGH R6854.- ADDED R6856 NO STUFF.CSA PAGE 71:- RENAME CPU_VID_R<6:0> TO CPU_VID<6:0>.

CSA PAGE 29:- CHANGE R2514 TO 100K.

7/5/2006

- CHANGE C2700 FROM 128S0051 TO 128S0113 PER CE.

- CHANGE J4810 FROM 518S0369 TO 518S0521.- CHANGE U5500 FROM M70 EMC1033 CIRCUIT TO M71 EMC1043 CIRCUIT.

7/6/2006

- ADD FUNC_TEST=TRUE FOR THRM_FINSTACK_P/N.

- REMOVE ALIASES FOR GND_CHASSIS_AUDIO_SPKRCONN,GND_CHASSIS_AUDIO_SHIELD1,GND_CHASSIS_AUDIO_SHIELD2,GND_CHASSIS_AUDIO_SHIELD3,MIC_SHIELD_LVDS_R,MIC_SHLD_CONN.

- REMOVE NO_TEST=TRUE FOR 1V8S3_COMP, 1V8S3_FSET, 3V3S5_COMP, 3V3S5_FSET, 1V05S0_COMP, 1V05S0_FSET, IMVP6_RBIAS, IMVP6_COMP, 5VS5_RUNSS, 1V5S0_RUNSS.

- CHANGE J3900 FROM 514S0143 TO 514-0443.

- CHANGE SB FROM 338S0427 TO 338S0434.

CSA PAGE 90:

- CHANGE LOAD CAP STUFFING OPTION FOR RTC AND ETHERNET CRYSTALS TO MEET 5XESR (-R) REQUIREMENT

- FIX MOJO-CARD SMC TX, RX REVERSAL - RADAR: 4910888

M70 PROTO TO EVT CHANGES

SYNC_DATE=N/ASYNC_MASTER=N/A

01

765

Revision History

051-7455

www.vinafix.vn

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

LVDS NO_TESTS

FIREWARE NO_TESTS

NO_TESTCLOCK NO_TESTS

NO_TESTPower Supply NO_TESTs

Power Supply FUNC_TEST

THERMAL FUNC_TEST

SPEAKER FUNC_TEST

LPC+ Debug Connector

FUNC_TEST

FUNC_TEST

Functional Test Points

Audio FUNC_TEST

NO_TEST

NO_TEST

FUNC_TEST

NO_TEST

Battery Digital Connector

SLEEP LED FUNC_TEST

Fan Connectors

Other Func Test Points

SMBus FUNC_TEST

FIREWIRE FUNC_TEST

SMC FUNC_TEST

Battery FUNC_TEST

USB FUNC_TEST

MIC FUNC_TEST

DC-JACK FUNC_TEST

Battery charger FUNC_TEST

INVERTER CONNECTOR FUNC_TEST

FUNC_TEST

I1

I10

I11

I111

I112

I113

I114

I115

I116

I117

I118

I119

I12

I120

I122

I125

I15

I151

I152

I153

I154

I155

I156

I157

I158

I159

I16

I160

I161

I162

I163

I164

I166

I167

I168

I169

I17

I171

I172

I173

I174

I175

I176

I177

I178

I18

I180

I181

I182

I183

I186

I187

I188

I189

I19

I190

I191

I194

I195

I199

I20

I200

I201

I202

I203

I204

I205

I206

I207

I208

I209

I21

I210

I211

I212

I213

I214

I215

I219

I22

I220

I221

I222

I223

I224

I225

I226

I227

I228

I229

I23

I230

I231

I232

I233

I234

I235

I236

I237

I238

I239

I24

I240

I241

I242

I243

I244

I25

I29

I3

I31

I32

I33

I36

I38

I4

I44

I45

I46

I47

I48

I57

I58

I59

I60

I61

I63

I71

I72

I73

I74

I75

I76

I77

I78

I79

I80

I81

I82

I83

I84

I85

I86

I87

I88

I89

I9

I90

I91

I92

I93

I94

I95

I96

FUNC TEST 1 OF 2

6

01

76

051-7455

FW_B_TPA_P_SPNTRUE

CK505_PCIF1_CLKTRUE

TRUE CK505_LVDS_N

1V5S0_RUNSS5VS5_RUNSSIMVP6_COMP

THRM_FINSTACK_NTRUE

PP1V05_S0_RTRUETRUE PPVCORE_S0_CPU

PP1V05_S0TRUE

PP1V8_S0TRUEPP1V5_S0TRUE

ALL_SYS_PWRGDTRUE

TRUE PP3V3_S0TRUE PP5V_S0

PP1V2_ENET_S0TRUE

PP3V42_G3HTRUE

TRUE SPKRCONN_R_N_OUT

SMC_CPU_VSENSETRUETRUE SMC_MANUAL_RST_L

TRUE PP3V3_S3TRUE PP5V_S3

THRM_DIMM_DX_F_PTRUETHRM_FINSTACK_PTRUE

TRUE PP3V3_S3_BT_F

TRUE PPBUS_G3H

TRUE PP5V_S5

TRUE THRM_HEATPIPE_NTRUE THRM_HEATPIPE_P

TRUE MIC_LO_CONNTRUE MIC_SHLD_CONN

TRUE SPKRCONN_SUB_N_OUTTRUE SPKRCONN_SUB_P_OUT

THRM_DIMM_DX_F_NTRUE

TRUE CK505_SRC6_PCK505_SRC6_NTRUE

CK505_SRC8_PTRUE

TRUE CK505_SRC5_PCK505_SRC5_NTRUECK505_SRC4_PTRUECK505_SRC4_NTRUE

CK505_SRC2_NTRUECK505_SRC2_PTRUE

CK505_LVDS_PTRUE

CK505_SRC8_NTRUE

LPC_FRAME_LTRUETRUE PM_CLKRUN_L

SMC_FAN_1_TACHTRUE

=PP3V42_G3H_LPCPLUSTRUE

TRUE PP18V5_G3H

=PP1V05_S0_REGTRUE

TRUE SMC_RX_LTRUE SMC_NMI

SMC_BATT_ISETTRUE

ACZ_SDATAIN<0>TRUE

ACZ_SYNCTRUE

SMC_BATT_TRICKLE_EN_LTRUE

TRUE SMC_BATT_CHG_EN

LVDS_B_DATA_N2_SPNTRUE

SMC_BS_ALRT_LTRUE

TRUE =PP5V_S0_AUDIO_AMP

GND_AUDIO_CODECTRUETRUE GND_AUDIO_AMPTRUE =PP5V_S0_AUDIO

FW_B_TPA_N_SPNTRUE

FW_B_TPB_N_SPNTRUE

LVDS_B_CLK_P_SPNTRUE

FW_C_TPBIAS_SPNTRUE

FW_B_TPB_P_SPNTRUEFW_C_TPA_N_SPNTRUE

TRUE LVDS_B_DATA_N1_SPN

LVDS_B_CLK_N_SPNTRUE

FW_C_TPB_N_SPNTRUE

=PP3V3_S0_FAN_RTTRUE

FW_C_TPB_P_SPNTRUE

LVDS_B_DATA_N0_SPNTRUE

TRUE LVDS_B_DATA_P2_SPN

TRUE SMC_FAN_3_TACH

BATT_NEGTRUE

TRUE SMBUS_BATT_SDA_FTRUE SMBUS_BATT_SCL_F

BATT_POSTRUE

PP0V9_S0TRUE

TRUE GND_BT_F

SMC_BC_ACOKTRUESMC_ADAPTER_ENTRUE

SMC_FAN_1_CTLTRUE

TRUE FAN_RT_TACHTRUE FAN_RT_PWMTRUE =PP5V_S0_FAN_RT

BOOT_LPC_SPI_LTRUE

SMC_TDOTRUE

TRUE SMC_RESET_L

TRUE PM_SUS_STAT_LTRUE INT_SERIRQ

TRUE LPC_AD<2>TRUE PCI_CLK33M_LPCPLUS

FWH_INIT_LTRUESMC_TX_LTRUESMC_MD1TRUE

TRUE SMC_TDI

TRUE LINDACARD_GPIO

TRUE SMBUS_SMC_B_S0_SCLTRUE SMBUS_SMC_B_S0_SDA

SYS_LED_ANODETRUE

PPFW_SWITCHTRUE

TRUE SPKRCONN_L_P_OUTTRUE SPKRCONN_L_N_OUT

TRUE SPKRCONN_R_P_OUT

SMC_LIDTRUE

PP1V8_S3TRUE

PP3V3_S5TRUE

FW_B_TPBIAS_SPNTRUE

FW_C_TPA_P_SPNTRUE

LVDS_B_DATA_P1_SPNTRUE

TRUE SMC_TCK

TRUE LPC_AD<3>

SYS_ONEWIRETRUE

INV_GNDTRUE

USB2_3G_F_PTRUE

TRUE ACZ_RST_L

TRUE TP_USB_EXCARD_PTRUE TP_USB_EXCARD_N

TP_USB_EXTC_PTRUETP_USB_EXTC_NTRUEUSB2_BT_F_PTRUEUSB2_BT_F_NTRUEUSB2_3G_F_NTRUE

TRUE PPBUS_ALL_INV_CONN

ACIN_ENABLE_GATETRUE

TRUE PPVBAT_G3H_CHGR_OUT

PP5V_INV_FTRUEINV_BKLIGHT_PWM_LTRUE

TRUE MIC_HI_CONNTRUE MIC_SHIELDTRUE MIC_LO

MIC_HITRUE

ACZ_SDATAOUTTRUEACZ_BITCLKTRUE

LPC_AD<0>TRUE=PP5V_S0_LPCPLUSTRUE

LPC_AD<1>TRUE

TRUE SMC_TRST_LTRUE DEBUG_RESET_L

SMC_TMSTRUE

CK505_CPU0_NTRUECK505_CPU0_PTRUE

TRUE CK505_CPU2_ITP_SRC10_P

CK505_CPU1_PTRUECK505_CPU2_ITP_SRC10_NTRUE

CK505_DOT96_27M_PTRUETRUE CK505_DOT96_27M_N

CK505_CPU1_NTRUE

IMVP6_RBIAS

46B4

66A6

46B6

46B6

45D5

54D8

57C7

45D5

57A8

75D3

75C3

58A3

56A6

75C3

75C3

75C3

75C3

75C3

75C3

75C3

75C3

75C3

75D3

75C3

46B6

44C5

44C5

66A3

66A4

57A2

54C8

56C4

57C3 46B6

46B4

46B4

46B4

46C4

75C3

44C5

46B4

46B4

45C5

46B4

46C4

57C8

46C6

46C6

46B6

75D3

75D3

75D3

75D3

75D3

75D3

75D3

75D3

29B6

29C6

61B5

65C5

59B7

45D2

44D8

45D1

55C2

48B1 55D3

55D3

55C2

55C2

29C6

29B6

29B6

29C6

29C6

29C6

29C6

29C6

29C6

29C6

29B6

44C8

37A5

50C4

46C6

61B8

44B8

46B4

66A8

53C7

53C7

45B6

45B6

45C5

54B8

53A7

50C4

44A8

45B6

50B4

50C4

46B6

45C5

45D7

44C5

44C8

44C8

46C4

44B8

46B6

45C5

24D5

76C3

76C3

45A3

55C2

55C2

55C2

44B5

45C5

44C8

45D5

53B7

66A6

66C2

55D3

56A6

56A6

53C7

53C7

44C8

46C6

44C8

46B6

46B6

45C5

29D6

29D6

29D6

29D6

29D6

29B6

29B6

29D6

59B7

8D1

28B6

28B4

58B1

63B5

59A4

49C6

7D7

7D7

7D7

7B7

7C7

27A5

7D4

7A7

7B5

7C1

54C1

44C5

45D8

7A4

7A4

49B6

49C6

43D2

7B1

7C1

49D6

49D6

55B1

55A1

54B1

54B1

49B6

28B4

28B4

28A4

28B4

28B4

28B4

28B4

28B4

28B4

28B4

28A4

22D4

24C8

44A8

7B1

7B1

7D8

41A8

44C1

44B5

8A5

8A5

44C8

44C8

8D5

44C5

7A7

8B4

8A4

7A7

8D1

8D1

8D5

8D1

8D1

8D1

8D5

8D5

8D1

7C4

8D1

8D5

8D5

44A4

57A5

57A5

57A5

57B5

7D7

43C2

44C5

44A8

50C3

50B3

7A7

23B5

44B5

44C3

24D5

24C8

22D4

29B3

46C5

41A8

44D1

44B5

24A7

47C5

47C5

40C5

38D3

54C1

54C1

54D1

42C3

7B4

7D1

8D1

8D1

8D5

44B5

22D4

44B8

67D2

43A4

8A5

8B2

8B2

8B2

8B2

43C2

43C2

43A4

67D3

57C3

66B5

67D3

67D2

55B1

55B3

55B3

8A5

8A5

22D4

7A7

22D4

44C1

27D1

44B5

28C4

28C4

28C4

28C4

28C4

28A4

28A4

28C4

59A4

www.vinafix.vn

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

"S3" RAILS

(CPU VCOR PWRE)

(REGULATOR OUTPUT CPU VCORE PWR)

(DDR2 TERMINATION 0.9V PWR)

(REGULATOR OUTPUT CPU 0.90V PWR)

"S0,S0M" RAILS "S5" RAILS

"G3H" RAILS

7

01

SYNC_MASTER=WFERRY

Power AliasesSYNC_DATE=06/15/2006

76

051-7455

VOLTAGE=1.8VMAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmPP1V8_S3

=PP1V8_ENET_P1V8ENETFET

=PP3V3_S3_SMS=PP3V3_S3_BT=PP3V3_S3_PCI=PP3V3_S3_FW=PP3V3_S3_AIRPORT_AUX

=PP1V8_S3_REG_R

=PP3V3_ENET_PHY

=PP1V2_ENET_REG

=PP1V25_S0_SB_DMI

=PP1V05_S0_CPU

=PP1V05_S0_SB_CPU_IO

MIN_NECK_WIDTH=0.2 mm

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.4 mmPP0V9_S0

VOLTAGE=0.9V

=PP3V3_S3_FET

=PP3V3_S3_ENETPWRCTL

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=5V

PP5V_S3

PP1V8_S3_MEM_NBMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.4 mm

MAKE_BASE=TRUEVOLTAGE=1.8V

=PP3V3_S3_SMBUS_SMC_A_S3=PP3V3_S3_PDCISENS

=PP1V8_S3_NB_VCC

=PP1V8_S3_REG

=PP1V8_S3M_MEM_NB

=PP1V8_S3_MEM

=PP1V8_S3_FET=PP1V8_S3_MEMVREF

=PP1V9_ENET_REG

=PP3V3_S0_TMDS

=PP3V3_S0_NB_VCCSYNC=PP3V3_S0_CK505

=PP3V3_S0_NB_VCCA_PEG_BG

=PP3V3R1V5_S0_SB_VCCHDA

=PP5V_S0_IDE_RESET

=PP1V8_S0_NB_LVDS

MAKE_BASE=TRUEVOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmPP3V3_ENET_FET =PP1V8R2V5_ENET_PHY

=PP1V8_S0_YUKON

=PP3V3_S0_NB_GFX_IMVP=PP3V3_S0_IMVP

=PP3V3_S0_ENET=PP3V3_S0_FAN_RT

=PP3V3_S0_AUDIO

=PP3V3_S0_TMDS

=PP3V3_S0_SB_PCI

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 mm

PP3V3_S0

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mm

=PP1V5_S0_SB_VCC1_5_A_USB_CORE

=PP5V_S3_FET

=PP3V3_S0_SB_VCC3_3_SATA

=PP3V3_S0_NB_VCCHV

=PP3V3_S0_FET

=PP3V3_S0MWOL_SB_VCCCL3_3

=PPVIN_S0_NB_DPLL

=PP3V3_S0MWOL_SB_VCCLAN3_3

=PPBUSB_G3H

VOLTAGE=2.5V

MIN_LINE_WIDTH=0.6 mmPP1V9_ENET_S0MIN_NECK_WIDTH=0.2 mm

MAKE_BASE=TRUE

=PP3V3_S0_CPUPOWER

=PP3V3_S0_PDCISENS

=PP3V3_S0_SB_VCCGLAN3_3

=PP1V05_S0_REG_R

=PP1V05_S0_REG

=PP5V_S0_FET

=PP1V25_S0_REG

=PP5V_S3_CAMERA

=PP5V_S5_REG

=PP3V42_G3H_REG

=PP5V_S3_SYSLED=PP5V_S3_GEYSER=PP5V_S3_IR

=PP1V5_S0_REG

=PP1V8_S0_FET

=PP1V8_S0_TMDS

=PPVCORE_S0_NB_GFX_IMVP

=PPVIN_S5_CPU_IMVP=PPVIN_S5_NB_GFX_IMVP

=PPVCORE_S0_CPU

=PP0V9_S0_REG

=PPVORE_S0_CPU_REGMIN_NECK_WIDTH=0.3 MMMIN_LINE_WIDTH=0.3 mm


PPVCORE_S0_CPU

=PP3V3_S0_SB_VCC3_3_DMI

=PP3V3_S0_FW

=PP3V3_S0_SMBUS_SMC_B_S0=PP3V3_S0_SMBUS_SMC_0_S0

=PP3V3_S0_PATA

=PPBUS_S5_INV=PPVIN_S5_1V8S30V9S0

=PPVIN_S5_3V3S5=PPVIN_S5_5VS5

=PPVIN_S5_1V05S0=PPVIN_S5_1V5S0

=PPVIN_S5_IMVP

=PP3V3_S0_LCD

=PP3V3_S0_SMBUS_SB=PP3V3_S0_LPCPLUS=PP3V3_S0_SMC_LS

=PP3V3_S0_RSTBUF=PP3V3_S0_SB_PM

=PP3V3_S0_SB_VCC3_3_PCI

=PP3V3_S0_SB_GPIO=PP3V3_S0_NB_FOLLOW

=PP5V_S5_1V51V05S0

=PPBUS_S5_FWPWRSW

=PP3V3_S0_PBATTISENS

=PP1V5_S0_SB_VCC1_5_A_ATX =PP1V2_ENET_PHY


VOLTAGE=1.2VMAKE_BASE=TRUE

PP1V2_ENET_S0MIN_NECK_WIDTH=0.2 mm

=PPSPD_S0_MEM

=PP3V3_S0MWOL_SB_CLINK0

=PP3V3_S0_NB

=PP3V3_S5_SB_CLINK1

=PP18V5_G3H_INRUSH

=PP3V3_S0_THRM_SNR

=PP3V3_S5_REG

=PP3V3_S0_SB

=PP3V3_S0_AIRPORT

=PP5V_S5_1V8S30V9S0

=PP5V_S5_PATA

=PPBUSA_G3H

=PPDCIN_G3H


MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mm

PPBUS_G3H

=PPVIN_G3H_P3V42G3H

MIN_NECK_WIDTH=0.2 mmVOLTAGE=18.5VMAKE_BASE=TRUE

PPDCIN_G3HMIN_LINE_WIDTH=0.6 mm

=PP18V5_G3H_CHGR

PP18V5_G3HMIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.20 MM


=PP3V42_G3H_LPCPLUS=PP3V42_G3H_SMCUSBMUX=PP3V42_G3H_SB_RTC=PP3V42_G3H_PWRCTL=PP3V42_G3H_LIDSWITCH=PP3V42_G3H_ACIN=PP3V42_G3H_SMBUS_SMC_BSA=PP3V42_G3H_SMCVREF=PP3V42_G3H_SMC

PP3V42_G3HMIN_LINE_WIDTH=0.3 mmMIN_NECK_WIDTH=0.2 mm


=PP5V_S5_FET=PP5V_S5_PWRCTL

=PP5V_S5_USB

=PP5V_S5_SBMAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmPP5V_S5

VOLTAGE=5V

=PP3V3_S5_AIRPORT_AUX=PP3V3_S5_1V25S0

=PP3V3_S5_LCD=PP3V3_S5_ROM=PP3V3_S5_SMBUS_SB_ME

=PP3V3_S5_FWLATEVG=PP3V3_S5_SB_3V3_VCCSUSHDA=PP3V3_S5_SB_VCCSUS3_3=PP3V3_S5_SB_VCCSUS3_3_USB

=PP3V3_S5_SB_PM=PP3V3_S5_SB_USB=PP3V3_S5_SB_GPIO=PP3V3_S5_SB=PP3V3_S5_FET

PP3V3_S5

MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=3.3V

=PP3V3_S0_SB_VCC3_3_VCCPCORE=PP3V3_S0_SB_VCC3_3_IDE

=PP0V9_S3M_MEM_TERM

PP1V05_S0



=PPVCORE_S0_SB

PP1V05_S0_RMIN_LINE_WIDTH=0.6 mmMIN_NECK_WIDTH=0.2 mmVOLTAGE=1.05VMAKE_BASE=TRUE

=PP1V05_S0_NB_PCIE=PPVCORE_S0_NB=PP1V25R1V05_S0_FSB_NB=PP1V25R1V05_S0_NB_VTT=PP1V05_S0M_NB_VCCAXM



PP1V25_S0

MAKE_BASE=TRUE=PP1V25_S0_NB_PLL

=PP1V25_S0_NB_VCCDMI

=PP1V25_S0_NB_VCCAXF=PP1V25_S0_NB_PLL=PP1V25_S0_NB_VCC=PP1V25_S0_NB_VCCA=PP1V25_S0_FET


MAKE_BASE=TRUE


PP1V5_S0

VOLTAGE=1.5V

=PP1V5_S0_CPU=PP1V5_S0_NB_TVDAC=PP1V5_S0_SB=PP1V5_S0_SB_VCC1_5_A_ARX

=PP1V5_S0_SB_VCC1_5_A=PP1V5_S0_SB_VCCUSBPLL

=PP1V5_S0_AIRPORT=PP1V5_S0_NB_FOLLOW

MIN_NECK_WIDTH=0.2 mmVOLTAGE=1.8V

MIN_LINE_WIDTH=0.4 mmPP1V8_S0

MAKE_BASE=TRUE

=PP1V8_S0_NB_DPLL


MAKE_BASE=TRUE

MIN_LINE_WIDTH=0.5 mmPPVCORE_S0_NB_GFX

VOLTAGE=1.25V

=PP5V_S0_SATA

=PP5V_S0_NB_TVDAC=PP5V_S0_TMDS=PP5V_S0_LCD=PP5V_S0_NB_GFX_IMVP

MAKE_BASE=TRUE

MIN_NECK_WIDTH=0.2 mmMIN_LINE_WIDTH=0.6 mmPP5V_S0

VOLTAGE=5V

=PP5V_S0_SB

=PP5V_S0_CPU_IMVP=PP5V_S0_AUDIO_AMP=PP5V_S0_AUDIO=PP5V_S0_FAN_RT=PP5V_S0_ISENSECAL=PP5V_S0_LPCPLUS=PP5V_S0_3G

=PPVCORE_S0_NB_GFX

=PP3V3_ENET_P3V3ENETFET=PP3V3_S3_SMBUS_SMC_MGMT

PP3V3_S3

VOLTAGE=3.3V


MAKE_BASE=TRUE


69C8

69C8

12C5

69C2

69C2

12B3

69B7

69B7

11A3

31D6

68D8

68D8

58D3

10C7

31D2

31D4

68C8

29D2

68C8

21B7

58C4

48B5

9D5

30D2

31B2

68B7

29B2

56B5

68B7

20A8

58C3

59D8

48B3 24D8

66B8

45D8

65B5

35C7

20D8

54D8

48B3

9C5

26C4

20C8

30D6

68B2

28D8

55D8

68B2

18B3

58B8

66C3

59D4

11D7

67C6

24B3

31A7

66A8

45D4

58D5

33D7

26D2

26D8

65C4

26C6

20B4

29C6

20D8

20D3

20D3

26D6

54C8

56C4

21C5

26A6

9B6

25C3

65C3

62C2

17D7

30D4

20A6

35D1

68B1

21B5

28D3

20A6

26C4

50C4

53D7

68B1

45D1

26C2

26B8

15C7

58B3

26B2

26D3

61C5

61B8

58D4

45A4

62C5

58C4

59C2

10D7

26A8

63B6

67B7

27B8

26B4

22D7

26C6

31A3

49D2

39C8

46C6

66A5

45C1

58C6

33D6

38A8

26B2

26B6

26D2

24A8

65A5

26A6

26B4

45D2

26D2

17D7

29B6

20C8

17C1

20B4

20A8

20B4

11B3

26C8

26D5

26C2

26B6

54B8

53A7

50C4

46C6

17D5

51B7

6A2

35C3

51C7

43D3

37C5

37D5

33C2

62C4

34D6

35C1

25C3

9B5

22D2

6A2

65A4

35D7

6A2

47D3

62A2

20A4

62B2

15D2

30B2

58C5

20A5

35B2

7C4

18D6

28C8

18C6

25B3

39B7

21C5

35D4 34C7

36D8

60C7

59D8

8A4

6D2

53A7

7C4

23A3

6A2

25B6

65B4

25C3

15B7

58A3

25A6

25A3

66C2

48D2

60C2

25A6

61C7

6B2

58C8

64B2

67A5

63B8

64C4

40B6

42D6

43D8

61B1

58B8

68D6

60C2

48D7

60C2

10B5

62B8

59D1 6B2

25C3

38C6

47C5

47D5

39C2

67D4

62B3

63B3

63A6

61B5

61B3

45A6

67B5

47D8

46C4

45D4

27D4

27B6

25B3

22D2

20B2

61C4

38D5

66B3

25B6 34D6

6A2

30A7

24C1

69C8

24B1

57D1

49C2

63B1

26D8

33C6

62C5

39D6

66C2

57D3

6A2

64C6

66D8

6A2

6D2

41A6

27D7

65C7

57A8

57C4

47C3

45C8

44D4

6A2

58B3

65B6

41C8

26D8

6A2

33C7

64B6

67C7

52C6

47A7

38A6

25B3

25A3

25A3

27C5

23C8

24D8

24A3

58C5

6A2

25C3

25C3

32D4

6B2

25D3

6B2

20D5

17D3

13B7

18D3

17B3

7C7

18C3

20D4

7C7

20A8

20B8

58A3

6B2

10B7

21D8

26A8

25B6

25B6

25A6

33D2

21D5

6B2

21A7

40C6

21D6

69D7

67D7

60D2

6A2

26D8

59D8

6D1

6D1

6D2

48B8

6D2

43B5

17B7

35D3

47C3

6A2

www.vinafix.vn

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

TABLE_5_ITEM

REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD

QTY DESCRIPTIONPART#

TABLE_5_ITEM

CHASSIS GND

FOR LAYOUT PLACEMENTBUT, NEED CHANGE TO HIGH STANDOFF SYMBOL

CPU HEATSINK STANDOFF SCREW HOLE

Z0903 USE SAME Z0913 NON SHAPE OF A HOOF SYMBOL NB CFG ALIASES

DCIN CONNECTOR CHASSIS GND

NO-CONNECT UNUSED LVDS INTERFACE PORTS

(EMI PAD FOR INVERTER GONNECTOR)

DIP DIMM CONNECTOR CHASSIS GND

USB PORT [0] = External USB2.0 Port A

USB PORT [1] = PCI-E Mini Card

USB PORT [2] = 3G USB

USB PORT [3] = CAMERA

USB PORT [4] = IR CONTROLLER

USB PORT [5] = Trackpad(Geyser)

USB PORT [6] = BLUETOOTH

NO-CONNECT UNUSED FIREWIRE INTERFACE PORTS

ANALOG SWITCH GPIO

NB ALIASES

USB PORT [9] = Unused

USB PORT [8] = Unused

USB PORT [7] = External USB2.0 Port B

SO-DIMM ALIASES

PCI_EXP ALIASES

SATA ALIASESNO-CONNECT UNUSED SATA INTERFACE PORTS

NO-CONNECT UNUSED PCI_EXP INTERFACE PORTS

NO-CONNECT UNUSED SDVO INTERFACE PORTS

NO-CONNECT UNUSED ADDRESS INTERFACE PORTS

FIREWIRE ALIASES

DIP DIMM CONNECTOR CHASSIS GND

NC NC

I/O CONNECTOR CHASSIS GND

PCI_EXPRESS GRAPHICS ALIASES

BATTERY,AUDIO,DIP DIMM CONNECTOR CHASSIS GND

AIRPORT CARD STANDOFF SCREW HOLE

Ethernet ALIASES

SATA,LVDS CONNECTOR CHASSIS GND

LVDS ALIASES

NO-CONNECT UNUSED CLOCK INTERFACE PORTSCLOCK ALIASES

NO-CONNECT UNUSED CLOCK INTERFACE PORTSSB ALIASES

5R2P3-7SQBOMIT

1

Z0906

OMIT

7X7R2P3-5B1

Z0902

402CERM16V10%0.01UF

2

1 C09080.1UF

402

10%16VX5R2

1 C0907

5R2P3-7SQBOMIT

1

Z0901

OMIT5R2P3-7SQB

1

Z0909

5R2P3-7BOMIT

1

Z0911

5R2P3-7SQBOMIT

1

Z0910

402MF-LF1/16W05%

2

1R0912

STDOFF-4.2OD3.95H-5.52R3.37-6B

OMIT

1

Z0913STDOFF-4.2OD2.15H-1.2-3.2-TH

OMIT

1

Z0912

5P0R2P3-7BLBOMIT

1

Z0908

CLIP-SM-M42EMI-SPRING1 ZS0920

STDOFF-4.2OD3.95H-5.52R3.37-7SQB

OMIT

1

Z0904

STDOFF-4.5OD3.95H-1.1-3.2-TH

OMIT

1

Z0921

6P5R2P6-7SQB

OMIT

1

Z0907

STDOFF-4.2OD3.95H-5.52R3.37-6B

OMIT

1

Z0903

40216V10%X5R

0.1UF2

1 C0930

0.1UF10%

402X5R16V2

1 C09100.01UF10%16VCERM402

2

1 C0911

X5R

0.1UF10%16V402

2

1 C0916CERM40216V10%0.01UF

2

1 C0917

X5R

0.1UF

402

10%16V2

1 C0914CERM16V0.01UF

402

10%2

1 C0915

40216V10%0.1UFX5R2

1 C091216VCERM

0.01UF10%

4022

1 C09130.1UF16VX5R10%

4022

1 C0918

402CERM16V10%0.01UF2

1 C0919

0

4021/16W5%MF-LF2

1R0910

05%

402MF-LF1/16W

2

1R0921

STDOFF-4.5OD3.95H-1.1-3.2-TH

OMIT

1

Z0905

402MF-LF5%01/16W

2

1R0911

SM21

XW0802

SM21

XW0801

SYNC_MASTER=GPU

SIGNAL ALIAS /RESET

8

01

76


051-7455

THERMAL STANDOFF860-0876 Z0903,Z0904,Z0905,Z0921STANDOFF4

STANDOFF WIRELESS Z0912 STANDOFF860-0723 1

STANDOFF W/THRU HOLES,WIRELESS Z0913 STANDOFF1860-0749

=GND_CHASSIS_DIPDIMM_LEFT=GND_CHASSIS_AUDIO_MIC

=GND_CHASSIS_AUDIO_JACK=GND_BATT_CHGND

GND_CHASSIS_IOMAKE_BASE=TRUE

SATA_C_R2D_C_P_SPN

MAKE_BASE=TRUESATA_C_D2R_N_SPN

FW_B_TPA_P

TP_HDA_SDIN2CPU_THERMAL_SCREW_UP

=GND_CHASSIS_TMDS_UPPER

=GND_CHASSIS_RJ45

GND_CHASSIS_DCINVOLTAGE=0VMAKE_BASE=TRUE

=GND_CHASSIS_LVDS

=GND_CHASSIS_3GPOWER LVDS_B_CLK_P_SPNMAKE_BASE=TRUE

MAKE_BASE=TRUELVDS_B_DATA_N0_SPN

=GND_CHASSIS_FW_DOWN=GND_CHASSIS_USB

USB_EXTA_PUSB_EXTA_N

USB2_3G_PMAKE_BASE=TRUE

=USB2_3G_P

EXTAUSB_OC_LMAKE_BASE=TRUE

MAKE_BASE=TRUEUSB2_AIRPORT_N

MAKE_BASE=TRUEUSB2_CAMERA_P

MAKE_BASE=TRUEUSB2_CAMERA_N

USB_IR_PMAKE_BASE=TRUEUSB_IR_NMAKE_BASE=TRUE

USB2_GEYSER_PMAKE_BASE=TRUE

USB2_GEYSER_NMAKE_BASE=TRUE

MAKE_BASE=TRUEUSB_BT_P

MAKE_BASE=TRUEUSB_BT_N

=USB2_IR_P

MAKE_BASE=TRUEMEM_CLK_P_5_SPN

=PP3V3_S0_ENET

=YUKON_EC_PP2V5_ENETHDN_SPIN3_SPN

MAKE_BASE=TRUE

HDN_SPIN2_SPNMAKE_BASE=TRUE

HDN_SDIN1_SPNMAKE_BASE=TRUE

TP_HDA_SDIN3

NB_CFG<3>

NB_CFG<4>

NB_CFG<6>NB_CFG<7>

NB_CFG<8>

=GND_CHASSIS_TMDS_DOWN

=GND_CHASSIS_FW_UPPER

TP_NB_CFG<3>MAKE_BASE=TRUE

ACZ_SYNCMAKE_BASE=TRUE

MAKE_BASE=TRUEACZ_BITCLK

MAKE_BASE=TRUEMEM_A_A15_SPN

=NB_TDB_FORCE

=NB_TDE_SENSE

=NB_CLK96M_DOT_P

=GFX_VR_EN

PM_EXTTS_L<1>MAKE_BASE=TRUE

TP_USB_EXTC_NMAKE_BASE=TRUE

=USB2_EXTA_N

TP_MEM_CLKN5MAKE_BASE=TRUE

MEM_CLK_N_5_SPN

PEG_D2R_P10_SPNMAKE_BASE=TRUE

PEG_D2R_P<9>PEG_D2R_P<8>PEG_D2R_P<7>

PEG_D2R_P<5>PEG_D2R_P<4>

PEG_D2R_P<0>PEG_D2R_N<15>

PEG_D2R_N<13>

PEG_D2R_N<6>

TP_LVDS_B_DATAP3

=NB_CLK100M_DPLLSS_P=NB_CLK100M_DPLLSS_N

=NB_TDE_FORCE

=NB_CLK96M_DOT_N

NB_CLK100M_DPLLSS_NMAKE_BASE=TRUE

NB_CLK100M_DPLLSS_PMAKE_BASE=TRUE

NB_CLK96M_DOT_NMAKE_BASE=TRUE

MAKE_BASE=TRUENB_CLK96M_DOT_P MAKE_BASE=TRUECLINK_MPWROK MAKE_BASE=TRUEGFX_VR_EN

MAKE_BASE=TRUEPM_EXTTS_L<0>

MAKE_BASE=TRUEMEM_CLK_N_2_SPN

MAKE_BASE=TRUEMEM_B_A15_SPN

SATA_B_R2D_C_N

SATA_C_D2R_P

TP_USB_EXCARD_PMAKE_BASE=TRUETP_USB_EXCARD_NMAKE_BASE=TRUE

MAKE_BASE=TRUEEXTBUSB_OC_L

MAKE_BASE=TRUEUSB2_EXTB_N

MAKE_BASE=TRUEUSB2_EXTB_P

=USB2_BT_N

SATA_B_D2R_N_SPNMAKE_BASE=TRUE

MAKE_BASE=TRUESATA_C_R2D_C_N_SPN

PCIE_A_D2R_N_SPNMAKE_BASE=TRUE

TP_PCIE_A_D2R_N

=NB_CLINK_MPWROK

DIMM_OVERTEMPA_L

DIMM_OVERTEMPB_L

LVDS_A_DATA_N3_SPNMAKE_BASE=TRUE

MAKE_BASE=TRUELVDS_B_DATA_N2_SPN

=GND_AUDIO_AMP

MAKE_BASE=TRUEMEM_CLK_P_2_SPN USB_EXTC_P

USB_EXTC_N

HDA_SDOUT

PEG_R2D_C_P<15>

HDA_RST_LHDA_SDIN0

PEG_R2D_C_P7_SPNMAKE_BASE=TRUEPEG_R2D_C_P8_SPNMAKE_BASE=TRUE

MAKE_BASE=TRUEPEG_R2D_C_P9_SPN

PEG_R2D_C_P4_SPNMAKE_BASE=TRUE

PEG_R2D_C_N15_SPNMAKE_BASE=TRUE



MAKE_BASE=TRUEPEG_R2D_C_N4_SPN

MAKE_BASE=TRUEPEG_D2R_P14_SPN

MAKE_BASE=TRUEPEG_R2D_C_N5_SPN

PEG_R2D_C_N<6>PEG_R2D_C_N<7>PEG_R2D_C_N<8>

PEG_R2D_C_N<10>PEG_R2D_C_N<11>PEG_R2D_C_N<12>


PEG_R2D_C_P5_SPNMAKE_BASE=TRUEPEG_R2D_C_P6_SPNMAKE_BASE=TRUE




MAKE_BASE=TRUEPEG_D2R_P12_SPN MAKE_BASE=TRUEPEG_D2R_P11_SPN

TP_PCIE_A_R2D_C_P

TP_PCIE_B_D2R_P

TP_PCIE_FW_R2D_C_P


PEG_D2R_N14_SPNMAKE_BASE=TRUE

PCIE_D_R2D_C_P_SPNMAKE_BASE=TRUE

PCIE_D_R2D_C_N_SPNMAKE_BASE=TRUE

PCIE_C_D2R_P_SPNMAKE_BASE=TRUE

TP_PCIE_B_D2R_N

PCIE_B_R2D_C_P_SPNMAKE_BASE=TRUEPCIE_C_D2R_N_SPNMAKE_BASE=TRUE

TP_PCIE_A_R2D_C_N

MAKE_BASE=TRUESATA_C_D2R_P_SPN

MAKE_BASE=TRUESATA_B_R2D_C_N_SPN

SATA_B_R2D_C_PMAKE_BASE=TRUE

SATA_B_R2D_C_P_SPN

SATA_B_D2R_P SATA_B_D2R_P_SPNMAKE_BASE=TRUE

SATA_B_D2R_N


MAKE_BASE=TRUEPEG_D2R_N2_SPN

PEG_R2D_C_P<7>

LVDS_B_DATA_P0_SPNMAKE_BASE=TRUE

FW_C_TPB_N


PEG_D2R_P<6>


MAKE_BASE=TRUEFW_B_TPBIAS_SPNFW_B_TPA_P_SPN

MAKE_BASE=TRUE

FW_B_TPB_N_SPNMAKE_BASE=TRUE

FW_C_TPA_PFW_C_TPA_NFW_C_TPB_P

GND_CHASSIS_CPU

FW_C_TPB_N_SPNMAKE_BASE=TRUE

MAKE_BASE=TRUEFW_C_TPB_P_SPNMAKE_BASE=TRUEFW_C_TPA_N_SPNMAKE_BASE=TRUEFW_C_TPA_P_SPNFW_C_TPBIAS_SPN

MAKE_BASE=TRUE

FW_B_TPA_N_SPNMAKE_BASE=TRUE

FW_B_TPB_NFW_C_TPBIAS

FW_B_TPB_P

FW_B_TPBIAS

FW_B_TPA_N

=GND_CHASSIS_DIPDIMM_RIGHT


PEG_D2R_P<15>

=GND_CHASSIS_DIPDIMM_CENTER

GND_CHASSIS_FANSCREW

=GND_DCIN_CHGND

USB_TPAD_PUSB_TPAD_N

USB_IR_PUSB_IR_N

USB_BT_PUSB_BT_N

USB_EXCARD_P

USB_EXTB_OC_L

USB_EXTA_OC_LUSB2_EXTA_N

MAKE_BASE=TRUE

USB2_EXTA_PMAKE_BASE=TRUE

=USB2_EXTA_P

=EXTAUSB_OC_L

USB_MINI_P

USB_MINI_N

USB2_AIRPORT_PMAKE_BASE=TRUE

=USB2_AIRPORT_P

=USB2_AIRPORT_N

USB_EXTD_NUSB_EXTD_P

MAKE_BASE=TRUE

USB2_3G_N=USB2_3G_N

USB_CAMERA_P

USB_CAMERA_N

=USB2_CAMERA_P

GND_CHASSIS_RIGHTVOLTAGE=0VMAKE_BASE=TRUE

=EXTBUSB_OC_L

=USB2_EXTB_P

=USB2_BT_P

=USB2_GEYSER_P

TP_PCIE_A_D2R_P

NB_RIGHT_DOWN_SCREW


CPU_THERMAL_SCREW_DOWN

VOLTAGE=0VMAKE_BASE=TRUEGND_CHASSIS_CENTER

PEG_D2R_N<0>

=USB2_EXTB_N USB_EXTB_N

=USB2_IR_N

USB_EXCARD_N


MAKE_BASE=TRUEVOLTAGE=0VGND_CHASSIS_IO

=USB2_CAMERA_N

=USB2_GEYSER_N

TP_LVDS_A_DATAP3



LVDS_B_CLK_NMAKE_BASE=TRUE

LVDS_B_CLK_N_SPN

LVDS_B_DATA_N3_SPNMAKE_BASE=TRUE

LVDS_B_DATA_N<0>LVDS_B_CLK_P


MAKE_BASE=TRUELVDS_B_DATA_N1_SPNLVDS_B_DATA_N<1>

LVDS_B_DATA_N<2>TP_LVDS_B_DATAN3

LVDS_B_DATA_P<0>LVDS_B_DATA_P<1>

PEG_D2R_N<7>PEG_D2R_N<8>PEG_D2R_N<9>PEG_D2R_N<10>PEG_D2R_N<11>PEG_D2R_N<12>

PEG_D2R_N<14>


PEG_D2R_P<10>PEG_D2R_P<11>PEG_D2R_P<12>PEG_D2R_P<13>PEG_D2R_P<14>

PEG_R2D_C_N<4>PEG_R2D_C_N<5>

PEG_R2D_C_N<9>

PEG_R2D_C_N<13>PEG_R2D_C_N<14>PEG_R2D_C_N<15>PEG_R2D_C_P<4>PEG_R2D_C_P<5>PEG_R2D_C_P<6>

PEG_R2D_C_P<8>PEG_R2D_C_P<9>PEG_R2D_C_P<10>PEG_R2D_C_P<11>PEG_R2D_C_P<12>PEG_R2D_C_P<13>PEG_R2D_C_P<14>

MAKE_BASE=TRUEPEG_R2D_C_P11_SPNMAKE_BASE=TRUEPEG_R2D_C_P10_SPN

PEG_R2D_C_N10_SPNMAKE_BASE=TRUEPEG_R2D_C_N11_SPNMAKE_BASE=TRUEPEG_R2D_C_N12_SPNMAKE_BASE=TRUE





SATA_C_D2R_N

MAKE_BASE=TRUEPCIE_B_D2R_N_SPNMAKE_BASE=TRUEPCIE_A_R2D_C_P_SPNPCIE_A_R2D_C_N_SPN

MAKE_BASE=TRUE

MAKE_BASE=TRUEPCIE_A_D2R_P_SPN

SATA_C_R2D_C_PSATA_C_R2D_C_N

TP_PCIE_FW_D2R_P

TP_HDA_SDIN1

HDA_SYNCHDA_BIT_CLK

TP_USB_EXTC_PMAKE_BASE=TRUE





MAKE_BASE=TRUETP_NB_CFG<4>TP_NB_CFG<6>

MAKE_BASE=TRUETP_NB_CFG<7>MAKE_BASE=TRUETP_NB_CFG<8>MAKE_BASE=TRUE

LVDS_B_DATA_P<2>

MAKE_BASE=TRUE

GND_CHASSIS_SATAVOLTAGE=0V

MAKE_BASE=TRUEGND_CHASSIS_IO1VOLTAGE=0V


ACZ_RST_LMAKE_BASE=TRUEACZ_SDATAIN<0>MAKE_BASE=TRUEACZ_SDATAOUTMAKE_BASE=TRUE

=GND_AUDIO_CODEC

MEM_A_A<15>

TP_MEM_CLKP5

TP_LVDS_A_DATAN3

CPU_THERMAL_SCREW_RIGHT

FW_B_TPB_P_SPNMAKE_BASE=TRUE

USB_EXTB_P

=NB_TDB_SENSE



LVDS_A_DATA_P3_SPNMAKE_BASE=TRUE


MAKE_BASE=TRUEPEG_D2R_N5_SPNPEG_D2R_N<5>

PEG_D2R_N<4>PEG_D2R_N<3>PEG_D2R_N<2>

VOLTAGE=0VINVT_CHGND

MAKE_BASE=TRUE

TP_MEM_CLKN2

TP_MEM_CLKP2

=ENET_VMAIN_AVLBL

GND_AUDIO_AMPMAKE_BASE=TRUE

GND_AUDIO_CODECMAKE_BASE=TRUE

MEM_B_A<15>



PCIE_D_D2R_P_SPNMAKE_BASE=TRUE

PCIE_D_D2R_N_SPNMAKE_BASE=TRUE

MAKE_BASE=TRUEPCIE_C_R2D_C_P_SPN

TP_PCIE_EXCARD_D2R_P

TP_PCIE_EXCARD_R2D_C_NTP_PCIE_EXCARD_R2D_C_P


MAKE_BASE=TRUEPEG_D2R_N9_SPNPEG_D2R_N10_SPN

MAKE_BASE=TRUETP_PCIE_FW_R2D_C_N

TP_PCIE_FW_D2R_N

PCIE_C_R2D_C_N_SPNMAKE_BASE=TRUE

PCIE_B_R2D_C_N_SPNMAKE_BASE=TRUE

PCIE_B_D2R_P_SPNMAKE_BASE=TRUE

CLINK_MPWROKMAKE_BASE=TRUE

=SB_CLINK_MPWROKVR_PWRGD_CK505

MAKE_BASE=TRUEVR_PWRGD_CLKEN

SB_CLK100M_SATA_OE_LMAKE_BASE=TRUE

SB_SATA_CLKREQ_LTP_SB_GPIO17

MAKE_BASE=TRUEEXTGPU_RST_L

TP_CK505_SRC1_NTP_CK505_SRC1_PTP_CK505_SRC3_N

CK505_SRC1_N_SPNMAKE_BASE=TRUE

MAKE_BASE=TRUECK505_SRC3_N_SPN MAKE_BASE=TRUECK505_SRC1_P_SPN

CK505_PCI4_CLK_SPNMAKE_BASE=TRUE

CK505_SRC7_P_SPNMAKE_BASE=TRUECK505_PCI2_CLK_SPNMAKE_BASE=TRUE

CK505_SRC7_N_SPNMAKE_BASE=TRUE

CK505_PCI2_CLKTP_CK505_SRC7_P

CK505_PCI4_CLK

TP_CK505_SRC7_N MAKE_BASE=TRUECK505_SRC3_P_SPNTP_CK505_SRC3_P




TP_PCIE_EXCARD_D2R_NTP_PCIE_B_R2D_C_PTP_PCIE_B_R2D_C_N

ENET_CLKREQ_LMAKE_BASE=TRUE

=ENET_CLKREQ_L

56C4 56B8 56B5

56B4 56B1 56A8 56A4 55B3

54C8 54B8

67B2

41C4

73B3

73B3

54C8

54A8

67A6

41C2

23C2

23C2

54B8

73B3

73B3

73B3

73B3

53D3

69C4

67A4

43B5

41A4

73B3

73B3

8C1

8C1

53C7

53C7

44B8

75B3

75B3

75B3

75B3

27A6

44B8

54A8

73B3

73B3

73B3

73C3

73C3

31A5

73B3

73B3

23C2

23C2

23C2

23C2

73B3

73B3

73B3

73B3

73B3

73B3

73B3

73C3

73C3

53B7

53C7

53C7

53B7

73B3 27A6

24C5

75D3

75D3

34B8

30A5

56A4

55C3

57A6

37B3

22C8

69A4

36B2

67A2

43A5 6A7

6A7

38B1

41A2

23C2

23C2

43A4

43C4

7C4

34C7 22C8

15B6

15B6

15B6

15B6

15B6

69A3

38B1

6C1

6C1

19C2

19D2

15C3

15B3

15B7

6C1

41A8

15C6

14C3

14C3

14C3

14C3

14C3

14C3

14C3

14C3

14D3

15C6

15C3

15C3

19C2

15C3

29C3

29C3

29B3

29B3

8B3

60C6

15B7

22B6

22B6

6C1

6C1

43C3

23D5

15A3

30C4

31C4

6A7

54A5

23C2

23C2

22B8

14A3

22C8

22C8

14B3

14B3

14B3

14B3

14B3

14B3

23D5

23D5

23D5

23D5

23D5

22B6

22B6

22B6

14B3

37B3

14C3

6B7

6B7

6B7

37B3

37B3

37B3

6B7

6B7

6B7

6B7

6B7

6B7

37B3

37B3

37B3

37B3

37B3

31D4

14C3

30D5

57C8

23C2

23C2

8C2

8C2

8C2

8B2

23C2

23C8

23C8

41A8

41C8

23C2

23C2

33B3

33B3

23C2

23C2

43A4

23C2

23C2

67B4

41C8

41B5

43C3

42C7

23D5

14D3

41B5 23C2

43C4

23C2

8D7

67A4

42C7

15C6

14C5 6A7

14C5

14C5

6A7

6A7 14C5

14C5

15C6

14C5

14C5

14D3

14D3

14D3

14C3

14C3

14C3

14C3

14C3

14C3

14C3

14C3

14C3

14C3

14C3

14B3

14B3

14B3

14B3

14B3

14B3

14B3

14B3

14B3

14B3

14B3

14B3

14B3

14A3

14A3

14A3

22B6

22B6

22B6

23D5

22C8

22C8

22C8

6C1

14C5

40C8

6C1

6D1

6D1

53A7

30C4

15C6

15C6

6B7

23C2

19C2

6A7

14D3

14D3

14D3

14D3

67C2

15C6

15C6

34C2

6D1

6D1

31C4

23D5

23D5

23D5

23D5

23D5

8B1 24C3

27A8 24C5

28B4 24C5

24B5

28B4

28B4

28B4

28B6

28B4

28B6

28B4

28B4

23D5

23D5

23D5

28A4

www.vinafix.vn

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

IN

OUT

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

OUT

BI

BI

BI

BI

LOCK*

INIT*

A20M*

A6*

A3*A4*

A14*

A16*

REQ0*REQ1*REQ2*REQ3*REQ4*

BCLK1BCLK0

THERMTRIP*

THERMDAPROCHOT*

DBR*TRST*

TMSTDOTDITCK

PREQ*PRDY*BPM3*BPM2*BPM1*BPM0*

HITM*HIT*

TRDY*RS2*RS1*RS0*

RESET*

IERR*

BR0*

DBSY*DRDY*DEFER*

BNR*

RSVD9RSVD8RSVD7RSVD6RSVD5RSVD4RSVD3RSVD2RSVD1RSVD0

SMI*LINT1LINT0STPCLK*

FERR*

ADSTB1*A35*A34*A33*A32*A31*A30*A29*A28*

A19*A18*A17*

ADSTB0*

A13*A12*

BPRI*

A20*A21*A22*A23*A24*

A26*A27*

A9*A8*A7*

A11*

A25*

THERMDC

IGNNE*

ADS*

A10*

A15*

A5*

NC

1 OF 4

CONTROL

THERMAL

XDP/ITP SIGNALS

H CLK

RESERVED

ADDR GROUP0

ADDR GROUP1

ICH

DINV1*

D31*D30*

D25*

D11*D12*D13*D14*

DSTBP0*DINV0*

D9*D8*D7*D6*

D19*D18*

DATBP1*

D0* D32*D1*D2*

D5*

D16*

D20*D21*D22*D23*D24*

D26*D27*D28*D29*

DSTBN1*

GTLREFTEST1TEST2TEST3TEST4TEST5TEST6

BSEL0BSEL1BSEL2

D33*D34*D35*D36*D37*D38*D39*D40*D41*D42*D43*D44*D45*D46*D47*

DSTBN2*DSTBP2*DINV2*

D48*D49*D50*D51*D52*D53*D54*D55*D56*D57*D58*D59*D60*D61*D62*D63*

DSTBN3*DSTBP3*DINV3*

COMP0COMP1COMP2COMP3

DPRSTP*DPSLP*DPWR*

PWRGOODSLP*PSI*

D17*

D4*D3*

DSTBN0*D15*

D10*

2 OF 4

DATA GRP 3

DATA GRP 2

MISC

DATA GRP 0

DATA GRP 1

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PIN. MAKE SURE CPU_TEST4 ISPLACE C1000 CLOSE TO CPU_TEST4

REFERENCED TO GND

0.5" MAX LENGTH FOR CPU_GTLREF

FSB_IERR_L WITH A GNDPLACE TESTPOINT ON

0.1" AWAY

GMCH WITHOUT T (NO STUB)SHOULD CONNECT TO ICH ANDPM_THRMTRIP#

COMP1,3 CONNECT WITH ZO=55OHM,MAKE TRACE LENGTH SHORTER THAN 0.5".

COMP0,2 CONNECT WITH ZO=27.4OHM,MAKE TRACE LENGTH SHORTER THAN 0.5".

LAYOUT NOTE:

NC

402MF-LF

54.9

1/16W1%

2

1R1002

MF-LF402

1/16W5%68

2

1R1004

402

1K

MF-LF

1%1/16W

2

1R1005

402

1/16W

2.0K

MF-LF

1%

2

1R1006

402

54.9

1/16WMF-LF

1%

R1019402

1%

MF-LF1/16W

27.4R1018

402

54.9

1/16WMF-LF

1%

R1017402

27.4

1/16WMF-LF

1%

R1016

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B3 70C3

13A3 70C3

13B3 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B5 70C3

13B3 70C3

13A3 70C3

13B3 70C3

15B6 22C4 59C7 70B3

22C4 70B3

13B3 70D3

13A5 70B3

27B3

12B1 22C4 70C3

13D5 70D3

13D5 70D3

13D5 70D3

13D5 70D3

13D5 70D3

13D5 70D3

13D5 70D3

13D5 70D3

13D5 70D3

13D5 70D3

13D5 70D3

13D5 70D3

13D5 70D3

13C5 70D3

13C5 70D3

13C5 70D3

13B3 70D3

13B3 70D3

13B3 70D3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13C5 70C3

13B3 70C3

13B3 70C3

13B3 70C3

29B6 70B3

29A6 70B3

29C6 70B3

13D3 70C3

13D3 70C3

13D3 70C3

13D3 70C3

13D3 70C3

13D3 70C3

13D3 70C3

13D3 70C3

13D3 70C3

13D3 70C3

13D3 70C3

13D3 70C3

13D3 70C3

13C3 70C3

13C3 70C3

13A3 70C3

13A3 70C3

13A3 70C3

13A3 70C3

13A3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70D3

13C3 70D3

13C3 70D3

13B3 70D3

13B3 70D3

13B3 70D3

13B3 70D3

13B3 70D3

13B3 70D3

13B3 70D3

12B2 70A3

12B2 70A3

12B2 70A3

12B3 70A3

12B2 70A3

12B2 70A3

9A7 12B5 70B3

12B4 27C6

45B5 45C3 59C8 70C3

49B7

15A6 22C2 45B3 70B3

22C4 46B2 70B3

12B5 13A5 70D3

13A3 70D3

13A3 70D3

13A3 70D3

13B3 70D3

9A7 12B2 12B3 70B3

9B7 12B3 70B3

9B7 12B2 70B3

9A7 12B3 70A3

49C7

29D3 75C3

29D3 75C3

22C4 70C3

22C4 70B3

22C4 70C3

22C4 70C3

22C4 70B3

22C4 70B3

22C2 70C3

402

NOSTUFF

5%

MF-LF1/16W

0R1030

402

NOSTUFF

1K

MF-LF

5%1/16W

2

1R1007

402

54.9

MF-LF

1%1/16W

2

1R1003

402

54.9

1/16WMF-LF

1%

R1020

402

1%

MF-LF1/16W

54.9R1021

402

1%

MF-LF1/16W

54.9R1022

13C3 70C3

13C3 70C3

13C3 70C3

13C3 70C3

402

1%

MF-LF1/16W

649R1023

402MF-LF

NOSTUFF

1K5%

1/16W

2

1R1012

402

16V10%0.1uF

NOSTUFF

X5R2

1 C1000

FCBGA

MEROM

OMIT

AB6

G2

AB5

C7

B25

A24

AB3

AA6

AC5

D5

A3

F6

D3

D22

D2

C3

B2

V3

T2

N5

M4

G3

F4

F3

C1

L1

J3

K2

H2

K3

D21

AC1

AC2

B1

H4

B4

C6

B3

C4

D20

E4

G6

A5

F21

H5

E1

C20

F1

G5

AC4

AD1

AD3

AD4

E2

A21

A22

V1

M1

H1

J1

N2

M3

K5

L4

L5

AA3

AB2

AA4

W3

V4

U2

J4

Y4

W5

W2

T3

T5

R4

U1

Y5

U4

A6

W6

R3

U5

Y2

R1

P1

P4

L2

P2

P5

N3

U1000

FCBGA

MEROM

OMIT

A26

AF1

AF26

C24

D25

C23

D7

D6

AE6

AD26

AF24

AA26H26

AE25

Y26

L26

J26

D24

B5

E5

AC20

U22

N24

H25

M26

G24

K24

E23

AC23

AF22

AD23

AC22

E25

AD21

AE21

AC25

AF23

AE22

AD20

AC26

AB21

AB22

AA21

G25

AD24

AE24

AB25

AA24

AA23

W25

W24

Y23

W22

Y25

F23

U23

U25

T22

V23

V26

V24

AB24

Y22

N25

T25

G22

L25

R24

T24

P22

P23

P25

M23

L22

M24

L23

E26

R23

P26

K25

N22

H23

K22

F26

H22

J23

J24

F24

E22

Y1

AA1

U26

R26

C21

B23

B22

U1000

402

PLACEMENT_NOTE=Place R1024 near ITP connector (if present)

54.9

1/16WMF-LF

1%

R1024

CPU FSB

9

01051-745576

SYNC_MASTER=T9_MLB_NOME SYNC_DATE=11/12/2006

XDP_BPM_L<2>

XDP_BPM_L<5>XDP_TCK

CPU_THERMD_N

=PP1V05_S0_CPU

=PP1V05_S0_CPU

=PP1V05_S0_CPU

=PP1V05_S0_CPU

XDP_TRST_L

XDP_TDI

XDP_TMS

XDP_TDO

XDP_TCK

FSB_A_L<5>

FSB_A_L<15>

FSB_A_L<10>

FSB_ADS_L

CPU_IGNNE_L

FSB_A_L<25>

FSB_A_L<11>

FSB_A_L<7>FSB_A_L<8>FSB_A_L<9>

FSB_A_L<27>FSB_A_L<26>

FSB_A_L<24>FSB_A_L<23>FSB_A_L<22>FSB_A_L<21>FSB_A_L<20>

FSB_BPRI_L


FSB_ADSTB_L<0>


FSB_A_L<28>FSB_A_L<29>FSB_A_L<30>FSB_A_L<31>FSB_A_L<32>FSB_A_L<33>FSB_A_L<34>FSB_A_L<35>FSB_ADSTB_L<1>

CPU_FERR_L

CPU_STPCLK_LCPU_INTRCPU_NMICPU_SMI_L

TP_CPU_RSVD0TP_CPU_RSVD1TP_CPU_RSVD2TP_CPU_RSVD3TP_CPU_RSVD4TP_CPU_RSVD5TP_CPU_RSVD6TP_CPU_RSVD7TP_CPU_RSVD8TP_CPU_RSVD9

FSB_BNR_L

FSB_DEFER_LFSB_DRDY_LFSB_DBSY_L

FSB_BREQ0_L

CPU_IERR_L

FSB_CPURST_LFSB_RS_L<0>FSB_RS_L<1>FSB_RS_L<2>FSB_TRDY_L

FSB_HIT_LFSB_HITM_L

XDP_BPM_L<0>XDP_BPM_L<1>

XDP_BPM_L<3>XDP_BPM_L<4>

XDP_TDIXDP_TDOXDP_TMSXDP_TRST_LXDP_DBRESET_L

CPU_PROCHOT_LCPU_THERMD_P

PM_THRMTRIP_L

FSB_CLK_CPU_PFSB_CLK_CPU_N

FSB_REQ_L<4>FSB_REQ_L<3>FSB_REQ_L<2>FSB_REQ_L<1>FSB_REQ_L<0>

FSB_A_L<16>

FSB_A_L<14>


FSB_A_L<6>

CPU_A20M_L

CPU_INIT_L

FSB_LOCK_L

FSB_D_L<10>

FSB_D_L<15>FSB_DSTB_L_N<0>

FSB_D_L<3>FSB_D_L<4>

FSB_D_L<17>

CPU_PSI_LFSB_CPUSLP_LCPU_PWRGDFSB_DPWR_LCPU_DPSLP_LCPU_DPRSTP_L

CPU_COMP<3>CPU_COMP<2>CPU_COMP<1>CPU_COMP<0>

FSB_DINV_L<3>FSB_DSTB_L_P<3>FSB_DSTB_L_N<3>FSB_D_L<63>FSB_D_L<62>FSB_D_L<61>FSB_D_L<60>FSB_D_L<59>FSB_D_L<58>FSB_D_L<57>FSB_D_L<56>FSB_D_L<55>FSB_D_L<54>FSB_D_L<53>FSB_D_L<52>FSB_D_L<51>FSB_D_L<50>FSB_D_L<49>FSB_D_L<48>

FSB_DINV_L<2>FSB_DSTB_L_P<2>FSB_DSTB_L_N<2>FSB_D_L<47>FSB_D_L<46>FSB_D_L<45>FSB_D_L<44>FSB_D_L<43>FSB_D_L<42>FSB_D_L<41>FSB_D_L<40>FSB_D_L<39>FSB_D_L<38>FSB_D_L<37>FSB_D_L<36>FSB_D_L<35>FSB_D_L<34>FSB_D_L<33>

CPU_BSEL<2>CPU_BSEL<1>CPU_BSEL<0>

TP_CPU_TEST6

CPU_TEST4TP_CPU_TEST3CPU_TEST2CPU_TEST1CPU_GTLREF

FSB_DSTB_L_N<1>

FSB_D_L<29>FSB_D_L<28>FSB_D_L<27>FSB_D_L<26>

FSB_D_L<24>FSB_D_L<23>FSB_D_L<22>FSB_D_L<21>FSB_D_L<20>

FSB_D_L<16>

FSB_D_L<5>



FSB_DSTB_L_P<1>



FSB_DINV_L<0>FSB_DSTB_L_P<0>


FSB_D_L<25>


FSB_DINV_L<1>

TP_CPU_TEST5

12C5

12C5

12C5

12C5

12B3

12B3

12B3

12B3

11A3

11A3

11A3

11A3

10C7

10C7

10C7

10C7

9C5

9D5

9D5

9D5

70B3

9B6

9C5

9B6

9C5

70A3

70B3

70B3

70B3

12B3

9B5

9B6

9B5

9B5

12B3

12B3

12B2

12B5

12B2

7C7

7C7

7C7

7C7

9C6

9C6

9C6

9C6

9C6

70C3

70B3

70B3

70B3

70B3 70B3

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OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

VCC

VSSSENSE

VCCSENSE

VID6VID5VID4VID3VID2VID1VID0

VCCA

VCCP

VCC

3 OF 4

VSS VSS

4 OF 4

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

11.5 A (Deeper Sleep)

25.0 A (Deep Sleep HFM)

27.4 A (Sleep HFM)

17.0 A (Auto-Halt/Stop-Grant SuperLFM)27.4 A (Auto-Halt/Stop-Grant HFM)

30.4 A (LFM)25.5 A (SuperLFM)

9.4 A (Enhanced Deeper Sleep)

2500 mA (after VCC stable) 4500 mA (before VCC stable)

16.0 A (Deep Sleep SuperLFM)

16.8 A (Sleep SuperLFM)

41.0 A (HFM)

44.0 A (Design Target)

Standard Voltage:

(CPU CORE POWER)

130 mA

(CPU IO POWER 1.05V)

(CPU INTERNAL PLL POWER 1.5V)

Low Voltage: Ultra Low Voltage:

17.0 A (Design Target)23.0 A (Design Target)

21.0 A (HFM)18.7 A (LFM)TBD A (SuperLFM)

TBD A (Auto-Halt/Stop-Grant HFM)TBD A (Auto-Halt/Stop-Grant SuperLFM)

TBD A (Sleep HFM)TBD A (Sleep SuperLFM)

TBD A (Deep Sleep HFM)TBD A (Deep Sleep SuperLFM)

TBD A (Deeper Sleep)

TBD A (Enhanced Deeper Sleep) TBD A (Enhanced Deeper Sleep)

TBD A (Deeper Sleep)

TBD A (Deep Sleep HFM)

TBD A (Sleep HFM)

TBD A (Auto-Halt/Stop-Grant HFM)

TBD A (HFM)TBD A (LFM)

Current numbers from Merom for Santa Rosa EMTS, doc #22221.

TBD A (Auto-Halt/Stop-Grant LFM)

TBD A (Sleep LFM)

TBD A (Deep Sleep LFM)

59C7 70A3

59C7 70A3

59C7 70A3

59C7 70A3

59C7 70A3

59C7 70A3

PLACEMENT_NOTE=Place within 1 inch of CPU, no stub.

MF-LF402

1001%1/16W

2

1R1101

59C7 70A3

59A4 59A5 70A3

59A4 59A5 70A3

FCBGA

MEROM

OMIT

AE7

AE2

AF3

AE3

AF4

AE5

AF5

AD6

AF7

N6

N21

M21

K21

J21

M6

K6

J6

W21

V21

T6

T21

R6

R21

V6

G21

C26

B26

AF20

AF18

AF17

AF15

AF14

AF12

AF10

AF9

AE20

AE18

B7

AE17

AE15

AE13

AE12

AE10

AE9

AD18

AD17

AD15

AD14

A20

AD12

AD10

AD9

AD7

AC18

AC17

AC15

AC13

AC12

AC9

A18

AC7

AB7

AB20

AB18

AB17

AB15

AB14

AB12

AB10

AC10

A17

AB9

AA20

AA18

AA17

AA15

AA13

AA12

AA10

AA9

AA7

A15

F20

F18

F17

F15

F14

F12

F10

F9

F7

E20

A13

E18

E17

E15

E13

E12

E10

E9

E7

D18

D17

A12

D15

D14

D12

D10

D9

C18

C17

C15

C13

C12

A10

C10

C9

B20

B18

B17

B15

B14

B12

B10

B9

A9

A7

U1000

FCBGA

MEROM

OMIT

V25

V22

V5

V2

U24

U21

U6

U3

T26

T23B8

T4

T1

R25

R22

R5

R2

P24

P21

P6

P3

B6

N26

N23

N4

N1

M25

M22

M5

M2

L24

L21

AF2

L6

L3

K26

K23

K4

K1

J25

J22

J5

J2

A23

H24

H21

H6

H3

G26

G23

G1

G4

F25

F22

A19

F2

F19

F16

F13

F11

F8

F5

E24

E21

E19

A16

E16

E14

E11

E8

E6

E3

D26

D23

D19

D16

A14

D13

D11

D8

D4

D1

C25

C22

C2

C19

C16

A11

C14

C11

C8

AF25

A25

AF21

C5

AF19

AF16

AF13

AF11

AF8

AF6

A2

AE26

AE23

AE19

B24

AE16

AE14

AE11

AE8

AE4

AE1

AD25

AD22

AD19

AD16

B21

AD13

AD11

AD8

AD5

AD2

AC24

AC21

AC19

AC16

AC14

B19

AC11

AC8

AC6

AC3

AB26

AB23

AB19

AB16

AB13

AB11

B16

AB8

AB4

AB1

AA25

AA22

AA19

AA16

AA14

AA11

AA8

B13

AA5

AA2

Y24

Y21

Y6

Y3

W26

W23

W4

W1

B11

A8

A4

U1000

MF-LF402

PLACEMENT_NOTE=Place within 1 inch of CPU, no stub.

1/16W1%100

2

1R1100

SYNC_DATE=11/12/2006SYNC_MASTER=T9_MLB_NOME

CPU Power & Ground

051-7455 01

10 76

CPU_VID<2>CPU_VID<3>

CPU_VID<5>

=PPVCORE_S0_CPU

CPU_VCCSENSE_N

CPU_VCCSENSE_P

CPU_VID<0>CPU_VID<1>

=PPVCORE_S0_CPU

CPU_VID<6>

CPU_VID<4>

=PP1V5_S0_CPU

=PP1V05_S0_CPU 12C5 12B3 11A3

48B5

48B5

9D5

48B3

48B3

9C5

11D7

11D7

9B6

10D7

10B5

11B3

9B5

7D7

7D7

7C7

7C7

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DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

1x 10uF, 1x 0.01uF

LAYOUT NOTE:PLACE C1281 NEAR PIN B26 OF U1000

VCCA (CPU AVdd) DECOUPLING

VCCP (CPU I/O) DECOUPLING1X 330UF, 6X 0.1UF

4x 330uF. 20x 10uF 0805

PLACE INSIDE SOCKET CAVITY (ON BOTTOMSIDE)

PLACE C1235 CLOSE TO CPULAYOUT NOTE:

LAYOUT NOTE:

LAYOUT NOTE:

LAYOUT NOTE:PLACE ON BOTTOMSIDE

PLACE INSIDE SOCKET CAVITY (ON BOTTOMSIDE)

PLACE ON BOTTOMSIDE

C1250, C1251, C1252 AND C1253 NEED TO USE 6mOHM CAPS.

CPU VCORE HF AND BULK DECOUPLING

LAYOUT NOTE:

D2TTANT2.5V10%

330uF

CRITICAL

32

1C1235

402

0.1UF

CERM10V20%

2

1 C1237

402

20%10VCERM

0.1UF

2

1 C1238

402

0.1UF

CERM10V20%

2

1 C1239

402

20%10VCERM

0.1UF

2

1 C1240

402

20%10VCERM

0.1UF

2

1 C1241

10%

CRITICAL

10UF

X5R6.3V

805-22

1 C121010UF10%

CRITICAL

X5R6.3V

805-22

1 C1216

10%10UF

CRITICAL

X5R6.3V

805-22

1 C120110%

CRITICAL

10UF

X5R6.3V

805-22

1 C120210%10UF

CRITICAL

X5R6.3V

805-22

1 C120310%

CRITICAL

10UF

X5R6.3V

805-22

1 C120410%

CRITICAL

10UF

X5R6.3V

805-22

1 C120510%

CRITICAL

10UF

X5R6.3V

805-22

1 C120610%

CRITICAL

10UF

X5R6.3V

805-22

1 C120710%10UF

CRITICAL

X5R6.3V

805-22

1 C120810%10UF

CRITICAL

X5R6.3V

805-22

1 C1209

10UF10%

CRITICAL

X5R6.3V

805-22

1 C121410%

CRITICAL

10UF

X5R6.3V

805-22

1 C121310%

CRITICAL

10UF

X5R6.3V

805-22

1 C121210%

CRITICAL

10UF

X5R6.3V

805-22

1 C121110%10UF

CRITICAL

X5R6.3V

805-22

1 C1219

10%

CRITICAL

10UF

X5R6.3V

805-22

1 C1200

20%10VCERM

0.1UF

4022

1 C1236

CRITICAL

10%10UF

X5R6.3V

805-22

1 C121510%

CRITICAL

10UF

X5R6.3V

805-22

1 C121710%

CRITICAL

10UF

X5R6.3V

805-22

1 C1218

10%

402CERM16V

0.01UF

2

1 C1281

603X5R6.3V20%

10uF

2

1C1280TANT

CRITICAL

10%330UF2.0V

D2T

3 2

1 C1250CRITICAL

10%

TANT

330UF2.0V

D2T

3 2

1 C1251

D2T

10%

TANT

CRITICAL

330UF2.0V3 2

1 C1252CRITICAL

10%

TANT

330UF2.0V

D2T

3 2

1 C1253

051-745511

SYNC_MASTER=MSARWAR SYNC_DATE=04/26/2006

01

76

CPU Decoupling & VID

=PP1V5_S0_CPU

=PP1V05_S0_CPU

=PPVCORE_S0_CPU

12C5 12B3 10C7 9D5

48B5

9C5

48B3

9B6

10D7

10B7

9B5

10B5

7C7

7C7

7D7

www.vinafix.vn

OUT

IN

IN

OUT

OUT

OUT

OUT

IO

IN

OUT

IN

IO

IO

IO

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(TCK)

CPU ITP700FLEX DEBUG SUPPORT

(FBO)

(DEBUG PORT RESET)

(DBR#)

(DEBUG PORT ACTIVE)

(DBA#)

TCK PIN AND THEN FORK BACK FROM CPU TCK PIN AND ROUTE BACK TO ITP700FLEXCONNECTOR’S FBO PIN.

ITP TCK SIGNAL LAYOUT NOTE:ROUTE THE TCK SIGNAL FROM ITP700FLEX CONNECTOR’S TCK PIN TO CPU’S

TO ICH8M SYS_RST*, AND WITH SYSTEM RESET LOGIC

INDICATE THAT ITP IS USING TAP I/F, NC IN 965GM CHIPSET SYSTEM.

516S0394

(FROM CK505 HOST 133/167MHZ)

40216V

ITP

10%X5R

0.1UF2

1C1300

402MF-LF1/16W1%

22.6

ITP

21

R1302

1%1/16W402MF-LF

54.9

NOSTUFF

2

1R1301

22.61%

1/16W402

MF-LF

ITP

21R1300

QT500306-L021-9F

CRITICAL

M-ST-SM

ITP

98 76 54

34 33

32 31

30

3

2928 2726 2524 2322 2120

2

1918 1716 1514 1312 1110

1

J1302

051-7455

SYNC_MASTER=MASTERCPU ITP700FLEX DEBUG

SYNC_DATE=5/23/05

7612

01

XDP_TDIXDP_TCKCPU_XDP_CLK_NCPU_XDP_CLK_P

XDP_BPM_L<3>XDP_DBRESET_L

XDP_BPM_L<0>

XDP_BPM_L<5>XDP_TCKLVDS_CTRL_CLKLVDS_CTRL_DATAXDP_TMS

ITP_TDO

ITPRESET_L

=PP1V05_S0_CPU

XDP_BPM_L<4>FSB_CPURST_L

XDP_BPM_L<1>

CPU_PWRGD

XDP_BPM_L<2>

XDP_TRST_LXDP_TDO

=PP1V05_S0_CPU

12C5

12B3

11A3

11A3

10C7

10C7

9D5

9D5

70B3

70B3

9C5

9C5

70B3

12B2

12B3

70B3

9B6

70D3

70C3

70A3

70B3

9B6

9C6

9C6

70A3

27C6

70A3

70A3

9C6

67A7

67A7

9C6

9B5

70A3 13A5

70A3

22C4

70A3

9C6

9C6

9B5

9B7

9A7

29D3

29D3

9C6

9C6

9C6

9C5

9A7

14D5

14D5

9B7

7C7

9C6 9D6

9C6

9B2

9C6

9A7

9A7

7C7

www.vinafix.vn

BI

BI

BI

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

BI

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

H_D0*

H_D3*H_D2*

H_D33*H_D34*H_D35*

H_D1*

H_D4*

H_D10*

H_A4*H_A5*H_A6*H_A7*H_A8*H_A9*H_A10*H_A11*H_A12*H_A13*H_A14*H_A15*H_A16*H_A17*H_A18*H_A19*H_A20*H_A21*H_A22*H_A23*H_A24*H_A25*H_A26*H_A27*H_A28*H_A29*H_A30*H_A31*H_A32*H_A33*H_A34*H_A35*

H_ADS*H_ADSTB0*H_ADSTB1*

H_A3*

H_D7*H_D8*H_D9*

H_D11*H_D12*H_D13*H_D14*H_D15*H_D16*H_D17*H_D18*H_D19*H_D20*H_D21*H_D22*H_D23*

H_D25*H_D26*H_D27*H_D28*H_D29*H_D30*

H_D32*

H_D36*H_D37* H_BNR*H_D38* H_BPRI*H_D39*H_D40* H_DEFER*H_D41* H_DBSY*H_D42*H_D43*H_D44* H_DPWR*H_D45* H_DRDY*H_D46* H_HIT*H_D47* H_HITM*H_D48* H_LOCK*

H_TRDY*

H_D51*H_D52*H_D53*

H_DINV0*H_D54*

H_DINV1*H_D55*

H_DINV2*H_D56*

H_DINV3*H_D57*H_D58*

H_DSTBN0*H_D59*

H_DSTBN1*H_D60*

H_DSTBN2*H_D61*

H_DSTBN3*H_D62*H_D63* H_DSTBP0*

H_DSTBP1*H_DSTBP2*

H_SWINGH_RCOMP

H_REQ0*H_SCOMP H_REQ1*H_SCOMP* H_REQ2*

H_REQ3*H_CPURST* H_REQ4*H_CPUSLP*

H_RS0*H_RS1*

H_AVREF H_RS2*H_DVREF

H_D5*H_D6*

H_D31*

H_BREQ*

H_D24*

H_D49*H_D50*

H_DSTBP3*

HPLL_CLKHPLL_CLK*

HOST

(1 OF 10)

BI

BI

BI

BI

BI

IN

IN

IN

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

9D8 70C3

9D8 70C3

9C8 70C3

9D6 70D3

9D6 70D3

9D6 70D3

9D6 70D3

9D6 70D3

9B2 70D3

9D6 70D3

9D8 70C3

X5R

0.1uF10%16V

4022

1 C14252.0K

MF-LF

1%1/16W

402 2

1R1426

1K

MF-LF

1%1/16W

402 2

1R1425

9C4 70D3

9B4 70C3

9C2 70C3

9B2 70C3

9C4 70D3

9B4 70C3

9D8 70C3

9C2 70C3

9B2 70C3

9C4 70D3

9B4 70C3

9C2 70C3

9B2 70C3

9C6 70D3

9C6 70D3

9D6 70D3

9D8 70C3

9D6 70D3

9D6 70D3

9D6 70D3

9D8 70C3

9D8 70C3

9D8 70C3

9D8 70C3

9C8 70C3

9D8 70C3

54.9

MF-LF

1%1/16W

4022

1R1420

24.9

MF-LF

1%1/16W

402 2

1R1415

221

MF-LF

1%1/16W

402 2

1R1410

100

MF-LF

1%1/16W

402 2

1R1411

X5R

0.1uF10%16V

4022

1 C1410

9D8 70C3

OMIT

CRESTLINEFCBGA

AM7

AM5

B7

B3

W2

W1

D8

D7

E12

B12

H13

A11

E13

M14

C2

G10

C6

E4

A9

AJ10

AC2

K2

L7

AH11

AD2

K3

M7

K7

H8

AE13

AD13

L2

K5

D6

C10

H2

N8

F3

AH13

AH2

AJ3

AE5

G4

AJ2

AJ7

AE7

AJ6

AH5

AJ5

AH12

AE11

AE9

AJ14

H3

AH8

AJ9

AG3

AC5

AE2

AC6

Y3

AB1

AD7

AB2

H7

AC11

AD11

AC14

AC7

AC9

AD9

AE3

AD12

N1

W3

M6

P4

Y9

Y7

N2

W9

W6

N3

N5

J1

M3

G7

V4

Y8

W10

M2

K9

P13

H5

N9

N12

M10

G2

E2

E5

B6

F12

E8

C8

B9

G20

H17

G12

L13

F16

C15

M11

C11

B11

N19

B19

A19

C18

E17

B15

J13

B17

E19

B18

J19

N16

M17

D17

L19

H20

B16

R17

P15

K19

B14

J17

L16

B13

K16

C14

G17

U1400

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

54.9

MF-LF

1%1/16W

402 2

1R1421

9D6 70D3

29D3 75C3

29D3 75C3

9D6 12B5 70D3

9A2 70B3

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

9C8 70C3

9C4 70D3

9D8 70C3

9D8 70C3

9D8 70C3

9D8 70C3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70D3

9C4 70C3

9B4 70C3

9C4 70C3

9C4 70C3

9B4 70C3

9B4 70C3

9B4 70C3

9B4 70C3

9B4 70C3

9D8 70C3

9B4 70C3

9B4 70C3

9B4 70C3

9B4 70C3

9B4 70C3

9B4 70C3

9B4 70C3

9C2 70C3

9C2 70C3

9C2 70C3

9D8 70C3

9C2 70C3

9C2 70C3

9C2 70C3

9C2 70C3

9C2 70C3

9C2 70C3

9C2 70C3

9C2 70C3

9C2 70C3

9C2 70C3

9D8 70C3

9C2 70C3

9C2 70C3

9C2 70C3

9C2 70C3

9B2 70C3

9C2 70C3

9C2 70C3

9B2 70C3

9B2 70C3

9B2 70C3

9D8 70C3

9B2 70C3

9B2 70C3

9B2 70C3

9B2 70C3

9B2 70C3

9B2 70C3

9B2 70C3

9B2 70C3

9B2 70C3

9D6 70D3


NB CPU Interface

051-7455 01

7613

SYNC_MASTER=T9_MLB

FSB_RS_L<2>

FSB_RS_L<0>FSB_RS_L<1>

FSB_REQ_L<4>FSB_REQ_L<3>FSB_REQ_L<2>FSB_REQ_L<1>FSB_REQ_L<0>

FSB_DSTB_L_P<3>FSB_DSTB_L_P<2>FSB_DSTB_L_P<1>FSB_DSTB_L_P<0>

FSB_DSTB_L_N<3>FSB_DSTB_L_N<2>FSB_DSTB_L_N<1>FSB_DSTB_L_N<0>

FSB_DINV_L<3>FSB_DINV_L<2>FSB_DINV_L<1>FSB_DINV_L<0>

FSB_LOCK_LFSB_TRDY_L

FSB_HITM_LFSB_HIT_LFSB_DRDY_L

FSB_CLK_NB_NFSB_CLK_NB_P

FSB_DPWR_L

FSB_DBSY_LFSB_DEFER_LFSB_BREQ0_L

FSB_BNR_LFSB_BPRI_L

FSB_ADSTB_L<1>FSB_ADSTB_L<0>FSB_ADS_L



FSB_A_L<32>

FSB_A_L<29>FSB_A_L<28>FSB_A_L<27>FSB_A_L<26>FSB_A_L<25>FSB_A_L<24>FSB_A_L<23>FSB_A_L<22>FSB_A_L<21>FSB_A_L<20>FSB_A_L<19>FSB_A_L<18>FSB_A_L<17>FSB_A_L<16>FSB_A_L<15>FSB_A_L<14>FSB_A_L<13>FSB_A_L<12>




FSB_A_L<6>

FSB_A_L<3>

NB_FSB_VREF

NB_FSB_RCOMPNB_FSB_SWING

FSB_D_L<59>

FSB_D_L<41>

FSB_D_L<38>

FSB_D_L<0>


FSB_D_L<43>

FSB_D_L<12>


FSB_D_L<24>

FSB_D_L<31>

FSB_D_L<6>

FSB_CPUSLP_LFSB_CPURST_L

NB_FSB_SCOMP_LNB_FSB_SCOMP


FSB_D_L<58>FSB_D_L<57>FSB_D_L<56>FSB_D_L<55>FSB_D_L<54>FSB_D_L<53>FSB_D_L<52>FSB_D_L<51>

FSB_D_L<48>

FSB_D_L<46>FSB_D_L<45>FSB_D_L<44>

FSB_D_L<42>



FSB_D_L<32>

FSB_D_L<30>FSB_D_L<29>FSB_D_L<28>FSB_D_L<27>FSB_D_L<26>FSB_D_L<25>

FSB_D_L<23>FSB_D_L<22>FSB_D_L<21>FSB_D_L<20>FSB_D_L<19>FSB_D_L<18>FSB_D_L<17>FSB_D_L<16>FSB_D_L<15>FSB_D_L<14>FSB_D_L<13>

FSB_D_L<11>


FSB_D_L<10>

FSB_D_L<1>



FSB_D_L<47>

=PP1V25R1V05_S0_FSB_NB29C6 29B6 7C7

www.vinafix.vn

IN

IN

OUT

IN

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

IN

OUT

OUT

BI

L_BKLT_CTRL

L_VDD_EN

PEG_TX15*PEG_TX14*

PEG_TX13*

PEG_TX12*PEG_TX11*

PEG_TX10*

PEG_TX9*PEG_TX8*

PEG_TX7*

PEG_TX6*PEG_TX5*

PEG_TX4*PEG_TX3*

PEG_TX2*

PEG_TX1*PEG_TX0*

PEG_TX15

PEG_TX14

PEG_TX13PEG_TX12

PEG_TX11

PEG_TX10PEG_TX9

PEG_TX8PEG_TX7

PEG_TX6

PEG_TX5PEG_TX4

PEG_TX3

PEG_TX2PEG_TX1

PEG_TX0

PEG_RX14

PEG_RX15*PEG_RX14*

PEG_RX13*

PEG_RX12*PEG_RX11*

PEG_RX15

PEG_RX13PEG_RX12

PEG_RX11

PEG_RX10PEG_RX9

PEG_RX8PEG_RX7

PEG_RX6

PEG_RX5PEG_RX4

PEG_RX3

PEG_RX2PEG_RX1

PEG_RX0

PEG_RX10*

PEG_RX9*PEG_RX8*

PEG_RX7*

PEG_RX6*PEG_RX5*

PEG_RX4*PEG_RX3*

PEG_RX2*

PEG_RX1*PEG_RX0*

PEG_COMPI

PEG_COMPO

CRT_DDC_DATA

L_CTRL_DATA

LVDSB_DATA1LVDSB_DATA2

LVDSB_DATA0

LVDSB_DATA2*LVDSB_DATA1*

LVDSB_DATA0*

LVDSA_DATA2

LVDSA_DATA0LVDSA_DATA1

LVDSB_CLK*

LVDS_VREFL

LVDS_IBG

TVC_RTN

TVA_RTNTVB_RTN

TVC_DAC

TVB_DACTVA_DAC

CRT_RED*

CRT_REDCRT_GREEN*

CRT_GREEN

CRT_BLUE*CRT_BLUE

CRT_VSYNCCRT_TVO_IREF

CRT_HSYNC

CRT_DDC_CLK

L_BKLT_EN

L_DDC_CLK

TV_DCONSEL0

TV_DCONSEL1

LVDSA_DATA2*

L_DDC_DATA

LVDSA_DATA1*

LVDSA_DATA0*

LVDSB_CLK

LVDSA_CLKLVDSA_CLK*

LVDS_VREFH

L_CTRL_CLK

LVDS_VBG

VGA

TV

LVDS

(3 OF 10)

PCI-EXPRESS GRAPHICS

BI

BI

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SDVO_FLDSTALL#

SDVO Alternate Function

SDVO_TVCLKIN#SDVO_INT#

SDVO_TVCLKINSDVO_INTSDVO_FLDSTALL

SDVOB_GREENSDVOB_RED

SDVOC_CLKNSDVOC_BLUE#SDVOC_GREEN#SDVOC_RED#SDVOB_CLKNSDVOB_BLUE#SDVOB_GREEN#SDVOB_RED#

SDVOB_CLKPSDVOB_BLUE

SDVOC_CLKPSDVOC_BLUESDVOC_GREENSDVOC_RED

If SDVO is used, VCCD_LVDS must remain powered with proper

LVDS Disable

Tie VCC_TX_LVDS and VCCA_LVDS to GND.

TVDAC rails. VCCA_TVx_DAC and VCCA_DAC_BG can

should connect to GND through 75-ohm resistors.

Component: DACA, DACB & DACC

Composite: DACA only

TV-Out Signal Usage:

Can tie the following rails to GND:VSYNC and CRT_TVO_IREF to GND.

CRT Disable / TV-Out Enable

TV-Out Disable / CRT Enable

Tie TVx_DAC and TVx_RTN to GND. Must power all

Leave GFX_VID<3..0> and GFX_VR_EN as NC.Tie VCC_AXG and VCC_AXG_NCTF to GND.Tie VCCA_DPLLA and VCCA_DPLLB to VCC (VCore).

Tie DPLL_REF_CLK and DPLL_REF_SSCLK to GND.

Can also tie CRT_DDC_*, L_CTRL_*, L_DDC_*, SDVO_CTRL_* andTV_DCONSELx to GND.

Follow instructions for LVDS and CRT & TV-Out Disable above.

Internal Graphics Disable

and filtered at all times!NOTE: Must keep VDDC_TVDAC powered

VCCD_CRT, VCCD_QDAC and VCC_SYNC.VCCA_CRT_DAC, VCCA_DAC_BG, VCCA_TVx_DAC,

omit filtering components. Unused DAC outputs

All CRT/TVDAC rails must be powered. All

CRT & TV-Out Disable

Tie TVx_DAC, TVx_RTN, R/R#/G/G#/B/B#, HSYNC,

Tie R/R#/G/G#/B/B#, HSYNC and VSYNC to GND.

share filtering with VCCA_CRT_DAC.

Unused DAC outputs must remain powered, but can

S-Video: DACB & DACC only

Can leave all signals NC if LVDS is not implemented.

decoupling. Otherwise, tie VCCD_LVDS to GND also.

Tie DPLL_REF_CLK* and DPLL_REF_SSCLK* to VCC (VCore).

rails must be filtered except for VCCA_CRT.

8C6

8C6

24.91%1/16WMF-LF4022

1R1510

67B8

8C6

69B8

69A8

69A8

69D7

69D8

69D7

69A8

8C6

69B8

69A8

67A8 71C3

FCBGA

CRESTLINE

OMIT

L27

K27

J27

G27

F27

E27

P33

M35

AD39

AC38

W38

Y39

W46

Y47

Y43

W42

T42

U43

R50

R51

N51

N50

U47

T46

AH44

AH43

AE49

AE50

AH39

AG39

AC42

AD43

AC49

AC50

AC46

AD47

U39

T38

N45

M45

W49

Y48

AB51

AB50

Y40

W41

Y44

W45

U40

T41

T50

T49

T45

U44

N47

M47

AG41

AG42

AG45

AH45

AH49

AG49

AG46

AH47

AD40

AC41

AD44

AC45

L51

L50

J51

J50

M43

N43

B45

A45

B47

A47

G44

E44

D44

E42

F49

F48

E51

E50

G51

G50

D46

C45

N40

N41

L43

L41

K40

D35

C37

E40

E39

H39

J40

E33

C32

E29

F29

F33

J29

K29

G35

K33

G32

H32

U1400

12B1 67A7

12B1 67A7

69C8

69C8

8C6

8C6

8C6

8C6

8C6

8C6

8D6

68B6 71D3

8C6

8C6

8C6

8C6

8C6

8C6

8C6

8C6

8C6

68B6 71D3

8C6

8B6

8B6

8B6

68C6 71D3

68C6 71D3

8B6

8A6

8B6

8B6

8C6

8B6

8B6

8B6

8B6

8B6

8B6

8B6

8B6

8B6

8B6

8C6

8B6

8B6

8B6

8B6

8B6

8B6

8B6

8B6

8B6

8B6

8C6

68B6 71D3

68B6 71D3

68B6 71D3

68B6 71D3

68C6 71D3

68C6 71D3

67C6

67D8

8C6

67B6

67B6

67B3 71D3

67B3 71D3

8D6

8D6

67B2 71D3

67B2 71D3

8C6

67B2 71D3

8D6

8D6

8D6

67B2 71D3

67B2 71D3

67B2 71D3

8D6

8D6

8D6

8C6

69D8

69D8

69D8

69D7

69D7

69D7

69B8

69B8

SYNC_MASTER=T9_MLB

NB PEG / Video Interfaces

051-7455 01

7614


LVDS_VDD_ENLVDS_DDC_DATALVDS_DDC_CLK

LVDS_BKLT_CTL

PEG_R2D_C_N<15>PEG_R2D_C_N<14>PEG_R2D_C_N<13>PEG_R2D_C_N<12>PEG_R2D_C_N<11>PEG_R2D_C_N<10>PEG_R2D_C_N<9>PEG_R2D_C_N<8>PEG_R2D_C_N<7>PEG_R2D_C_N<6>PEG_R2D_C_N<5>PEG_R2D_C_N<4>PEG_R2D_C_N<3>PEG_R2D_C_N<2>PEG_R2D_C_N<1>PEG_R2D_C_N<0>

PEG_R2D_C_P<15>PEG_R2D_C_P<14>PEG_R2D_C_P<13>PEG_R2D_C_P<12>PEG_R2D_C_P<11>PEG_R2D_C_P<10>PEG_R2D_C_P<9>PEG_R2D_C_P<8>PEG_R2D_C_P<7>PEG_R2D_C_P<6>PEG_R2D_C_P<5>PEG_R2D_C_P<4>PEG_R2D_C_P<3>PEG_R2D_C_P<2>PEG_R2D_C_P<1>PEG_R2D_C_P<0>

PEG_D2R_P<14>

PEG_D2R_N<15>PEG_D2R_N<14>PEG_D2R_N<13>PEG_D2R_N<12>PEG_D2R_N<11>

PEG_D2R_P<15>


PEG_D2R_P<8>PEG_D2R_P<7>PEG_D2R_P<6>PEG_D2R_P<5>PEG_D2R_P<4>PEG_D2R_P<3>PEG_D2R_P<2>PEG_D2R_P<1>PEG_D2R_P<0>

PEG_D2R_N<10>PEG_D2R_N<9>PEG_D2R_N<8>PEG_D2R_N<7>

PEG_D2R_N<5>PEG_D2R_N<4>PEG_D2R_N<3>PEG_D2R_N<2>

PEG_D2R_N<0>

PEG_COMP

CRT_DDC_DATA

LVDS_B_DATA_P<1>LVDS_B_DATA_P<2>

LVDS_B_DATA_P<0>

LVDS_B_DATA_N<0>

LVDS_A_DATA_P<2>

LVDS_A_DATA_P<0>LVDS_A_DATA_P<1>

LVDS_B_CLK_N

TP_LVDS_VREFL

LVDS_IBG

=TV_C_RTN

=TV_A_RTN

=TV_C_DAC

=TV_A_DAC

=CRT_RED_L=CRT_RED=CRT_GREEN_L=CRT_GREEN=CRT_BLUE_L=CRT_BLUE

=CRT_VSYNC_R=CRT_TVO_IREF=CRT_HSYNC_R

CRT_DDC_CLK

LVDS_BKLT_EN

TV_DCONSEL<0>TV_DCONSEL<1>

LVDS_A_DATA_N<2>LVDS_A_DATA_N<1>LVDS_A_DATA_N<0>

LVDS_B_CLK_P

LVDS_A_CLK_PLVDS_A_CLK_N

TP_LVDS_VREFH

PEG_D2R_N<6>

PEG_D2R_N<1>

PP1V05_S0_NB_VCCPEG


PEG_D2R_P<9>

TP_LVDS_VBG

LVDS_CTRL_CLKLVDS_CTRL_DATA

LVDS_B_DATA_N<1>LVDS_B_DATA_N<2>

=TV_B_DAC

=TV_B_RTN

20D3 18B3

www.vinafix.vn

IN

IN

CLKREQ*

NC1

NC8

CL_CLK

CL_PWROKCL_RST*

RSVD6

THERMTRIP*

PM_BM_BUSY*

RSVD4

RSVD3

RSVD7

SM_CKE1

SM_CK0*

SM_CKE0

SM_ODT0

SM_ODT2

SM_RCOMP

SM_RCOMP*

SM_VREF0SM_VREF1

SM_RCOMP_VOL

SM_CS1*SM_CS0*

RSVD14

RSVD11

RSVD10

RSVD9

RSVD5

RSVD8

RSVD2

DPLL_REF_CLK*

DPLL_REF_SSCLK

PEG_CLK

DMI_RXN1

DMI_RXN0

DMI_RXN3DMI_RXN2

DMI_RXP0

DMI_RXP1DMI_RXP2

DMI_TXN0

DMI_RXP3

DMI_TXN2DMI_TXN1

DMI_TXP0

DMI_TXN3

DMI_TXP1

DMI_TXP2

DMI_TXP3

PEG_CLK*

RSVD12

CL_DATA

CL_VREF

SDVO_CTRL_CLK

SDVO_CTRL_DATA

ICH_SYNC*

TEST1

TEST2

GFX_VID0

GFX_VID1

GFX_VID2

GFX_VR_EN

GFX_VID3

RSVD20

RSVD21

RSVD24

RSVD25

RSVD27

RSVD34

RSVD35

RSVD36RSVD37

RSVD38RSVD39

RSVD41RSVD42

RSVD40

RSVD43

RSVD44RSVD45

CFG0

CFG1

CFG2CFG3

CFG4CFG5

CFG6

CFG7CFG8

CFG9

CFG10CFG11

CFG12

CFG13

CFG16CFG15

CFG14

CFG17

CFG18CFG19

CFG20

PM_DPRSTP*PM_EXT_TS0*

PWROKPM_EXT_TS1*

RSTIN*

DPRSLPVR

NC2

NC4NC3

NC5

NC7NC6

NC10

NC9

NC12NC11

NC13

NC14NC15

NC16

DPLL_REF_CLK

SM_RCOMP_VOH

SM_ODT3

SM_ODT1

RSVD13

SM_CS2*

SM_CS3*

SM_CK3

SM_CK4

SM_CK4*

SM_CKE3

RSVD1

SM_CKE4

DPLL_REF_SSCLK*

SM_CK3*SM_CK1*

SM_CK1

SM_CK0

SA_MA14

RSVD22RSVD23

RSVD26

SB_MA14

SM_CK2

SM_CK2*

SM_CK5SM_CK5*

(2 OF 10)

RSVD

DDR MUXING

CLK

CFG

DMI

PM

GRAPHICS VID

ME

MISC

NC

OUT

OUT

OUT

OUT

OUT

BI

BI

IN

OUT

BI

BI

OUT

OUT

IN

IN

OUT

OUT

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

BI

OUT

BI

OUT

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Clk used for PEG and DMI

NB_CFG<3>

High = DMIx4

NB CFG<8:0> used for debug access

IPU

NB_CFG<4>

NB_CFG<5>

DMI x2 Select

NOTE: GMCH CL_PWROK input must be PWRGD signal for PP3V3_S0M, PP3V3_S0MWOL, PP1V8_S3M, PP1V25_S0M,

If ME/AMT is not used, short CL_PWROK to PWROK. PP1V05_S0M, PP0V9_S3M and PP0V9_S0M.

NB_CFG<18>

NB_CFG<15>

FSB DynamicODT

NB_CFG<17>

NB_CFG<14>

NB_CFG<16>

NB_CFG<11>

NB_CFG<12>

NB_CFG<13>

DMI LaneReversal

SDVO/PCIe x1ConcurrentNB_CFG<20>

NB_CFG<19>

00 = RESERVED

or PCIe x16

11 = Normal Operation

High = Reversed

Low = Only SDVO

NB_CFG<13:12>

High = Both active

Low = Normal

01 = XOR Mode Enabled10 = All-Z Mode Enabled

High = Enabled

Low = Disabled

See Below

See Below

RESERVED

RESERVED

RESERVED

RESERVED

RESERVED

Lane ReversalPCIe GraphicsNB_CFG<9>

NB_CFG<10>

Low = Reversed

High = Normal

RESERVED

RESERVED

RESERVEDNB_CFG<7>

NB_CFG<6>

RESERVED

IPU

IPDIPD

IPDIPUIPUIPUIPU

IPU

IPU

IPU

IPU

IPU

IPU

NB_CFG<8>

Low = DMIx2

RESERVED

RESERVED

IPU

IPU

NB CFG<13:12> require ICT access

IPU

27D1

20A4

10V

0.1uF20%

CERM402

2

1 C1616

10V

0.1uF20%

CERM402

2

1C1615

OMIT

FCBGA

CRESTLINE

N20

R32

A37

AW4

AR49

BL31

BK31

BK14

BL15

BE16

BJ14

BJ15

BH18

BE13

BG16

BK16

BG20

BG37

BD39

AY32

BE29

BD24

BC23

AW23

AV23

AW25

BA25

BG23

BF23

BA23

BB23

AW30

AV29

K36

H35

BE24

BJ29

J12

AN13

AM12

AR13

AR12

C34

B34

B36

B37

A35

C44

N35

B44

D47

C48

BK20

AW20

BH39

R35

BJ18

BK18

BH20

BF19

BK22

BJ20

B51

H10

P37

D20

AM37

AL36

AM36

AR37

P36

AV20

AW49

J36

L36

L39

G41

K45

K44

BJ1

BK1

BL2

BL3

BL49

BL50

BK50

BK51

BK2

A49

A50

B50

C51

A5

E1

BJ51

G40

E36

B39

C38

A39

E35

G36

H47

H48

C42

B42

AM43

AM39

AJ42

AJ47

AM44

AM40

AJ41

AJ46

AN45

AN41

AJ39

AM47

AN46

AN42

AJ38

AN47

G39

AM50

AN49

AT43

AK50

AM49

C20

J20

G23

N23

F23

C23

C21

L35

N24

N33

L32

M24

M20

K23

E20

E23

J23

L23

R24

N27

P27

U1400

21B6 60C6

21B6 60C6

21B6 60C6

21B6 60C6

8B2

24C3 74A3

24C3 74A3

8B2

24C3 74A3

68A6

68A6

28B4

24B5

5%1/16WMF-LF

20K

402 2

1R16915%1/16WMF-LF

0

4022

1R1690

24C3 59D8 70B3

8B2 44B8

1/16W5%

MF-LF

10K

4022

1R1631

402CERM16V10%

0.01UF

2

1C162520%

CERM16.3V

2.2UF

603

2

1 C1624

402

1/16W1%

MF-LF

1K

2

1R1624

3.01K

MF-LF1/16W1%

4022

1R162220%2.2UF

CERM16.3V

603

2

1 C1622

402CERM16V10%

0.01UF

2

1C1623

MF-LF

1%1/16W

402

1K

2

1R1620

1%1/16WMF-LF

392

4022

1R1641

1%1K

1/16WMF-LF4022

1R1640

0.1uF

CERM10V20%

402

2

1C1640

NBCFG_DMI_X2

1/16WMF-LF

3.9K5%

4022

1R1655

NBCFG_PEG_REVERSE

3.9K

MF-LF1/16W5%

4022

1R1659

MF-LF

5%1/16W

3.9K

NBCFG_DYN_ODT_DISABLE

4022

1R1666

NBCFG_DMI_REVERSE

5%1/16WMF-LF

3.9K

4022

1R1669

NBCFG_SDVO_AND_PCIE

3.9K

MF-LF1/16W5%

4022

1R1670

60C6

30C4 32C6 72D3

31C4 32A5 72B3

29C8 70B3

29B8 70B3

29B8 70B3

8A6

8A6

8A6

8A6

15D7

24D5

8A6

402MF-LF1/16W5%

0 21

R16009C6 22C2 45B3 70B3

8B2 44B8

9B2 22C4 59C7 70B3

27B5 59C7

30D4 72D3

31A4 72B3

31D4 72B3

30A4 72D3

30D4 72D3

31A4 72B3

31D4 72B3

30A4 72D3

30C6 32D6 72D3

30C4 32D6 72D3

31C6 32D6 72B3

30B4 32D6 72D3

31C4 32D5 72B3

30B6 32D6 72D3

31B4 32D6 72B3

31B6 32D6 72B3

30B4 32D6 72D3

30B6 32D6 72D3

31B4 32D6 72B3

31B6 32D6 72B3

402

201%

1/16WMF-LF

2

1R1610

402

20

MF-LF

1%1/16W

2

1R1611

20A5

29C3 75B3

29C3 75B3

8B2

8B2

8B2

8B2

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

23D2 71D3

10K5%

1/16WMF-LF

402 2

1R1630

NB Misc InterfacesSYNC_DATE=10/30/2006SYNC_MASTER=T9_MLB

15 76

01051-7455

GFX_VID<2>

DMI_N2S_N<2>DMI_N2S_N<1>

DMI_S2N_P<2>DMI_S2N_P<1>

DMI_S2N_N<3>DMI_S2N_N<2>DMI_S2N_N<1>DMI_S2N_N<0>

NB_CLK100M_PCIE_N

=NB_CLK100M_DPLLSS_N=NB_CLK100M_DPLLSS_P=NB_CLK96M_DOT_N=NB_CLK96M_DOT_P

GFX_VID<0>

NB_CFG<9>

MEM_RCOMP_VOH

=PP1V8_S3M_MEM_NB

MEM_RCOMP

MEM_RCOMP_VOL

=PP0V9_S3M_MEM_NBVREFA

MEM_CKE<3>MEM_CKE<1>

NB_CFG<4>

TP_NB_RSVD<44>

MEM_RCOMP_L

NB_CFG<5>

NB_CFG<8>NB_CFG<7>NB_CFG<6>

NB_BSEL<2>

NB_CLINK_VREF

PP1V25_S0M_NB_VCCAXD

TP_NB_CFG<17>=PP3V3_S0_NB_VCCHV

TP_NB_CFG<13>

TP_NB_CFG<11>

=PP3V3_S0_NB_VCCHV

NB_CFG<20>

NB_CFG<19>

=PP3V3_S0_NB_VCCHV

NB_CFG<16>

PM_EXTTS_L<1>

NB_RESET_L

PM_DPRSLPVR

TP_NB_RSVD<14>

TP_NB_RSVD<45>

TP_LVDS_B_DATAN3

TP_NB_RSVD<36>TP_NB_RSVD<35>

MEM_A_A<14>

TP_LVDS_B_DATAP3

TP_LVDS_A_DATAN3

TP_MEM_CLKP2

TP_NB_RSVD<24>

TP_NB_RSVD<5>

=PP0V9_S3M_MEM_NBVREFB

DMI_S2N_P<3>

TP_NB_NC<4>

TP_NB_RSVD<12>

TP_NB_RSVD<6>

MEM_ODT<1>MEM_ODT<0>

MEM_CS_L<3>

MEM_ODT<3>MEM_ODT<2>

MEM_CS_L<2>

PM_THRMTRIP_L

VR_PWRGOOD_DELAY

CPU_DPRSTP_LPM_BMBUSY_L

TP_MEM_CLKN5TP_MEM_CLKP5TP_MEM_CLKN2

NB_SB_SYNC_LNB_CLKREQ_LSDVO_CTRLDATA

DMI_N2S_N<0>

DMI_S2N_P<0>

NB_CLK100M_PCIE_P

TP_NB_NC<1>

TP_NB_NC<8>


TP_NB_RSVD<7>

MEM_CLK_N<0>

MEM_CLK_P<1>

MEM_CLK_N<1>

MEM_CKE<0>

MEM_CS_L<1>MEM_CS_L<0>

TP_NB_RSVD<11>TP_NB_RSVD<10>TP_NB_RSVD<9>TP_NB_RSVD<8>

TP_NB_RSVD<2>

NB_TEST1NB_TEST2

TP_NB_RSVD<20>TP_NB_RSVD<21>TP_NB_RSVD<22>TP_NB_RSVD<23>

TP_NB_CFG<10>

TP_NB_CFG<14>

TP_NB_CFG<18>NB_CFG<19>NB_CFG<20>

PM_EXTTS_L<0>

TP_NB_NC<2>TP_NB_NC<3>

TP_NB_NC<5>




TP_NB_NC<13>TP_NB_NC<14>TP_NB_NC<15>TP_NB_NC<16>

TP_NB_RSVD<13>

MEM_CLK_P<3>MEM_CLK_P<4>

MEM_CLK_N<3>MEM_CLK_N<4>

MEM_CLK_P<0>TP_NB_RSVD<1>

MEM_CKE<4>

NB_CFG<5>

NB_BSEL<0>

TP_NB_RSVD<25>TP_NB_RSVD<26>TP_NB_RSVD<27>

MEM_B_A<14>TP_NB_RSVD<34>

TP_LVDS_A_DATAP3

GFX_VID<3>=GFX_VR_EN

GFX_VID<1>

DMI_N2S_P<3>

DMI_N2S_P<1>

DMI_N2S_N<3>

NB_CFG<16>TP_NB_CFG<15>

TP_NB_CFG<12>

NB_CFG<9>

NB_CFG<3>

NB_BSEL<1>

TP_NB_RSVD<43>


SDVO_CTRLCLK

CLINK_NB_RESET_L=NB_CLINK_MPWROKCLINK_NB_DATACLINK_NB_CLK

DMI_N2S_P<2>

DMI_N2S_P<0>

GFX_VID<4>

21B7

21B7

31D2

21B7

20A8

20A8

30D2

20A8

18B3

18B3

20C8

18B3

15C7

15C7

17D7

20A6

15C7

15B7

15B7

15B6

7A4

74A3

18C3

7D4

7D4

15B6

15B6

7D4

15B6

8D6

8D6

8D6

8B4

8B4

8B4

8B4

15C7

15C7

15B6

8D6

15D7

15D7

www.vinafix.vn

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

BI

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

OUT

SA_DQ0

SA_DQ1SA_DQ2

SA_DQ4

SA_DQ6

SA_DQ14

SA_CAS*

SA_BS2

SA_DQ63

SA_DQ62SA_DQ61

SA_DQ60

SA_DQ59SA_DQ58

SA_DQ57SA_DQ56

SA_DQ55

SA_DQ54SA_DQ53

SA_DQ52

SA_DQ51SA_DQ50

SA_DQ49

SA_DQ48SA_DQ47

SA_DQ46

SA_DQ44

SA_DQ43SA_DQ42

SA_DQ41

SA_DQ40SA_DQ39

SA_DQ38

SA_DQ37SA_DQ36

SA_DQ34SA_DQ35

SA_DQ33

SA_DQ32SA_DQ31

SA_DQ30

SA_DQ28SA_DQ29

SA_DQ27

SA_DQ26SA_DQ25

SA_DQ24SA_DQ23

SA_DQ22

SA_DQ21SA_DQ20

SA_DQ19

SA_DQ18SA_DQ17

SA_DQ16

SA_DQ15

SA_DQ13

SA_DQ11

SA_DQ12

SA_DQ10SA_DQ9

SA_DQ8

SA_DQ7

SA_DQ5

SA_DQ3

SA_BS1

SA_BS0

SA_DQ45

SA_DM0

SA_DM1

SA_DM3SA_DM2

SA_DM5

SA_DM4

SA_DM7

SA_DM6

SA_DQS0

SA_DQS1SA_DQS2

SA_DQS3

SA_DQS4SA_DQS5

SA_DQS6

SA_DQS7

SA_DQS1*

SA_DQS0*

SA_DQS2*

SA_DQS4*

SA_DQS3*

SA_DQS5*

SA_DQS6*

SA_DQS7*

SA_MA0

SA_MA1SA_MA2

SA_MA3SA_MA4

SA_MA5

SA_MA6SA_MA7

SA_MA9

SA_MA8

SA_MA10

SA_MA11

SA_MA12SA_MA13

SA_RAS*

SA_RCVEN*

SA_WE*

DDR SYSTEM MEMORY A

(4 OF 10)SB_DQ2SB_DQ1

SB_DQ5SB_DM0

SB_DQ0

SB_DQ4

SB_DQ6SB_DQ7

SB_CAS*

SB_BS2

SB_BS0

SB_BS1

SB_DQ63

SB_DQ62

SB_DQ59SB_DQ58

SB_DQ56

SB_DQ55

SB_DQ54SB_DQ53

SB_DQ52

SB_DQ51SB_DQ50

SB_DQ49

SB_DQ48SB_DQ47

SB_DQ45SB_DQ46

SB_DQ44

SB_DQ43SB_DQ42

SB_DQ41

SB_DQ40SB_DQ39

SB_DQ38

SB_DQ37SB_DQ36

SB_DQ34SB_DQ35

SB_DQ33

SB_DQ32SB_DQ31

SB_DQ30

SB_DQ28SB_DQ29

SB_DQ27

SB_DQ26SB_DQ25

SB_DQ24SB_DQ23

SB_DQ22

SB_DQ21SB_DQ20

SB_DQ19

SB_DQ18SB_DQ17

SB_DQ16

SB_DQ15SB_DQ14

SB_DQ13

SB_DQ11

SB_DQ12

SB_DQ10SB_DQ9

SB_DQ8

SB_DQ3

SB_DQ57

SB_DQ61

SB_DQ60

SB_WE*

SB_RCVEN*

SB_RAS*

SB_MA13SB_MA12

SB_MA11

SB_MA10

SB_MA8

SB_MA9

SB_MA7SB_MA6

SB_MA5

SB_MA4SB_MA3

SB_MA2SB_MA1

SB_MA0

SB_DQS7*

SB_DQS6*

SB_DQS5*

SB_DQS3*

SB_DQS4*

SB_DQS2*

SB_DQS0*

SB_DQS1*

SB_DQS7

SB_DQS6

SB_DQS5SB_DQS4

SB_DQS3

SB_DQS2SB_DQS1

SB_DQS0

SB_DM6

SB_DM7

SB_DM4

SB_DM5

SB_DM2SB_DM3

SB_DM1

(5 OF 10)

DDR SYSTEM MEMORY B

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

30A6 72D3

30C6 72C3

30B6 72C3

30B4 72C3

30A4 72C3

30A6 72C3

30A4 72C3

30A6 72C3

30B6 72C3

30B4 72C3

30C4 72C3

30A6 72D3

30C6 72C3

30D4 72C3

31A6 72B3

31A4 72B3

31A6 72B3

31A4 72B3

31A6 72B3

31A6 72B3

31A4 72B3

31A4 72B3

30A6 72D3 31A6 72B3

31A6 72B3

31A4 72B3

31A6 72B3

31A4 72B3

31A4 72B3

31B6 72B3

31A6 72B3

31A4 72B3

31A4 72B3

30A4 72D3

31B6 72B3

31A6 72B3

31B4 72B3

31B4 72B3

31A4 72B3

31A6 72B3

31B6 72B3

31B6 72B3

31B4 72B3

31B4 72B3

30A4 72D3

31B6 72B3

31C6 72B3

31C6 72B3

31B6 72B3

31B4 72B3

31B4 72B3

31C4 72B3

31C6 72B3

31C4 72B3

31C6 72B3

30A6 72D3

31C4 72B3

31C4 72B3

31C4 72B3

31C6 72B3

31C4 72B3

31C6 72B3

31C4 72B3

31C6 72B3

31C6 72B3

31C4 72B3

30A6 72D3

31D4 72B3

31D4 72B3

31D4 72B3

31D6 72B3

31D4 72B3

31D6 72B3

31D6 72B3

31D6 72B3

31D6 72B3

30A4 72D3

31D4 72B3

31D4 72B3

31D6 72B3

31D4 72B3

31D6 72B3

31D4 72B3

31D6 72B3

31B6 32A6 72B3

31B4 32A6 72B3

31B4 32A5 72B3

30A6 72D3

31C6 32A5 72B3

31B6 32B5 72B3

31C4 32A5 72B3

31C6 32B5 72B3

31C6 32B5 72B3

31C4 32B5 72B3

31B6 32B5 72B3

31C4 32B5 72B3

31B4 32B5 72B3

31B6 32B5 72B3

30A4 72D3

31B4 32B5 72B3

31B6 32B5 72B3

31B4 32B5 72B3

31A4 72A3

31A6 72A3

31C4 72A3

31B6 72A3

31B4 72A3

31C6 72A3

31D6 72A3

30A4 72D3

31A6 72A3

31A4 72A3

31D6 72A3

31B6 72A3

31A4 72A3

31C4 72A3

31D6 72A3

31C6 72A3

31A6 72A3

31D6 72A3

30A6 72D3

31A6 72B3

31A4 72A3

31C6 72B3

31B4 72B3

31C4 72B3

31D4 72B3

31D4 72B3

31B6 32A6 72B3

31C6 32A6 72B3

31B6 32A6 72B3

30A4 72D3

31B4 32A6 72B3 FCBGA

CRESTLINE

OMIT

BA19

AY20

BE18

BA28

BL28

BJ25

BJ27

BK28

BL24

BH28

BK27

BJ16

BG30

BE28

BC19

BD20

BJ19

AP2

AP3

BC1

BB2

BH7

BH6

BA16

BB16

BA37

BC37

BC41

BB43

BD47

BE48

AT47

AT46

BF48

BB45

AW47

AN11

AM9

AN9

AT9

AT42

AN10

AM8

AN3

AR9

AR8

AR5

BB7

AY6

AT7

AT5

AR45

AY7

BB5

BB9

BD7

AW9

BG10

AY9

BD8

BD10

BE10

AR41

BA11

BA13

AT11

AU15

AV11

AW11

AT13

AV13

AT38

AV38

AY46

AY41

AW41

AW36

AT39

AW40

AR40

BF40

BG40

BH45

BF44

BA45

BE40

BG42

BE44

AW43

BE45

BH49

BG50

BB47

BJ45

BG47

AW44

AR43

AN6

AY5

BG8

AW13

AW38

BD42

BD44

AT45

BL17

BF29

BK19

BB19

U1400

FCBGA

CRESTLINE

OMIT

BC17

AY18

AV16

BD37

AY28

BC28

BA29

BE25

BF25

AW17

BG25

BG13

BA39

BE37

BG17

BG28

BC18

AV3

AV2

BF2

BE2

BK7

BL7

BK12

BJ12

BK38

BK39

BL45

BK46

BC50

BD50

AU50

AT50

BB50

BA50

AV49

AT2

AU2

AY3

AY2

AV50

AT3

AR1

BB3

BA3

BJ2

BD3

BE4

BK3

BC2

BG1

AN50

BH5

BF4

BJ6

BJ8

BK10

BK9

BL5

BK5

BL9

BJ10

AN51

BG12

BC12

BE12

BC13

BC11

BK11

BE11

BK13

BK37

BL35

AW51

BJ40

BK41

BJ36

BJ37

BL41

BJ41

BK42

BK43

BK49

BK47

AW50

BL43

BJ43

BJ44

BJ50

BF49

BF50

AY49

BA51

BE50

BA49

AR51

AP49

AW2

BF3

BJ7

BH12

BL39

BK45

BD49

AR50

BE17

BG36

BG18

AY17

U1400

30B4 72D3

30A6 72D3

30B6 72D3

30B6 72D3

30B4 72D3

30B6 72D3

30B6 72D3

30D4 72D3

30B4 72D3

30B6 72D3

30B4 72D3

30B4 72D3

30B6 72D3

30B4 72D3

30C6 72D3

30C4 72D3

30D4 72D3

30C4 72D3

30A6 72D3

30C6 72D3

30C4 72D3

30C6 72D3

30D6 72D3

30C6 72D3

30C4 72D3

30C6 72D3

30C4 72D3

30C6 72D3

30C6 72D3

30A4 72D3

30C4 72D3

30C4 72D3

30D4 72D3

30D4 72D3

30D6 72D3

30D4 72D3

30D4 72D3

30D6 72D3

30D6 72D3

30D6 72D3

30A4 72D3

30D6 72D3

30D4 72D3

30D4 72D3

30D4 72D3

30D6 72D3

30D6 72D3

30D6 72D3

30B6 32C6 72D3

30B4 32C6 72D3

30C6 32C6 72D3

30A4 72D3

30B6 32B6 72D3

30D4 72C3

30B4 32C6 72D3

30B4 32B6 72D3

30B6 32B6 72D3

30C6 32C6 72D3

30C4 32C6 72D3

30B6 32C6 72D3

30C6 32C6 72D3

30A6 72D3

30C6 32C6 72D3

30C4 32C6 72D3

30C4 32C6 72D3

30B6 32C6 72D3

30B4 32C6 72D3

30B6 32C6 72D3

30B4 32C6 72D3

30B6 32C6 72D3

30B4 32C6 72D3

30D6 72C3

30A4 72D3

30D6 72C3

30C4 72C3

30C6 72C3

30B6 72C3

30B4 72C3

30A4 72C3

30A6 72C3

30D6 72C3

30D6 72C3

30C4 72C3

SYNC_DATE=10/30/2006SYNC_MASTER=T9_MLB

NB DDR2 Interfaces

051-7455 01

7616

MEM_A_DQ<63>MEM_A_DQ<62>MEM_A_DQ<61>MEM_A_DQ<60>MEM_A_DQ<59>MEM_A_DQ<58>MEM_A_DQ<57>MEM_A_DQ<56>MEM_A_DQ<55>MEM_A_DQ<54>MEM_A_DQ<53>MEM_A_DQ<52>MEM_A_DQ<51>MEM_A_DQ<50>MEM_A_DQ<49>MEM_A_DQ<48>MEM_A_DQ<47>MEM_A_DQ<46>MEM_A_DQ<45>MEM_A_DQ<44>MEM_A_DQ<43>MEM_A_DQ<42>MEM_A_DQ<41>MEM_A_DQ<40>MEM_A_DQ<39>MEM_A_DQ<38>MEM_A_DQ<37>MEM_A_DQ<36>

MEM_A_DQ<34>MEM_A_DQ<33>MEM_A_DQ<32>MEM_A_DQ<31>MEM_A_DQ<30>MEM_A_DQ<29>MEM_A_DQ<28>MEM_A_DQ<27>MEM_A_DQ<26>MEM_A_DQ<25>MEM_A_DQ<24>MEM_A_DQ<23>MEM_A_DQ<22>MEM_A_DQ<21>MEM_A_DQ<20>MEM_A_DQ<19>MEM_A_DQ<18>MEM_A_DQ<17>MEM_A_DQ<16>MEM_A_DQ<15>MEM_A_DQ<14>MEM_A_DQ<13>MEM_A_DQ<12>MEM_A_DQ<11>MEM_A_DQ<10>MEM_A_DQ<9>

MEM_A_WE_L

MEM_A_RAS_L

MEM_A_A<13>MEM_A_A<12>MEM_A_A<11>MEM_A_A<10>

MEM_A_A<8>MEM_A_A<9>

MEM_A_A<7>MEM_A_A<6>MEM_A_A<5>MEM_A_A<4>MEM_A_A<3>MEM_A_A<2>MEM_A_A<1>MEM_A_A<0>

MEM_A_DQS_N<7>MEM_A_DQS_N<6>MEM_A_DQS_N<5>

MEM_A_DQS_N<3>MEM_A_DQS_N<4>

MEM_A_DQS_N<2>

MEM_A_DQS_N<0>MEM_A_DQS_N<1>

MEM_A_DQS_P<7>MEM_A_DQS_P<6>MEM_A_DQS_P<5>MEM_A_DQS_P<4>MEM_A_DQS_P<3>MEM_A_DQS_P<2>MEM_A_DQS_P<1>MEM_A_DQS_P<0>

MEM_A_DM<6>MEM_A_DM<7>




MEM_A_BS<0>MEM_A_BS<1>

MEM_A_DQ<3>

MEM_A_DQ<5>

MEM_A_DQ<7>MEM_A_DQ<8>

MEM_A_BS<2>

MEM_A_CAS_L

MEM_A_DQ<6>

MEM_A_DQ<4>

MEM_A_DQ<2>MEM_A_DQ<1>MEM_A_DQ<0>

MEM_B_DQ<63>MEM_B_DQ<62>MEM_B_DQ<61>MEM_B_DQ<60>MEM_B_DQ<59>MEM_B_DQ<58>MEM_B_DQ<57>MEM_B_DQ<56>MEM_B_DQ<55>MEM_B_DQ<54>MEM_B_DQ<53>MEM_B_DQ<52>MEM_B_DQ<51>MEM_B_DQ<50>MEM_B_DQ<49>MEM_B_DQ<48>MEM_B_DQ<47>MEM_B_DQ<46>MEM_B_DQ<45>MEM_B_DQ<44>MEM_B_DQ<43>MEM_B_DQ<42>MEM_B_DQ<41>MEM_B_DQ<40>

MEM_B_DQ<38>MEM_B_DQ<37>MEM_B_DQ<36>MEM_B_DQ<35>MEM_B_DQ<34>MEM_B_DQ<33>MEM_B_DQ<32>MEM_B_DQ<31>MEM_B_DQ<30>MEM_B_DQ<29>MEM_B_DQ<28>MEM_B_DQ<27>MEM_B_DQ<26>MEM_B_DQ<25>MEM_B_DQ<24>MEM_B_DQ<23>MEM_B_DQ<22>MEM_B_DQ<21>MEM_B_DQ<20>MEM_B_DQ<19>MEM_B_DQ<18>MEM_B_DQ<17>MEM_B_DQ<16>MEM_B_DQ<15>MEM_B_DQ<14>MEM_B_DQ<13>MEM_B_DQ<12>MEM_B_DQ<11>MEM_B_DQ<10>MEM_B_DQ<9>

MEM_B_WE_L

MEM_B_A<13>

MEM_B_RAS_L

MEM_B_A<12>MEM_B_A<11>MEM_B_A<10>MEM_B_A<9>MEM_B_A<8>MEM_B_A<7>MEM_B_A<6>MEM_B_A<5>MEM_B_A<4>MEM_B_A<3>MEM_B_A<2>MEM_B_A<1>MEM_B_A<0>

MEM_B_DQS_N<7>

MEM_B_DQS_N<5>MEM_B_DQS_N<6>

MEM_B_DQS_N<4>

MEM_B_DQS_N<2>MEM_B_DQS_N<3>

MEM_B_DQS_N<0>MEM_B_DQS_P<7>

MEM_B_DQS_N<1>

MEM_B_DQS_P<5>MEM_B_DQS_P<6>

MEM_B_DQS_P<2>MEM_B_DQS_P<3>MEM_B_DQS_P<4>

MEM_B_DQS_P<0>MEM_B_DQS_P<1>

MEM_B_DM<7>MEM_B_DM<6>MEM_B_DM<5>MEM_B_DM<4>MEM_B_DM<3>

MEM_B_DQ<8>MEM_B_DQ<7>MEM_B_DQ<6>MEM_B_DQ<5>MEM_B_DQ<4>MEM_B_DQ<3>MEM_B_DQ<2>MEM_B_DQ<1>MEM_B_DQ<0>

MEM_B_DM<2>MEM_B_DM<1>

MEM_B_CAS_L

MEM_B_DM<0>

MEM_B_BS<2>MEM_B_BS<1>MEM_B_BS<0>

MEM_B_DQ<39>

TP_MEM_B_RCVEN_LTP_MEM_A_RCVEN_L

MEM_A_DQ<35>

www.vinafix.vn

VCC_SM20

VCC_AXG_NCTF42

VCC_SM9

VCC_SM10

VCC_SM17

VCC_SM16

VCC3

VCC_SM5

VCC_SM8

VCC_AXG_NCTF1VCC_AXG_NCTF2

VCC_AXG_NCTF3


VCC_AXG_NCTF6

VCC_AXG_NCTF8

VCC_AXG_NCTF7


VCC_AXG_NCTF11


VCC_AXG_NCTF14



VCC_AXG_NCTF20

VCC_AXG_NCTF19

VCC_AXG_NCTF21

VCC_AXG_NCTF22

VCC_AXG_NCTF25

VCC_AXG_NCTF26

VCC_AXG_NCTF28

VCC_AXG_NCTF27

VCC_AXG_NCTF29

VCC_AXG_NCTF20


VCC_AXG_NCTF33


VCC_AXG_NCTF36



VCC_AXG_NCTF41

VCC_AXG_NCTF43

VCC_AXG_NCTF44


VCC_AXG_NCTF48

VCC_AXG_NCTF47

VCC_AXG_NCTF49


VCC_AXG_NCTF55

VCC_AXG_NCTF58

VCC_AXG_NCTF57

VCC_AXG_NCTF59

VCC_AXG_NCTF61

VCC_AXG_NCTF60

VCC_AXG_NCTF62

VCC_AXG_NCTF63

VCC_AXG_NCTF64

VCC_AXG_NCTF66

VCC_AXG_NCTF65


VCC_AXG_NCTF69



VCC_AXG_NCTF74


VCC_AXG_NCTF77


VCC_AXG_NCTF81

VCC_AXG_NCTF80

VCC_AXG_NCTF82

VCC_AXG_NCTF83

VCC_SM_LF1

VCC_SM_LF2VCC_SM_LF3

VCC_SM_LF4

VCC_SM_LF5VCC_SM_LF6

VCC_SM_LF7

VCC_AXG_NCTF56


VCC_AXG_NCTF52

VCC_AXG1

VCC_AXG2

VCC_AXG3VCC_AXG4

VCC_AXG5

VCC_AXG6VCC_AXG7

VCC_AXG8VCC_AXG9

VCC_AXG10

VCC_AXG11VCC_AXG12

VCC_AXG13

VCC_AXG14VCC_AXG15

VCC_AXG16

VCC_AXG17VCC_AXG18

VCC_AXG19VCC_AXG20

VCC_AXG21

VCC_AXG22VCC_AXG23

VCC_AXG24

VCC_AXG25VCC_AXG26

VCC_AXG27

VCC_AXG28VCC_AXG29

VCC_AXG30VCC_AXG31

VCC_AXG32

VCC_AXG33VCC_AXG34

VCC_SM1

VCC_SM2VCC_SM3

VCC_SM4

VCC_SM6

VCC_SM7

VCC_SM11

VCC_SM12

VCC_SM13VCC_SM14

VCC_SM15

VCC_SM18VCC_SM19

VCC_SM21VCC_SM22

VCC_SM23

VCC_SM26VCC_SM27

VCC_SM28

VCC_SM29VCC_SM30

VCC_SM31

VCC_SM32VCC_SM33

VCC_SM34

VCC_SM35VCC_SM36

VCC_SM25VCC_SM24

VCC1

VCC2

VCC7

VCC8VCC9

VCC10

VCC11

VCC12

VCC13


VCC6

VCC5

VCC4

VCC GFX

VCC SM

VCC SM LF

(6 OF 10)

VCC CORE

POWER

VCC GFX NCTF

VCC_NCTF49

VCC_NCTF15

VCC_NCTF2

VCC_NCTF10

VCC_AXM7

VCC_AXM5VCC_AXM4

VCC_AXM3VCC_AXM2

VCC_AXM1

VSS_SCB6

VSS_SCB5

VSS_SCB4VSS_SCB3

VSS_SCB2VSS_SCB1

VCC_NCTF11

VCC_NCTF12VCC_NCTF13

VCC_NCTF14

VSS_NCTF21VSS_NCTF20

VSS_NCTF19



VSS_NCTF14

VSS_NCTF12

VSS_NCTF11

VSS_NCTF13

VSS_NCTF10VSS_NCTF9

VSS_NCTF8

VSS_NCTF7VSS_NCTF6

VSS_NCTF5VSS_NCTF4

VSS_NCTF3

VSS_NCTF2VSS_NCTF1

VCC_NCTF22

VCC_NCTF27

VCC_NCTF50

VCC_NCTF47

VCC_NCTF48

VCC_NCTF44

VCC_NCTF43

VCC_NCTF39

VCC_NCTF40



VCC_NCTF33


VCC_NCTF29

VCC_NCTF28

VCC_NCTF26

VCC_NCTF24

VCC_NCTF25

VCC_NCTF23

VCC_NCTF21


VCC_NCTF16

VCC_NCTF17

VCC_NCTF3

VCC_NCTF4

VCC_NCTF41

VCC_NCTF42


VCC_AXM6

VCC_AXM_NCTF1

VCC_AXM_NCTF2

VCC_AXM_NCTF3VCC_AXM_NCTF4

VCC_AXM_NCTF5


VCC_AXM_NCTF8



VCC_AXM_NCTF13


VCC_AXM_NCTF16


VCC_AXM_NCTF19

VCC_NCTF8

VCC_NCTF20

VCC_NCTF1

VCC_NCTF5

VCC_NCTF6

VCC_NCTF7

VCC_NCTF36

VCC_NCTF30

VCC_NCTF9

VCC AXM NCTF

VCC NCTF

VSS SCB

VCC AXM

VSS NCTF

(7 OF 10)

POWER

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONECurrent numbers from Crestline EDS, doc #21749.

NCTF balls are Not Critical To Function

These connections can break withoutimpacting part performance.

5 mA (standby)

7700 mA (Int Graphics)

1310 mA (Ext Graphics)1573 mA (Int Graphics)

540 mA

3300 mA (2 ch, 667MHz)2700 mA (2 ch, 533MHz)1700 mA (1 ch, 667MHz)1395 mA (1 ch, 533MHz)

CRESTLINE

FCBGA

OMIT

AT6

AW8

BD4

BD17

BE39

BC39

AW45

BA33

BA32

AY35

AW35

AW33

AV33

AU30

BL33

BK35

BK34

BK33

BK32

BJ34

AU35

BJ33

BJ32

BH35

BH34

BH32

BG35

BG33

BG32

BF34

BF33

AU33

BE35

BE33

BE32

BD35

BD32

BC35

BC33

BC32

BB33

BA35

AU32

U16

Y31

V29

V28

V26

U15

AR26

AR24

AR23

AR21

AR20

AP24

AP23

AP21

AP20

AP19

T25

AP17

AP16

AP15

AM23

AM21

AM20

AM19

AM16

AM15

AL23

T23

AL21

AL20

AL19

AL17

AL16

AK19

AK16

AJ19

AJ17

AJ16

T22

AH19

AH17

AH16

AH15

AF19

AF16

AD17

AD16

AD15

AC19

T21

AC17

AC16

AB19

AB16

AA17

AA16

Y29

Y28

Y26

Y24

T19

Y23

Y21

Y20

Y19

Y17

Y16

Y15

V24

V23

V21

T18

V20

V19

V17

V16

U26

U23

U21

U20

U19

U17

T17

AA28

AA26

AA23

AA20

Y12

W14

AN14

AJ20

AD31

AH26

AH24

W13

AH23

AH21

AH20

AA31

AF26

AF21

AD28

AD24

AD23

AD20

T14

AC29

AC28

AC26

AC24

AC23

AC21

AC20

AB29

AB24

AB21

R20

AH32

AJ28

AJ31

AK32

AC32

AC31

AH28

AT34

R30

AF32

AH29

AH31

AT35

U1400

FCBGA

CRESTLINE

OMIT

A51

BL51

BL1

C1

B2

A3

AB35

AB17

AA19

V35

V31

U28

U24

AR28

AR19

T37

AR15

AP28

AP26

AM24

AM17

AK17

AF35

AF17

AD37

AD19

T27

AF33

AD36

AD35

AC36

V37

AC35

V36

V33

V32

U36

U35

U33

U32

U31

U29

T35

AC33

T34

T30

Y37

Y36

Y35

Y33

Y32

AR36

AR35

AP36

AB37

AP35

AA36

AA35

AA33

AL35

AL33

AM35

AJ36

AD33

AK37

AB36

AK36

AK35

AK33

AJ35

AJ33

AH37

AH36

AH35

AH33

AF36

AB33

AM33

AM32

AM31

AM29

AM28

AM26

AL28

AL26

AR33

AR32

AR31

AL32

AL31

AL29

AP33

AP32

AP31

AP29

AL24

AJ23

AJ26

AK23

AK24

AK29

AT31

AT33

U1400

20%

CERM10V

0.1uF

402

2

1C180620%

CERM10V

0.1uF

402

2

1C180720%6.3V

0.22UF

X5R402

2

1C180420%6.3V

0.22UF

X5R402

2

1C1805

6.3V

1uF

CERM

10%

402

2

1C1802

CERM-X5R6.3V

0.47UF10%

402

2

1C1803

6.3V

1uF

CERM

10%

402

2

1C1801

SYNC_MASTER=T9_MLB SYNC_DATE=10/30/2006

NB Power 1

051-7455 01

7617

=PP1V05_S0M_NB_VCCAXM

NB_VCCSM_LF5

NB_VCCSM_LF7

NB_VCCSM_LF1NB_VCCSM_LF2NB_VCCSM_LF3NB_VCCSM_LF4

NB_VCCSM_LF6

=PPVCORE_S0_NB_GFX

=PPVCORE_S0_NB

=PP1V8_S3M_MEM_NB

=PPVCORE_S0_NB_GFX


=PPVCORE_S0_NB

31D2

48B3

20D8

30D2

48B3

20D8

20D8

21C5

20B4

20C8

21C5

20D8

20B4

17B3

17D5

17D3

15D2

17B7

17C1

17D7

7C7

7B7

7C7

7A4

7B7

7C7

7C7

www.vinafix.vn

VCCA_CRT_DAC1

VTT7VTT8

VCC_AXD_NCTF

VCCD_CRT

VCC_RXR_DMI1

VCC_RXR_DMI2

VTT1

VCCA_SM_CK2 VCC_TX_LVDS

VCC_HV2

VCC_PEG1

VCC_PEG2

VCC_PEG3

VCC_AXF2

VCC_AXD1VCC_AXD2

VSSA_LVDS

VCCA_SM5

VCCA_PEG_PLL

VCCA_MPLL

VCCA_HPLL VTT16

VTT17

VTT15

VCCD_LVDS2

VCCD_LVDS1

VCCD_PEG_PLL

VCCD_HPLL

VCCD_QDAC

VCCD_TVDAC

VCCA_TVC_DAC1VCCA_TVC_DAC2

VCCA_TVB_DAC2

VCCA_TVB_DAC1VCCA_TVA_DAC2

VCCA_TVA_DAC1

VCCA_SM_CK1

VCCA_SM2

VCCA_SM1

VCCA_SM_NCTF2VCCA_SM_NCTF1

VCCA_SM11

VCCA_SM10

VCCA_SM9VCCA_SM8

VCCA_SM7

VCCA_SM4

VCCA_SM3

VSSA_PEG_BG

VCCA_PEG_BG

VCCA_LVDS

VCCA_DPLLB

VCCA_DPLLA

VSSA_DAC_BG

VCCA_DAC_BG

VCC_AXF3

VCC_HV1

VCC_PEG5

VTTLF1

VTTLF3

VTTLF2

VCC_PEG4

VCC_SM_CK3VCC_SM_CK2

VCC_SM_CK1

VCC_SM_CK4

VCC_DMI

VCC_AXF1

VTT22

VCC_AXD6

VCC_AXD5VCC_AXD4

VCC_AXD3

VTT19

VTT2

VTT6

VTT5

VTT11VTT10

VTT9

VTT13

VTT12

VTT14

VTT18

VTT21

VTT20

VTT3

VTT4VCCA_CRT_DAC2

VCC_SYNC

CRT

AXD

PEG

HV

AXF

VTTLF

VTT

SM CK

DMITV/CRT

DLVDS

A SM

A CK

CRT

A LVDS

A PEG

PLL

(8 OF 10)

POWER

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

550 mA (533MHz DDR)640 mA (667MHz DDR)

Current numbers from Crestline EDS, doc #21749.

515 mA

495 mA

850 mA @ 800MHz FSB (1.05V)

35 mA

100 mA

60 mA

30 mA

80 mA

0.4 mA

260 mA

1260 mA

770 mA @ 667MHz FSB (1.05V)

150 mA

TBD mA @ 1067MHz FSB (1.25V)

S0 or S3M is acceptable

S0 or S3M is acceptable

5 mA

150 mA

250 mA

60 mA

40 mA

40 mA

40 mA

10 mA

100 mA

50 mA

5 mA

200 mA

100 mA

100 mA

100 mA

6.3V

402CERM-X5R

10%0.47UF

2

1 C1911

402CERM-X5R6.3V10%0.47UF

2

1 C1913

402CERM-X5R6.3V10%0.47UF

2

1 C1912

CRESTLINEFCBGA

OMIT

AH1

F2

A7

U2

U3

U5

U7

U8

U9

U11

R1

R2

R3

U12

T2

T3

T5

T6

T7

T9

T10

T11

T13

U1

U13

K49

B41

B32

L29

N28

U48

H42

J41

AN2

M32

A28

B28

B27

C27

B25

C25

AR16

AR17

BB29

BC29

AT19

AT21

AT22

AU17

AU18

AU19

AV19

AT17

AT18

AW18

U51

K50

AM2

A41

AL2

H49

B49

A30

B33

A33

A43

J32

BJ23

BJ24

BK23

BK24

AH51

AH50

V50

V49

W51

W50

AD51

B40

C40

AJ50

A21

B21

B23

AR29

AT30

AT25

AT29

AU24

AU28

AT23

U1400

SYNC_MASTER=T9_MLB SYNC_DATE=10/30/2006

NB Power 2

18 76

01051-7455


PP1V25_S0M_NB_VCCA_SM

PP1V8_S3M_NB_VCCSMCK

PP1V25_S0_NB_PEGPLL

PP1V25_S0M_NB_VCCA_SM_CK

=PP3V3_S0_NB_VCCSYNC

PP3V3_S0_NB_VCCA_CRTDAC

PP1V8_S0_NB_VCCTXLVDS

=PP1V25R1V05_S0_NB_VTT

PP3V3_S0_NB_VCCA_TVDACB

PP1V25_S0_NB_VCCA_DPLLB

PP3V3_S0_NB_VCCA_TVDACC

PP1V25_S0M_NB_VCCAXD

PP1V25_S0_NB_VCCAXF

PP1V05_S0_NB_VCCRXRDMI

=PP3V3_S0_NB_VCCHV

PP1V05_S0_NB_VCCPEG


=GND_NB_VSSA_PEG_BG

=GND_NB_VSSA_DAC_BG


NB_VTTLF_CAP3

NB_VTTLF_CAP1

PP1V25_S0M_NB_VCCA_MPLL

PP3V3_S0_NB_VCCA_DAC_BG

=GND_NB_VSSA_LVDS

=PP1V25_S0M_NB_VCCD_HPLL

PP1V5_S0_NB_VCCD_QDAC

PP1V5_S0_NB_VCCD_TVDAC=PP1V5_S0_NB_VCCD_CRT

PP3V3_S0_NB_VCCA_TVDACA

PP1V25_S0M_NB_VCCA_HPLL

PP1V25_S0_NB_VCCA_DPLLA

=PP1V8_S0_NB_VCCD_LVDS

NB_VTTLF_CAP2

21B7 20A8 15C7

20A6

21B5

21C3

20C8

20A6

15B7

20D3

21C3

20A8

7C4

20B5

20A2

20B2

20B5

7C4

21D1

18B3

7C7

21C1

21A3

21C1

15A2

20D5

20C3

7D4

14D2

18C6

20A6

21B1

7C7

20C1

21B1

21B3

20D1

21C5

21D6

21C7

21D1

20D1

21A3

21B3

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VSS198VSS99VSS197VSS98

VSS196VSS97


VSS193VSS94



VSS188VSS89


VSS185VSS86


VSS182VSS83



VSS177VSS78


VSS174VSS75


VSS171VSS72



VSS166VSS67


VSS163VSS64


VSS160VSS61



VSS155VSS56


VSS152VSS53


VSS149VSS50



VSS144VSS45


VSS141VSS42


VSS138VSS39



VSS133VSS34


VSS130VSS31


VSS127VSS28



VSS122VSS23


VSS119VSS20

VSS118VSS19VSS117

VSS116VSS17



VSS111VSS12


VSS108VSS9


VSS105VSS6


VSS102VSS101

VSS100VSS1

VSS18

VSS2VSS3

VSS

(9 OF 10)

VSS202

VSS289

VSS290VSS291

VSS292

VSS295

VSS199 VSS287

VSS200 VSS288VSS201

VSS203

VSS204

VSS293VSS294

VSS208 VSS296VSS209 VSS297

VSS210 VSS298


VSS213 VSS301VSS214

VSS215

VSS216 VSS302VSS217

VSS218

VSS219 VSS303VSS220

VSS221

VSS222 VSS304VSS223

VSS224VSS225 VSS305

VSS226

VSS227VSS228

VSS229 VSS306


VSS232 VSS309



VSS237

VSS238VSS239

VSS240

VSS241VSS242

VSS243

VSS245

VSS246VSS247

VSS248

VSS249VSS250

VSS251

VSS252VSS253

VSS254

VSS255VSS256

VSS257VSS258

VSS259

VSS260VSS261

VSS262

VSS263VSS264

VSS265

VSS266VSS267

VSS268VSS269

VSS270

VSS271VSS272

VSS273

VSS274VSS275

VSS276

VSS277VSS278

VSS279VSS280

VSS281

VSS282VSS283

VSS284

VSS285VSS286

VSS207

VSS206VSS205

(10 OF 10)

VSS

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NOTE: TDE = _P

Crestline Thermal Diode Pins

TDB_SENSE

NOTE: TDB = _N

Mainly for investigation. If not used,alias these nets directly to GND.

TDB_FORCE

TDE_FORCE

TDE_SENSE

CRESTLINE

OMIT

FCBGA

AW16

AW12

AW1

AV48

AV39

AU51

AU49

AU36

AU3

AU29

AB23

AU23

AU1

AT49

AT41

AT14

AT10

AR7

AR47

AR44

AR39

AB20

AR2

AR11

AP50

AP48

AP4

AN7

AN5

AN43

AN39

AN38

AA29

AN1

AM45

AM41

AM4

AM3

AM13

AM11

AL1

AK51

AK31

AA24

AK28

AK26

AK21

AK20

AJ49

AJ45

AJ43

AJ32

AJ29

AJ24

AA21

AJ21

AJ13

AJ11

AH9

AH7

AH41

AH40

AH3

AG50

AG47

A24

AG43

AG38

AG2

AF31

AF24

AF23

AF20

AE6

AE14

AE10

A17

AD8

AD50

AD5

AD49

AD45

AD41

AD3

AD29

AD26

AD21

A15

C41

C36

C33

C29

C28

C19

C16

C12

BL47

AD1

BL37

BL22

BL19

BL13

BL11

BK8

BK6

BK44

BK40

BK36

AC47

BK29

BK25

BK17

BK15

BJ46

BJ42

BJ4

BJ38

BJ13

BJ11

AC43

BH8

BH46

BH44

BH30

BH17

BG51

BG5

BG48

BG39

BG29

AC39

BG24

BG2

BG19

BF36

BF16

BF12

BE8

BE51

BE42

BE30

AC3

BE23

BE19

BE1

BD5

BD48

BD45

BD28

BD2

BD13

BC51

AC13

BC40

BC36

BC25

BC24

BC16

BB8

BB49

BB44

BB40

BB25

AC10

BB12

BA24

BA2

BA18

BA17

BA1

B8

B5

B46

B43

AB31

B38

B35

B30

B29

B24

B20

B10

AY50

AY47

AY45AB28

AY43

AY42

AY37

AY24

AY10

AW7

AW5

AW32

AW29

AW24

AB26

A13

U1400CRESTLINE

OMIT

FCBGA

H50

AV25

AT27

AF29

AF28

AD32

AB32

AA32

R28

T33

T31

T29

P29

Y11

Y50

Y5

Y49

Y45

Y41

Y2

Y13

W7

W5

W47

W43

W39

W11

V3

V2

U50

U45

U41

T47

T43

T39

R49

P50

P3

P23

P2

P19

N7

N49

N44

N39

N36

N32

N29

N17

N14

N11

M9

M50

M5

M49

M46

M42

M28

L49

L33

L3

L28

L24

L20

L17

L1

K8

K47

K12

J39

J35

J33

J28

J24

J2

J16

J11

H45

H4

H28

H24

G8

G48

G45

G42

G33

G29

G28

G24

G19

G16

G13

G1

F50

F40

F4

F36

F19

E47

E32

E28

E24

E16

E10

D49

D45

D39

D32

D3

D24

D13

C7

C50

C46

U1400

SYNC_DATE=10/30/2006SYNC_MASTER=T9_MLB

NB Grounds

19 76

01051-7455

=NB_TDE_SENSE

=NB_TDE_FORCE

=NB_TDB_FORCE

=NB_TDB_SENSE

8A2

8A2

8A2

8A2

www.vinafix.vn

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NOTE: This follower is redundant if VCORE is always 1.05V.

WF: Should be 1.0, 1%

this is "1 of 2" 1.8V bulk decoupling caps.

close to MCHPlace L and C

WF: "Place where LVDS

??? mA

Layout Note:

1450 mA

2400 mA

350 mA

I/O voltage Supply

Analog,I/O logic,and Term Voltage for PCI-E Graphics

need to find "1uH,220mA,150mohm max"

Analog PLL Voltage for PCI-E GPU

250 mA

10uF caps shouldbe close to MCHon opposite side.

RX and I/O Logic for DMI

Layout Note:

on opposite side.be close to MCH10uF caps shouldLayout Note:

1200 mA

??? mA 100 mA

WF: Should be 1.0, 1%

Layout Note: Route to caps, then GND

Host PLL Digital Supply

250 mA

200 mA

Memory clock logic voltage.

100 mA100 mA

200 mA

GMCH FSB I/O Rail

850 mA

150 mA

50 mA

Current numbers from Crestline EDS Addendum, doc #20127.

5 mA

200 mA

LAYOUT NOTE: PLACE THOSE COMPONENT CLOSE TO GMCH

200 mA

Host PLL Analog Supply

450 mA

100 mA

GMCH Core Power

MPLL Analog Supply

250mA,0.5ohm

250mA,0.5ohm

These supplies are still needed even using external GPU

540 mA

??? mA

Memory voltage supply.

WF: 220-ohm

5.6nH,0.9A,45mohm max.no bigger than 0603

Memory I/O logic and DLL voltage.

and DDR2 taps." (C2125)

GMCH ME Core Power

GMCH Memory I/O Rail WF: Matanzas has 270uF

spec requires "3.9uH ferrite,1A,32mohm max".

PLACEMENT_NOTE=Place close to U1400

402

6.3V

0.47UF10%

CERM-X5R 2

1C212420%

2.2uF

603CERM16.3V 2

1C2123

603

20%

CERM6.3V

4.7uF

2

1C2121

D2TTANT2.5V20%

470UF

CRITICAL

32

1C2100

0.22uF20%6.3VX5R402

2

1 C2112

X5R

20%0.22uF6.3V

4022

1 C2111

603CERM6.3V

4.7uF20%

2

1C2122

6.3V20%


22UF

CERM805

2

1 C2131


20%6.3V

22UF

CERM805

2

1 C2132

10V

0.1UF20%

402CERM2

1 C2135

0.511%

402MF-LF1/16W

2

1R2183

1.1

402

1%1/16WMF-LF

2

1R2190

FERR-220-OHM-2.5A

0603

21

L2190

10uF6.3V20%

603X5R 2

1C2190

CASE-C2

2.5VPOLY

20%

CRITICAL

330UF2

1C2130

603X5R6.3V20%10uF

2

1 C2174

CASE-B2

CRITICAL

220UF2.5VPOLY

20%2

1C2173

CRITICAL

1210

91NH21

L2173

1.11%

MF-LF1/16W

402 2

1R21950603

1.0UH-0.23A21

L2195

603X5R

10uF20%6.3V 2

1C2195

6.3V20%

805

22UF

CERM 2

1C2196

CERM6.3V10%1UF

4022

1 C2171

603X5R6.3V20%

10uF2

1C2170

10%6.3VCERM402

1UF

2

1 C2151NOSTUFF

20%

603X5R6.3V

10uF

2

1C2150

6.3V20%22UF

CERM805

2

1 C2142

X5R-CERM

10%6.3V

603

4.7UF

2

1 C2143CRITICAL

20%

POLY

330UF2.0V

CASE-B2

2

1C2140

402

10%6.3VCERM

1UF

2

1 C21445%

402

0

1/16WMF-LF

21

R2141

20%6.3V

22UF

CERM805

2

1 C2145

0

402

1/16W5%

MF-LF

21

R2145

CERM6.3V

2.2UF20%

NOSTUFF

402-LF2

1 C21470.1UF20%10VCERM402

2

1 C2148

10

1%1/16WMF-LF402

21

R2186

1K

402MF-LF1/16W

1%

2

1R2112

1K

402

1%

MF-LF1/16W

2

1R2113

402

1K1/16WMF-LF

1%

2

1R2110

1K

402

1%

MF-LF1/16W

2

1R2111

120-OHM-0.3A-EMI

0402-LF

21

L2183402

10VCERM

0.1UF20%

2

1 C2113

402

0.1UF20%10VCERM2

1 C2114

402CERM10V20%0.1UF

2

1 C2115

402

0.1UF20%10VCERM2

1 C21600.1UF

CERM10V20%

4022

1 C216120%10VCERM

0.1UF

4022

1 C2165

20%10VCERM402

0.1UF

2

1 C2197

402

0.1UF20%10VCERM2

1 C219120%

402CERM10V

0.1UF

2

1 C2192

20%10VCERM

0.1UF

4022

1 C2182

20%10VCERM402

0.1UF

2

1 C2180

6.3V20%22UF

CERM805

2

1 C2110

5%1/16W

0

402MF-LF

21

R2109

SOD-723

1SS4182 1

D2186

0402-LF

120-OHM-0.3A-EMI21

L2181

CERM

0.1UF10V20%

402

PLACEMENT_NOTE=Place in GMCH cavity

2

1 C2104

603X5R6.3V20%10uF

2

1 C2177

0.22uF

402X5R

20%6.3V


2

1 C2103

6.3V

0.22uF20%

X5R


4022

1 C2102

20%0.1UF

PLACEMENT_NOTE=Place C2184 by U1400.AM2

402CERM10V2

1 C2184

805

20%6.3V

22UF

CERM 2

1C2181

6.3V20%

805CERM

22UF

2

1C2183

20%6.3V


22UF

CERM805

2

1 C2101

051-7455

NB Standard DecouplingSYNC_MASTER=WFERRY SYNC_DATE=06/15/2006

20

01

76

MIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.25V

PP1V25_S0_NB_PEGPLL_RC


MIN_LINE_WIDTH=0.4 MMPP1V25_S0M_NB_VCCA_SM_CK

VOLTAGE=1.25VMIN_NECK_WIDTH=0.2 MM

=PP1V8_S3M_MEM_NB

=PP1V25_S0_NB_VCCA

MIN_LINE_WIDTH=0.3 MMPP1V25_S0M_NB_MPLL_RCMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.25V

MIN_LINE_WIDTH=0.25 MM


PP1V25_S0M_NB_VCCA_HPLL


=PPVCORE_S0_NB

=PP1V25R1V05_S0_NB_VTT

=PP1V25_S0_NB_PLL

VOLTAGE=1.05VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.5 MMPP1V05_S0_NB_VCCPEG

PP1V8_S3M_NB_VCCSMCKMIN_LINE_WIDTH=0.25 MM


=PP1V05_S0_NB_PCIE

=PP1V25_S0_NB_VCCAXFPP1V25_S0_NB_VCCAXF

VOLTAGE=1.25V

MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MM

=PP1V25_S0_NB_PLL

VOLTAGE=1.05V

MIN_LINE_WIDTH=0.3 MMPP1V05_S0_NB_VCCRXRDMIMIN_NECK_WIDTH=0.2 MM

PP1V25_S0_NB_PEGPLLMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.25V


PP0V9_S3M_MEM_NBVREFAMAKE_BASE=TRUE

MIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 mmVOLTAGE=0.9V


=GND_NB_VSSA_PEG_BG

PP0V9_S3M_MEM_NBVREFBMIN_LINE_WIDTH=0.4 MM


MAKE_BASE=TRUE

=PP1V25_S0M_NB_VCCD_HPLL

VOLTAGE=1.25VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.3 MMPP1V25_S0M_NB_VCCA_MPLL

=PP1V8_S3_MEMVREF

=PP0V9_S3M_MEM_NBVREFA

=PP1V8_S3_MEMVREF

PP1V8_S3_NB_VCCSMCK_RC

VOLTAGE=1.8VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.25 MM

=PP3V3_S0_NB_FOLLOW

=PP1V8_S3_NB_VCC

=PP3V3_S0_NB_VCCHV

=PP0V9_S3M_MEM_NBVREFB

=PP1V25_S0_NB_VCC

VOLTAGE=1.25VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMPP1V25_S0M_NB_VCCAXD

=PPVCORE_S0_NBMIN_NECK_WIDTH=0.2 MMVOLTAGE=3.3V

MIN_LINE_WIDTH=0.4 MMPP3V3_S0_NBCORE_FOLLOW_R

VOLTAGE=1.25VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMPP1V25_S0M_NB_VCCA_SM

31D2

21B7

30D2

20B4

18B3

20D8

17D7

17C1

17D7

15C7

17D7

18C6

15D2

17B3

17D3

18D3

20D3

18B3

20B4

18C3

20A5 20A6

15B7

18C3

17D3

7C4

18B6

7A4

7C7

18D6

7C7

7C7

7C7

7C7

14D2

18B3

7C7

7C7 18C3 7C7

18B3

18C6

7C7

18C6

18A6

18D6

7B4 7B4

7D4

7A4

7D4

15C2

7C7 15A2

7C7 18C6

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OUTEN NR/FBIN

GND

THRMLNC

EN

IN OUT

NR

PADGND

OUT

OUT

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

65 mA

NEED TO FIND A "1#GH, 500MA, 78MOHM" INDUCTORWF: Check part properties

10 mA

Layout Note: Route to cap, then GND

6 mA

5 mA

Vout = 1.204V * (Ra + Rb)/Rb

110 mA

Layout Note:

80 mA

260 mA

WARNING VOLTAGE DROP

80 mA

WF: Is this the best part to use?

These 2 caps should bewithin 6.35 mm of NB edge

80 mA

125 mA

80 mA

Layout Note:These 8 caps should be

Layout Note: Route to caps, then GND

within 6.35 mm of NB edge

40 mA

5 mA

40 mA

40 mA

80 mA

Layout Note:

Current numbers from Crestline EDS Addendum, doc #20127.

150 mA

60 mA

(1.7V - 5.5V)

NC

205 mA

Ra || Rb should be 19Kohms

7700 mA

WF: Check C2266 value, R2267 value

WF: Should be 1uH, 30%

GMCH Graphics Core PowerThese 4 caps should bewithin 6.35 mm of NB edge

WF: Matanzas has 2x 330uF

205 mA

VCCD_TVDAC also powers internal thermal sensors.

NOTE: This filter is required even if using only external graphics.

16VNFM18

22000pF-1000mA

CRITICAL

31

2

C2289

16V10%

402CERM

0.01UF2

1C2282

4021/16W1005%MF-LF2

1R2205

20%10VCERM

0.1UF

4022

1 C2207

05%

MF-LF1/16W

4022

1R2281

10%6.3V402CERM

NO STUFF1UF

2

1

C2281

10%1UF6.3VCERM402

2

1C2280

16VNFM18

22000pF-1000mA

CRITICAL

31

2

C2292

CERM10V20%

402

0.1UF

2

1 C2291

16VNFM18

CRITICAL

22000pF-1000mA

31

2

C2294

0.1UF

CERM10V20%

4022

1 C2293

0.1UF

CERM10V20%

4022

1 C2288

16V22000pF-1000mA

NFM18

CRITICAL

31

2

C2296

0.1UF

CERM10V20%

4022

1 C2295

16VNFM18

22000pF-1000mA

CRITICAL

31

2

C2298

0.1UF

CERM10V20%

4022

1 C2297

6.3V20%

X5R603

10uF

2

1C22900402-LF

120-OHM-0.3A-EMI21

L2290

402

0

MF-LF

5%1/16W

21

R2261

20%10VCERM402

0.1UF

2

1 C2261

402

0

5%

MF-LF1/16W

21

R2262

0.1UF

402CERM10V20%

2

1 C2262

20%50V

402

0.001uF

CERM2

1 C2223

20%50VCERM402

0.001uF2

1 C2221

NFM1816V

CRITICAL

22000pF-1000mA

31

2

C2201

CRITICAL

22000pF-1000mA16VNFM18

31

2

C2206

0.1UF

CERM10V20%

4022

1 C2200

402

10V

1UF10%

X5R2

1 C2205

1.0UH-0.5A-0.675A

1007

21

L2220

CRITICAL

POLY2.5V20%

220UF

CASE-B2-SM

2

1C2220

0.1UF

CERM10V

402

20%


2

1 C2217


0.1UF

CERM10V20%

4022

1 C2216


0.47UF10%6.3VCERM-X5R402

2

1 C2215


10uF20%6.3VX5R603

2

1 C2213

CERM

22UF20%


805

6.3V2

1 C221220%

470UF

TANTD2T

2.5V

CRITICAL

32

1C2210

CERM402

6.3V10%1UF

2

1 C2226

10

402

1/16WMF-LF

1%

NO STUFF

21

R2285

0402-LF

120-OHM-0.3A-EMI21

L2288


1UF

CERM

10%6.3V

4022

1 C2214

402

6.3VCERM

1UF10%

2

1C2265

1/10W5%0.300

FF6032

1R2266

6.3VX5R

20%10UF

6032

1 C2266

0.1UF20%

402CERM10V2

1 C2230

6.3VX5R603

10UF20%

2

1 C2285

SOT23-5TPS731125

CRITICAL

54

1

2

3

U2265

402

16V

0.01UF

CERM

10%2

1 C2267

NO STUFF

SOD-723

1SS4182 1

D2285

TPS79933SON

CRITICAL

7

1

2

5

6

3

4

U2280

15B3 60C6

15B3 60C6

15B3 60C6

15B3 60C6

402

22K5%

MF-LF1/16W

2

1R2245

NO STUFF

1/16W5%22K

402MF-LF

2

1R2250

NO STUFF

402

22K5%

MF-LF1/16W

2

1R2244NO STUFF

402

1/16WMF-LF

5%22K

2

1R2243

402

22K5%1/16WMF-LF

2

1R22495%22K

402MF-LF1/16W

2

1R2248

MF-LF

5%22K1/16W

402

NO STUFF

2

1R2242

22K5%

MF-LF1/16W

4022

1R2247

051-745521

SYNC_DATE=06/15/2006SYNC_MASTER=WFERRY

76

01

NB Graphics Decoupling

GFX_VID<3>

GFX_VID<0>

=PP1V8_S0_NB_LVDS

GFX_VID<1>GFX_VID<2>

PP3V3_S0_NB_CRTDAC_F

VOLTAGE=3.3V


=PPVCORE_S0_NB_GFX


PP1V25_S0_NB_VCCA_DPLLA

VOLTAGE=1.25V

PP1V25_S0_NB_DPLLMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.25V

=PP3V3_S0_NB_VCCSYNC

=PP1V5_S0_NB_FOLLOW

=PP1V8_S0_NB_VCCD_LVDS

=GND_NB_VSSA_LVDS

=PP1V5_S0_NB_VCCD_CRTMAKE_BASE=TRUE

PP1V5_S0_NB_VCCD_CRT

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.3 MM

VOLTAGE=1.5V

PP1V5_S0_NB_VCCD_TVDAC

VOLTAGE=1.5VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.2 MMPP1V5_S0_NB_VCCD_CRT

P1V25S0NBDPLL_FB

PP1V25_S0_NB_DPLL_RF


PP3V3_S0_NB_TVDAC_FOLLOWMIN_LINE_WIDTH=0.4 MM

P3V3TVDAC_NOISE

VOLTAGE=3.3V


PP3V3_S0_NB_VCCA_TVDACB

MIN_LINE_WIDTH=0.3 MMPP1V25_S0_NB_VCCA_DPLLB


VOLTAGE=3.3V


PP3V3_S0_NB_TVDAC_F

PP3V3_S0_NB_VCCA_DAC_BG

VOLTAGE=3.3V


PP3V3_S0_NB_VCCA_TVDACC

VOLTAGE=3.3V


VOLTAGE=3.3V

PP3V3_S0_NB_VCCA_TVDACAMIN_LINE_WIDTH=0.3 MMMIN_NECK_WIDTH=0.2 MM

PP3V3_S0_NB_VCCA_CRTDAC

VOLTAGE=3.3V


=PP1V8_S0_NB_DPLL

P3V3TVDAC_EN_RC

=GND_NB_VSSA_DAC_BG

=PP3V3_S0_NB_VCCHVMIN_LINE_WIDTH=0.2 MM



MIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.2MMVOLTAGE=3.3V

PP3V3_S0_NB_TVDAC

PP1V5_S0_NB_QDACMIN_LINE_WIDTH=0.2 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=1.5V

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.2 MMPP1V5_S0_NB_VCCD_QDAC

VOLTAGE=1.5V

=PP1V5_S0_NB_TVDAC

=PP5V_S0_NB_TVDAC

20A8

48B3

18B3

17D5

15C7

17B7

18D6

15B7

18C6 7B7

7B7

18D6

7C4

7B7

18A6

18C6

18B6 21D6

18B6

21C5

18B6

18D6

18D6

18B6

18B6

18D6

7B7

18D6

7D4

18B3

18B6

7B7

7A7

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SATA0RXPSATA0RXN

SATALED*

RTCRST*

HDA_BIT_CLK

DDREQ

RTCX1RTCX2

DCS1*DCS3*

IDEIRQDDACK*

IORDY

DIOR*DIOW*

DD11DD12

DD4

DD2

DD14

DD0

DD15

DD1

DD13

DD5

DD10

DD8

DD3

DD9

LDRQ0*

FWH2/LAD2FWH3/LAD3

FWH1/LAD1

LDRQ1*/GPIO23

FWH0/LAD0

FWH4/LFRAME*

HDA_SDIN0

HDA_SYNC

SATA1TXNSATA1TXP

HDA_SDIN1HDA_SDIN2

RCIN*

SATA0TXPSATA0TXN

CPUPWRGD/GPIO49

SMI*

A20M*

SATA1RXPSATA1RXN

SATARBIASSATARBIAS*

IGNNE*

DPRSTP*

INTVRMEN

A20GATE

SATA2RXNSATA2RXP

THRMTRIP*

DPSLP*

INIT*

HDA_RST*

HDA_SDOUT

HDA_DOCK_EN*/GPIO33

SATA2TXNSATA2TXP

FERR*

NMI

HDA_SDIN3

INTR

SATA_CLKPSATA_CLKN

DA2

DD6

STPCLK*

TP8

DA0DA1

HDA_DOCK_RST*/GPIO34

INTRUDER*

LAN_TXD0

LAN100_SLP

LAN_RSTSYNC

LAN_RXD0LAN_RXD1LAN_RXD2

DD7

LAN_TXD2LAN_TXD1

GLAN_DOCK*/GPIO13

GLAN_COMPIGLAN_COMPO

GLAN_CLK

LAN/GLAN

IHDA

CPU

RTC

LPC

(1 OF 6)

SATA

IDE

OUT

IN

IN

IN

BI

BI

BI

BI

BI

OUT

OUT

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

IN

IN

OUT

OUT

IN

OUT

OUT

OUT

OUT

IN

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NOTE: ALL IDE PINS HAVE INTERNAL 33-OHM SERIES R’S

INT PU

INT PU

INT PU

INT PD

INT PD

INT PD

INT PD

INT PD

INT PD

INT PU INT PD

INTEGRATED PD

INTEGRATED PD

INTEGRATED PDs

ACZ_SYNC

HDA_SDOUT

HDA_SDIN[0-2]

HDA_RST#

HDA_BIT_CLK 24.000MHZ CLOCK W/INTERNAL WEAK PD

HDA

INT PD

INT PU

INT PU

INT PU

ICH8MBGA

OMIT

AA23

AE27

AA24

AG28

AG1

AG2

AF10

AC6

AB7

AE3

AE4

AF1

AF2

AJ3

AJ4

AG4

AG3

AH6

AH5

AF5

AF6

AF24

AG25

AF23

AH14

AD23

E6

G9

C20

E20

D21

C22

B21

C21

D22

AD21

Y1

AF25

AD22

AC20

AE24

AF27

Y3

AJ15

AE13

AD13

AH15

AH17

AJ17

AE14

AG14

AE10

AJ16

AH21

C25

D25

B24

C4

F6

G8

F5

E5

AD24

AE26

AF26

W3

W4

W5

Y2

R2

T3

T6

AB2

T5

V4

T1

V3

U6

V2

U1

V5

V6

T4

U2

V1

Y5

Y6

AB3

AA1

AA4

AG29

AG26

AF13

U230027C8

27C8

27D5

27C5

6D2 44C8 46C6

6C2 44C8 46C4

6C2 44C8 46C4

6D2 44C8 46C6

6C2 44C8 46B6

9C8 70C3

NO STUFF

2.2K5%

1/16WMF-LF402 2

1R2304

1/16WMF-LF

24.91%

4022

1R2302

1/16W

402MF-LF

332K1%

2

1R2301

40C4 73D3

40D4 73D3

40D4 73D3

40D4 73D3

8D4

8D4

8D4

8D4

8D4

8D4

8D4

8D4

29C3 75B3

29C3 75B3

40D2

40D2

9B2 15B6 59C7 70B3

9B2 70B3

9C8 70C3

9B2 12B1 70C3

39C3 73D3

39B5 73D3

39B3 73D3

39B5 73D3

39B5 73D3

39C3 73D3

39C5 73D3

39C5 73D3

39C5 73D3

39C5 73D3

39C5 73D3

39C5 73D3

39C5 73D3

39C5 73D3

39C3 73D3

39C3 73D3

39C3 73D3

39C3 73D3

39C3 73D3

39C3 73D3

39C3 73D3

39C3 73D3

39B5 73D3

39B5 73D3

39B3 73D3

9B8 70B3

9B8 70C3

9B8 70B3

9C8 70B3

9D6 46B2 70B3

9B8 70C3

1/16W5%

402MF-LF

10K

2

1R2306

9C6 15A6 45B3 70B3

402

24.9

1/16WMF-LF

1%PLACEMENT_NOTE=Place R2308 within 50mm of U2300

21

R2308

8A6 73C3

MF-LF402

332K1%

1/16W

2

1R2300

402MF-LF1/16W

5%8.2K

2

1R2303

8A6 73C3

8A6 73C3

8A6 73B3

8A6 73C3

8.2K5%

1/16WMF-LF402 2

1R2310

54.9

402MF-LF1/16W

1%

2

1R2305PLACEMENT_NOTE=Place R2309 within 50mm of R2308 (NO STUB)

54.9

402MF-LF1/16W1%

2

1R2309

5% 1/16W MF-LF33

40221R2313

40233

MF-LF1/16W5%21R2314

4025% MF-LF33

1/16W21R2315

33402MF-LF1/16W5%

21R2316

5%10K

MF-LF402

1/16W

2

1R2311

39B3 73D3

39B5 73D3

SB Enet, Disk, FSB, LPCSYNC_DATE=10/30/2006SYNC_MASTER=T9_MLB

051-74557622

01

TP_HDA_SDIN2TP_HDA_SDIN3

HDA_SDIN0

TP_LAN_D2R<1>

TP_ENET_GLAN_CLK

TP_HDA_SDIN1

SATA_A_D2R_N

HDA_SDOUT

HDA_RST_L

HDA_BIT_CLKHDA_SYNC

HDA_SDOUT_R

HDA_RST_L_R

HDA_SYNC_RHDA_BIT_CLK_R

SATA_RBIAS_NSATA_RBIAS_P

SB_CLK100M_SATA_NSB_CLK100M_SATA_P

SATA_C_R2D_C_PSATA_C_R2D_C_N

SATA_C_D2R_NSATA_C_D2R_P

SATA_B_R2D_C_PSATA_B_R2D_C_N

TP_LAN_R2D<1>

TP_LAN_D2R<0>

TP_LAN_RSTSYNC

TP_LAN_R2D<0>

TP_HDA_DOCK_RST_L

SATA_B_D2R_NSATA_B_D2R_P

SATA_A_R2D_C_NSATA_A_R2D_C_P

TP_SB_SATALED_L

SATA_A_D2R_P

TP_LAN_D2R<2>

TP_SB_TP8

SB_RCIN_L

TP_LPC_DRQ0_L

SB_A20GATE

CPU_FERR_L

=PP3V3_S0_SB_GPIO


IDE_PDDREQIDE_PDIORDYIDE_IRQ14IDE_PDDACK_L

IDE_PDIOR_LIDE_PDIOW_L

IDE_PDCS1_LIDE_PDCS3_L

IDE_PDA<2>IDE_PDA<1>IDE_PDA<0>

IDE_PDD<14>IDE_PDD<15>

IDE_PDD<13>



IDE_PDD<8>


IDE_PDD<5>IDE_PDD<4>IDE_PDD<3>


IDE_PDD<0>

CPU_STPCLK_L

CPU_SMI_LCPU_NMI

CPU_INTRCPU_INIT_L

CPU_IGNNE_L

CPU_PWRGD

CPU_DPRSTP_LCPU_DPSLP_L

CPU_A20M_L

CPU_THERMTRIP_R PM_THRMTRIP_L

EXTGPU_PWR_EN

LPC_FRAME_L

LPC_AD<3>

LPC_AD<1>LPC_AD<0>

LPC_AD<2>

TP_LAN_R2D<2>

SB_RTC_RST_L

SB_SM_INTRUDER_L

SB_LAN100_SLPSB_INTVRMEN

GLAN_COMP

PP1V5_S0_SB_VCC1_5_B

=PP3V3_S0_SB_GPIO

LAN_ENERGY_DET

HDA_DOCK_EN_L

SB_RTC_X2SB_RTC_X1

PP3V3_G3_SB_RTC

24D8

26C6

24D8

24B3

26C4

26A4

24B3

27D4

22D7

25C3

25D6

22D2

26A5

8A6

8A6

8A6

73B3

73C3

73C3

73C3

7D4

7D7

74B3

23C2

7D4

25D6

www.vinafix.vn

SPI_CS1*

PETN1PERP1

OC4*/GPIO43OC5*/GPIO29OC6*/GPIO30OC7*/GPIO31OC8*OC9*

SPI_MOSI

OC0*OC1*/GPIO40OC2*/GPIO41OC3*/GPIO42

PERN5

DMI1RXNDMI1RXPDMI1TXNDMI1TXP


DMI_CLKNDMI_CLKP

PETP1

USBP9NUSBP9P

PERN2

USBP7NUSBP7PUSBP8NUSBP8P

PETN2

USBP6NUSBP6P

PERP3


PETN3PETP3

USBP3NUSBP3P

PERN4PERP4


PETN4PETP4

USBP0NUSBP0P

PERP5

SPI_MISO

USBRBIASUSBRBIAS*

PETP5

PERN6/GLAN_RXNPERP6/GLAN_RXPPETN6/GLAN_TXNPETP6/GLAN_TXP

SPI_CLKSPI_CS0*



DMI_IRCOMPDMI_ZCOMP

PERN1

PERP2

PETP2

PERN3

PETN5

PCI_EXPRESS

DIRECT MEDIA INTERFACE

SPI

USB

(2 OF 6)

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

OUT

OUT

IN

IN

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

OUT

OUT

IN

IN

OUT

OUT

BI

BI

BI

BI

AD4AD5

AD9

PIRQF*/GPIO3PIRQE*/GPIO2

AD13

PME*

PCIRST*

GNT2*/GPIO53

C/BE2*

PIRQG*/GPIO4

SERR*

PIRQA*

AD1REQ1*/GPIO50

C/BE3*AD11

C/BE1*

AD25AD26

AD0

AD2

DEVSEL*AD18

AD21

PAR

GNT0*

AD7

GNT1*/GPIO51

C/BE0*

STOP*AD20

AD16

GNT3*/GPIO55

TRDY*

IRDY*

AD22

PIRQC*

REQ2*/GPIO52

AD19

PCICLK

PLOCK*

AD15

PIRQB*

PIRQH*/GPIO5

PLTRST*

AD3

AD6

AD8

FRAME*

AD14

AD12

AD10

REQ3*/GPIO54

PIRQD*

AD17PERR*

REQ0*

AD31

AD27AD28

AD30AD29

AD24AD23

(3 OF 6)

INTERRUPT I/F

PCI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

BI

IN

IN

IN

BI

BI

BI

BI

BI

BI

OUT

BI

BI

BI

BI

BI

BI

BI

OUT

IN

BI

BI

IN

IN

IN

IN

IN

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

selects SPI ROM by default.

NOTE: USBP[0-9]P/N have internal 15K pull-downs.

IR

Bluetooth

External D / WWAN

External A

Geyser Trackpad/Keyboard

External B

ExpressCard

AirPort (PCIe Mini-Card)

Camera

External C

INT PD

INT PD

INT PD

INT PD

INT PD

INT PD

INT PD

EHCI0

INT PD

INT PD

INT PD

INT PD

INT PD

INT PD

INT PD

INT PD

INT PD

INT PD

INT PU

INT PU

INT PU

INT PU

EHCI1

INT PD

INT PD

INT PD

Spares

ExpressCard

FireWire

(AirPort)

Ethernet

(x2-capable,pull HDA_SYNChigh for x2)

SPI_CS1# HAS INT PU (NOMINAL=20K, SIMULATION=15K-35K)

GNT0# HAS INT PU; ENABLED ONLY WHEN PCIRST#=0 AND PWROK=H

SB BOOT BIOS SELECT

INT PU

INT PU

INT PU

1

GNT0#

0

NOTE:

LPC

I/F

SPI

FireWire INT*

INT PU

INT PU

If used, ensure GNT2# is not low when PWROK

enabled only when PCIRST# = 0 and PWROK = 1

Yukon-PCIENineveh-GLCI

R2415 pull-down on GNT0#

Provide a pull-down on this GPIO if not used.

NOTE: GNT[0-3]# have internal 20K pull-ups

rises, or PCIe ports 5 & 6 will be disabled.

PCIe Mini Card

MF-LF1/16W

402

10K5%

2

1R2408

5%10K

402MF-LF1/16W

2

1R2407

MF-LF1/16W

5%

402

10K

2

1R2400

10K5%

MF-LF402

1/16W

2

1R2409

1/16W

10K5%

402MF-LF

2

1R2401

10K

MF-LF1/16W

5%

402 2

1R24025%

10K

MF-LF1/16W

402 2

1R2404

5%1/16W

402MF-LF

10K

2

1R2403

OMIT

ICH8MBGA

F2

F3

N2

N3

M1

M2

M4

M5

L2

L3

K1

K2

K4

K5

J2

J3

H1

H2

H4

H5

G2

G3

D23

F21

E22

B23

C23

C28

E28

G28

J28

L28

N28

C29

E29

G29

J29

L29

N29

D26

F26

H26

K26

M26

P26

D27

F27

H27

K27

M27

P27

AH18

AD14

AJ18

AD12

AG17

AF15

AE15

AG15

AG16

AJ19

Y23

Y24

T25

T26

AC28

AC29

AD26

AD27

AA28

AA29

AB25

AB26

W28

W29

Y26

Y27

U28

U29

V26

V27U230015B3 71D3

15B3 71D3

15C3 71D3

15B3 71D3

15B3 71D3

15B3 71D3

15C3 71D3

15B3 71D3

15B3 71D3

15B3 71D3

15B3 71D3

15B3 71D3

15B3 71D3

15B3 71D3

15B3 71D3

15B3 71D3

29C3 75B3

29C3 75B3

24.9

1/16W MF-LF 4021%

21

R2413

8C1 73B3

8C1 73B3

8C1 73B3

8C1 73B3

8C1

8C1

8C1 73B3

8C1 73B3

8C1 8C2 73B3

8C1 8C2 73B3

8C1 73B3

8C1 73B3

8B1 8B2 73B3

8C1 8C2 73B3

8B1 73B3

8B1 73B3

8B1 73B3

8B1 73B3

8B1 73B3

8B1 73B3

1/16W1%

402MF-LF

22.621

R2414

33B6

33B6

33B6

33B6

34C8

34C8

34C8

34C8

52C7 73A3

52C7 73A3

52C3 73A3

52C3 73A3

ICH8MBGA

OMIT

C9

C16

F10

A11

B19

E18

A4

G7

AG24

B7

B3

F12

G11

F8

A10

C5

B5

F9

A7

G6

B10

D9

C8

C10

F18

C18

D7

A17

D16

E17

F16

E15

C17B16

A18

C19

A19

A21

D17

A3

D6

A20

E8

A6

D8

E12

E13

E11

F13

C7

D10

C12

D19

B12

D11

A9

C11

B6

A15

G16

A14

E16

A12

E19

D20

U2300

37C5 74D3

37C5 74D3

37C5 74D3

37C5 74D3

37C5 74D3

37C5 74D3

37C5 74D3

37C5 74D3

37C5 74D3

37C5 74D3

37C5 74D3

37C5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B6 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

23A4 74C3

23A4 74C3

23A4 74C3

23A4 37A5 74C3

23A4 74D3

23A4 37A5 74D3

23A4 74D3

37B5 74D3

37B5 74D3

37B5 74D3

37B5 74D3

23A4 37A5 74D3

37B5 74D3

37A6

23A4 37A5 74D3

23A4 37A5 74D3

23A4 74D3

23A4 37A5 74D3

23A4 37A5 74D3

23A4 37A5 74D3

23A4 37A5 74D3

27D4 67C6

29A5 29B3 75B3

23A4 74C3

10K

1/16WMF-LF402

5%

2

1R2405

NOSTUFF

402

100K

MF-LF

5%1/16W

2

1R2406

402

5%1/16W

1K

MF-LF

2

1R2415

8.2K21R24238.2K21R24248.2K21R24258.2K21R24268.2K21R24278.2K21R24288.2K21R24308.2K21R2429

8.2K21R24328.2K21R24318.2K21R2433

8.2K21R2437

8.2K21R24398.2K21R24388.2K21R2436

8.2K21R244023A4 74C3

8.2K21R2441

8C1

8B1

23A4 39C8

68A4 68B8

37A5 74D3

39A8 73D3

6C2 46B6

8.2K21R2442

39B8

33B6

SB PCI, PCIe, DMI, USBSYNC_MASTER=T9_MLB

01

23 76

051-7455


DVI_HOTPLUG_DET

TP_PCI_PME_LPCI_CLK33M_SB

PCI_REQ2_L

PLT_RST_L

PCI_C_BE_L<1>

SPI_SO

PCIE_ENET_R2D_C_N

PCI_IRDY_L

DMI_N2S_N<0>DMI_N2S_P<0>DMI_S2N_N<0>DMI_S2N_P<0>




SB_CLK100M_DMI_NSB_CLK100M_DMI_P

USB_EXTA_NUSB_EXTA_PUSB_MINI_NUSB_MINI_PUSB_EXTD_NUSB_EXTD_P

USB_CAMERA_PUSB_CAMERA_N

USB_IR_NUSB_IR_PUSB_TPAD_N

USB_BT_NUSB_TPAD_P

USB_BT_PUSB_EXTB_NUSB_EXTB_PUSB_EXCARD_N

USB_EXTC_NUSB_EXCARD_P

USB_EXTC_P

TP_PCIE_EXCARD_D2R_N

TP_PCIE_B_R2D_C_P

TP_PCIE_B_D2R_P

TP_PCIE_A_D2R_N

SPI_CE_R_L<0>SPI_SCLK_R

PCIE_ENET_D2R_N

PCIE_MINI_D2R_P

TP_PCIE_FW_R2D_C_PTP_PCIE_FW_R2D_C_NTP_PCIE_FW_D2R_PTP_PCIE_FW_D2R_N

TP_PCIE_EXCARD_R2D_C_PTP_PCIE_EXCARD_R2D_C_NTP_PCIE_EXCARD_D2R_P

TP_PCIE_B_R2D_C_N

TP_PCIE_B_D2R_N

PCIE_MINI_D2R_N

SPI_SI_R

TP_PCIE_A_D2R_PTP_PCIE_A_R2D_C_N

DMI_IRCOMP_R

USB_RBIAS


=PP3V3_S0_SB_PCI

PCI_PERR_LPCI_DEVSEL_LPCI_SERR_L

ODD_PWR_EN_L

INT_PIRQC_L

INT_PIRQF_L

PCI_LOCK_L

PCI_FW_REQ_L

PCI_FRAME_LPCI_IRDY_L

PCI_STOP_L

PCI_REQ2_L

INT_PIRQA_LINT_PIRQB_L

INT_PIRQD_LINT_PIRQE_L

PCI_TRDY_L

PCI_REQ1_L

PCI_SERR_L

PCI_C_BE_L<3>

PCI_REQ1_LBOOT_LPC_SPI_L

PCI_AD<23>PCI_AD<24>



PCI_AD<31>

PCI_AD<17>

INT_PIRQD_L

PCI_AD<10>

PCI_AD<12>

PCI_AD<8>

PCI_AD<6>

PCI_AD<3>

INT_PIRQB_L

PCI_AD<15>

PCI_AD<19>

INT_PIRQC_L

PCI_AD<22>

PCI_AD<16>

PCI_AD<20>

PCI_AD<7>

PCI_AD<21>

PCI_AD<18>

PCI_AD<2>

PCI_AD<0>


PCI_AD<11>

PCI_AD<1>

INT_PIRQA_L

PCI_AD<13>

PCI_AD<9>

PCI_AD<5>PCI_AD<4>

PCI_AD<14>

TP_PCIE_A_R2D_C_P

PM_LATRIGGER_L

PCI_DEVSEL_L

TP_SPI_CE_R_L<1>

PCIE_MINI_R2D_C_NPCIE_MINI_R2D_C_P

PCIE_ENET_D2R_P

PCIE_ENET_R2D_C_P

PCI_C_BE_L<2>

PCI_C_BE_L<0>

TP_SB_GPIO53

PCI_FW_REQ_L

PCI_PARPCI_RST_L

PCI_PERR_LPCI_LOCK_L

PCI_STOP_LPCI_TRDY_LPCI_FRAME_L

INT_PIRQE_LINT_PIRQF_L

ODD_PWR_EN_L

USB_EXTC_OC_L

USB_EXTD_OC_LSB_GPIO40

EXCARD_OC_LUSB_EXTB_OC_L

USB_EXTA_OC_L

SB_GPIO30

ODD_RST_5VTOL_L

TP_SB_GPIO51

TP_SB_GPIO55

PCI_FW_GNT_LMAKE_BASE=TRUE

EXTGPU_LVDS_EN

=PP3V3_S5_SB_USB

SB_GPIO42

26C6 26A4

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74C3

74D3

25D6

37A5

37A5

37A5

39C8

74C3

74C3

74D3

37A5

37A5

37A5

37A5

74D3

74C3

74C3

37A5

74C3

37A5

74D3

8C4

8C4

8D4

8D4

8C4

8C4

8C4

8C4

8C4

8C4

8C4

8C4

8D4

8D4

8D4

73B3

22D7

7C4

23A6

23A6

23A6

23A6

23A8

23A6

23A6

23B6

23A6

23A6

23A6

23B6

23A8

23A8

23A8

23A6

23A6

23B6

8D4

7D1

www.vinafix.vn

OUT

OUT

BI

IN

BI

IN

IN

SMBALERT*/GPIO11

STP_PCI*/GPIO15

BMBUSY*/GPIO0

SYS_RESET*SUS_STAT*/LPCPD*

QRT_STATE0/GPIO27

THRM*

SMLINK0

GPIO12

SPKR

SDATAOUT1/GPIO48

QRT_STATE1/GPIO28

SLP_S5*

GPIO20

GPIO8

WAKE*

CL_CLK1

BATLOW*

PWROK

SLOAD/GPIO38

SATA2GP/GPIO36

SERIRQ

RI*

CL_DATA1

SLP_S4*

EC_ME_ALERT/GPIO14

TACH0/GPIO17

CLK14

SCLOCK/GPIO22

SATA3GP/GPIO37

SATACLKREQ*/GPIO35

STP_CPU*/GPIO25

WOL_EN/GPIO9

LINKALERT*

SLP_S3*

RSMRST*

TACH3/GPIO7

CLKRUN*/GPIO32

GPIO18

LAN_RST*

CL_VREF1

S4_STATE*/GPIO26

TACH1/GPIO1TACH2/GPIO6

SATA1GP/GPIO19

SDATAOUT0/GPIO39

SATA0GP/GPIO21

MCH_SYNC*

DPRSLPVR/GPIO16

VRMPWRGD

TP3

TP7

CL_RST*

ME_EC_ALERT/GPIO10

SLP_M*

MEM_LED/GPIO24

PWRBTN*

SUSCLK

CL_VREF0

CK_PWRGD

CLPWROK

CL_DATA0

CL_CLK0

CLK48

SMBCLKSMBDATA

SMLINK1

MISC

SYS GPIO

SMB

CLOCKS

POWER MGT

CONTROLLER LINKGPIO

SATA

GPIO

(4 OF 6)

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

BI

BI

OUT

IN

IN

IN

IN

IN

OUT

OUT

IN

BI

BI

BI

BI

OUT

BI

BI

BI

BI

IN

IN

OUT

OUT

OUT

IN

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

AT BOOT/RESET FOR STRAPPING FUNCTION

INT PU

NOTE: DPRSLPVR HAS INT 20K PD ENABLED

INT PU

Test access requiredfor XOR chain testing.

INT PU

INT PD

INT PD

INT PU

INT PU

INT PU

If ME/AMT is not used, short CLPWROK to PWROK. PP1V05_S0M, PP0V9_S3M and PP0V9_S0M. PP3V3_S0M, PP3V3_S0MWOL, PP1V8_S3M, PP1V25_S0M,NOTE: ICH CLPWROK input must be PWRGD signal for

INT PU

until VccCL3_3, VccLAN3_3 and VccLAN1_05PM_LAN_ENABLE must remain deasseted

have been up for at least 1ms.

See note below

PLACE R2511-16 WHERE PHYSICALLY ACCESSIBLE

LAYOUT NOTE:

28C4 29C2

28C4 29C2

6C2 37A5 44C5 46B6

33C5 34B8

6C2 44C8 46B4

44B8

44C5

402

100K5%1/16WMF-LF

2

1R2514

402MF-LF

5%10K

1/16W

2

1R2515

402

0

MF-LF

ARB_ONLY

5%1/16W

2

1R2516

402

5%1/16W

10K

MF-LF

2

1R2511

NOSTUFF

402MF-LF1/16W5%0

2

1R2512

402MF-LF

10K5%

1/16W

2

1R2502

1/16WMF-LF

5%10K

4022

1R2504

402MF-LF1/16W5%1K

2

1R2500

MF-LF1/16W

5%8.2K

402 2

1R2507

MF-LF1/16W5%

402

10K

2

1R2506

MF-LF

5%8.2K

1/16W

402 2

1R2505ICH8M

BGA

OMIT

AG19

AE17

AJ20

AJ22

AJ21

AC13

AH9

AJ9

AJ8

AG8

AD15

D3F4

AE20

AG18

AD9

AE19

AC17

AD19

AJ26

AG22AD18

AF21

AG23

AJ25

AF9

AF12

AD10

AJ11

AG10

AG13

AG11

AF11

AJ10

AJ12

AH27

AG27

AF17

AD16

AH25

AE23

C2

AJ27

AJ24AJ13

AG21

AH20

AE16

AE11

AH12

AC19

AF22

AJ14

E3

AH11

G5

AG9

AH23

D24

AJ23

AF19

F22

AE18

F23

E1

AG12

AE21

U2300

29A5 29D6 75B3

29A5 29D6 75B3

45A8

33C7 35C7 44C5 45A6 58B7 62B8

MF-LF

NO_REBOOT_MODE

1K5%1/16W

4022

1R2510

44C5 45C3

15A6 59D8 70B3

27A6

24A5 44B8

44C8

44C8

47D8 73A3

47D8 73A3

6C2 44C5 46B4

27C5 44B8

15B6

8B4

24A5 37A5

15A3

33B7 44C5 65A6 65C4

28A4

8B4

15A3 74A3

74A3

15A3 74A3

74A3 MF-LF1/16W1%3.24K

4022

1R2526

MF-LF1/16W1%453

4022

1R2527

X5R

0.1uF10%16V

402

2

1C2500

453

MF-LF

1%1/16W

4022

1R2529

MF-LF1/16W1%3.24K

4022

1R2528

0.1uF

X5R

10%16V

402

2

1C2501

15A3 74A3

24A7

MF-LF402

1/16W5%

100K

NOSTUFF

2

1R2523

47A8 73A3

47A8 73A3

74A3

24A5

402

1%

MF-LF

10K

1/16W

21

R2536

402

8.2K

1/16WMF-LF

5%

21

R2544

402

1%1/16W

10K

MF-LF

21

R2545

402

1%

MF-LF1/16W

10K21

R2531 402

1%

MF-LF1/16W

10K21

R2530

402

5%1/16WMF-LF

10K

2

1R2525

6C2 24A7 46B4

24A5

8B4 24B5

8B4

402

10K5%1/16WMF-LF

1

2R2534

5%10K

1/16WMF-LF402 2

1R2552

402

1/16W5%

MF-LF

10K

2

1R2550

8.2K5%1/16WMF-LF4022

1R2553

402MF-LF

5%8.2K

1/16W

2

1R2551

44D8

402

10K

1/16WMF-LF

1%

21

R2598

402

10K

1/16WMF-LF

1%

21

R2546

1/16W5%

402MF-LF

10K

1

2R253210K

MF-LF

5%1/16W

402 1

2R25335%

402

10K

MF-LF1/16W

1

2R2535

69A6

402

10K

MF-LF

5%1/16W

1

2R2547

MF-LF1/16W

5%

402

100K

2

1R2524

402

1%

MF-LF1/16W

10K21

R2597

402

1%

MF-LF1/16W

10K21

R2596

SB Pwr Mgt, GPIO, ClinkSYNC_DATE=10/30/2006SYNC_MASTER=T9_MLB

051-74557624

01

=PP3V3_S5_SB

EXTGPU_RST_L

=PP3V3_S0_SB_GPIO

TP_SB_GPIO6

SATA_B_PWR_EN_L

PCI_PME_FW_L

=PP3V3_S0_SB_GPIO

SMB_DATA

PM_SB_PWROK

SB_SLOAD

INT_SERIRQ

TP_PM_SLP_M_L

CLINK_WLAN_CLK

SB_SPKR

NB_SB_SYNC_L

SATA_B_DET_L

CLINK_WLAN_DATA

SB_CLINK_VREF0

SB_GPIO10_CL1SB_GPIO14_CL2WOL_EN

PM_SLP_S3_L

SB_CLK14P3M_TIMER

SB_SCLOCK

PM_THRM_L

PM_SUS_STAT_L

SB_SATA_CLKREQ_L

LINDACARD_GPIO

PM_BMBUSY_L

CLINK_NB_DATA

PM_BATLOW_L

PM_S4_STATE_L

PM_SLP_S5_LTP_PM_SLP_S4_L

PM_SYSRST_L

SMB_ME_DATA

TP_SB_TP7

FWH_MFG_MODESATA_B_PWR_EN_L

=PP3V3_S0MWOL_SB_CLINK0

SB_GPIO14_CL2

LAN_PHYPC

SB_GPIO10_CL1

PM_RI_L

TP_SB_GPIO6CLK_PWRGD

PM_DPRSLPVR

SB_SDATAOUT<1>

TP_SB_GPIO20SB_GPIO18EXTGPU_RST_LLAN_PHYPC

PCI_PME_FW_L

SMB_CLK

SMB_ME_CLK

SMC_RUNTIME_SCI_L

PM_PWRBTN_L

CLINK_WLAN_RESET_L

SUS_CLK_SB

SB_CLK48M_USBCTLR

=PP3V3_S5_SB_CLINK1

CLINK_NB_RESET_L

PM_RI_L

CLINK_NB_CLK

=SB_CLINK_MPWROK

PM_RSMRST_L

PM_LAN_ENABLE

=PP3V3_S5_SB

PM_STPPCI_L

RSVD_EXTGPU_LVDS_EN

SB_CRT_TVOUT_MUX_LSB_GPIO36

TP_SB_TP3

SB_SDATAOUT<0>

SMC_WAKE_SCI_L

VR_PWRGD_CLKEN

PCIE_WAKE_L

PM_STPCPU_L

PM_CLKRUN_L

SB_CLINK_VREF1

ARB_DETECT_L

PM_BATLOW_L

=PP3V3_S5_SB_GPIO

LINDACARD_GPIOARB_DETECT_L

FWH_MFG_MODE

35C7

24D8

24B3

35C7

26D8

22D7

22D7

26D8

46B4

24A3

24C5

22D2

37A5

22D2

24A8

44B8

24D5

7D1

8B4

7D4

24C5

24C5

24C5

7D4

74A3

24A5

24A5

35B7

24A7

24A5

7C4

24B3

24C5

24B3

24D5

24B5

7C1

7D1

74A3

24C3

7D1

6C2

24B3

24C5

www.vinafix.vn

VSS

VSS_NCTF

VSS

(5 OF 6)

VCC1_5_B

V5REF_SUS

VCCDMIPLL

VCC_DMI

VCC3_3

VCC1_05

V5REF

VCCCL1_5

VCCGLANPLL

VCC3_3

VCC1_5_A

VCC3_3

VCCHDA

VCCSUS1_5

VCCSUS3_3

V_CPU_IO

VCC3_3

VCCSUSHDA

VCC1_5_A

VCC3_3

VCCSATAPLL

VCCGLAN3_3

VCCSUS3_3

VCCLAN3_3

VCCCL1_05

VCCSUS1_05

VCCSUS1_5

VCCSUS3_3

VCCA3GP

VCCGLAN1_5

VCCCL3_3

VCCLAN1_05

VCC1_5_A24

VCC1_5_A

VCCRTC

VCC1_5_A

VCCUSBPLL

VCC1_5_A

VCC1_5_A

VCC1_5_A

GLAN POWER

USB CORE

ATX

ARX

(6 OF 6)

VCCPSUS

IDE

CORE

VCCP

CORE

PCI

VCCPUSB

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

19 mA S0, 51 mA M1 & WOL

1 mA

80 mA

23 mA

10 mA

19 mA S0, 63 mA M1 & WOL

(VCC1_5_A total)

47 mA

1080 mA32 mA

(VCCSUS3_3 total)

1 mA S3-S5

44 mA S3-S5

11 mA S0,

117 mA S0,

442 mA

(VCC3_3 total)

1 mA

50 mA

23 mA

1130 mA

NOTE:VccHDA and VccSusHDA can be 1.5V or 3.3Vdepending on VIO of HD Audio interface.

Current figures provided assume 1.5V.

Current numbers from ICH8M Max Power Estimates Rev 2.0, doc #610194.

657 mA

1 mA S0-S5

1 mA

6 uA S0-G3

402

10%

CERM6.3V

1uF

2

1C26000.1uF20%10VCERM402

2

1 C2601

OMIT

BGA

ICH8M

AJ29

AJ28

AJ2

AJ1

AH29

AH1

A29

A28

B29

B1

A2

A1

L1

K7

K6

K3

K29

K28

K23

J5

J4

J27

AC25

J26

J25

J1

H6

H3

H29

H28

H25

G27

G26

AC14

G25

G23

G19

G13

G10

E2

G1

F7

F29

F28

AC11

E23

F15

E9

E4

E24

E21

D4

D2

D18

D15

AB24

D12

C6

C27

C26

C24

B8

B22

B20

B2

B17

AB1

B14

B11

AJ5

AH8

AH4

AH3

AH26

AH24

AH22

AF28

A25

AH2

AH19

AH16

AH13

AH10

AG6

AG5

AF4

AF3

AF18

AA7

AF16

AF14

AE9

AE6

AE5

AE25

AD1

AE22

AE2

AE12

AA2

AE1

W24

U4

AD5

AB6

AD6

AB5

AB23

AB4

Y4

Y29

Y28

W27

W26

W2

V29

AD4

V28

V15

V13

U5

U3

U27

U26

U23

U17

U16

AD3

U15

U14

U13

U12

T2

T17

T16

T15

T14

T13

AD29

T12

R4

R28

R18

R17

R16

R15

R14

R13

R12

AD28

R11

P29

P28

P23

P17

P16

P15

P14

P13

P12

AD20

N6

N5

N4

N27

N26

N18

N17

N16

N15

N14

AD17

N13

N12

N11

N1

M3

M29

M28

M23

M17

M16

AC27 M15

M14

M13

M12

L5

L4

L27

L26

L15

L13

AC26

A5

A23U2300

OMIT

ICH8MBGA

D1

AD11

N7

C1

P7

P6

AH28

AG20

AC22

AC21

R6

R5

R3

R1

P5

P4

P3

P2

P1

AC18

C3

J7

AC16

AF20

J6

AJ6

AD25

G20

F19

G18

F17

AC12

A24

B25

A26

B26

B28

A27

B27

R29

G21

F20

A22

G22

AE29

AE28

W1

V7

U7

AA3

AF8

AE8

AD8

F11

E7

E10

D5

AC8

D13

C15

B9

B4

B18

B15

A8

Y7

W7

W6

AD2

AF29

E26

E25

D29

D28

AB29

V23

V25

Y25

U25

V24

W25

AB28

U24

T29

T28

T27

T24

T23

R27

R26

R25

R24

AB27

P25

P24

N25

N24

N23

M25

M24

L25

L24

L23

AA27

K25

K24

J24

J23

H24

H23

G24

F25

F24

E27

AA26

AA25

AC5

AC4

AC3

AC2

AC1

AJ7

AH7

W23

M7

M6

L7

L6

AG7

F1

AD7

AC7

H7

G17

G12

AA6

AA5

AC9

AC10

AF7

AE7

L12

L11

G14

F14

E14

D14

C14

V12

V16

V18

U11

V11

V14

V17

U18

C13

T18

T11

P18

P11

M18

M11

L18

L17

L16

L14

B13

A13

AC24

AC23

G4

T7

A16

U2300

SB Power & GroundSYNC_DATE=10/30/2006

01

25 76

051-7455

SYNC_MASTER=T9_MLB


=PP1V5_S0_SB_VCCUSBPLL

PP3V3_G3_SB_RTC

TP_VCCLAN1_05_INTERNAL_REG1TP_VCCLAN1_05_INTERNAL_REG2

TP_VCCSUS1_05_INTERNAL_REG2



TP_VCCCL1_05_INTERNAL_REG


PP1V5_S0_SB_VCCSATAPLL

=PP3V3_S5_SB_3V3_VCCSUSHDA



PP1V5_S0_SB_VCCGLANPLL

PP5V_S5_SB_V5REF_SUS




=PP1V5_S0_SB_VCC1_5_A


=PP3V3_S5_SB_VCCSUS3_3_USB

=PP3V3_S5_SB_VCCSUS3_3

=PP1V5_S0_SB_VCC1_5_A_ATX

=PP1V5_S0_SB_VCC1_5_A_ARX


=PP3V3_S0_SB_VCC3_3_IDE

=PPVCORE_S0_SB

VCCCL1_5V

PP5V_S0_SB_V5REF

=PP3V3_S0_SB_VCC3_3_VCCPCORE



PP1V5_S0_SB_VCCDMIPLL

=PP1V25_S0_SB_DMI


26C6

27D4

26D2

26A4

26C6

26C4

26B4

26B6

26A5

26B2

26C4

26B2

26C2

26C2

26D3

26D2

26B6

26C6

26D5

23C2

26B4

26D2

26A6

26B8

26A8

26A6

22D2

7D4

7B7

22D7

7D4

26D5

7D1

7C4

26B7

26C7

26A4

7C4

7B6

7B7

7C4

7D1

7D1

7B7

7B7

22D7

7D4

7D7

26D7

7D4

7D4

7D4

26A6

7C7

7D7

www.vinafix.vn

NC

NC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

L2700 MAY HAVE CHANGE TO 0.5UH PART

(ICH REFERENCE FOR 5V TOLERANCE ON RESUME WELL LOGIC)

OR 3.56MM ON PRIMARY NEAR PIN A24

PLACE C2700 & C2705-07 < 2.54MM OF SB

PLACE C2704 < 2.54MM OF PIN G4 OF SBON SECONDARY SIDE OR 3.56MM ON PRIMARY

PLACEMENT NOTE:

PLACE C2709 NEAR PIN B27 OF SBPLACEMENT NOTE:

PLACEMENT NOTE:

PLACEMENT NOTE:

PLACE < 2.54MM OF SB ON SECONDARY OR

PLACE CAPS < 2.54MM OF SB ON SECONDARY

PLACE < 2.54MM OF SB ON SECONDARY OR3.56MM ON PRIMARY NEAR PINS AA3...Y7

ICH PCI/VCC3_3 BYPASS(ICH PCI I/O 3.3V PWR)

PLACEMENT NOTE:

PLACE CAPS NEAR PIN C2..AH28

(ICH LOGIC&IO[ATX] 1.5V PWR)

ICH V5REF_SUS BYPASS

(ICH DMI PLL 1.5V PWR)

FOR 270UF PLACEMENT NOTE:

PLACEMENT NOTE:PLACE CAPS AT EDGE OF SB

ICH V_CPU_IO BYPASS

(ICH RTC 3.3V PWR)ICH VCCRTC BYPASS

ICH VCC_PAUX/VCCLAN3_3 BYPASS(ICH LAN I/F BUFFER 3.3V PWR)

NEAR PINS A8 ... F11

PLACE CAP NEAR PIN B27..A26

PLACE CAPS NEAR PIN AD25 OF SB

PLACE < 2.54MM OF SB ON SECONDARY

ICH VCC3_3 BYPASS

ICH VCCUSBPLL BYPASS(ICH USB PLL 1.5V PWR)

(ICH IO BUFFER 3.3V PWR)

(ICH IDE I/O 3.3V PWR)

ICH VCCHDA BYPASS(ICH INTEL HDA CORE 3.3V/1.5V PWR)

PLACEMENT NOTE:

PLACE CAP NEAR PINSAC10..AD7 OF SB

(ICH USB CORE 1.5V PWR)ICH USB CORE/VCC1_5_A BYPASS

(ICH INTEL HDA CORE 3.3V PWR)ICH VCC3_3/VCCHDA BYPASS

3.56MM ON PRIMARY NEAR PINS F1..M7

(ICH SUSPEND USB 3.3V PWR)ICH USB/VCCSUS3_3 BYPASS


PLACEMENT NOTE:PLACE < 2.54MM OF SB ON SECONDARY OR3.56MM ON PRIMARY NEAR PINS F20,G21

(ICH LOGIC&IO[ARX] 1.5V PWR)

(ICH LOGIC&IO 1.5V PWR)

PLACEMENT NOTE:

PLACE CAP < 2.54MM OF SB ON SECONDARY

PLACEMENT NOTE:

PLACE CAP NEAR PINS

PLACE C2715 NEAR PIN D1 OF SB

ICH VCC1_5_A/ARX BYPASS

PLACEMENT NOTE:

OR 3.56MM ON PRIMARY NEAR PIN AF29

ICH VCCSUS3_3 BYPASS

P6..R6

PLACEMENT NOTE:

PLACEMENT NOTE:

PLACEMENT NOTE:

ICH VCCDMIPLL BYPASS

PLACEMENT NOTE:

ICH VCC1_5A BYPASS

PLACE CAPS NEAR PINS

PLACEMENT NOTE:

ICH CORE/VCC1_05 BYPASS (ICH SUSPEND 3.3V PWR)

AC18..AH28

PLACEHOLDER

(ICH CORE 1.05V PWR)

PLACEMENT NOTE:

PLACEMENT NOTE:

OR 3.56MM ON PRIMARY NEAR PIN AE29

OR 3.56MM ON PRIMARY NEAR PIN AD11PLACE < 2.54MM OF SB ON SECONDARY

(ICH SUSPEND 3.3V PWR)ICH VCCSUS3_3 BYPASS

PLACEMENT NOTE:

PLACEMENT NOTE:

PLACEMENT NOTE:

F19 AND G20PLACE CAP UNDER SB NEAR PINS

ICH VCC3_3 BYPASS(ICH IO BUFFER 3.3V PWR)

SECONDARY SIDE OR 3.56MM ON PRIMARYPLACE CAPS < 2.54MM OF SB ONPLACEMENT NOTE:

OR 3.56MM ON PRIMARY NEAR PIN AD2PLACE < 2.54MM OF SB ON SECONDARYPLACEMENT NOTE:

3.56MM ON PRIMARY NEAR PINS AE7..AJ7

L2702 MAY HAVE CHANGE TO 1.0UH PART

3.56MM ON PRIMARY NEAR PIN AJ6

3.56MM ON PRIMARY NEAR PIN AH11 PLACE < 2.54MM OF SB ON SECONDARY OR

PLACEMENT NOTE:

PLACEMENT NOTE:PLACE C2703 < 2.54MM OF PIN A16..T7 OF SBON SECONDARY SIDE OR 3.56MM ON PRIMARY

ICH IDE/VCC3_3 BYPASS

PLACE NEAR PINS AC23,AC24 OF SB

(ICH CPU I/O 1.05V PWR)

OR 3.56MM ON PRIMARY NEAR PIN AC12PLACE < 2.54MM OF SB ON SECONDARY

PLACEMENT NOTE:

DISTRIBUTE IN PCI SECTION OF SB

3.56MM ON PRIMARY NEAR PIN AC1..AC5

ICH VCCA3GP(VCC1_5_B BYPASS(ICH IO,LOGIC 1.5V PWR)

PLACEMENT NOTE:

L2703 NEED CHANGE TO 1UH PART

M70 DOES NOT USE GIGABIT IN SB, SO NO NEED FOR PLL FILTERING

DISTRIBUTED BETWEEN AA25..V23ON SECONDARY SIDE OR 3.56MM ON PRIMARY

(ICH REFERENCE FOR 5V TOLERANCE ON CORE WELL INPUT)ICH V5REF BYPASS


PLACEMENT NOTE:PLACE < 2.54MM OF SB ON SECONDARY OR

ICH VCC1_5_A/ATX BYPASS

CASE-B2

CRITICAL

20%220UF

POLY2.5V2

1 C2700

402

16V10%

X5R

0.1UF

2

1 C2710

402

16V10%0.1UF

X5R2

1 C2712

1

5%MF-LF1/16W

402

21

R2700

20%

CERM

4.7UF6.3V

6032

1 C2724

1007

1.0UH-0.5A-0.675A21

L2703

10UF

X5R

20%6.3V

6032

1 C2735

0.1UF

X5R402

16V10%

2

1 C2703

CERM

1UF

402

10%6.3V2

1 C2711

402

16V

0.1UF

X5R

10%2

1 C2740

6.3V

10UF

X5R603

20%

NOSTUFF

2

1 C2742

CERM16.3V20%

603

2.2uF

2

1 C2732

603CERM6.3V20%4.7uF

2

1 C2736

4.7uF20%

CERM603

6.3V2

1 C2733

402

16VX5R

0.1UF10%

2

1 C2741

0805

10UH-100MA21

L2702

6.3V20%22UF

CERM805

2

1 C2739

16V

402

10%

X5R

0.1UF

2

1 C2704

402

10%

X5R

0.1UF16V2

1 C2738

402

16V

0.1UF

X5R

10%2

1 C2737

0.1UF10%16V

402X5R2

1 C27200.1UF

402

16VX5R

10%2

1 C2743

402

10%

X5R

0.1UF16V2

1 C2715

402

16V

0.1UF

X5R

10%2

1 C2709

0.1UF

402

10%

X5R16V2

1 C27180.1UF

402

16VX5R

10%2

1 C2702

402

10%

X5R

0.1UF16V2

1 C2719

10%

402

16V

0.1UF

X5R2

1 C2721

402X5R16V

0.1UF10%

2

1 C2723

402

16V

0.1UF

X5R

10%2

1 C2722

402

10%

X5R

0.1UF16V2

1 C2725

X5R402

0.1UF10%16V

NOSTUFF

2

1 C2726

402

16V

0.1UF

X5R

10%2

1 C2727

402

16V

0.1UF

X5R

10%2

1 C2728

402X5R16V10%0.1UF

2

1 C2713

SOT-363HN2S02JE2

4

3 D2702

HN2S02JESOT-363

2

5

1 D27021/16WMF-LF402

10

5%

21

R2701

0805-1FERR-330-OHM-1.5A

21

L2700

805

6.3V20%22UF

CERM

NOSTUFF

2

1 C2705

6.3V

805

22UF20%

CERM2

1 C270620%

CERM16.3V

603

2.2UF

2

1 C2707

0.01UF

CERM16V10%

4022

1 C2701

6.3V

10UF

X5R603

20%2

1 C2708

402CERM6.3V

1UF10%

C2717

10%

CERM402

6.3V

1UF2

1 C2714

CRITICAL

330UF20%

POLYCASE-C2

2.5V2

1 C2716

4025%

MF-LF1/16W100

2

1

R2702

402

16V

0.1UF10%

X5R2

1 C2729

402

16V

0.1UF

X5R

10%2

1C2730

402

16V10%0.1UF

X5R2

1 C2734

402X5R16V10%0.1UF

2

1 C2731


26

01

SB DecouplingSYNC_MASTER=WFERRY

76

051-7455

=PP1V5_S0_SB_VCC1_5_A_ARX

=PP3V3_S5_SB

=PP3V3_S0_SB_VCC3_3_IDE



=PPVCORE_S0_SB

PP1V5_S0_SB_VCCSATAPLL

MIN_LINE_WIDTH=0.5MMVOLTAGE=1.5V

MIN_NECK_WIDTH=0.25MM



PP1V5_S0_SB_VCC1_5_BMAKE_BASE=TRUE

=PP1V5_S0_SB_VCC1_5_A

VOLTAGE=1.5VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MM

PP1V5_S0_SB_VCCDMIPLL

=PP1V5_S0_SB_VCCUSBPLL




=PP3V3_S5_SB_3V3_VCCSUSHDA

=PP3V3_S5_SB_VCCSUS3_3_USB



=PP1V5_S0_SB

=PP1V25_S0_SB_DMI

PP3V3_G3_SB_RTC


=PP5V_S0_SB

=PP5V_S5_SB

=PP1V5_S0_SB

=PP3V3_S0_SB

VOLTAGE=5VPP5V_S0_SB_V5REF

MIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.25MM



PP1V5_S0_SB_VCC1_5_BVOLTAGE=1.5V

MIN_NECK_WIDTH=0.25MMMIN_LINE_WIDTH=0.5MM

VOLTAGE=5V


PP5V_S5_SB_V5REF_SUSMIN_LINE_WIDTH=0.3MM


VOLTAGE=1.5VMIN_LINE_WIDTH=0.5MMMIN_NECK_WIDTH=0.25MMPP1V5_S0_SB_VCCGLANPLL


VOLTAGE=1.5VPP1V5_S0_SB_VCCDMIPLL_F

=PP1V5_S0_SB

=PP1V5_S0_SB_VCC1_5_A_ATX

35C7

26C6

26A4

24A8

26D2

26C6

25D6

26B6

26C8

27D4

26A6

26D6

25C3

25D6

26D6

25B6

24A3

25C3

25B3

25A3

25D3

25A3

25C3

23C2

25B6

25A6

25B3

25B6

25A6

25B3

25A3

25A3

25C3

26A8

25C3

25D6

25C3

26C8

39C8

22D2

23C2

25C3

26A8

25B6

7B7

7D1

7D4

7D4

7C4

7D7

7D1

7D4

22D7

7B7

25C3

7B7

7C4

7B6

7C4

7D1

7D1

7D1

7D4

7B7

7C7

22D7

7D4

7A7

7C1

7B7

7D4

25D6

25A6

7D7

22D7

25D6

7D4

25A6

7B7

7B7

www.vinafix.vn

GND

Y

A

B

VCC

OUT

OUT

NC

NC

Y

B

A

IN

OUT

IN

IN

Y

B

A

IN

OUT

IN

OUT

OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

SB RTC Crystal Circuit

197S0219

Change Y2800 to 197S019 -7.0mmx1.5mmx1.4mm In CLOSE=12.5pF to solder a reset button.

This will allow us to sequence this part under wireless card

Platform Reset Connections

MIN_LINE_WIDTH=0.3MMVOLTAGE=3V

VOLTAGE=3V

on the board to short or

NC

but may change after characterization.

Unbuffered

Linda Card represents 3 loads

Buffered

NC

Silk: "SYS RST"This part is never stuffed,

Initial resistor values are based on CRB,

it provides a set of pads

MIN_LINE_WIDTH=0.3MM

CPU VCORE PSI

Pulled a new APN for U2803(0.6mm max 2-input NAND gate-APN:311S0304It may take a few days before this is done through

RTC Battery Connector

518S0519

5%50VCERM

10PF

402

21

C2809

CERM10V20%

0.1UF

4022

1C2807402

0.1UFCERM20%10V 2

1C2811

CRITICAL

78171-0002M-RT-SM

21

4

3

J2800

0

1/16WMF-LF5%

402

21R2801

MF-LF5%

1/16W402

0 21

R2802

CRITICAL

TC7SH00FEFSON

4

5

3

1

2U2803

1/16WMF-LF402

5%100K

2

1R2803

402MF-LF1/16W5%

100 21

R2886

CERM10%6.3V1UF

4022

1C2810

10%

402CERM6.3V1UF

2

1C2805MF-LF5%

4021/16W

20K 21R2800

HN2S02JESOT-363

2

51

D2800

1/16W1M5%

402MF-LF

2

1R2806

HN2S02JESOT-363

2

43

D2800 402

5%

0

MF-LF1/16W

21R2887

5%

0

402MF-LF1/16W

21

R2885

100

1/16WMF-LF402

5%21

R2883402MF-LF

05%

1/16W

21R2881

CRITICAL

SOT665TC7SZ08AFEF

4

5

3

1

2

U2880

MF-LF402

5%1/16W100K

2

1R28800.1UF

10V20%

402CERM 2

1C2880

5%10K

1/16W402MF-LF

2

1R2897

I59

100K

402

5%MF-LF1/16W

OMIT

2

1R2898

1.8K5%1/16W402MF-LF2

1R2811

CRITICALSOT665

TC7SZ08AFEF

4

5

3

1

2

U2801

402

5%10K1/16WMF-LF

2

1R2812

402MF-LF1/16W5%1K

2

1R2807

1/16W

1K

402MF-LF5%

2 1

R28965%50VCERM

10PF

402

21

C2808

32.768K

CRITICAL

7X1.5X1.4-SM4

1Y28000

1/16W5%

402MF-LF

21R2810

MF-LF

10M5%

4021/16W

2

1R2809

27

SYNC_DATE=07/26/2005SB Misc

SYNC_MASTER=NB

01

76

051-7455

SB_RTC_X1_R

SB_RTC_X2

CLINK_MPWROK

PM_SB_PWROKALL_SYS_PWRGD

MAKE_BASE=TRUECPU_PSI_L

NB_RESET_L

AIRPORT_RST_L

DEBUG_RESET_L

VR_PWRGD_CK505

MAKE_BASE=TRUEPM_SYSRST_L

SB_RTC_RST_LPPVBATT_G3C_RTC_R

PPVBATT_G3C_RTC

=PP3V42_G3H_SB_RTC PP3V3_G3_SB_RTC

=PP3V3_S5_SB_PM

=PP3V3_S0_RSTBUF

XDP_DBRESET_L

SB_SM_INTRUDER_L

TMDS_RST_L

SMC_LRESET_L

XDP_DBRESET_L_R

ENET_RESET_L

SB_RTC_X1

MAKE_BASE=TRUEPP3V3_G3C_SB_RTC_D

VR_PWRGOOD_DELAY

IMVP6_PSI_L

PLT_RST_BUF_L

MAKE_BASE=TRUEPLT_RST_L

CK410_PD_VTT_PWRGD_L

=PP3V3_S0_SB_PM=PP3V3_S0_SB_PM

MAKE_BASE=TRUEVR_PWRGD_CK505_L 58A3

26A5

8B3

44D8

46B6

44B8

25D6

12B4

59C7

67C6

27B8 27B6

22D8

8B1

24C3

6B2

9A2

15B6

33C3

6C2

8B3

24D5

22D8

7B1 22D7

7D1

7D4

9C6

22D8

68B5

44C8

34B8

22D8

15B6

59C7

23A6

7D4 7D4

59C7

www.vinafix.vn

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

OUT

IN

BI

IN

BIIN

IN

IN

OUT

OUT

IN

OUT

OUT

OUT

OUT

OUT

OUT

INVSS_PCI

CLKREQ_7*

CLKREQ_8*

GPU_STOP*REF_0/FS_C/TEST_SEL

48M/FS_A

DOT_96/27MDOT_96*/27M_SS

SRC_8*

SRC_8

PCI_5/FCT_SEL

PCIF_0/ITP_EN

VDD_PCI

VDD_48

THRM_PAD

SRC_4*

CLKREQ_3*SRC_3

SRC_0/LCD_CLKSRC_0*/LCD_CLK*

CPU_1_MCH*CPU_1_MCH

CPU_ITP*/SRC_10*CPU_ITP/SRC_10

VSS_SRC

VSS_REF

VSS_CPU

VSS_48

SDA

PCIF_1

PCI_4

PCI_3

PCI_2PCI_1

VSS_A

XTAL_OUT

CLKREQ_6*

CLKREQ_5*

CLKREQ_4*

CLKREQ_1*

SCL

CPU_0

SRC_1

SRC_2*SRC_2

SRC_4

SRC_5*

SRC_5

SRC_7*SRC_7

SRC_6*SRC_6

VDD_REF

CPU_0*

SRC_3*

CPU_STOP*

PCI_STOP*

XTAL_IN

VDD_A

FS_B/TEST_MODE

VDD_CPU

SRC_1*

CKPWRGD/PD*

VDD_SRC

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

BI

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NEED TO CHECK CAP VALUE

R2901,L2902,C2916,C2911,C2914 and R2902

USE 155S0302 FOR L2902(R2906) AND L2903(R2907)USE 2.2OHM FOR R2900,R2901 AND 1OHM FOR R2902

ORIGINAL DESIGN:

DOT96T

PIN 6

(INT PD)

(INT PU)

PIN 10

(INT PU)

(INT PU)

(INT PU)

100MT_SST

SRCC027M27M NON

SPREAD

FCTSEL1

* FOR INT. GRAPHIC SYSTEM* FOR EXT. GRAPHIC SYSTEM

100MC_SST

PIN 11

SRCT0

(GMCH D_REFSSCLKIN DISPLAY PLL B 100MHZ)

(SLOT F - GPU PCI-E 100 MHZ )

10

1 = CKPWRGD/PD#0 = VTT_PWRGD#/PD

(ITP HOST 133/167MHZ)

(GMCH HOST 133/167MHZ)

(CPU HOST 133/167MHZ)

(FROM ICH8M GPIO25 STPCPU* )(FROM ICH8M GPIO15 STPPCI* )

COMPATIBILITY475 OHM FOR CK410M

(SLOT E )

(EACH POWER PIN PLACED ONE 0.1UF)(PLACED 0.1UF NEAR THE RELATIVE POWER PIN)

(INT PU)(NO INT PD)

(NO INT PU)

(INT PU)

(ICH8M DMI 100 MHZ )

PIN 7

DOT96C

SPREAD

(WIRELESS PCI-E 100 MHZ )

U2900 HAS INTERNAL PU ON PGMODE (FROM GMCH CLK_REQ*)(GMCH G_CLKIN 100 MHZ )

(FROM ICH8M GPIO35)(ICH SATA 100 MHZ)

(SLOT D - 4 LANE PCI-E FOR EXPRESSCARD)

(DB400 SRC )

(ICH8M,SIO,LPC REF. 14.318MHZ)(ICH8M USB 48MHZ)(FROM ICH8M)

(GMCH D_REFCLKIN DISPLAY PLL A 96MHZ)

STUFF R2905 FOR CK410M MODE

(SMC LPC 33MHZ)(TPM LPC 33MHZ)(FW PCI 33MHZ)

(ICH SM BUS)

(PORT80 LPC 33MHZ)

(PULL UP PIN 68 TO ENABLE ITP HOST CLK)

(ICH8M PCI 33MHZ)

(PCI SLOT)

STUFF C2907,C2910,C2916,C2911,C2914

SELIGO RECOMMEND TO REMOVE L2903,R2900,C2907,C2910

NOSTUFF

6.3VX5R

20%

603

10UF2

1 C2910

10%

X5R

0.1UF16V

4022

1 C2915

24C8 29C2

24C8 29C2

6C7 29D6 75D3

6C7 29D6 75D3

6C7 29D6 75D3

6C7 29D6 75D3

6C7 29D6 75D3

6C7 29D6 75D3

6C7 29C6 75C3

6C7 29C6 75D3

8C4

8C4

6C7 29C6 75C3

6C7 29C6 75C3

6C7 29C6 75C3

6C7 29B6 75C3

6C7 29C6 75C3

6C7 29C6 75C3

5%18PF

CERM50V

4022

1 C29905%18PF

CERM50V

4022

1 C2989

29B6 75D3

8C4 75D3

29A6 75D3

8C4 75D3

47D6

47D6

NOSTUFF

10UF20%6.3V

603X5R2

1 C2907

29B8

29B2 75D3

NOSTUFF

1UF

CERM402

10%6.3V2

1 C2911

10UF

X5R

20%

603

6.3V 2

1C290110%0.1UF16VX5R402

2

1 C2902

FERR-120-OHM-1.5A

0402-LF

21

L2901

6.3V10%

402

1UF

CERM 2

1C2900

402

0

5%

MF-LF1/16W

21

R2901

402

0

1/16WMF-LF

5%

21

R2902

NOSTUFF

10UF

X5R603

20%6.3V2

1 C2914

402

0

5%

MF-LF1/16W

21

R2900

29C2

29C2

33C5

10K5%

MF-LF1/16W

4022

1R2903

6C7 29B6 75D3

29B6 75D3

8B3

8C4

8C4

8C4

8C4

6C7 29C6 75C3

6C7 29C6 75C3

15A3

CRITICAL

5X3.2-SM

14.3181821

Y2901

402MF-LF

1%

NOSTUFF

1/16W

475

2

1R2905

NOSTUFF

10UF20%6.3V

603X5R2

1 C2916

402

16V

0.1UF10%

X5R2

1 C290310%16V

402X5R

0.1UF

2

1 C2904

402

16VX5R

0.1UF10%

2

1 C2905

X5R

10%0.1UF16V

4022

1 C2906

402

16VX5R

10%0.1UF

2

1 C2908

402

16VX5R

10%0.1UF

2

1 C291210%

X5R

0.1UF16V

4022

1 C2913

402

16V

0.1UF

X5R

10%2

1 C2909

CRITICAL

QFNSLG2AP101

5051

31

52

6662

46

39

5

35281712

49

6761

43

38

3

69

3233

3029

2726

2423

2221

1918

1615

1413

1110

4847

54

168

56

6564635857

53

8

76

55

3637

4142

4445

34

40

25

60

20

59

9

2

4

U2900

8C4 34B8

6B7 29B6 75C3

6B7 29B6 75C3

6C7 29B6 75D3

29D8 75D3

29D8 75D3

6C7 29B6 75D3

24C3

402

0

1/16WMF-LF

5%

21

R2906

402

0

1/16WMF-LF

5%

21

R2907

051-7455 01

Clock (CK505)SYNC_MASTER=DSIMON SYNC_DATE=06/06/2006

7628

TP_CK505_SRC3_N

CK505_SRC5_P

TP_CK505_SRC7_PCK505_PGMODE

MIN_NECK_WIDTH=0.2mmMIN_LINE_WIDTH=0.5mmPP3V3_S0_CK505_VDD_CPU_SRC

VOLTAGE=3.3V

=ENET_CLKREQ_LCK505_SRC8_P

CK505_USB48_FSA

CK505_DOT96_27M_P

CK505_SRC8_N

CK505_DOT96_27M_N

CLK_PWRGD

CK505_SRC5_N

CK505_SRC6_NCK505_SRC6_P

CK505_SRC_CLKREQ6_L

TP_CK505_SRC7_N

NB_CLKREQ_L

CK505_SRC4_P

CK505_SRC_CLKREQ3_LTP_CK505_SRC3_P

CK505_SRC2_P

PM_STPCPU_L

CK505_CPU0_N

TP_CK505_SRC1_N

CK505_FSB_TEST_MODE

PP3V3_S0_CK505_VDDAVOLTAGE=3.3V

MIN_LINE_WIDTH=0.5mmMIN_NECK_WIDTH=0.2mm

PM_STPPCI_L

PP3V3_S0_CK505_VDD_REFMIN_NECK_WIDTH=0.2mmMIN_LINE_WIDTH=0.5mm

VOLTAGE=3.3V

CK505_SRC2_N

TP_CK505_SRC1_P

CK505_CPU0_P

CK505_SRC_CLKREQ1_L

CK505_PCI1_CLKCK505_PCI2_CLKCK505_PCI3_CLKCK505_PCI4_CLK

CK505_CPU2_ITP_SRC10_PCK505_CPU2_ITP_SRC10_N

CK505_CPU1_PCK505_CPU1_N

CK505_SRC4_N

PP3V3_S0_CK505_VDD48MIN_LINE_WIDTH=0.5mm

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2mm

CK505_CLK14P3M_TIMERCK505_REF1

CK505_LVDS_NCK505_LVDS_P

SB_CLK100M_SATA_OE_L

=SMBUS_CK505_SCL

CK505_PCIF1_CLK

=SMBUS_CK505_SDA

CK505_PCI5_FCTSEL1

CK505_PGMODE

CK505_XTAL_OUTCK505_XTAL_IN

=PP3V3_S0_CK505

CK505_PCIF0_CLK

=PP3V3_S0_CK505

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2mm

PP3V3_S0_CK505_VDD_PCIMIN_LINE_WIDTH=0.5mm

PP3V3_S0_CK505_VDDA_R

MIN_NECK_WIDTH=0.2mmVOLTAGE=3.3VMIN_LINE_WIDTH=0.5mm

=PP3V3_S0_CK505

29D2

29D2

29D2

29B2

29B2

29B2

28D8

28D8

28D3

28D3

28C8

28C8

28B5

28A4

7C4

7C4

7C4

www.vinafix.vn

IN

IN

IN

IN

IN

IN

OUT

OUT

IN

IN

OUT

IN

IN

IN

IN

IN

OUT

OUT

OUT

OUT

OUTIN

IN

OUTIN

OUT

OUT

BI

OUT

OUT

IN

IN

IN

IN

OUT

OUT

OUT

OUTIN

OUT

OUT

OUT

IN

OUT

OUT

OUTIN

OUT

OUT

OUT

IN

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(WIRELESS PCI-E MINI 100MHZ)

(GMCH PEG/DMI 100MHZ)

(ICH8M SATA 100MHZ)

CPU speed is currently set to 200MHz

FOR MANUAL CPU FREQUENCYNOSTUFF R3082, R3086, R3090

(FROM CPU FS_B)

*

FS_C

10

Resrvd

CLK Termination

CLKREQ Controls

333M100M

400M200M166M133M266MCPU

(FROM CPU FS_C)

10010

11

(TO MCH FS_A)

(TO ICH8M USB 48MHZ)

1 0

11

00

1

110

0FS_B0

FS_A0

10

(TO MCH FS_C)

(ICH8M 14.318MHZ)

(TO MCH FS_B)

(CPU HOST 133/167MHZ)

(FOR YUKON 100MHZ)

For reducing noise coupling to wireless frequenciesPlace close to CLK Gen

(ICH8M DMI 100MHZ)

(GMCH HOST 133/167MHZ)

(ITP HOST 133/167MHZ)

(Int Gfx LVDS 100MHz)

(TO SMC PCI 33MHZ)

(PORT80 LPC 33MHZ)

(TO ICH8M PCI 33MHZ)

(TO FIREWIRE PCI 33MHZ)

(Int GFX DOT 96MHZ)

(FROM CPU FS_A)

6C7 28C4 75D3

6C7 28C4 75D3

6C7 28C4 75D3

6C7 28C4 75D3

6C7 28A4 75D3

6C7 28A4 75D3

15C3 75B3

15C3 75B3

6C7 28B4 75C3

6C7 28B4 75C3

23D2 75B3

6C7 28B4 75C3

6C7 28B4 75C3

28B6 75D3

28B6 75D3

6C7 28B6 75D3

29A5 37A5 75B3

29A5 44C8 75B3

23A6 29A5 75B3

33C5 75A3

33C5 75B3 6C7 28B4 75C3

6C7 28B4 75C3

6C2 46C4 75C3

28B8 75D3

23C2 75B3

1/16W5%10K

NOSTUFF

MF-LF4022

1R3067

1K1/16WMF-LF

5%

4022

1R3083

1K5%

MF-LF1/16W

4022

1R3084

28C6

28B6 75D3

22B6 75B3

22B6 75B3

6C7 28B4 75C3

6C7 28B4 75C3

5%

MF-LF1/16W

402

1K

NOSTUFF

2

1R3080

MF-LF

0

5%1/16W

402

21

R30829B4 70B3

9A4 70B3

5%

0

MF-LF1/16W

402

21

R3086

NOSTUFF

1/16WMF-LF402

5%1K

2

1R3087

13B3 75C3

13B3 75C3

9B6 75C3

24D3 29A5 75B3

402

5%

33

MF-LF1/16W

21

R303228A4 75D3

2.2K

5%

MF-LF1/16W

402

21

R3033

9B6 75C3

1/16W5%

1K

MF-LF402

21

R308115C6 70B3

1K

5%

MF-LF1/16W

402

21

R308515C6 70B3

9A4 70B3

1/16W

0

MF-LF402

5%

21

R3090

1K1/16WMF-LF

NOSTUFF

5%

4022

1R3088

5%1K

1/16W

402MF-LF

2

1R3091

12B3

402

5%

1K

MF-LF1/16W

21

R308915B6 70B3

24D3 29A5 75B3

5%

402

33

1/16WMF-LF

21

R303428A4 75D3

12B3

8B1 75B3

8A1 75B3

6C7 28B4 75D3

6C7 28B4 75C3

8B1 75B3

8B1 75B3

MF-LF1/16W5%

0

402

21

R3000

5%

10K

MF-LF1/16W

402

21

R3035

5%1/16WMF-LF

0

402

21

R3001

MF-LF1/16W5%

0

402

21

R3002

MF-LF

5%1/16W

0

402

21

R3003

MF-LF1/16W5%

0

402

21

R3004

5%1/16WMF-LF

0

402

21

R3005

1/16WMF-LF

5%

0

402

21

R3006

5%1/16WMF-LF

0

402

21

R3007

1/16WMF-LF

5%

0

402

21

R3010

5%

MF-LF1/16W

0

402

21

R3011

5%1/16WMF-LF

0

402

21

R3014

5%1/16WMF-LF

0

402

21

R3015

MF-LF1/16W5%

0

402

21

R3016

1/16W5%

MF-LF

0

402

21

R3017

MF-LF1/16W5%

0

402

21

R3018

1/16WMF-LF

5%

0

402

21

R3019

5%1/16WMF-LF

0

402

21

R3024

5%

MF-LF1/16W

0

402

21

R3025

MF-LF402

33

5%1/16W

21

R3026

MF-LF

5%

402

33

1/16W

21

R3027

402

33

5%1/16WMF-LF

21

R3028

402MF-LF

5%1/16W

3321

R3030

10K 5%

MF-LF1/16W 402

21

R3046

4021/16WMF-LF

5%10K21

R3047

402

NOSTUFF

1/16WMF-LF

5%10K21

R3050

MF-LF

NOSTUFF10K 5%

1/16W 40221

R3051

10K

402

1/16WMF-LF

5%

2

1R3066

402

0.25%50VCERM

NOSTUFF

3.3PF2

1 C3000CERM50V0.25%3.3PF

NOSTUFF

4022

1 C3001CERM

3.3PF0.25%50V402

NOSTUFF

2

1 C300250VCERM402

3.3PF0.25%

NOSTUFF

2

1 C3003

34C8

34C8

MF-LF

5%1/16W

0

402

21

R3023MF-LF1/16W5%

0

402

21

R30226B7 28A4 75C3

6B7 28A4 75C3

CERM402

NOSTUFF

3.3PF0.25%50V2

1 C3004

6C7 28C4 75D3

6C7 28C4 75D3

SYNC_MASTER=DSIMON-WF

76

01

Clock TerminationSYNC_DATE=06/06/2006

29

051-7455

PCI_CLK33M_SBSB_CLK48M_USBCTLRSB_CLK14P3M_TIMER

PCI_CLK33M_SMC

PCI_CLK33M_FW

CPU_BSEL<1>

CK505_PCI3_CLK

CK505_PCI1_CLK

NB_CLK100M_PCIE_N

CK505_SRC_CLKREQ3_L

PM_STPPCI_L

PM_STPCPU_L

CK505_SRC_CLKREQ1_L

SB_CLK100M_SATA_N

PCIE_CLK100M_ENET_N

PCIE_CLK100M_MINI_N

CK505_PCI5_FCTSEL1

=PP1V25R1V05_S0_FSB_NB


CK505_FSA

CK505_FSC

=PP3V3_S0_CK505

=PP3V3_S0_CK505

CPU_XDP_CLK_N

NB_BSEL<2>

SB_CLK14P3M_TIMER

CK505_FSC


NB_BSEL<0>

CK505_FSA

NB_BSEL<1>

CPU_BSEL<2>

CPU_BSEL<0>

CK505_USB48_FSA

CK505_CLK14P3M_TIMER

SB_CLK100M_DMI_N

CK505_FSB_TEST_MODE

PCI_CLK33M_SMC

FSB_CLK_NB_N

PCI_CLK33M_FW

PCI_CLK33M_SB

CK505_DOT96_27M_P

CK505_PCIF1_CLK

CK505_PCIF0_CLK

NB_CLK96M_DOT_N

PCI_CLK33M_LPCPLUS

FSB_CLK_CPU_N

CK505_CPU2_ITP_SRC10_N

CK505_CPU2_ITP_SRC10_P

CK505_CPU1_N

CK505_CPU0_P

CK505_CPU1_P FSB_CLK_NB_P

CPU_XDP_CLK_P

FSB_CLK_CPU_P

CK505_LVDS_P

CK505_SRC8_N

CK505_SRC4_N

CK505_SRC4_P

CK505_SRC2_N

CK505_LVDS_N

CK505_SRC5_N

CK505_SRC2_P

CK505_SRC5_P

CK505_SRC6_P

CK505_SRC8_P

CK505_SRC6_N

PCIE_CLK100M_ENET_P

PCIE_CLK100M_MINI_P

NB_CLK100M_PCIE_P

SB_CLK100M_DMI_P

NB_CLK100M_DPLLSS_P

NB_CLK100M_DPLLSS_N

SB_CLK100M_SATA_P

CK505_DOT96_27M_N

NB_CLK96M_DOT_P

CK505_CPU0_N

SB_CLK48M_USBCTLR

29B2

29D2

29C6

28D8

28D8

29C6

75B3

75B3

75B3

75B3

75B3

29C6

29B6

28D3

28D3

29B6

29B3

29D6

29D6

44C8

37A5

28C4

28C4

13B7

13B7

75B3

75B3

28C8

28C8

75B3

13B7

75B3

23A6

24D3

24D3

29A3

29B3

28B4

24C8

24C8

28B4

7C7

7C7

29D6

29D6

7C4

7C4

29A8

7C7

29C8

www.vinafix.vn

VSS10

VSS2DQ5

SA1SA0

VSS58DQ63

DQ62VSS56DQS7

DQS7*VSS54

DQ60VSS52

DQ54VSS50

VSS48

CK1*CK1

VSS46

DQ53DQ52

VSS44

VSS42DQS5

DQS5*

VSS39DQ45

DQ44VSS37DQ39

DQ38VSS35

DM4VSS34DQ37

DQ36VSS32

NC3VDD11NC/A13

ODT0VDD9S0*

RAS*BA1

VDD7A0A2

A4VDD5

A6A7A11

VDD3NC/A14

NC/A15VDD1

NC/CKE1

VSS30DQ31DQ30

VSS28DQS3

DQS3*VSS26DQ29

DQ28VSS24

DQ23DQ22

VSS22

DM2NC0

VSS19DQ21DQ20

VSS17

VSS15

DQ15DQ14

VSS13

CK0*CK0

VSS11

DQ13

VSS7DQ7

VSS5DM0

DQ4

VSS0

DM1

DQ12

DQ6

DQ47DQ46

DQ61

DQ55

DM6

VDDSPDSCL

SDAVSS57

DQ59DQ58VSS55

DM7VSS53

DQ56VSS51

DQ50VSS49

DQS6*

VSS47NC_TESTVSS45

DQ49DQ48

VSS43

VSS41DM5VSS40

DQ41

VSS38DQ35

VSS36DQS4

DQS4*VSS33DQ33

DQ32VSS31

NC/ODT1VDD10NC/S1*

CAS*VDD8WE*

BA0A10/AP

VDD6A1A3

A5VDD4

A8A9A12

VDD2BA2

NC2VDD0CKE0

VSS29DQ27DQ26

VSS27NC1

DM3VSS25DQ25

DQ24VSS23

DQ19DQ18VSS21

DQS2DQS2*

VSS18DQ17DQ16

VSS16

VSS14

DQ11DQ10VSS12

DQS1DQS1*

DQ9DQ8

VSS8DQ3

DQ2VSS6DQS0

DQS0*VSS4

VSS1

VREF

DQ0DQ1

DQ34

DQ40

DQ42DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONEADDR=0xA0(WR)/0xA1(RD)

NC

DDR2 Bypass CapsNC

NC

DIP DIMM CONN

One 0.1uF per connectorDDR2 VRef

Yellow uses 10K divider and TLV2463

(See Capell Valley pg 47)

Page Notes

NC

516-0135

NC

NC

when they get cheaper.

- =PP1V8_S3_MEM

- =I2C_MEM_SDA- =I2C_MEM_SCL

- =PPSPD_S0_MEM (2.5V - 3.3V)

(NONE)BOM options provided by this page:


(For return current)


to drive MCH and DIMM connectors.

The 4.7uF and 1.0uF caps can be changed to 5x 2.2uF caps,

CERM603

4.7uF6.3V20%

2

1 C3109

402

20%10VCERM

0.1UF

NOSTUFF

2

1 C3110

402CERM10V20%0.1UF

2

1 C3100

402

20%10VCERM

0.1UF2

1 C3121

2.2UF20%X5R4V402

2

1 C3120

X5R

2.2UF20%

4024V2

1 C3122

402-LFCERM6.3V20%2.2UF

2

1 C3130

402-LF

6.3VCERM

20%2.2UF

2

1 C3132

402-LF

6.3VCERM

20%2.2UF

2

1 C3131

OMIT

F-RT-TH3

CRITICAL

DDR2-SODIMM-STD

109

2421

1815

196193

190187

184183

178177

172

12

171

168165

162161

156155

150149

145

9

144

139138

133132

128127

122121

7877

7271

6665

6059

5453

8

4847

4241

4039

3433

2827

321

199

112111

104103

9695

8887

118117

8281

195197

200198

110108

114

163

120

83

69

50

115

119

80

8486

116

202

201

186188

167169

146148

129131

6870

4951

2931

1113

2523

16

194192

182180

14

191189

181179

176174

160158

175173

6

159157

154152

142140

153151

143141

4

136134

126124

137135

125123

7674

19

6462

7573

6361

5856

4644

17

5755

4543

3836

2220

3735

75

185

170

147

130

67

52

26

10

79

166164

3230

113

85

106107

9193

9294

97 9899 100

89 90

105

101 102

J3101

402

0.1UF

CERM10V20%

NOSTUFF

2

1 C3111

CERM402

20%10V0.1UF

2

1 C3112

402

0.1UF

CERM10V20%

2

1 C3113

402

20%10VCERM

0.1UF

2

1 C3114

402

0.1UF

CERM10V20%

2

1 C3115


2

1 C3116


2

1 C3117

402MF-LF1/16W5%

10K 21R3103

10K5%

1/16WMF-LF402

21R3102

402MF-LF

1K1%1/16W

2

1R3100

402MF-LF1/16W

1K1%

2

1R3101

051-745576


30

01

DDR2 SO-DIMM Connector ASYNC_MASTER=MEMORY

MEM_ODT<1>

MEM_A_BS<0>MEM_A_A<10>


MEM_A_DQ<60>

MEM_A_SA1

MEM_CS_L<0>

MEM_A_A<6>

=PP1V8_S3_MEM

MEM_A_DQ<61>

MEM_CS_L<1>MEM_A_CAS_L

MEM_A_A<5>

MEM_A_BS<2>


MEM_A_DQS_P<0>

MEM_VREF_A

MEM_A_SA0

MEM_A_SA1MEM_A_SA0

MEM_A_DQ<62>

MEM_A_DM<7>

MEM_A_DQS_P<5>


MEM_A_DQS_N<6>MEM_A_DQS_P<6>

MEM_A_DQ<50>

MEM_A_DQ<57>

=PP1V8_S3_MEM

MEM_A_DQ<7>

MEM_A_A<14>

MEM_A_DQS_N<2>


MEM_A_DQ<31>

=PPSPD_S0_MEM

MEM_A_DM<6>



MEM_A_DQS_P<7>MEM_A_DQS_N<7>

MEM_A_DQ<56>

MEM_A_DQ<43>


MEM_A_DQ<36>


MEM_A_WE_L


MEM_A_A<8>MEM_A_A<9>MEM_A_A<12>



MEM_A_DQ<6>

MEM_A_DQ<11>

MEM_A_DQ<29>

MEM_A_DQ<2>

MEM_A_DQ<8>

MEM_A_DQS_N<1>

MEM_A_DQ<9>

MEM_A_DQS_P<2>

MEM_A_DQ<26>

MEM_A_DQ<13>

MEM_A_DQS_P<1>

MEM_A_DQ<10>

=PP1V8_S3M_MEM_NB

MEM_CKE<0>

MEM_A_A<13>

MEM_A_RAS_L

MEM_A_DQ<30>

VOLTAGE=0.9V

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=0.25 mm

MEM_VREF_A

MEM_A_DQ<17>

MEM_A_DQ<54>

MEM_CLK_N<1>

MEM_A_DQS_N<5>



MEM_A_DM<4>


MEM_A_DQ<58>

MEM_A_DQ<28>

MEM_A_DM<1>

MEM_A_DQ<46>

=I2C_SODIMMA_SDA


MEM_A_DM<5>

MEM_A_DQ<33>


MEM_A_DM<2>

MEM_A_DQ<19>

MEM_A_DQ<27>


=GND_CHASSIS_DIPDIMM_LEFT

MEM_A_A<4>

DIMM_OVERTEMPA_L

MEM_CLK_P<1>

MEM_A_A<15>

MEM_ODT<0>

MEM_A_DQ<24>

=I2C_SODIMMA_SCL

MEM_A_DQ<23>

MEM_A_DM<3>

MEM_A_DQ<15>

MEM_A_DM<0>

MEM_A_DQ<25>


MEM_CKE<1>

MEM_A_DQ<20>


MEM_A_DQS_N<0>

MEM_CLK_N<0>MEM_CLK_P<0>

MEM_A_DQ<3>

MEM_A_DQ<0>

MEM_A_DQ<1>

MEM_A_BS<1>


=PP1V8_S3_MEM

31D6 31D6

31D6

31D4 31D4

31D2

31D4

31B2 31B2

20C8

31B2

72D3

72D3

72D3

72D3

72D3

30D6

72D3

72D3

72D3

72D3

30D4

72D3

31A7

72D3

72D3

72D3

72D3

72D3

72D3

17D7

72D3

72D3

72D3

72D3

72D3

72D3

72D3

72D3

72D3

72D3

72D3

30D6

32D6

32C6

32C6

72D3

72D3

72D3

32D6

32C6

30B2

72D3

32D6

32B6

32C6

32C6

72D3

72D3

72C3

72D3

72C3

72C3

72D3

72D3

72C3

72C3

72D3

72D3

30B2

72D3

32C6

72C3

72D3

72D3

72D3

31A3

72C3

72D3

72D3

72D3

72D3

72C3

72C3

72D3

72D3

72D3

72D3

72D3

72D3

72D3

32B6

32C6

32C6

32C6

32C6

32C6

72D3

72D3

72D3

72D3

72D3

72D3

72D3

72C3

72D3

72C3

72D3

72D3

72C3

72D3

15D2

32D6

32C6

32B6

72D3

72D3

72D3

72D3

72C3

72D3

72D3

72D3

72D3

72C3

72D3

72D3

72D3

72D3

72C3

72D3

72D3

72D3

72C3

72D3

72C3

72C3

72C3

72D3

72D3

72C3

72C3

32C6

72D3

32D6

72D3

72D3

72C3

72D3

72C3

72D3

32C6

32C6

32D6

72D3

72D3

72D3

72C3

72D3

72D3

72D3

72D3

72D3

32C6

32C6

32C6

30D4

15C3

16D5

16B5

16B8

16B8

16A8

30A4

15D3

16B5

7B4

16A8

15D3

16D5

16B5

16D5

16C8

16C8

16C5

30D1

30A4

30A4

30A4

16A8

16C5

16C5

16B8

16B8

16C5

16C5

16B8

16B8

7B4

16D8

15C6

16C5

16C8

16C8

16C8

7C4

16C5

16B8

16B8

16A8

16B8

16C5

16C5

16B8

16B8

16B8

16B8

16B8

16B8

16B8

16B5

16C5

16B5

16B5

16B5

16B5

16D8

16D8

16D8

16C8

16C8

16D8

16C8

16C5

16C8

16C5

16C8

16C8

16C5

16C8

7A4

15D3

16B5

16B5

16C8

30D7

16C8

16B8

15D3

16C5

16B8

16B8

16B8

16C8

16C5

16B8

16B8

16B8

16C8

16D5

16B8

47D6

16B8

16B8

16C5

16C8

16C5

16C5

16C5

16C8

16C8

16C5

16C5

8D8

16B5

8B1

15D3

8B4

15C3

16C8

47D6

16C8

16C5

16C8

16D5

16C8

16B5

16B5

15D3

16C8

16C8

16C8

16C5

15D3

15D3

16D8

16D8

16D8

16D5

16C5

16B5

7B4

www.vinafix.vn

VSS10

VSS2

DQ5

SA1

SA0

VSS58

DQ63

DQ62

VSS56

DQS7

DQS7*

VSS54

DQ60

VSS52

DQ54

VSS50

VSS48

CK1*

CK1

VSS46

DQ53

DQ52

VSS44

VSS42

DQS5

DQS5*

VSS39

DQ45

DQ44

VSS37

DQ39

DQ38

VSS35

DM4

VSS34

DQ37

DQ36

VSS32

NC3

VDD11

NC/A13

ODT0

VDD9

S0*

RAS*

BA1

VDD7

A0

A2

A4

VDD5

A6

A7

A11

VDD3

NC/A14

NC/A15

VDD1

NC/CKE1

VSS30

DQ31

DQ30

VSS28

DQS3

DQS3*

VSS26

DQ29

DQ28

VSS24

DQ23

DQ22

VSS22

DM2

NC0

VSS19

DQ21

DQ20

VSS17

VSS15

DQ15

DQ14

VSS13

CK0*

CK0

VSS11

DQ13

VSS7

DQ7

VSS5

DM0

DQ4

VSS0

DM1

DQ12

DQ6

DQ47

DQ46

DQ61

DQ55

DM6

VDDSPD

SCL

SDA

VSS57

DQ59

DQ58

VSS55

DM7

VSS53

DQ56

VSS51

DQ50

VSS49

DQS6*

VSS47

NC_TEST

VSS45

DQ49

DQ48

VSS43

VSS41

DM5

VSS40

DQ41

VSS38

DQ35

VSS36

DQS4

DQS4*

VSS33

DQ33

DQ32

VSS31

NC/ODT1

VDD10

NC/S1*

CAS*

VDD8

WE*

BA0

A10/AP

VDD6

A1

A3

A5

VDD4

A8

A9

A12

VDD2

BA2

NC2

VDD0

CKE0

VSS29

DQ27

DQ26

VSS27

NC1

DM3

VSS25

DQ25

DQ24

VSS23

DQ19

DQ18

VSS21

DQS2

DQS2*

VSS18

DQ17

DQ16

VSS16

VSS14

DQ11

DQ10

VSS12

DQS1

DQS1*

DQ9

DQ8

VSS8

DQ3

DQ2

VSS6

DQS0

DQS0*

VSS4

VSS1

VREF

DQ0

DQ1

DQ34

DQ40

DQ42

DQ43

DQS6

DQ51

DQ57

KEY

VSS9

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

The 4.7uF and 1.0uF caps can be changed to 5x 2.2uF caps,

Resistor prevents pwr-gnd short

NC

when they get cheaper.

516-0135

NC

NC

NC

BOM options provided by this page:

- =I2C_MEM_SDA


- =PP1V8_S3_MEM

(See Capell Valley pg 47)to drive MCH and DIMM connectors.

DDR2 Bypass Caps

- =I2C_MEM_SCL

by another page.The reference voltage must be providedNOTE: This page does not supply VREF.

(NONE)


- =PPSPD_S0_MEM (2.5V - 3.3V)

Page Notes

Yellow uses 10K divider and TLV2463

DDR2 VREF (FOR CONNECTOR B)One 0.1uF per connector

NCNC

(For return current)

ADDR=0xA4(WR)/0xA5(RD)

DIP DIMM CONN

603

20%6.3VCERM

4.7uF2

1 C3209

0.1UF20%10VCERM402

2

1 C3200

1K1%1/16WMF-LF4022

1R3201

1%1K1/16WMF-LF4022

1R3202

NOSTUFF

0.1UF

CERM10V20%

4022

1 C3210

402X5R4V20%2.2UF

2

1 C3220

20%2.2UF

CERM6.3V402-LF

2

1 C323120%6.3VCERM

2.2UF

402-LF2

1 C3230

CERM

2.2UF20%6.3V402-LF

2

1 C3232

0.1UF20%10VCERM402

2

1 C32214V20%2.2UF

402X5R2

1 C3222 10K5%1/16WMF-LF4022

1R3200

CRITICAL

F-RT-TH3

DDR2-SODIMM-STD

OMIT

109

2421

1815

196193

190187

184183

178177

172

12

171

168165

162161

156155

150149

145

9

144

139138

133132

128127

122121

7877

7271

6665

6059

5453

8

4847

4241

4039

3433

2827

321

199

112111

104103

9695

8887

118117

8281

195197

200198

110108

114

163

120

83

69

50

115

119

80

8486

116

202

201

186188

167169

146148

129131

6870

4951

2931

1113

2523

16

194192

182180

14

191189

181179

176174

160158

175173

6

159157

154152

142140

153151

143141

4

136134

126124

137135

125123

7674

19

6462

7573

6361

5856

4644

17

5755

4543

3836

2220

3735

75

185

170

147

130

67

52

26

10

79

166164

3230

113

85

106107

9193

9294

97 9899 100

89 90

105

101 102

J3201

NOSTUFF

10V402

20%

CERM

0.1UF2

1 C3211

CERM402

0.1UF20%10V2

1 C3212

402

20%10VCERM

0.1UF2

1 C3213

10V402CERM

20%0.1UF

2

1 C3214

402

10VCERM

20%0.1UF

2

1 C321520%2.2UF6.3VCERM402-LF

2

1 C321620%2.2UF

CERM6.3V402-LF

2

1 C3217

MF-LF1/16W5%

10K

402

21R3203

DDR2 SO-DIMM Connector B

7631

01

SYNC_MASTER=MEMORY SYNC_DATE=06/20/2005

051-7455

=PP1V8_S3_MEM

MEM_B_CAS_L

=PP1V8_S3_MEM

MEM_B_WE_LMEM_B_BS<0>

MEM_B_DQ<18>MEM_B_DQ<22>

MEM_B_DQ<8>

MEM_B_DQS_N<1>

MEM_B_DQ<12>

=PPSPD_S0_MEM

MEM_B_DQS_N<5>

MEM_B_DQ<53>

MEM_B_DQS_P<5>

MEM_B_DQ<54>


MEM_B_DQS_N<7>


MEM_B_DQ<51>

MEM_B_DQS_P<7>

MEM_B_SA0

MEM_B_DQ<29>

MEM_B_DM<5>

MEM_B_DQ<40>

MEM_B_DQ<34>

MEM_B_DM<4>

MEM_B_DQ<33>

MEM_B_RAS_L

MEM_B_DQS_P<2>

MEM_B_DQ<47>

MEM_B_DQ<39>

MEM_B_DQ<32>

MEM_B_A<8>

MEM_B_A<12>

MEM_CKE<3>

MEM_B_DQ<31>

MEM_B_DM<3>

MEM_B_DQ<35>

MEM_B_DQ<45>


MEM_VREF_B

MEM_B_DQ<9>

DIMM_OVERTEMPB_L

MEM_B_A<4>


MEM_B_A<14>

MEM_B_DQ<52>

MEM_B_DM<2>

MEM_B_DQ<28>

MEM_B_DQS_N<3>

MEM_B_DQ<26>

=PPSPD_S0_MEM

MEM_B_DQ<27>

=PP1V8_S3M_MEM_NB


VOLTAGE=0.9VMEM_VREF_B

MEM_B_A<2>

=I2C_SODIMMB_SCL=I2C_SODIMMB_SDA


MEM_B_DM<7>

MEM_B_DQ<56>

MEM_B_DQ<50>

MEM_B_DQS_N<6>

MEM_B_DQ<48>

MEM_B_DQS_P<4>MEM_B_DQS_N<4>

MEM_B_DQ<38>

MEM_ODT<3>

MEM_CS_L<3>

MEM_B_A<10>

MEM_B_A<1>

MEM_B_A<9>

MEM_B_BS<2>

MEM_B_DQ<30>

MEM_B_DQ<44>

MEM_B_DQS_P<6>

MEM_B_DQ<55>

MEM_B_DQ<57>


MEM_B_DQ<17>

MEM_B_DQS_P<1>

MEM_B_DQ<20>

MEM_B_DM<0>

MEM_B_DQ<15>

MEM_B_DM<1>

MEM_CLK_P<3>MEM_CLK_N<3>

MEM_B_DQ<14>

MEM_B_DQ<21>

MEM_B_DQ<19>

MEM_B_DQ<25>

MEM_B_DQS_P<3>

MEM_B_DQ<24>

MEM_B_DQS_N<2>

MEM_B_BS<1>

MEM_CS_L<2>

MEM_B_DQ<10>

MEM_B_DQ<13>

MEM_B_DQS_P<0>MEM_B_DQS_N<0>

MEM_B_A<15>

MEM_B_DQ<23>

MEM_B_DQ<16>

MEM_CKE<4>

MEM_B_A<11>MEM_B_A<7>MEM_B_A<6>

MEM_ODT<2>MEM_B_A<13>


MEM_B_DQ<49>

MEM_B_DM<6>

=GND_CHASSIS_DIPDIMM_RIGHT

MEM_B_DQ<11>


MEM_B_DQ<0>

=PP1V8_S3_MEM

MEM_B_DQ<5>

MEM_B_A<5>MEM_B_A<3>

MEM_B_A<0>


MEM_CLK_P<4>MEM_CLK_N<4>

J3201_SA1MEM_B_SA0


31D6

31D4 31D6

31D4

31B2

30D2

31B2

30D6

30D6

20C8

30D6

30D4

72B3

30D4

72B3

72B3

31A7

72B3

72B3

72B3

72B3

72B3

72B3

31A3

17D7

72B3

72B3

72B3

72B3

72B3

72B3

72B3

72B3

72B3

72B3

72B3

72B3

72B3

72B3

72B3

30D4

72B3

72B3

72B3

30B2

32A6

30B2

32A6

32A6

72B3

72B3

72B3

72A3

72B3

30A7

72A3

72B3

72A3

72B3

72B3

72B3

72A3

72B3

72B3

72B3

72A3

72B3

72B3

72B3

72B3

72B3

72B3

32A6

72A3

72B3

72B3

72B3

32B5

32A5

32D6

72B3

72B3

72B3

72B3

72B3

72B3

72B3

32B5

72B3

72B3

32A5

72B3

72B3

72B3

72A3

72B3

30A7

72B3

15D2

32B5

72B3

72B3

72A3

72B3

72B3

72A3

72B3

72A3

72A3

72B3

32D6

32D6

32B5

32B5

32B5

32A6

72B3

72B3

72A3

72B3

72B3

72B3

72A3

72B3

72B3

72B3

72B3

72B3

72B3

72B3

72B3

72B3

72B3

72A3

72B3

72A3

32A6

32D6

72B3

72B3

72A3

72A3

72B3

72B3

32D5

32A5

32B5

32B5

32D6

32A5

72B3

72B3

72B3

72A3

72B3

72B3

72B3

72B3

30B2

72B3

32B5

32B5

32B5

72B3

72B3

72B3

72B3

72B3

72B3

7B4

16D1

7B4

16B1

16D1

16C4

16C4

16C4

16C1

16C4

7C4

16C1

16B4

16C1

16B4

16B4

16B4

16C1

16A4

16A4

16B4

16C1

31A4

16C4

16C1

16B4

16B4

16C1

16C4

16B1

16C1

16B4

16B4

16C4

16B1

16B1

15D3

16C4

16C1

16B4

16B4

16D4

16D4

31D1

16C4

8B1

16B1

16B4

16B4

15C6

16B4

16C1

16C4

16C1

16C4

7C4

16C4

7A4

31D7

16B1

47C6

47C6

16A4

16A4

16C1

16B4

16B4

16C1

16B4

16C1

16C1

16B4

15C3

15C3

16B1

16C1

16B1

16D1

16C4

16B4

16C1

16B4

16B4

16C4

16C1

16C4

16D1

16C4

16D1

15D3

15D3

16C4

16C4

16C4

16C4

16C1

16C4

16C1

16D1

15D3

16C4

16C4

16C1

16C1

8B4

16C4

16C4

15D3

16B1

16B1

16B1

15C3

16B1

16B4

16B4

16B4

16C1

16C4

16D4

16D4

16D4

7B4

16D4

16B1

16B1

16C1

16B4

16B4

15D3

15D3

31A3

16D4

16D4

www.vinafix.vn

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

One cap for each side of every RPAK, one cap for every two discrete resistors

LAYOUT NOTE:PLACE ONE CAP CLOSE TO EVERY TWO PULLUP RESISTORS TERMINATED TO PP0V9_S0_MEM_TERM

BOMOPTION shown at the top of each group applies to every part below it

5% 402MF-LF1/16W56 21R3301

5% MF-LF40256

1/16W21R3309

1/16W5% MF-LF40256 21R3311

MF-LF56

1/16W5% 40221R3325

MF-LF1/16W56

4025%21R3335

0

2

1

16D1 31B6 72B3

16B1 31B4 72B3

16D1 31B4 31B6 31C6 72B3

16B1 31B6 72B3

5% 1/16WSM-LF56 63RP3300

1/16W5% SM-LF56 54RP3300

1/16W5%56

SM-LF81RP3300

1/16W56

SM-LF5%72RP3300

5% 1/16WSM-LF56 72RP3301

5%56

SM-LF1/16W81RP3301

1/16WSM-LF56

5%54RP3301

1/16W5% SM-LF56 63RP3301

5% 1/16W56

SM-LF54RP3302

5%56

1/16WSM-LF81RP3302

SM-LF56

1/16W5%63RP3302 SM-LF

561/16W5%

72RP3302

1/16W56

SM-LF5%81RP3303

1/16WSM-LF5%56 72RP3303

SM-LF1/16W56

5%63RP3303

1/16W56

5% SM-LF54RP3303

1/16W56

5% SM-LF81RP3304

SM-LF5% 1/16W56 63RP3304

1/16WSM-LF5%56 54RP3304

561/16W5% SM-LF

81RP3305

1/16W56

SM-LF5%72RP3305

SM-LF1/16W5%56 63RP3305

1/16WSM-LF5%56 54RP3305

SM-LF5% 1/16W56 72RP3306

1/16WSM-LF56

5%63RP3306

1/16W56

5% SM-LF54RP3307

1/16W5% SM-LF56 63RP3307

1/16W5%56

SM-LF72RP3307

1/16W5% SM-LF56 81RP3307

1/16W5% SM-LF56 54RP3308

1/16W5%56

SM-LF63RP3308

1/16W5%56

SM-LF72RP3308

1/16W5% SM-LF56 81RP3308

SM-LF5% 1/16W56 81RP3309

1/16WSM-LF5%56 72RP3309

1/16W5% SM-LF56 63RP3309 1/16W5%56

SM-LF54RP3309

5% 1/16W56

SM-LF63RP3310

561/16W5% SM-LF

72RP3310

1/16WSM-LF5%56 81RP3310

1/16WSM-LF5%56 54RP3310

1/16W56

5% SM-LF81RP3311

5% 1/16W56

SM-LF72RP3311

SM-LF1/16W56

5%54RP3311

1/16W5% SM-LF56 54RP3306

5% 1/16W56

SM-LF63RP3311

16C1 31B4 72B3

16B1 31B6 72B3

16B1 31B4 72B3

16B1 31B6 72B3

16B1 31B4 72B3

16B1 31B6 72B3

16B1 31C4 72B3

16B1 31C4 72B3

16B1 31C6 72B3

16B1 31C6 72B3

16C1 31B6 72B3

16B1 31C4 72B3

16B1 31C6 72B3

16B1 31B4 72B3

0.1UF

CERM10V20%

4022

1 C3300

402

20%10VCERM

0.1UF

2

1 C3301

0.1UF

CERM10V20%

4022

1 C3302

402

20%10VCERM

0.1UF

2

1 C3303

0.1UF

CERM10V20%

4022

1 C3304

402

20%10VCERM

0.1UF

2

1 C3305

0.1UF

CERM10V20%

4022

1 C330620%10VCERM

0.1UF

4022

1 C3307

20%0.1UF

CERM402

10V2

1 C3308

402

20%10VCERM

0.1UF

2

1 C3309

0.1UF

CERM10V20%

4022

1 C3310

402

20%10VCERM

0.1UF2

1 C3311

402CERM10V

0.1UF20%

2

1 C3312

402

20%10VCERM

0.1UF2

1 C3313

CERM

0.1UF10V20%

4022

1 C3314

402

20%10VCERM

0.1UF

2

1 C3315

CERM10V20%

402

0.1UF

2

1 C3316

402

20%10VCERM

0.1UF

2

1 C3317

0.1UF

CERM10V20%

4022

1 C3318

402

20%10VCERM

0.1UF

2

1 C3319

0.1UF

CERM10V20%

4022

1 C3320

402

20%10VCERM

0.1UF

2

1 C3321

0.1UF

CERM10V20%

4022

1 C3322

402

20%10VCERM

0.1UF

2

1 C3323

0.1UF

CERM10V20%

4022

1 C33240.1UF

CERM10V20%

4022

1 C3325

15D3 30C4 72D3

15D3 31C6 72B3

15D3 31C4 72B3

14

SM-LF56

5% 1/16W72RP3304

SM-LF5% 1/16W56 81RP3306

4021/16W5% MF-LF56 21R3327

0

1

1

0

2

0

1

2

3

4

5

6

7

10

11

9

8

13

12

15C3 15D3 30B4 30B6 31B4 31B6 72B3 72D3

15D3 30C6 72D3

15C6 16B5 16C5 30B4 30B6 30C4 30C6 72D3

16D5 30B4 30B6 30C6 72D3

16B5 30B4 72D3

16D5 30B6 72D3

16B5 30B6 72D3

2

3

0

1

2

3

15C3 30B4 30B6 31B4 31B6 72B3 72D3

051-745532

Memory Active Termination

76

01

MEM_ODT<3..0>

MEM_CS_L<3..0>

MEM_A_A<14..0>

MEM_A_BS<2..0>

MEM_B_BS<2..0>



MEM_A_RAS_L

MEM_A_WE_L

MEM_B_RAS_L

MEM_B_WE_LMEM_B_CAS_L

MEM_A_CAS_L


MEM_CKE<0>MEM_CKE<1>MEM_CKE<3>MEM_CKE<4>

=PP0V9_S3M_MEM_TERM

MEM_B_A<1>MEM_B_A<9>MEM_B_A<8>MEM_B_A<7>MEM_B_A<6>MEM_B_A<5>MEM_B_A<4>MEM_B_A<10>MEM_B_A<2>

7D7

www.vinafix.vn

OUT

D

SG

D

SG

D

SG

D

SG

IN

IN

OUT

OUT

IO

IO

IN

IN

OUT

IO

IO

IN

KEY

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

AIRPORT CONN

SB HAS INTERNAL 15K PULL-DOWNS

CONNECT TO M35 MODULE

Plexi: 516S0363

PLACE CAPS < 250 MILS FROM (U2100) SB

ICH8 GPIO42

* Enclosure: 516S0406

10VCERM

20%

402

0.1UF

2

1 C3406

402

20%10V

0.1UF

CERM2

1 C3408

CERM

20%0.1UF10V

4022

1 C3407

MF-LF0

1/8W 8055%

NOSTUFF

2 1

R3403

SSM6N15FESOT563

12

6Q3402SSM6N15FE

SOT563

45

3Q3402

5%

100K

402

MF-LF

1/16W

21R3404

402MF-LF1/16W5%

10K2 1R3405

10%

402X5R16V0.033UF

2

1 C3411

FDC638PSM-LF

CRITICAL

4

3

6521

Q3401

SSM6N15FESOT563

12

6Q3403

SSM6N15FESOT563

45

3Q3403

40216V

10%

0.01UF

NOSTUFF

CERM

21

C3412

5%

1/16W

MF-LF

402

100K 2

1R3406

0.1UF20%

402CERM10V2

1 C3410

603

6.3VX5R

20%10UF

2

1 C3409

CERM20%

0.1UF40210V

21C3400

402

20%10VCERM

0.1UF

2

1 C3404

CK505_SRC_CLKREQ6_L

1/16W5%

402MF-LF

021

R3401

5%1/16W

MF-LF402

021

R3402

F-ST-SM

CRITICAL

AS0B22-S45N-7F

9876

525150

5

49484746454443424140

4

39383736353433323130

3

29282726252423222120

2

1918171615

1413121110

1

54

53

J3400

20%402CERM10V

0.1UF21

C3401

CERM402

10V20%0.1UF

2

1 C3405

051-74557633

01

PM_WLAN_EN_L2

PM_WLAN_EN_L1

WOW_EN

SMC_ADAPTER_EN

=PP3V3_S5_AIRPORT_AUX

PM_WLAN_EN_L

SB_GPIO42

PCIE_E_D2R_NMAKE_BASE=TRUE

MAKE_BASE=TRUEPCIE_E_R2D_C_N

PCIE_MINI_R2D_C_P

PM_SLP_S3_L


PCIE_MINI_R2D_C_N

PCIE_MINI_D2R_N

PCIE_MINI_D2R_P


MAKE_BASE=TRUEPCIE_E_D2R_P

PCIE_E_R2D_C_PMAKE_BASE=TRUE

WOW_ENMAKE_BASE=TRUE

PCIE_E_R2D_C_N

PM_S4_STATE_L

PCIE_E_R2D_C_P=SMB_AIRPORT_DATA

=SMB_AIRPORT_CLK

=USB2_AIRPORT_N

SMB_AIRPORT_CONN_DATA

=USB2_AIRPORT_P

PCIE_E_D2R_N

PCIE_E_R2D_PPCIE_E_R2D_N

SMB_AIRPORT_CONN_CLK

PCIE_CLK100M_MINI_PPCIE_CLK100M_MINI_N

PCIE_WAKE_L

PCIE_E_D2R_P

=PP3V3_S0_AIRPORT

AIRPORT_RST_L



PM_WLAN_EN_L_SS

=PP1V5_S0_AIRPORTPP3V3_S3_AP_AUX


57C4

62B8

45B3

58B7

44D5

45A6

65C4

38C6

33D7

44C5

33D6

33D7

65A6

35C7

33C7

74B3

74C3

35C7

33C7

33D6

74C3

74C3

74C3

44C5

74C3

74B3

75B3

75A3

34B8

74C3

28B4 33B5

6C1

7C1

23C8

33C5

33B6

23C5

24D3

7C1

23C5

23D5

23C5

7C1

33B5

33B6

33C7

33B5

24D3

33B5 47C3

47C3

8C2

8C2

33B5

29C3

29B3

24C8

33B5

7D4

27D1

7A4

7B7

www.vinafix.vn

BI

BI

BI

BI

BI

BI

BI

BI

OUT

OUT

IN

IN

IN

OUT

OUT

IN

IN

THRML_PAD

VDDO_TTL1

VMAIN_AVLBL

SWITCH_VAUXVAUX_AVLBL

LED_DUPLEX*

RSVD_43

RSVD_29RSVD_25

RSVD_24

NC_64

CTRL12

NC_57

NC_52

NC_51

NC_32

RSET

SWITCH_VCC

AVDDH

AVDD0

AVDD3

VDDO_TTL3

LOM_DISABLE*

VDD0

VDD1

VDD3

VDD4

TX_P

CTRL18

TESTMODE

VDD2

VDD5

VDD7

CLKREQ*

WAKE*

PERST*

MDIP0

MDIP1MDIN1

MDIP2MDIN2

MDIP3

XTALI

MDIN3

XTALO

REFCLKP

REFCLKN

RX_N

RX_P

SPI_DO

SPI_CLK

SPI_CS

VPD_DATA

VPD_CLK

TX_N

MDIN0

AVDD1

LED_LINK1000*

VDD6

VDDO_TTL2

VDDO_TTL0

LED_ACT*LED_LINK10/100*

AVDD2

SPI_DI

ANALOGPCI EXPRESS

SPI

LED

TWSIMEDIA

MAIN CLK

TEST/RSVD

IN

OUT

OUT

E2

WC*

NC0NC1

VCC

VSS

SCL

SDA

DESCRIPTION REFERENCE DES BOM OPTIONQTYPART NUMBER CRITICAL

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

NC

To support Yukon EC and Ultra on the same board:- Alias =YUKON_EC_PP2V5_ENET to PP1V8R2V5_ENET_PHY_AVDD, add 1x 0.1uF and 1x 0.001uF caps- Use 0-ohm resistors or variable supply to provide 1.8V or 2.5V to =PP1V8R2V5_ENET_PHY

NC

EC:NO CONNECT

Power aliases required by this page:- =PP3V3_ENET_PHY

(2.5V / 1.8V) Yukon EC

No link: 171 mA No link: 130 mA

Yukon Ultra

NC

Page Notes

1000 Mbps: 4 mA

100 Mbps: 40 mA

- Connect =ENET_CLKREQ_L to clock generator via 0-ohm resistor (BOMOPTION: YUKON_ULTRA)

10 Mbps: 179 mA 10 Mbps: 130 mA

No link: 60 mA

Yukon EC (2.5V)

1000 Mbps: 150 mA

Yukon Ultra

- =PP1V2_ENET_PHY

(EC / Ultra)

(2.5V / GND)

NC

NCNCNC

NCNCNCNC

(IPD)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

(IPU)

EC:CTRL25

NC

NCNC

NCNCNC

EC:AVDD 2.5V

NC

VPD ROM

Yukon EC

100 Mbps: 150 mA

- =YUKON_EC_PP2V5_ENET

Must be high in S0 state (can use PP3V3_S0 as input)

10 Mbps: 108 mA100 Mbps: 126 mA1000 Mbps: 218 mA

No link: 82 mA(EC:2.5V)

NOTE: Yukon IC and EEPROM are OMITted

must be called out elsewhere.

- =ENET_VMAIN_AVLBL

on this page. Proper part numbers

instructions for dual Yukon EC / Yukon Ultra schematic support.

NOTE: See bottom of page for

- Use YUKON_EC and YUKON_ULTRA BOMOPTIONs to select stuffed part

If characterization shows eye height is too small, make R3765 smaller

16pF

No link: 4 mA

Signal aliases required by this page:- =ENET_CLKREQ_L (NC/TP for Yukon EC)

BOM options provided by this page:YUKON_EC - Selects Yukon EC RSET value.YUKON_ULTRA - Selects Yukon Ultra RSET.

10 Mbps: 4 mA100 Mbps: 4 mA

Yukon EC: Pin 42 should be NC (or TP) net.

Yukon Ultra: Alias to GNDYukon EC: Alias to PP1V8R2V5_ENET_PHY_AVDD, add 1x 0.1uF & 1x 0.001uF caps

10 Mbps: 30 mANo link: 0 mA

Yukon Ultra (1.8V)



- =PP1V8R2V5_ENET_PHY

402

15PF5%50VCERM2

1 C3751

402MF-LF1/16W

SIGNAL_MODEL=EMPTY

1%49.9

2

1R3740

402

49.91%

MF-LF1/16W

SIGNAL_MODEL=EMPTY

2

1R3741

36B7 74B3

36B7 74B3

36C7 74B3

36C7 74B3

36B7 74B3

36C7 74B3

36C7 74B3

36C7 74B3

23C5

23C5

0.001UF50VCERM402

10%2

1 C37400.001UF50VCERM402

10%2

1 C37420.001UF50VCERM402

10%2

1 C37440.001UF50VCERM402

10%2

1 C3746

402

1%49.9

MF-LF1/16W

SIGNAL_MODEL=EMPTY

2

1R3742

402

49.91%

MF-LF1/16W

SIGNAL_MODEL=EMPTY

2

1R37431%

1/16WMF-LF402

SIGNAL_MODEL=EMPTY

49.9

2

1R3747

402MF-LF1/16W

SIGNAL_MODEL=EMPTY

1%49.9

2

1R3746

402MF-LF1/16W

SIGNAL_MODEL=EMPTY

1%49.9

2

1R3745

402MF-LF1/16W

SIGNAL_MODEL=EMPTY

1%49.9

2

1R3744

40216V0.1UF X5R10%21C3735

40216V0.1UF X5R10%21C3736

PLACEMENT_NOTE=Place C3730 close to southbridge.

40216V0.1UF X5R10%21C3730

40216V0.1UF 10% X5R

PLACEMENT_NOTE=Place C3731 close to southbridge.

21C3731

23C5

23C5

27C1

24C8 33C5

8C4 28A4

29B3

29B3

QFN

CRITICAL

88E8058

14

15

6

41

38

47

61

45

40

1 58

48

44

39

33

13

72

12

49

50

65

46

11

9

34

35

36

37

54

53

43

29

25

24

16

55

56

5

64

57

52

51

32

30

26

20

17

31

27

21

18

10

60

62

63

59

4

3

42

828

23

22

19

U37008A3

402MF-LF1/16W1%4.99K

YUKON_ULTRA

2

1R3765

CERM6.3V20%

4.7UF

6032

1C3720

CERM603

4.7UF6.3V20%

2

1C3710

402

16V

0.1UF10%

X5R2

1 C3701

603

4.7UF20%6.3VCERM 2

1C37000.001UF50VCERM402

10%2

1 C3706

SO8M24C08

OMIT

CRITICAL

7

4

8

5

6

2

1

3

U3780

402

16VX5R

10%0.1UF

2

1 C3780

402MF-LF1/16W

4.7K5%

2

1R3780

402MF-LF1/16W

4.7K5%

2

1R3781

402MF-LF1/16W

4.7K5%

2

1R3760

0402-LF

FERR-120-OHM-1.5A21

L3720

402

10%

X5R

0.1UF16V2

1 C3702

402

16V

0.1UF10%

X5R2

1 C3703

402X5R

10%0.1UF16V2

1 C3704

402X5R

10%0.1UF16V2

1 C37050.001UF50VCERM

10%

4022

1 C37070.001UF50VCERM

10%

4022

1 C3708

402X5R

10%0.1UF16V2

1 C3711

402

16V

0.1UF10%

X5R2

1 C3712

402

16V

0.1UF10%

X5R2

1 C37130.001UF50VCERM

10%

4022

1 C37140.001UF50VCERM402

10%2

1 C3715

402

16V

0.1UF10%

X5R2

1 C3721

402X5R

10%0.1UF16V2

1 C3722

402X5R

10%0.1UF16V2

1 C37230.001UF50VCERM402

10%2

1 C3724

SM-3.2X2.5MM25.0000M

CRITICAL

3 1

4 2

Y3750

402

15PF5%50VCERM 2

1C3750

RES,4.87K,1%,1/16W,0402,LF R3760 YUKON_EC1114S0285

051-745534

SYNC_DATE=10/07/2006SYNC_MASTER=USB

01

76

Ethernet (Yukon)

ENET_CLK25M_XTALI

ENET_MDI_N<1>

ENET_MDI_P<2>

ENET_MDI_N<3>ENET_MDI_P<3>

ENET_CLK25M_XTALO

ENET_MDI3

ENET_MDI_P<0>ENET_MDI_N<0>

=ENET_VMAIN_AVLBLPCIE_ENET_R2D_C_N

PCIE_ENET_R2D_C_P

PCIE_ENET_D2R_N

YUKON_VPD_CLK

ENET_MDI2ENET_MDI1ENET_MDI0

ENET_LOM_DIS_L

YUKON_RSET

TP_YUKON_CTRL12TP_YUKON_CTRL18

YUKON_VPD_DATA

PCIE_ENET_D2R_P

=PP1V8R2V5_ENET_PHY

=ENET_CLKREQ_L

=PP1V2_ENET_PHY

=PP3V3_ENET_PHY

MIN_LINE_WIDTH=0.4 mmPP1V8R2V5_ENET_PHY_AVDDMIN_NECK_WIDTH=0.22 mmVOLTAGE=1.8V

=YUKON_EC_PP2V5_ENET

PCIE_ENET_D2R_C_PPCIE_ENET_D2R_C_N

PCIE_ENET_R2D_PPCIE_ENET_R2D_N

PCIE_CLK100M_ENET_PPCIE_CLK100M_ENET_N

PCIE_WAKE_L

ENET_RESET_L

ENET_MDI_P<1>

ENET_MDI_N<2>

7B3

7B5

7B5

8A4

www.vinafix.vn

GND

OUT1IN1IN0

EN FB

PAD

OUT0

NC0

NC2NC1

THRML

D

SG

D

SG

THRM_PAD NC

IN1

ENIN2

OUT1OUT2NR/FB

GND

D

SG

D

SG

G

DS

IN

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

0.085ohm1.8A

Powered by S3

"ENET" = "S0" || AC

1.9V ENET LDO

NC

High (3.3V)

Low (0V)

S5 on anything

High (3.3V)

Low (0V)

AC

Power

S0 on Battery

S3 on Battery

S0 on AC

S3 on AC

High (3.3V)

High (3.3V)

Low (0V)

Yukon Power

N/A

Low (0V)

Power

Low (0V)

Low (0V)

N/A

PM_ENET_EN_L

N/AN/A

Name

Logic S0

High (3.3V) Power

Power

PM_SLP_S3_L

High (3.3V)

Low (0V)

High (3.3V)

High (3.3V)

PM_ENET_EN

No Power

1.2V ENET LDO

Vout = 1.2246V * (1 + R3821 / R3822)

ENET Enable Generation

Low (0V)

SMC_ADAPTER_EN

3.3V ENET FET

603

4.7UF20%6.3VX5R2

1 C3832MF-LF1/16W5.11K1%

4022

1R3830

402MF-LF1/16W1%3.65K

2

1R3831

SOP

CRITICAL

MAX8516

11

98

1054

32

6

71

U3830

X5R6.3V603

4.7UF20%

2

1 C383120%

805

22UF6.3VCERM2

1 C3830

SOT563SSM6N15FE

45

3Q3801

SSM6N15FESOT563

12

6Q3801

CRITICALSON

LREG_TPS79501DRB

9

43

5

7

21

6

8

U3820

16.9K1%1/16WMF-LF4022

1R3821

30.1K

402MF-LF1/16W1%

2

1R3822 603X5R20%10UF6.3V2

1 C38231UF10%6.3VCERM402

2

1 C3820

27PF50V

4025%CERM 2

1C3822

1/16WMF-LF

15K

402

5%

2

1R3823

5%33KMF-LF4021/16W

2

1R3824

402

5%100K1/16WMF-LF

2

1R3832

SOT563SSM6N15FE

12

6Q38025%1/16W

402MF-LF

100K

2

1R3802

SOT563SSM6N15FE

45

3Q3802

MF-LF5%

1/16W

10K

402

21

R3810

402CERM

0.01UF

16V10%

NOSTUFF

2 1

C3810

CRITICAL

SOT-23NTR4101P

2

1

3

Q3810

402X5R

10%0.033UF16V2

1 C3811

MF-LF

100K5%1/16W

4022

1R3801

24D3 33C7 44C5 45A6 58B7 62B8

6C1 33C7 38C6 44D5 45B3 57C4

Yukon Power Control

76

01051-7455

SYNC_MASTER=USB SYNC_DATE=10/07/2006

35

P3V3ENET_SS

=PP3V3_S3_ENETPWRCTLPP3V3_ENET_FET

PP1V2_ENET_EN

PM_ENET_EN_L


PP3V3_ENET_FET

=PP1V9_ENET_REG

PP1V2_S3_FB

=PP1V2_ENET_REG

PP1V2_ENET_EN

PP1V9_S3_FB


PP1V9_ENET_EN

=PP1V9_ENET_REG

=PP3V3_S5_SB

PM_SLP_S3_L

PM_ENET_EN_L

SMC_ADAPTER_EN

PM_ENET_WOL_EN_L

WOL_EN

26D8 24A8

35D4

35D4

35D1

35B2

24A3

7A4

7B6

35B3

35C6

7B4

7B6

7B4

7B6

35B2

7A4 7B4

7D1

35A3

24B3

www.vinafix.vn

SYM_VER-1

IO

IO

IO

IO

IO

IO

IO

IO

OUT

RX

TX

RX

TX



DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

TABLE_5_ITEM

PLACE C3911 AND C3912ON EACH SIDE OF J3900

PLACE ONE PAIR OF CAPS AT EACH PIN 3 AND 6 OF TRANSFORMERS

ETHERNET CONNECTOR

514-0443

NEED FANCY TH RJ45 PART NUMBER

05% MF-LF4021/16W

21R3911

402MF-LF1/16W5%021

R3910

4021/16W5%0

MF-LF21

R3909

MF-LF5%1/16W0402

21R3908

5% 4021/16W MF-LF021R3907

MF-LF1/16W5% 402021

R3906

402MF-LF1/16W5%021

R3905

402MF-LF1/16W5%021

R3904

OMITCRITICAL

F-RT-THRJ45-M71

87654321

9

10

J3900

0.1UF10%

402

16VX5R2

1 C3902

402

16V

0.1UF10%

X5R2

1 C3900

402

0.1UF

X5R16V10%

2

1 C3901

402

16VX5R

10%0.1UF

2

1 C3903

4021/16W1%75

MF-LF21

R3900402MF-LF1%

751/16W

21R3901

4021%75

MF-LF1/16W21

R3902MF-LF1%

754021/16W

21R3903

10%

402

0.001UF50VCERM2

1 C390410%

402CERM50V

0.001UF2

1 C390510%

402

0.001UF50VCERM2

1 C390610%

402

0.001UF50VCERM2

1 C3907

1206

10%2KVCERM

1000PF

CRITICAL

2

1 C3910

10%

402

0.001UF50VCERM2

1 C391110%

402

0.001UF50VCERM2

1 C3912

0402-LF

FERR-120-OHM-1.5A21

L3950

SM

CRITICAL

TLA-6T213LF9

8

76

5

4

3

2

12

11

10

1T3902

CRITICAL

SM

TLA-6T213LF9

8

76

5

4

3

2

12

11

10

1T3901

ETHERNET CONNECTORSYNC_DATE=09/14/2006SYNC_MASTER=USB

36

01051-745576

1 CRITICALFANCYJ3900514-0443 CONN,8P RJ-45 JACK,TH,BLACK,LF

J39001 CRITICALNORMAL514-0443 CONN,8P RJ-45 JACK,TH,MG3,LF

=PP1V8_S0_YUKON

ENET_MDI_P<0>

ENET_MDI_N<0>

ENET_MDI_N<2>

ENET_MDI_P<3>

ENET_MDI_N<3>

ENET_MDI_R_P<0>

ENET_MDI_R_N<0>

ENET_CENTER_TAP<2>

ENET_CENTER_TAP<3>

ENET_MDI_P<1>

ENET_MDI_N<1>

ENET_CENTER_TAP<1>

ENET_MDI_R_P<3>

ENET_MDI_R_P<1>

ENET_MDI_R_N<3>

ENET_MDI_P<2>

ENET_MDI_R_N<2>

ENET_MDI_R_P<2>

ENET_MDI_R_N<1>

PP1V8_S0_YUKON_AVDD

ENET_CENTER_TAP<0>

MIN_LINE_WIDTH=0.6MMENET_BOB_SMITH_CAPMIN_NECK_WIDTH=0.25MM

ENET_MDI_TRAN_P<3>

ENET_MDI_TRAN_N<3>

ENET_MDI_TRAN_N<1>

ENET_MDI_TRAN_P<2>

ENET_MDI_TRAN_N<2>

ENET_MDI_TRAN_N<0>

ENET_MDI_TRAN_P<1>

ENET_MDI_TRAN_P<0>

=GND_CHASSIS_RJ45

74B3

74B3

74B3

74B3

74B3

74B3

74B3

74B3

7B3

34B8

34B8

34B8

34B8

34B8

34B8

34B8

34B8

8C8

www.vinafix.vn

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

OUT

IN

IN

OUT

OUT

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

IO

MPCI_ACTN_323

TPB0_P

TPBIAS0

PCI_AD12

RESET*

TPBIAS2

PCI_RST*

PCI_INTA*

PCI_PME*

PCI_AD21

PCI_AD31

XO

XI

R1

R0

TPA0_N

TPA0_P

TPB0_N

TPBIAS1

TPA1_P

TPB1_P

TPA1_N

TPA2_PTPA2_N

TPB2_P

TPB2_N

MODE_A

MODE_420

TEST0

TEST1PTEST

SE

SM

VSS21

VSS22

VSS20

VSS18

VSS19

VSS16

VSS15

VSS17

VSS13

VSS14

VSS12

VSS11

VSS10

VSS9

VSS8

VSS7

VSS6

VSS5

VSS4

VSS3

VSS2

VSS1

VSS0

VSSA0

VSSA1

VSSA3

VSSA4

VSSA2

VDDA4

VDDA5

VDDA3

VDDA2

VDDA1

VDDA0

VDD0

VDD2

VDD1

VDD3

VDD4

VDD7

VDD9

PCI_VIOS

PCI_AD0

PCI_AD2

PCI_AD4

PCI_AD5

PCI_AD3

PCI_AD6

PCI_AD9

PCI_AD10

PCI_AD8

PCI_AD11

PCI_AD14PCI_AD15

PCI_AD13

PCI_AD16PCI_AD17

PCI_AD18

PCI_AD19PCI_AD20

PCI_AD23PCI_AD22

PCI_AD25

PCI_AD28

PCI_AD26

PCI_AD29

PCI_AD30

PCI_CBE2*

PCI_CBE1*

PCI_CBE0*

PCI_CBE3*

PCI_PAR

PCI_FRAME*PCI_IRDY*

PCI_TRDY*

PCI_DEVSEL*PCI_STOP*

PCI_IDSEL

PCI_REQ*

PCI_GNT*PCI_PERR*

PCI_SERR*

PCI_CLKCLKRUN*

VDD5

PCI_AD27

PCI_AD24

VDD6

PCI_AD1

TPB1_N

PC0

PC2

CONTENDER

CARDBUSN

PCI_AD7

PC1

IO

IO

IO

IO

IO

IO

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

LOW = NOT BUS MANAGERLOW = PCI OPERATION

PCI_GNT3_L - PCI GRANT FROM SB

PCI_AD<0..31>,PCI_C_BE_L<0..3>,PCI_FRAME_L,PCI_IRDY_L,PCI_TRDY_L,

6/21/2005 - CHANGED REQ/GNT TO REQ3/GNT3 (PER ARCHITECTURAL DEFINITION)

MANUFACTURING TEST PINS

SPEC RECOMMENDS 2.49K

SINGLE PORT DEVICES ARE POWER CLASS 0 (’000’)DUAL PORT DEVICES ARE POWER CLASS 4 (’100’)

6/22/2005 - CHANGED CLK,PME,DIFF PAIR NAMES TO BE RE-USE COMPLIANT

INPUT=PP3V3_S0_FW - 3.3V POWER FOR FIREWIRE (MOBILE: OFF DURING SLEEP)=PP3V3_S0_PCI - 3.3V POWER FOR PCI FIREWIRE (MOBILE: OFF DURING SLEEP)

MOBILE TURNS OFF CONTROLLER POWER DURING SLEEP0.001A DURING SLEEP

PLACE ONE CAP PER TWO PINS STARTING WITH C4024 ON VDD0

PLACE ONE CAP PER TWO PINS STARTING WITH C4016 ON VDDA0

197S0030 3.2MMX2.5MM6/22/2005 - BRING OUT PC0 CONNECTION TO BE CONNECTED ON PORT PAGE

FW_B_TPA_P/N, FW_B_TPB_P/N, FW_B_TPBIAS - PORT 1 FIREWIRE DIFF PAIRS

MODE FOR EXTERNAL LINK

NEED TO CHECK CRYSTAL LOAD CAPACITANCE

PAGE HISTORY

OUTPUT

6/22/2005 - REMOVED C4421 - REDUNDANT

FW_C_TPA_P/N, FW_C_TPB_P/N, FW_C_TPBIAS - PORT 2 FIREWIRE DIFF PAIRS

INPUT/OUTPUT

PM_CLKRUN_L - CLOCK-RUN PCI PROTOCOLPCI_REQ3_L - PCI REQUEST TO SB

PCI_RST_L - PCI RESET FROM SB

PCI_PME_FW_L - DEDICATED PME FOR FIREWIRE (SB GPIO1)INT_PIRQD_L - INTERRUPT TO SB

6/22/2005 - REMOVED CONSTRAINT SETS AS THEY WILL BE MANAGED ON BOARD SIDE6/22/2005 - ADDED 510K PULL-DOWN ON RST* AND REMOVED CONNECTION TO PLT_RST_L 6/21/2005 - CHANGED PCI_ID TO AD19 (PER ARCHITECTURAL DEFINITION)6/20/2005 - BGA VERSION OF FW323-06 ADDED

FW_A_TPA_P/N, FW_A_TPB_P/N, FW_A_TPBIAS - PORT 0 FIREWIRE DIFF PAIRS

6/21/2005 - CHANGED INT* TO INT_PIRQD_L (PER ARCHITECTURAL DEFINITION)5/19/2005 - FIRST REVISION OF PAGE

7/26/2005 - CONNECTED PIN E10 TO GND

THIS IS FROM ICH-8

PLACE R4032 VERY CLOSE TO SB

CONNECT TO VDD FOR 3.3V OPERATION

PCI_DEVSEL_L, PCI_STOP_L, PCI_PAR, PCI_PERR_L, PCI_SERR_L

FW_PC0 - FIREWIRE POWER CLASS IDENTIFIER

PCI_CLK_FW - NEED TO REFERENCE TO ALIAS PAGE

PAGE NOTES

6.3V20%

603X5R

10UF2

1C4016

402

2.1K1/16WMF-LF1%

2

1R4052

0.1UFCERM10V20%

4022

1C4018

0.1UF10%X5R16V402

2

1C40290.1UFX5R10%16V402

2

1C40250.1UFX5R10%16V402

2

1C4017

0.1UFX5R10%16V402

2

1C4020

5%

390

4021/16WMF-LF

21R4000

6.3V20%

603X5R

10UF2

1 C4024

0402

600-OHM-300MA21

L4000

CRITICAL

BGAFW32306 B5

A5

D5

D7

D9

E9

E13

F8

F7

F6

F4

E5

E4

D4

N13K9

K8

C3

J10J9

J5

H8

H7

H6

G8

G7

G6

G1

B2

A1

D6A8A7B13

A13

D10

A2

H13

L13

K7K6K5N2N1G4

C13

D8

B8

D13D12

B12A12

B10A10

C11C12

A11B11

A9B9

C1C2

B3A3

B4

A6

B7

A4

G13

N7

M7

N9

F1

E2

F2

M8

N10

M6

D2

L2

E1

N6

N8

G2

L1L3M9

K12

M13L12K10K13J12J13

H1H4

H12

H2J1J2K1J4K2M1K4N3M2

H10

M3N4N5M4

N11M10N12M11M12L11

G10F10

F12F13E12

E10

B6M5

G12

D1

B1

U4000

510K5%MF-LF1/16W4022

1R4020

4021/16WMF-LF1%

100 21R4032

402

20%10VCERM

0.1UF2

1C40220.1UFCERM10V20%

4022

1C4026

402

20%10VCERM

0.1UF2

1C40280.1UFCERM10V20%

4022

1C4030

402

20%10VCERM

0.1UF2

1C4032

1/16WMF-LF5%47

4022

1R4037

1/16WMF-LF5%47

4022

1R4035

1/16WMF-LF5%47

4022

1R4034

1/16WMF-LF5%47

4022

1R40331/16WMF-LF5%47

4022

1R4036

225%

MF-LF1/16W

4022

1R4031

CRITICAL

24.576MHZSM-3.2X2.5MM

31

42

Y4003

5%15PFCERM50V402

2

1C40115%15PFCERM50V402

2

1C4012

051-745537

SYNC_MASTER=ENET

76

01

SYNC_DATE=08/30/2005FIREWIRE CONTROLLER

=PP3V3_S3_FW

FW_TEST1

FW_SM

FW_TEST0

FW_SE

PCI_AD<13>

FW_PTEST

FW_PC0

FW_PWRON_RST_L

FW_XI

FW_XO

FW_R1

FW_B_TPBIAS

PM_CLKRUN_L

PCI_PERR_LPCI_FW_GNT_L

FW_PCI_IDSEL

PCI_AD<10>PCI_AD<9>PCI_AD<8>

PCI_AD<6>

PCI_AD<1>PCI_AD<0>

FW_A_TPB_P

FW_A_TPBIAS

PCI_AD<18>PCI_AD<17>PCI_AD<16>PCI_AD<15>

PCI_AD<11>

PCI_AD<5>

PCI_AD<3>PCI_AD<2>

PCI_AD<30>PCI_AD<29>PCI_AD<28>PCI_AD<27>


PCI_AD<24>PCI_AD<23>PCI_AD<22>PCI_AD<21>PCI_AD<20>

PCI_DEVSEL_LPCI_STOP_L

PCI_TRDY_LPCI_IRDY_LPCI_FRAME_LPCI_PARPCI_C_BE_L<3>PCI_C_BE_L<2>PCI_C_BE_L<1>PCI_C_BE_L<0>PCI_AD<31>

PCI_RST_L FW_PCI_RST_L

PCI_FW_REQ_L

PCI_SERR_LPCI_CLK33M_FW

INT_PIRQD_LPCI_PME_FW_L

PCI_AD<19>

FW_C_TPBIAS

FW_R0

FW_A_TPA_NFW_A_TPA_P

FW_A_TPB_N

FW_B_TPA_P

FW_B_TPB_PFW_B_TPA_N

FW_C_TPA_PFW_C_TPA_NFW_C_TPB_PFW_C_TPB_N

MIN_NECK_WIDTH=0.2MMMIN_LINE_WIDTH=0.5MMVOLTAGE=3.3V

PP3V3_S3_FW_AVDD

FW_B_TPB_N

FW_XO_R

=PP3V3_S3_PCI

PCI_AD<4>

PCI_AD<7>

PCI_AD<12>

PCI_AD<14>

46B6 44C5

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

75B3

74C3

74D3

24C8

23A6

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

74D3

23A6

23A6

23A6

23A6

23A6

74D3

74D3

74D3

74D3

74D3

74D3

23B6

23A6

29B3

23A8

24C5

74D3

74D3

74D3

74D3

74D3

7A4

23B8

38C8

8D2

6C2

23A4

23B5

23B8

23B8

23B8

23B8

23B8

23B8

38B6

38C6

23A8

23A8

23A8

23A8

23B8

23B8

23B8

23B8

23A8

23A8

23A8

23A8

23A8

23A8

23A8

23A8

23A8

23A8

23A8

23A4

23A4

23A4

23A4

23A4

23A6

23B6

23B6

23B6

23B6

23A8

23A6

23A4

23A4

29A5

23A4

24A5

23A8

8D2

38B6

38B6

38B6

8D2

8D2

8D2

8D2

8D2

8D2

8D2

8D2

7A4

23B8

23B8

23B8

23A8

www.vinafix.vn

D

SG

D

SG

NC

V-

V+-

+

NC

IO

IO

IO

IO

IO

OUT

TPO#

TPI

TPO

TPI#

VGND

VP



TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Cable Power

Page Notes

"Snapback" & "Late VG" Protection

(TPB-)

(TPB+)

(TPA-)

(TPA+)

1394APORT 0

CURRENT THROUGH THE BIAS RESISTOR SHOULD BE 5MA FOR A VOLTAGE DROP TO 2.2V

IT IS 2.2V INSTEAD OF 2.7V BECAUSE THE SNAPBACK ESD DIODES HAVE A 0.5V DROP

Plexi: 514-0124Enclosure: 514-0289

LATE-VG DETECTION CIRCUIT

FireWire Design Guide (FWDG 0.6, 5/14/03)1394b implementation based on Apple

7/26/05 - UPDATED SIGNAL NAMES FOR FW PORT POWER ENABLE

7/26/05 - SWITCHED TO 514-0124 FOR PRE-PROTO CONNECTOR

6/22/05 - CHANGED DIFF PAIR NAMES TO MATCH REUSE

PAGE HISTORY

OUTPUT:

FW_TPA0_P/N,FW_TPB0_P/N,FW_TPBIAS0 - FIREWIRE DIFF PAIRS

=FWPWR_PWRON - ADDITIONAL POWER CONTROL

INPUT/OUTPUT:

FW_PC0 - POWER CLASS IDENTIFIER (SINGLE PORT - TIE LOW)

=PP3V3_S5_FW - DIGITAL POWER

7/26/05 - CHANGED FL4590 TO 1.1A VERSION7/26/05 - REMOVED R4520 - IT HASN’T BEEN STUFFED FOR MANY PRODUCTS

7/26/05 - CHANGED CONNECTOR PORT NAMING TO PORT07/26/05 - UPDATED LATE-VG POWER RAIL CIRCUIT FROM M1

6/22/05 - REMOVED CONSTRAINTS BECAUSE USING ALLEGRO CONST MANAGER 6/22/05 - CONNECTED FW_PC0 FOR SINGLE PORT

7/26/05 - REMOVED ETHERNET LOW-POWER MODE CIRCUIT

1 FOR DUAL PORT

0 FOR SINGLE PORT

=GND_CHASSIS_FW_PORT0 - CHASSIS GROUND

5/19/05 - INITIAL REVISION

(PPFW_PORT0_VP)

(GND_FW_PORT0_VGND)

[LATE VG NOTES]

PLACEHOLDER FOR SMALL PACKAGE DIODE

PORT POWER CLASS

machine AC Adapter is plugged

NC

or system at run state with battery only

Enables port power whenever

=PPBUS_FW - PORT POWER

INPUT:

25VCERM

5%

402

220PF

2

1 C4301 10%16V402CERM

0.01UF2

1C4323

402

0.33UF10%6.3VCERM-X5R2

1 C4355

5%1/16W402

2.0MMF-LF2

1R435640216VX5R10%0.1UF

2

1 C4354

402MF-LF

10K1/16W1%

2

1R4352

402MF-LF

10K5%1/16W

2

1R4351

402MF-LF1/16W1%

200K21R4354402

MF-LF1%1/16W80.6K

2

1R4353

402

5%50VCERM

100PF2

1 C4353

SOT23MMBZ5227B

CRITICAL

31

D435010%

NO STUFF

CERM50V

0.001UF

4022

1 C4352

3305%

MF-LF1/16W402

21

R4350

0.33UF10%6.3V

402CERM-X5R2

1 C4300

SSM6N15FESOT563

12

6Q4392

SSM6N15FESOT563

45

3Q4392

TCM2010-100-4PSM

CRITICAL

8

7

6

54

3

2

1

FL4320

1SS418

SOD-723

21

D4351TLV7211SC70

CRITICAL2

5

13

6

4U4350

CRITICAL

SOT665HN2D01JEF

2

4

5

3

1

D4391

10%0.01UF

CERM16V

4022

1C4325

SM

FERR-250-OHM21

L4310

402

0.001UF50VCERM

10%2

1 C4310

BAV99DW-X-FSOT-363

CRITICAL

6

2

1

D4320

SOT-363BAV99DW-X-F

CRITICAL

3

5

4

D4321

BAV99DW-X-FSOT-363

CRITICAL

3

5

4

D4320

BAV99DW-X-FSOT-363

CRITICAL

6

2

1

D4321

1.1A-24V

MINISMDC

CRITICAL

21

FL4390

MF-LF1/16W

5%3.3K

402 2

1R4391

0.01UF10%25VX7R402

2

1 C43901/16WMF-LF

5%4.7K

402 2

1R4390

1%1/16W

56.2

402MF-LF

2

1R4301

1/16WMF-LF

5%470K

4022

1R4395

402

1/16WMF-LF

5%

10K21

R4394

1%

402MF-LF1/16W

56.2

2

1R4300

F-RT-TH11394A

CRITICALOMIT

1

2

5

6

3

4

87

J4300

10%

40216VCERM

0.01UF2

1C4320

FDC638PSM-LF

CRITICAL

4

3

6521

Q4390

0.01UF10%X7R50V603-1

2

1 C4324

MF-LF

1%1/16W

402

4.99K

2

1R4304

CRS08

SM

CRITICAL

21

D4390

MF-LF1/16W1%56.2

4022

1R4302

402MF-LF1/16W1%56.2

2

1R4303

16VCERM10%

402

0.01UF2

1C4322

CERM

0.01UF10%

40216V 2

1C4321

J4300 CRITICALNORMAL1514-0359 CONN,6P 1394A RCPT,MIDPLANE,MG3,LF

J4300514-0316 1 FANCYCONN,6P 1394A RCPT,MIDPLANE,BLACK,LF CRITICAL

01

38 76

SYNC_MASTER=GPU

FIREWIRE PORTSYNC_DATE=07/17/2006

051-7455


PPFW_SWITCHVOLTAGE=19V

VOLTAGE=16.5V


PPFW_PORT0_VP_F


PPFW_PORT0_VPVOLTAGE=16.5VMIN_LINE_WIDTH=0.5MM

FW_PORT0_TPA_P_FLFW_PORT0_TPA_N_FL

=PPBUS_S5_FWPWRSW

MIN_NECK_WIDTH=0.15MMMIN_LINE_WIDTH=0.15MMFWPWR_EN_L

FWLATEVG_3V_REF

PP2V4_FWLATEVG

PP2V4_FWLATEVG_RC

FW_A_TPB_N

FW_PORTPWR_EN

FW_A_TPA_PFW_A_TPA_NFW_A_TPB_P

FW_PORT0_TPB

FW_PORT0_TPA_N

FWPWR_EN_AND

PP2V4_FWLATEVGVOLTAGE=3.3VMIN_LINE_WIDTH=0.35MMMIN_NECK_WIDTH=0.25MM

=PP3V3_S5_FWLATEVG

FW_PC0

FW_PORTPWR_EN

=GND_CHASSIS_FW_UPPER

=GND_CHASSIS_FW_DOWN

FW_PORT0_TPB_N_FL

LATEVG_EVENT_L

FW_PORT0_TPB_P_FL

FW_PORT0_TPB_N

SMC_ADAPTER_EN FWPWR_ACIN

FWPWR_EN=PP3V3_S0_FW

FW_PORT0_TPB_P

FW_PORT0_TPA_P

FW_A_TPBIAS

=PP3V3_S5_FWLATEVG


FWPWR_EN_L_DIV

VOLTAGE=18.5VMIN_LINE_WIDTH=0.5MM

PPBUS_S5_FWPWRSW_F


57C4 45B3 44D5 35C7

38A6

37A3

33C7

38A8

6B2

7B1

38A7

37B3

38C5

37B3

37B3

37B3

38C5 7D1

38A4

8A6

8C8

6C1

7D4

37B3

7D1

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OUT

OUT

OUT

D

SG

D

SG

YB

A

SG

D

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PER ATA SPEC

516S0339

BLEED CIRCUIT TO DISCHARGE ODD POWER RAIL WHEN ODD IS DISABLED.

both pull up resistorson SB page.

ICH8 GPIO5

CORE RAIL 5V

Per ATA Spec

NC NC

NC

Indicates disk presence, to SMC

NC

NC

NC

NC

NC

PER ATA7 SPEC

NC

This signal has integrated series resistor and pull down in ICH8M

ODD detect need less than 100ms include OS latencyODD_PWR_EN_L is OD and core well

ICH8 GPIO54

402MF-LF5%1/16W4.7K

2

1R4451

NOSTUFF

10PF

40250VCERM

5%2

1C4404

MF-LF

6.2K5%1/16W4022

1R4459

4021/16WMF-LF5%0

2

1R4458

1/16W5%

MF-LF402

NOSTUFF

10K

2

1R4424

4021/16WMF-LF5%33K

2

1R4453

NOSTUFF

0.1UF

10%16VX5R402

21

C44764021/16W6.2K5%MF-LF2

1R4465

10K5%

4021/16WMF-LF

2

1R4476

5-1775184-0M-ST-SM

CRITICAL

98 76

50

5

4948 4746 4544 4342 4140

4

3938 3736 3534 3332 3130

3

2928 2726 2524 2322 2120

2

1918 1716 1514 1312 1110

1

52

51

J4401

6.3V0.47UF

402CERM-X5R10%

2

1 C4475

402

10K

MF-LF1/16W5%

21R4425

SOT563SSM6N15FE

12

6Q4475

SSM6N15FESOT563

45

3Q4475100K

402MF-LF5%1/16W

2

1R4420

MF-LF402

3305%

1/16W

21R4477

ODD_PWR_CORE

05%

402MF-LF1/16W

21

R4401

5%MF-LF402

1/16W

0

ODD_PWR_RESUME

21

R4402

100K1/16W5%MF-LF4022

1R4460CRITICAL

MC74VHC1G09SC70

5

41

2

3

U4401

SOT-6FDC606P

CRITICAL

4

3

6521

Q4410

SOT-363-LFMMDT3904XF

1

6

2 Q4420

MF-LF1/16W1%

24.9K

402

21

R4461

402

4.7MF-LF5%1/16W

2

1R4462

402

0.1UF16VX5R10%

2

1 C4477

01

39 76

PATA CONNECTOR

051-7455

=PP5V_S0_IDE_PATA

ODD_RST_BUF_L

ODD_PWR_EN_SLOW_START_R

=PP5V_S5_PATA

ODD_PWR_EN_SLOW_START_L_R

IDE_IRQ14

IDE_PDD<9>IDE_PDD<10>IDE_PDD<11>

IDE_PDD<7>IDE_PDD<6>IDE_PDD<5>IDE_PDD<4>

IDE_PDD<2>

ODD_PWR_EN_SLOW_START_L

ODD_POWER_DISCHARGE

=PP5V_S0_IDE_PATA

ODD_PWR_EN_L_RODD_RST_BUF_LODD_RST_5VTOL_L

=PP5V_S0_IDE_RESET

ODD_PWR_EN_L

ODD_PWR_EN_SLOW_START

SB_GPIO40

IDE_PDIORDY

IDE_PDD<1>

IDE_PDD<3>

PP5V_S0_IDE_PATAVOLTAGE=5V


MAKE_BASE=TRUE

IDE_PDD<13>

IDE_PDIOR_LIDE_PDDREQIDE_PDD<0>

IDE_PDIOW_L

IDE_PDA<1>IDE_PDA<0>IDE_PDCS1_L

IDE_PDD<8>

IDE_CSEL_PD

IDE_PDA<2>

=PP3V3_S0_PATA

IDE_PDD<12>

IDE_PDDACK_L

IDE_PDCS3_L

SMC_ODD_DETECT


=PP3V3_S0_SB

ODD_PWR_EN_L_B

ODD_PWR_EN_L_R

73D3

73D3

73D3

73D3

73D3

73D3

73D3

73D3

73D3

73D3

23A6

73D3

73D3

73D3 73D3

73D3

73D3 73D3

73D3

73D3

73D3

73D3

73D3

73D3

73D3

73D3

73D3

73D3

73D3

26D8

39A5

39A7

7C1

22B4

22B4

22B4

22B4

22B4

22B4

22B4

22B4

22B4

39C4

39C7 39C5

23B6

7A7

23A4

23C8

22A4

22C4

22B4 22B4

22B4

22A4 22C4

22B4

22B4

22B4

22B4

22B4

22B4

7D4

22B4

22B4

22B4

22B4

22B4

7D4

39A6

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OUT

IN

OUT

OUT

IN

OUT

SYM_VER-1

SYM_VER-1

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

FROM SB WITHIN EACH PAIRCAPS TO BE SAME DISTANCE

PLACE NEAR ICH8 PIN

VALUE=3900PF IN REFERENCE SCHEM

SYSTEM (SLEEP) LED FILTER

PLACE R4550 AND C4550 NEAR J4501

PLACE L4501 NEAR J4501

NCNCNC

(TO IR RECEIVER)

SATA DIFF PAIR GND VIAS

PLACE R4522 AND C4522 NEAR J4501

PLACE L4502 NEAR SBNC

518S0390

SATA CONNECTOR

HOLE-VIA-P5RP251

GV4508

HOLE-VIA-P5RP251

GV4506

HOLE-VIA-P5RP251

GV4501

HOLE-VIA-P5RP251

GV4503

HOLE-VIA-P5RP251

GV4505

HOLE-VIA-P5RP251

GV4507

HOLE-VIA-P5RP251

GV4502

HOLE-VIA-P5RP251

GV4504

0

24.91%1/16WMF-LF4022

1R4501

0

90-OHM-100MA1210-4SM1

CRITICAL

4

32

1

L4501

10%0.01UF

402CERM16V2

1 C4522

1/16WMF-LF5%

100

402

21R4550

603CERM6.3V20%4.7UF

2

1 C4550

90-OHM-100MA1210-4SM1

CRITICAL

4

32

1

L4502

0.0047UF402

21C4500

105%

MF-LF1/16W402

21R4522

0.0047UF402

21C4502

4020.0047UF

21C45010.0047UF

402

21C4503

10UF20%6.3VX5R603

NOSTUFF

2

1 C452110%16V402X5R

0.1UF

NOSTUFF

2

1 C4520

F-ST-SM

CRITICAL

20247-019E

98765432

19181716151413121110

1

21

20

J4501

051-7455

SATA CONNECTOR

01

7640

SATA_A_D2R_F_N

SATA_A_R2D_C_N

SATA_A_R2D_C_P

=PP5V_S3_SYSLED

SATA_A_R2D_F_N

SATA_RBIAS_N

SATA_RBIAS_PMAKE_BASE=TRUE

SATA_RBIAS_PN

SYS_LED_ANODE

SATA_A_D2R_N

SATA_A_D2R_P

SATA_A_R2D_F_P

SATA_A_D2R_F_P

=PP5V_S0_SATA

SATA_A_R2D_P

SATA_A_D2R_C_N

SATA_A_R2D_N

SATA_A_D2R_C_P

IR_RX_OUT

SYS_LED_ANODE_L

PP5V_S3_SYSLED_F

GND_CHASSIS_SATA

73D3

73D3

45A4

22B6

22A6

45A3

73D3

73D3

22B6

22B6

7A4

6B2

22B6

22B6

7A7

73D3

73D3

73D3

73D3

43C8

8C7

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SYM_VER-1

SYM_VER-1

GND

D+

D-

VBUS

GND

D+

D-

VBUS

EN1*

OC1*

IN OUT1

GND TPAD

OUT2

OC2*

EN2*

OE* SEL

GND

D+A

D-B

D+

VCC

D-A

D+B

D-

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM

TABLE_5_ITEM



PLACE C4675 NEAR U4675

L4600 Monitor SMT for tombstone

ROUTE USB DATA LINES AS DIFFERENTIAL PAIRSPLACE L4600 NEAR J4600


LAYOUT NOTE:C4602,C4603 ARE EMC BY-PASS CAPS FOR J4600

USB 2.0 CONNECTORS

LAYOUT NOTE:C4606,C4607 ARE EMC BY-PASS CAPS FOR J4601

L4601 Monitor SMT for tombstone

ROUTE USB DATA LINES AS DIFFERENTIAL PAIRS

SEL=1 CHOOSE USBSEL=0 CHOOSE SMC

4

32

1

L460190-OHM-100MA

TCM1005

CRITICAL

2

1 C46030.01UF10%CERM16V402

2

1 C46020.01UF10%CERM16V402

4

32

1

L460090-OHM-100MA

TCM1005

CRITICAL

4321

6

5

J4600F-RT-TH-M42

CRITICAL

USB

OMIT

4321

6

5

J4601F-RT-TH-M42

CRITICAL

USB

OMIT

2

1C4610CRITICAL

6.3V100UF20%POLYB2

C46112

1

100UF

CRITICAL

POLY6.3V20%

B2

2

1 C4613

X5R

10uF20%6.3V

603

C46120.1UF

10VCERM402

2

1

20%

21

L4602

0402-LF

FERR-120-OHM-1.5A

21

L4604

0402-LF

FERR-120-OHM-1.5A

21

L4603

0402-LF

FERR-120-OHM-1.5A

21

L4605FERR-120-OHM-1.5A

0402-LF

402

21

R4650EXTAUSB_OC_F_L1K

5%MF-LF1/16W

21

R4651EXTBUSB_OC_F_L1K

5%1/16WMF-LF402

2

1 C4650

402CERM-X5R6.3V10%0.47UF

2

1 C465110%

4026.3VCERM-X5R

0.47UF

2

1

3

D4600CRITICAL

RCLAMP0502B

SC-75

2

1

3

D4601CRITICAL

RCLAMP0502B

SC-75

C467521

0.1UF

CERM20%10V402

4022

1R4677

MF-LF

10K1/16W5%

2

1 C46060.01UF10%CERM16V402

2

1 C4607

40216VCERM10%0.01UF

9

6

7

5

8

2

1

4

3

U4600TPS2060

CRITICAL

MSOP

PI3USB10LPU4675

TQFNCRITICAL

57

6

31

2

4

8 10

9

0R4670

1/16W

NOSTUFF

21

5%

MF-LF402

NOSTUFF

20

R4671

5%1/16WMF-LF402

1

41

SYNC_MASTER=USB

USB EXTERNAL CONNECTORSSYNC_DATE=06/30/2006

01

76

051-7455J4600,J4601 CRITICALCONN,4P USB RCPT,MIDPLANE,BLACK,LF2 FANCY514-0315

J4600,J46012 CONN,4P USB RCPT,MIDPLANE,MG3,LF CRITICALNORMAL514-0288

USB2_MUXED_EXTA_PUSB2_MUXED_EXTA_N

=USB2_EXTA_P

USB_DEBUGPRT_EN_L

MIN_LINE_WIDTH=0.6MMVOLTAGE=5VPP5V_S3_USB2_EXTBMIN_LINE_WIDTH=0.6MMVOLTAGE=5VPP5V_S3_USB2_EXTA

USB2_MUXED_EXTA_N

USB2_MUXED_EXTA_PUSB2_EXTA_F_PUSB2_EXTA_F_N

USB2_GND_EXTB_F

MIN_NECK_WIDTH=0.3MMVOLTAGE=0VMIN_LINE_WIDTH=0.6MM

USB2_GND_EXTA_F

MIN_LINE_WIDTH=0.6MMVOLTAGE=0VMIN_NECK_WIDTH=0.3MM

=USB2_EXTB_N

=USB2_EXTB_P

=GND_CHASSIS_USB

PP5V_S3_USB2_EXTA_F

PP5V_S3_USB2_EXTA_FMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.3MMVOLTAGE=5V

=GND_CHASSIS_USB

=GND_CHASSIS_USB

=EXTAUSB_OC_L

=EXTBUSB_OC_L

=PP3V42_G3H_SMCUSBMUX

USB2_EXTB_F_PUSB2_EXTB_F_NPP5V_S3_USB2_EXTB_F

PP5V_S3_USB2_EXTB_FMIN_LINE_WIDTH=0.6MMMIN_NECK_WIDTH=0.3MMVOLTAGE=5V

=GND_CHASSIS_USB

PM_SLP_S4_LS5V

=PP5V_S5_USB

=USB2_EXTA_N

SMC_TX_LSMC_RX_L

46B6

46B4

41C4

41C4

41C4

41C2

45D5

45D5

41C2

41A4

41C2

41A4

44C5

44C5

41A4

41A2

41A2

41A2

44B8

44B8 41C5

41C5

8C2

44B8

41A5

41A5

8B2

8B2

8C8

41D3

41D2

8C8

8C8

8C2

8B2

7B1

41C3

41B2

8C8

65B6

7C1

8C2

6C2

6C2

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OUT

SYM_VER-1

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

516S0588

PLACE C4700 NEAR J4700


GEYSER AND DIMM0 REMOTE TEMP SENSORS

5%

1K

1/16WMF-LF402

21

R4710

20%0.1UF10VCERM402

2

1 C4710CERM20%10V0.1UF

4022

1 C4700

SC-75

RCLAMP0502B

CRITICAL

2

1

3

D4700

0402

600-OHM-300MA21

L4700

0402

600-OHM-300MA21

L4702

53307-1039

CRITICAL

F-ST-SM

98765432

10

1

J4700

0402600-OHM-300MA

21

L4703

10%0.01uFCERM16V402

2

1C4703TCM100590-OHM-100MA

CRITICAL

4

32

1

L4701

051-745542

SYNC_MASTER=USB SYNC_DATE=06/29/2006

01

76

CONNECTOR MISC

CONN_GEYSER_ONOFF_FLTR_L

CONN_GEYSER_USB_N

CONN_GEYSER_USB_P

SMC_ONOFF_LMAKE_BASE=TRUE

SMC_LIDSMC_LID_LC

=PP5V_S3_GEYSER

CONN_GEYSER_ONOFF_L

=USB2_GEYSER_N

=USB2_GEYSER_P

GEYSER_GND_F

VOLTAGE=0VMIN_NECK_WIDTH=0.3MMMIN_LINE_WIDTH=0.6MM

MIN_LINE_WIDTH=0.6MM

PP5V_S3_GEYSER_F

MIN_NECK_WIDTH=0.3MMVOLTAGE=5V

45D5

57A8

45C8

45C5

44C5

44B5 6B2

7A4

8C2

8C2

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SYM_VER-1

SYM_VER-1

P0_3/INT1P0_4/INT2P0_5/TIO0P0_6/TIO1P0_7

P0_2/INT0P0_1

THRM_PAD

NC

P1_7P1_6/MISO

P1_5/SMOSIP1_4/SCLK

P3_1P3_0

P1_3/SSELP1_2/VREG

VDD

P1_1/D-P1_0/D+

VSS

NC

P2_1P2_0

P0_0

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

C4803 CLOSE TO U4800 PIN 2

PLACE C4810 C4811 NEAR L4810


BLUETOOTH

3G CONNECTOR



NEAR U4800 PIN 16 PLACE C4800 AND C4801

IR CYPRESS ENCORE II USB CONTROLLER

TO M13D SLOT

SB HAS INTERNAL 15K PULL-DOWNS

518S0521

402CERM10V20%0.1UF

2

1 C4811

TCM1005

CRITICAL90-OHM-100MA

4

32

1

L4812

6.3V20%

X5R

10UF

6032

1 C48100402-LF

120-OHM-0.3A-EMI21

L4810

0402-LF

120-OHM-0.3A-EMI21

L4811

402

10%CERM50V0.001UF

2

1 C48035%

MF-LF

100

1/16W

402

21R4800

NOSTUFFCRITICAL

F-RT-SMLVC-D10SFYG

98765432

14

13

12

11

10

1

J4850

NOSTUFF

TCM1005

CRITICAL90-OHM-100MA

4

3 2

1

L4855

QFNCY7C63833CRITICAL

OMIT

13

16

33

2221

89

2625242320181514

321234567

3130292827

1917121110

U4800402X5R10%10V1UF

2

1 C4800

CERM10V20%0.1UF

4022

1 C4801

0402

NOSTUFF

FERR-120-OHM-1.5A21

L4854

NOSTUFF

0603

FERR-220-OHM-2A21

L4853

NOSTUFF

0603

FERR-220-OHM-2A21

L4852

NOSTUFF

X7R40250V0.01UF10%

2

1 C4850NOSTUFF

50V10%X7R

0.01UF

4022

1 C4851

CRITICAL

78171-0004M-RT-SM

4321

6

5

J4810402

0.001UF50VCERM10%

2

1 C4802

0.01UF50V10%X7R402

NOSTUFF

2

1 C4852

0

402

1/16WMF-LF

5%

21R4801

5%

MF-LF1/16W

402

021

R4802

1UF10V10%X5R402

2

1 C4804

0

402

1/16WMF-LF

5%

21

R4803

051-74557643

01

IR CONTROLLER & BT INTERFACE

=PP5V_S0_3G

=USB2_3G_P

=USB2_3G_N

GND_3G_F

=GND_CHASSIS_3GPOWER

GND_CHASSIS_3G_CONN

PP5V0_S0_3G_F

USB2_3G_F_PUSB2_3G_F_N

MIN_LINE_WIDTH=0.2MMVOLTAGE=3.3VMIN_NECK_WIDTH=0.2MM

PP3V3_S3_BT_F

IR_RX_OUT

=PP3V3_S3_BT

=GND_CHASSIS_3GPOWER

=USB2_BT_P

=USB2_BT_N

MIN_NECK_WIDTH=0.2MMVOLTAGE=0VMIN_LINE_WIDTH=0.2MMGND_BT_F

USB2_BT_F_PUSB2_BT_F_N

TP_IR_P02

IR_RX_OUT_RC

ENCORE_VREG_C=USB2_IR_N

USB2_IR_P_R

=USB2_IR_P

USB2_IR_N_R

TP_IR_P04TP_IR_P03

TP_IR_P01TP_IR_P00

PP5V_S3_IR_R=PP5V_S3_IR

43A5

43B5

7A7

8C2

8C2

8D8

6C1

6C1

6A2

40C6

7A4

8D8

8C2

8B2

6A2

6C1

6C1

8C2

8C2

7A4

www.vinafix.vn

IN

IN

IN

OUT

OUT

OUT

IN

IN

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

OUT

OUT

P16

P51

P50

P42/SDA1

P97/IRQ15*/SDA0

P95/IRQ14*P94/IRQ13*

P93/IRQ12*

P92/IRQ0*P91/IRQ1*

P86/IRQ5*/SCK1/SCL1

P83/LPCPD*P82/CLKRUN*

P80/PME*

P35/LRESET*P34/LFRAME*

P10

P12P13

P14

P15

P17

P31/LAD1

P30/LAD0

P32/LAD2P33/LAD3

P36/LCLK

P37/SERIRQ

P44/TMO1

P77/AN7P76/AN6

P81/GA20

P96/EXCL

P11

P47/PWX1/PWM1

P45

P46/PWX0/PWM0

P40/TMIO

P43/TMI1/EXSCK1

P27P26

P25

P24P23

P22P21

P20

P41/TMO0

P52/SCL0

P60/KIN0*

P61/KIN1*

P62/KIN2*P63/KIN3*

P64/KIN4*

P65/KIN5*P66/IRQ6*/KIN6*

P67/IRQ7*/KIN7*

P70/AN0

P71/AN1P72/AN2

P73/AN3P74/AN4

P75/AN5

P84/IRQ3*/TXD1P85/IRQ4*/RXD1

P90/IRQ2*

(1 OF 4)

PA2/KIN10*/PS2AC

PA3/KIN11*/PS2AD

PA5/KIN13*/PS2BD

PA4/KIN12*/PS2BC

PB2PB3

PB4

PE0

PG6/EXIRQ14*/EXSDAB

PG5/EXIRQ13*/EXSCLA

PH1/EXIRQ7*

PH0/EXIRQ6*

PG7/EXIRQ15*/EXSCLB

PG4/EXIRQ12*/EXSDAA

PH3/EXEXCL

PH2/FWE

PB5

PF4/PWM4

PF2/IRQ10*/TMOY

PG2/EXIRQ10*/SDA2

PG0/EXIRQ8*/TMIX

PF7/PWM7

PC3/TIOCD0/TCLKB/WUE11*

PH5

PB7

PB6

PH4

PF5/PWM5PF6/PWM6

PG1/EXIRQ9*/TMIY

PA6/KIN14*/PS2CCPA7/KIN15*/PS2CD

PD0/AN8

PD1/AN9PD2/AN10

PD3/AN11

PD4/AN12PD5/AN13

PD6/AN14

PD7/AN15

PF0/IRQ8*/PWM2

PF1/IRQ9*/PWM3

PB0/LSMI*

PB1/LSCI

PC0/TIOCA0/WUE8*PC1/TIOCB0/WUE9*

PC2/TIOCC0/TCLKA/WUE10*

PC4/TIOCA1/WUE12*

PC5/TIOCB1/TCLKC/WUE13*

PC6/TIOCA2/WUE14*PC7/TIOCB2/TCLKD/WUE15*

PG3/EXIRQ11*/SCL2

PF3/IRQ11*/TMOX

PA1/KIN9*/PA2DD

PA0/KIN8*/PA2DC

PE1*/ETCKPE2*/ETDI

PE3*/ETDOPE4*/ETMS

(2 OF 4)

VCL

AVREF

VCC

VCC

VCC

AVCC

XTAL

EXTAL

AVCC

VCC

MD1

MD2

NMI

RES*

ETRST*

AVREF

AVSSVSS

(3 OF 4)

NC22

NC21NC20

NC19

NC18NC17

NC16

NC15NC14

NC13NC12

NC9

NC6

NC11

NC10

NC8

NC7

NC5

NC4

NC3NC2

NC1NC0

(4 OF 4)

OUT

OUT

BI

IN

IN

OUT

BI

BI

OUT

OUT

IN

IN

OUT

OUT

IN

OUT

OUT

OUT

OUT

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

IN

OUT

IN

IN

OUT

OUT

OUT

OUT

BI

BI

BI

BI

BI

BI

OUT

OUT

OUT

OUT

IN

IN

OUT

IN

ININ

OUT

OUT

BI

BI

OUT

IN

OUT

OUT

OUT

IN

BI

BI

BI

BI

IN

IN

IN

OUT

BI

IN

IN

IN

IN

BI

BI

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(OC)

NOTE: Unused pins have "SMC_Pxx" names. Unused

those designated as inputs require pull-ups.

(OC)

NOTE: SMS Interrupt can be active high or low, rename net accordingly. If SMS interrupt is not used, pull up to SMC rail.

NCNC

NC

(OC)

pins designed as outputs can be left floating,

(DEBUG_SW_3)

(OC)

(OC)

(OC)

(OC)

(OC)(OC)

(OC)

(OC)

(DEBUG_SW_2)(DEBUG_SW_1)

(OC)

(OC)(OC)(OC)

(OC)

NCNC

NCNCNC

NCNC

NCNCNCNC

NC

NCNCNC

NCNCNCNCNC

6.3V20%

22UF

CERM805

2

1C4902

6C2 24D5 46B4

6C2 45D7 46B4

42C8 45C8 45D5

6.3V

402

10%

PLACEMENT_NOTE=Place C4907 close to U4900 pin F1

0.47UF

CERM-X5R 2

1C4907

20%

402

0.1UF10VCERM2

1 C4903

20%

402

0.1UF10V

CERM

PLACEMENT_NOTE=Place C4920 close to U4900 pins N14,N15

2

1C4920402

4.7

1/16W5%

MF-LF

PLACEMENT_NOTE=Place R4999 close to U4900 pins N14,N15

21

R4999

20%

402

0.1UF10VCERM2

1 C4904

SM

2

1

XW4900

24C3

59C7

20%

402

0.1UF10VCERM2

1 C4905

24C2

45D5 63B4 63B5

6B2 27A5 58A3

44A4

20%

402

0.1UF10VCERM2

1 C4906

48C1 59C7

6B2 48B1

44A4

44A4

66C2

48D5

66B1

45B3

6D1 45C5 57A2

6C1 45B6 57C3 57C7 66A6

6C2 41A8 44C5 45D5 46B6

6C2 41A8 44C5 45D5 46B4

6C1 33C7 35C7 38C6 45B3 57C4

65C6

OMIT

SMC_H8S2116BGA

G2

H1

H2

J4

J3

J1

J2

K4

B6

A6

C6

D6

B7

A7

C7

P15

N13

R15

P14

R14

P13

R13

N12

J13

J12

K14

K13

K12

L15

L14

L13

F2

G4

G1

C1

D3

C2

B1

C3

D5

B5

A5

D7

A8

C8

D8

B9

A9

C9

D9

F14

E13

E15

E14

E12

D15

D14

D13

C15

D12

C14

B15

B14

A15

C13

B12 U4900

SMC_H8S2116BGA

OMIT

B3

D4

C4

K2

F3

E1

R7

P7

M8

R8

P8

N9

R9

P9

N5

P5

R5

M6

N6

R6

P6

M7

L2

L4

M1

M2

M3

M10

N10

R10

P10

N11

R11

P11

M11

H12

H13

H15

H14

G12

G13

G15

G14

D11

A12

C11

B11

A11

D10

A10

B10

N1

M4

N2

R1

N3

R2

P3

R3 U4900

BGA

OMIT

SMC_H8S2116

A2

D2

B4

A4

A13

B13

F13

F12

R4

P4

D1

F1

A1

J15

P1

P2

E3

F4

K1

E2

B2

L1

R12

P12

M15

M14

N15

N14

U4900

OMIT

SMC_H8S2116BGA

L12

M13

M12

N7

M5

N4

L3

N8

M9

H4

K3

E4

B8

A3

C5

C10

C12

A14

F15

J14

K15

H3

G3

U4900

6C1 45B6 66A3

6C1 45B6 66A4

47B3

402

10K

MF-LF

5%1/16W

2

1R4909

6C2 46B4

6C2 46B6

MF-LF402

10K5%1/16W

2

1R4901

402

1/16W5%

MF-LF

10K

2

1R4902

402

NO STUFF

0

MF-LF

5%1/16W

2

1R4903

402

10K

MF-LF

5%1/16W

2

1R4998

41A5

6C1 45D5 57C8

8B2 15B7

24A5 24C3

48A8

39B2

45C3

44B4

24C8

45D5

44B4

6D2 50B4

44B4

44B4

6A7 44A4

44B4

6D2 50C4

44B4

51C2

51C2

61C5

51C2

44A4

44A4

62C2

6C2 45C5 46B4

45B3

6C2 45C5 46B4

6C2 45C5 46B6

6C2 45C5 46B6

6B2 42C3 45C5 57A8

6C1 66A8

44A4

66B8

44A4

47C3

47C3

47D3

47D3

47C6

47C6

45B6

45B5

44B4

51C7

45C6

6C2 41A8 44B8 45D5 46B4

6C2 41A8 44B8 45D5 46B6

45C5

45C3 51A6 45D5

44A4

45A6

6C2 24C8 46B4

8B2 15B7

24D5 27C5

6C2 46B6

24C8

6C2 24C8 37A5 46B6

24C2

45C5

6D2 22D4 46C6

6D2 22D4 46C6

6C2 22D4 46C4

6C2 22D4 46C4

6C2 22D4 46B6

27C1

29A3 29A5 75B3

44B4

47D6

24D3 33C7 35C7 45A6 58B7 62B8

24D3 33B7 65A6 65C4

24D3 45C3

45A7

47D6

47B3

45D1

051-7455 01

7644

SMCSYNC_MASTER=T9_MLB SYNC_DATE=10/30/2006

SMC_SMS_INTSMB_BSA_DATASMB_BSA_CLKSMB_A_S3_DATASMB_A_S3_CLK

SMB_B_S0_CLK

SMC_PROCHOTSMC_THRMTRIPSMC_FWE

SMC_PH4

MAKE_BASE=TRUESMC_GPU_VSENSEMAKE_BASE=TRUESMC_GPU_ISENSE SMC_GPU1_ISENSE

MAKE_BASE=TRUESMC_ENRGYSTR_LDO_PGOODMAKE_BASE=TRUESMC_ENRGYSTR_LDO_ENSMC_P45

SMB_B_S0_DATA

SMC_PG0

SMC_SYS_VSETSMC_SYS_ISETSMC_BATT_VSET

PM_PWRBTN_L

SMC_BATT_CHG_EN

SMC_P27

SMC_P43

SMC_SYS_KBDLED

SMC_CASE_OPEN

SMC_RSTGATE_L

ALS_RIGHT

SMC_FAN_2_TACH

SMC_FAN_2_CTL

SMC_FAN_3_TACH

SMC_BATT_VSETSMC_SYS_VSET

SMC_GPU1_VSENSE

SMC_GFX_THROTTLE_L

SMC_FAN_3_CTL

SMC_PF0

ALS_GAINSMC_PH4

NC_SMC_SYS_VSETMAKE_BASE=TRUE

NC_SMC_RSTGATE_LMAKE_BASE=TRUE

SMC_P27

SMC_SYS_KBDLEDMAKE_BASE=TRUENC_ALS_GAINMAKE_BASE=TRUENC_SMC_EXCARD_PWR_EN

MAKE_BASE=TRUENC_SMC_SYS_KBDLED

NC_SMC_P81MAKE_BASE=TRUE



MAKE_BASE=TRUENC_SMC_P46

SMC_FAN_0_CTL



NC_SMC_P44MAKE_BASE=TRUESMC_P44

SMC_P62SMC_P63

SMS_ONOFF_L

SMC_P46

SMC_TX_LSMC_RX_LSMB_0_S0_CLK

SMC_PA0

SMC_BATT_ISETSMC_PF3SMC_LID

SMC_PF0

SMC_TDO

SMC_BC_ACOK

SMB_MGMT_DATA

LPC_FRAME_L

SMC_TDI

SMC_P20

ALS_LEFT

NC_SMC_BATT_VSETMAKE_BASE=TRUE

MAKE_BASE=TRUENC_SMC_PF1

SMC_FAN_0_TACH MAKE_BASE=TRUENC_SMC_FAN_0_TACH

SMC_TMS

SMC_PF1

SMC_P20

SMC_P46

SMC_P63SMC_P62SMC_ADAPTER_EN

SMC_GPU_ISENSE

SMC_P14PM_LAN_PWRGD

SMC_GFX_THROTTLE_L

SMC_P45

SMC_SYS_LED

SMB_MGMT_CLK

SMC_P81

SMC_TX_L

PM_SLP_S5_L

SMC_ONOFF_L

PM_SUS_STAT_LPM_CLKRUN_L

SMC_TCK

PM_SLP_S3_L

SMC_FAN_2_TACH

SMS_Y_AXISSMS_Z_AXISSMC_ANALOG_ID

SMC_FAN_1_CTL

IMVP_VR_ON

SMC_P21

PM_RSMRST_L

ALS_RIGHTALS_LEFTSMC_NB_1V8_ISENSESMC_NB_CORE_ISENSE

SMS_X_AXIS

SMC_FAN_3_TACH

SMC_FAN_0_CTL

PM_EXTTS_L<1>

USB_DEBUGPRT_EN_L

SMC_P44

INT_SERIRQPCI_CLK33M_SMCSMC_LRESET_L

LPC_AD<3>LPC_AD<2>LPC_AD<1>LPC_AD<0>

SMC_BATT_TRICKLE_EN_L

ALL_SYS_PWRGDSMC_RSTGATE_L

RSMRST_PWRGD

SMC_P26

SMC_P23

PM_EXTTS_L<0>

SMC_PA1

SMC_PM_G2_EN

SMC_CPU_ISENSE

PM_S4_STATE_L

SMB_0_S0_DATA

PM_BATLOW_LSYS_ONEWIRE

SMC_PB0

SMC_EXCARD_PWR_ENSMC_EXCARD_CP

SMC_RUNTIME_SCI_LSMC_ODD_DETECTISENSE_CAL_EN

SMC_EXCARD_OC_LSMC_GFX_OVERTEMP_L

SMC_FAN_2_CTLSMC_FAN_3_CTLSMC_FAN_0_TACHSMC_FAN_1_TACH

PM_SYSRST_L

SMC_P22

PM_LAN_ENABLE

SMC_PROCHOT_3_3_L

SMC_P64

SMC_CPU_VSENSE

SMC_NB_1V25_ISENSE

SMC_RX_L

SMC_VCL


VOLTAGE=3.3V

PP3V3_S5_SMC_AVCC

MIN_NECK_WIDTH=0.20 MM

SMC_MD1

SMC_NMI

SMC_KBC_MDE

SMC_TRST_L

SMC_XTALSMC_EXTAL

MAKE_BASE=TRUENC_ALS_LEFTMAKE_BASE=TRUENC_SMC_FAN_3_TACHMAKE_BASE=TRUENC_ALS_RIGHTMAKE_BASE=TRUENC_SMC_PF0

MAKE_BASE=TRUENC_SMC_FAN_2_CTLMAKE_BASE=TRUENC_SMC_FAN_3_CTL

NC_SMC_FAN_2_TACHMAKE_BASE=TRUE

MAKE_BASE=TRUENC_SMC_FAN_0_CTLSMC_EXCARD_PWR_ENALS_GAIN

SMC_PF1

SMC_P43

SMC_P64SMC_P81

SMC_GPU_VSENSE



SMC_BS_ALRT_L

SMC_SUS_CLK

SMC_P21SMC_P22

SMC_P26SMC_P23

SMC_DCIN_ISENSESMC_PBUS_VSENSESMC_BATT_ISENSE

SMC_WAKE_SCI_L

SMC_P14MAKE_BASE=TRUENC_SMC_P21MAKE_BASE=TRUENC_SMC_P23MAKE_BASE=TRUENC_SMC_P22


MAKE_BASE=TRUENC_SMC_GFX_THROTTLE_L


SMC_P67

SMC_RESET_L

GND_SMC_AVSS

=PP3V42_G3H_SMCPP3V3_S5_AVREF_SMC

66C2 66B1 62C2 61C5 60B2 48C6 48C1

45D8

48B1

45D4

60C7

66C1

44A8

48A1

45C1

44A5

44C5

44C5 60B2

45C5

66D3 44C8

45C5

44B4

44B4

44D8

44A8

44A8

44A8

6A7

44B5

44B5

48B1

44C8

44A8

44B5

44A4

44C8

44B8

44A8

44C8

44D5

44D5

44B4

45C5

45C1

44A4

44B4

44A8

44A8

44B4

44C8

44B8

44B4

44B4

44B4

44A4

44B4

44B4

44B4

44B4

44B4

45C5

45C5

44B4

44B4

45C7

45C7

44B8

44A5

44B5

44C8

44D5

44C5

44C8

44C8

44C8

44C8

44D8

45C5

45B6

7C1

45C6

www.vinafix.vn

D

SG

IN

D

SG

OUT

D

SG

IN

D

SG

OUT

NCCD

GND

OUT

VDD

OUT

GND

VIN VOUT

OUT

TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PART NUMBERALTERNATE FORPART NUMBER BOM OPTION REF DES COMMENTS:

TABLE_ALT_HEAD

REFERENCE DESIGNATOR(S) BOM OPTIONTABLE_5_HEAD

QTY DESCRIPTIONPART#

TABLE_5_ITEM

TABLE_ALT_ITEM

Debug Power ButtonSMC Crystal Circuit

Is this the best part to use?

SMC Reset Button / Brownout DetectTHESE NEED TO BE PULLED TO THE PROPER RAIL: SMC 1.05V to 3.3V Level ShiftingSMS_INT_LSMC_TPM_RESET_L

RC FILTERED AT SATA CONN

SMC AVREF Supply

Silk: "PWR BTN"

ENABLE VSENSE IN S0 ONLY

SMC_CPU_RESET_3_3_L

0.007A FANCY

SMS_INT_L

Silk: "SMC RST"

0.0094A NORMAL

R5011 CLOSE TO SB

NC

3.3V TO PBUS LEVEL SHIFTING

SYSTEM (SLEEP) LED CURRENT DRIVER

SMC 3.3V to 1.05V Level Shifting

MF-LF

10K5%1/16W4022

1 R5076

10K21R5053

CERM5%

15PF

50V402

21

C5021

10K21R508510K21R508610K21R508710K21R5048

100K21R5094

10K21R5030

10K21R5080

10K21R5054

10K21R5055

10K21R5028

10K21R5024

100K21R5081

10K21R5047

10K21R509610K21R5097

2.0K21R5082

100K21R5073

SOT-363MMDT3906XF

4

3

5 Q5050

4021/16W1%MF-LF

3.74K21

R5052

402MF-LF1%1/16W357

2

1R5051

SOT-363MMDT3906XF

1

6

2Q5050

470K21R5083

CRITICAL

20.00MHZ5X3.2-SM

21

Y5020 10K21R509110K21R509810K21R5099

SOT563SSM6N15FE

12

6Q5002

10K21R5084

402MF-LF1/16W1%

470K21

R5075

SOT563SSM6N15FE

45

3Q5002

10K21R5089

10K21R5049

10K21R5090

5%MF-LF1/16W

3.3K

402

21

R5071

3.3K5%MF-LF4021/16W

2

1R5070

BC847BV-X-FSOT563

1

6

2 Q5077

SOT563BC847BV-X-F

4

3

5 Q5077

402MF-LF1/16W5%470

2

1R5078

10K21R5079

10K21R5077

402MF-LF1/16W1%

OMIT

31.6

2

1R5050

470K21R5088

SOT563SSM6N15FE

45

3Q5001

402CERM50V10%0.001UF

2

1 C5050

100K21R5006

SOT563SSM6N15FE

12

6Q5001

4021/16W1KMF-LF5%

2

1R5000

SOT23-5RN5VD30A-F

CRITICAL2

14

3

5

U5000CERM20%

0.1UF

40210V 2

1C5000

402

0.01UF16VCERM10%

2

1C50015%

402

0MF-LF1/16W

NOSTUFF

2

1R5001

40250VCERM5%

15PF21

C5020

402

10%16V0.01UFCERM2

1C5067

603X5R6.3V20%10uF

2

1C5066

10K21R5095

4021/16W5%

0

NOSTUFF

MF-LF

21R5072

MF-LF

05%

NOSTUFF

1/10W6032

1R5010

CRITICAL

SOT23-3ISL60002-33

21

3

VR5065

CERM-X5R10%0.47UF

4026.3V2

1C5065

0

1/16WMF-LF402

5%21

R5011

1 NORMALR5050114S0071 31.6, 1%, 1/16W, MF-LF, 402

051-7455

SYNC_MASTER=GPU

45

01

SYNC_DATE=07/17/2006SMC SUPPORT

76

R5050 FANCY1114S0086 44.2, 1%, 1/16W, MF-LF, 402

? TI REF3133353S1381353S1278 VR5065

SMC_EXTAL

SMC_SMS_INT


SMC_XTAL

=PP3V42_G3H_SMC

SMC_LID

=PP3V42_G3H_SMC

SMC_EXCARD_CP

PM_SLP_S5_L

SMC_TDO

SMC_CASE_OPEN

SMC_PG0

SMC_ADAPTER_EN

=PP3V3_S0_SMC_LS

SMC_ENRGYSTR_LDO_PGOODPM_LAN_PWRGD

SMC_TCK

SMC_TMS

SMC_ONOFF_LSMC_EXCARD_OC_LSMC_TX_LSMC_RX_LSYS_ONEWIRE

SMC_PA1SMC_PB0SMC_P67

SMC_TDI

SYS_LED_BIAS SYS_LED_ANODE

SMC_THRMTRIP

SMC_BATT_CHG_EN

CPU_PROCHOT_L

CPU_PROCHOT_BUF

PP1V05_S0

SMC_PROCHOT_3_3_L

PBUS_SMC_VSENSE_EN_L SYS_LED_ISET

SMC_GFX_OVERTEMP_L

=PP3V42_G3H_SMC

SMC_ANALOG_ID

SMC_PF3

SYS_LED_EN

SMC_SYS_LED

=PPVIN_S5_IMVP

PM_SLP_S3_L

SMC_RESET_L

SMC_ONOFF_L

SMC_PROCHOT

SUS_CLK_SB SMC_SUS_CLK

=PP3V42_G3H_SMCVREF

SMC_MANUAL_RST_L

GND_SMC_AVSSMIN_LINE_WIDTH=0.4 MMMIN_NECK_WIDTH=0.2 MMVOLTAGE=0V

PP3V3_S0

CPU_PROCHOT_L

VOLTAGE=3.3VMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.4 MMPP3V3_S5_AVREF_SMC

CPU_PROCHOT_L_R

SMC_BC_ACOK

PM_THRMTRIP_L

SYS_LED_ILIM

=PP5V_S3_SYSLED

SMC_PA0

SMC_BS_ALRT_L

RSMRST_PWRGD

SMC_NB_1V25_ISENSE

SMC_FWE

66C2 66B1 62C2 61C5

57C4

62B8

60B2

44D5

46B6

46B4

58B7

48C6

66A6

45D4

57A8

45D8

38C6

44C5

44C5

70C3

45D8

44C5

48C1

70C3

57C7

70B3

66A3

45C1

44B5

45C1

46B6

35C7

46B4

46B6

45C8

44B8

44B8

57C8

46B4

66A4

59C8

45D4

35C7

46B4

45D5

48B1

59C8

57C3

22C2

57A2

63B5

51A6

44C8

44D4

42C3

44D4

44C5

44B5

33C7

66C1

44B5

44B5

44C5

41A8

41A8

44B8

44B5

40C5

44C8

45C3

7D7

44D4

33C7

44C3

44C5

48A1

7D4

45B5

44C5

15A6

40B6

44C5

63B4

44C3

44B5

6C1

44C3

7C1

6B2

7C1

44B8

24D3

6C2

44B5

44B5

6C1

7D4

44A2

44C5

6C2

6C2

42C8

44B8

6C2

6C2

6C1

44B8

44B8

44C5

6C2

6B2

44A5

6C1

9C5

6B2

44C5

48D7

44A8

7C1

44A8

44B5

44C8

7A1

24D3

6C2

42C8

44A5

24D3 44C5

7C1

6B2

44C1

6A2

9C5

44D4

6C1

9C6

7A4

44B8

6D1

44D8

44C5

44A5

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BI

BI

IN

IN

OUT

OUT

OUT

OUT

OUT

IN

IN

BI

BI

OUT

OUT

OUT

OUT

IN

IN

OUT

IN

OUT

BI

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

FWH_INIT_L Generation

516S0416

LPC+ Connector

6C2 22D4 44C8

6C2 24C8 44C8

6C2 29B3 75C3

6C2 24D5 44C5

6C2 24C8 37A5 44C5

6C2 23B5

6C2 44B5 45C5

6C2 44C1

6C2 44D1

6C2 27D1

6C2 22D4 44C8

6D2 22D4 44C8

6D2 22D4 44C8

6C2 44B5 45C5

6C2 44C3 45D7

6C2 44C1

6C2 24A7 24D5

330

LPCPLUS

MF-LF1/16W5%

4022

1R5192LPCPLUS

5%1/16WMF-LF402

1.3K

2

1R5191

PLACEMENT_NOTE=Place R5190 to minimize CPU_INIT_L stub

LPCPLUS

330

402MF-LF1/16W5%

21

R51909D6 22C4 70B3

6C2 41A8 44B8 44C5 45D5

6C2 41A8 44B8 44C5 45D5

6C2 44B5 45C5

6C2 44B5 45C5

BC847BV-X-FSOT563

LPCPLUS

4

3

5Q5190

SOT563

LPCPLUS

BC847BV-X-F

1

6

2Q5190

F-ST-5047

LPCPLUSCRITICAL

SM1

3029

2827

2625

2423

2221

2019

1817

1615

1413

1211

109

87

65

43

21

J5100

6C2 22D4 44C8

051-745546


01

LPC+ Debug Connector

76

LPC_FRAME_L

SMC_RX_LSMC_TX_L

CPU_INIT_L

=PP3V3_S0_LPCPLUS

SMC_MD1

PCI_CLK33M_LPCPLUS

INT_SERIRQPM_SUS_STAT_L

SMC_RESET_LSMC_NMI

LINDACARD_GPIO

CPU_INIT_LS3V3

CPU_INIT_R_LPM_CLKRUN_L

FWH_INIT_L

LPC_AD<3>

SMC_TDISMC_TCK

SMC_TDOSMC_TRST_LDEBUG_RESET_LSMC_TMSBOOT_LPC_SPI_L

=PP3V42_G3H_LPCPLUS

LPC_AD<2>LPC_AD<1>LPC_AD<0>

=PP5V_S0_LPCPLUS7B1

7A7

7C4

6C2

6D2

6D2

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DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

ICH8-M ME SMBus Connections

U5930SMS

BatteryJ6950

HEAT PIPE/FIN-STACKU5500

(Write: 0xA4 Read: 0xA5)

SO-DIMM "B"J3200

(MASTER)U2300

ICH8-MSLG8LP537V: U2900

(Write: 0xD2 Read: 0xD3)

Clock Chip

(Write: 0xA0 Read: 0xA1)J3100

U4900(MASTER)

SMCU4900

SMC

(MASTER)U4900SMC

SMC(MASTER)U4900

SMC "A" SMBus ConnectionsNOTE: SMC RMT bus remains powered and may be active in S3 state

(Write: 0x98 Read: 0x99)(MASTER)

U2300ICH8-M(MASTER?)

EMC1043-5: U5520CPU Temp

J3400

SMC "Battery A" SMBus Connections

SMC "0" SMBus Connections

(Write: 0x16 Read: 0x17)

SO-DIMM "A"

SMC "B" SMBus Connections

SMC "MANAGEMENT" SMBUS CONNECTIONS

U4900

AIRPORT

SMCSMC MGMT Bus

ICH8-M SMBus Connections

5%

402

1/16W

4.7K

MF-LF2

1R5200

MF-LF1/16W5%

402

4.7K

2

1R5201

MF-LF

8.2K5%

1/16W

4022

1R52808.2K5%

MF-LF1/16W

4022

1R5281MF-LF1/16W

4.7K5%

4022

1R5261

1/16W

4.7K

402MF-LF

5%

2

1R5260

100K5%1/16WMF-LF4022

1R52715%

100K1/16WMF-LF

4022

1R5270

MF-LF1/16W

4.7K5%

4022

1R5251

402

1/16WMF-LF

5%4.7K

2

1R5250

402MF-LF1/16W5%10K

2

1R5231

MF-LF1/16W

402

5%10K

2

1R5230

5%1/16WMF-LF402

10K

2

1R523310K

1/16W5%

MF-LF4022

1R5232


051-7455 01

7647

SMBUS CONNECTIONSSYNC_MASTER=WFERRY

=SMBUS_BATT_SCL

THRM_HEATPIPE_SMB_CLK

THRM_HEATPIPE_SMB_DATA

=PP3V3_S0_SMBUS_SMC_0_S0

SMBUS_SMC_0_S0_SCLMAKE_BASE=TRUE

SMB_BSA_CLK

SMB_BSA_DATA

=I2C_SODIMMB_SDA

=I2C_SODIMMB_SCL

SMB_DATA

SMB_CLK

=PP3V3_S0_SMBUS_SB

SMBUS_SB_SDAMAKE_BASE=TRUE

MAKE_BASE=TRUESMBUS_SB_SCL

=I2C_SODIMMA_SDA

=I2C_SODIMMA_SCL

=SMBUS_CK505_SDA

SMB_B_S0_DATA

SMB_B_S0_CLK

SMB_0_S0_CLK

SMB_0_S0_DATA

=PP3V42_G3H_SMBUS_SMC_BSA

SMB_A_S3_DATA

SMB_A_S3_CLK

SMBUS_SMC_A_S3_SDAMAKE_BASE=TRUE

SMBUS_SMC_A_S3_SCLMAKE_BASE=TRUE

=PP3V3_S3_SMBUS_SMC_A_S3

SMB_ME_DATA

SMB_ME_CLK

=PP3V3_S5_SMBUS_SB_ME

THRM_CPU_SMB_DATA=SMBUS_BATT_SDASMBUS_SMC_BSA_SDA

MAKE_BASE=TRUE

MAKE_BASE=TRUESMBUS_SMC_BSA_SCL

=SMBUS_CK505_SCL

=PP3V3_S0_SMBUS_SMC_B_S0

SMBUS_SMC_B_S0_SCLMAKE_BASE=TRUE

SMBUS_SMC_0_S0_SDAMAKE_BASE=TRUE

MAKE_BASE=TRUESMBUS_SB_ME_SCL

SMBUS_SB_ME_SDAMAKE_BASE=TRUE

=SMB_AIRPORT_DATA

=PP3V3_S3_SMBUS_SMC_MGMT

THRM_CPU_SMB_CLK

SMBUS_SMC_MGMT_SCLMAKE_BASE=TRUE

MAKE_BASE=TRUESMBUS_SMC_MGMT_SDASMB_MGMT_DATA

=SMB_AIRPORT_CLK

=I2C_SMS_SCL

MAKE_BASE=TRUESMBUS_SMC_B_S0_SDA

=I2C_SMS_SDA

SMB_MGMT_CLK

73A3

73A3

73A3

73A3

76C3

51B7

76C3 57A2

49D4

49D4

7C4

76C3

44A5

44A5

31A6

31A6

24D5

24D5

7C4

30A6

30A6

28B6

44A5

44A5

44B8

44B5

7B1

44A5

44A5

76C3

76C3

7A4

24D5

24D5

7D1

49B4

57A2 76C3

76C3

28B6

7C4

6B2

76C3

33B3

7A4

49B4

76C3

76C3 44C8

33B3

51A6

6B2

51A6

44C5

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IN

V-

V++

-

S D

G

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

CPU VOLTAGE SENSE

C5312 CLOSE TO SMC

C5376 CLOSE TO SMC

GPU VOLTAGE SENSE

Current Sense Calibration CircuitSwitches in fixed load on power supplies to calibrate current sense circuits

PROCESSOR DCIN VOLTAGE SENSE

DRIVEN LOW IN S0

PLACE RC FILTER CLOSE TO SMC

PLACE C5350 NEAR SMC

CPU CURRENT SENSE

MF-LF

1.00

1206

1%1/4W

2

1R5343

5.49K1%1/16WMF-LF4022

1R5351

402

10%0.22UFCERM-X5R6.3V2

1 C5350

402

1%MF-LF1/16W27.4K

2

1R5350

402

20%10VCERM

0.1UF

NOSTUFF

2

1C5304

402

20%10VCERM

NOSTUFF

0.1UF2

1C5355

402

1%1MMF-LF1/16W

2

1R5303

402MF-LF1/16W

1M1%

21R5300

4021/16WMF-LF

05%

21

R5307

4021/16WMF-LF1%

30.1K21

R5305

05%

MF-LF1/16W402

21

R5308

4021/16WMF-LF1%

30.1K21

R5306

20%

402X5R6.3V0.22UF

2

1 C5376402

1/16WMF-LF1%

4.53K21

R5381

SC70-5HPA00141AIDCKR

CRITICAL

5

2

4

3

1

U5300

402

470PF

CERM10%50V

21

C5300

1/16WMF-LF5%

402

1K 21R5342

CRITICAL

SN74AHCT1G125DCKRE4

SC70-5

45

13

2

U5302

SSM3J15FVSOT-723

2

1

3

Q5350

402CERM50V10%470PF

2

1C5303

CERM402

20%10V

0.1UF21

C5301

4.53K

4021/16WMF-LF1%

21R5302

402

0.22UFX5R6.3V20%

2

1C5302

CRITICAL

SI3446DVTSOP-LF

4

3 6521

Q5300

1/16W1%

4.53K

MF-LF402

21R5312

402X5R

0.22UF6.3V20%

2

1 C5312

01

76


CPU Current & Voltage SenseSYNC_MASTER=GPU

48

051-7455

=PPVCORE_S0_CPU SMC_CPU_VSENSE

GND_SMC_AVSS

GND_SMC_AVSS

SMC_GPU1_VSENSE=PPVCORE_S0_NB_GFX

CPU_ISENSE_OUT_R

SMC_PBUS_VSENSE

IMVP6_CPU_ISENSE_P

PBUS_SMC_VSENSE_EN_L

=PPVIN_S5_CPU_IMVP PBUS_S0_SMC_VSENSE

GND_SMC_AVSS

IMVP6_DROOP

SMC_CPU_ISENSE

GND_SMC_AVSS

IMVP6_CPU_ISENSE_NIMVP6_VO

=PPVCORE_S0_CPU

ISENSE_CAL_EN_5V_RISENSE_CAL_EN

=PP5V_S0_ISENSECAL

ISENSE_CAL_EN_5V

MIN_LINE_WIDTH=0.50 mmMIN_NECK_WIDTH=0.20 mmCPUVCORE_ISENSE_CAL

CPU_ISENSE_R_P

CPU_ISENSE_R_N

=PP3V3_S0_CPUPOWER

66C2

66C2

66C2

66C2

66B1

66B1

66B1

66B1

62C2

62C2

62C2

62C2

61C5

61C5

61C5

61C5

60B2

60B2

60B2

60B2

48B5

48C6

48C6

48C1

48C6

48B3

11D7

48C1

48C1

21C5

59D8

48B1

48B1

11D7

10D7

48A1

48B1

17D5

59D4

48A1

48A1

10D7

10B5 44C5

45B6

45B6

17B7

59C2

45B6

59B6

59C7

45B6

10B5

7D7 6B2

44C1

44C1

44A2 7B7

44C5

45A5

7B1

44C1

59A4

44C5

44C1

7D7

44B8

7A7

7C4

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IO

IO

IO

IO

OUT

IN

VDD

SMDATA

SMCLK

GND

DP1DN1

DP2

DN2

VDD

SMDATA

SMCLK

GND

DP1DN1

DP2

DN2

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(Write: 0x98 Read: 0x99)3. 10 MIL TRACE WIDTHS AND 10MIL SPACING BETWEEN THE GAURD

1. ROUTE DXP AND DXN DIFFERENTIALLY2. ROUTE GROUNDED GAURD TRACES AROUND THE DXP/DXN DIFF PAIR

PLACE C5524 NEXT TO Q5520

PLACE UNDER J3101

PLACE C5510NEXT TO U5500

3. 10 MIL TRACE WIDTHS AND 10MIL SPACING BETWEEN THE GAURD

1. ROUTE DXP AND DXN DIFFERENTIALLY2. ROUTE GROUNDED GAURD TRACES AROUND THE DXP/DXN DIFF PAIR

TO U5500 VDDPLACE C5501 NEXT

(WRITE: 0X98 READ: 0X99)

518S0521

CONNECTOR DRIVES TWOTEMP DIODE JUNCTIONS

1. ROUTE DXP AND DXN DIFFERENTIALLY2. ROUTE GROUNDED GAURD TRACES AROUND THE DXP/DXN DIFF PAIR3. 10 MIL TRACE WIDTHS AND 10MIL SPACING BETWEEN THE GAURD

HEAT-PIPE/FIN-STACK TEMPERATURE ZONE

1. ROUTE DXP AND DXN DIFFERENTIALLY

ROUTE CPU_THERMD_P AND

10 MIL TRACE

CPU_THERMD_N ON SAME

PLACE C5522 NEAR U5520 VDD

PLACE C5501 NEAR U5500 VDD

ADDR= 1001 100B

PLACE C5511

LAYOUT NOTE: LAYOUT NOTE:

ADD GND GUARD TRACE

FOR CPU_THERMD_P AND

CPU_THERMD_N LAYER.

10 MIL SPACING

NEXT TO U5500

ADDR= 1001 100B

(TO CPU INTERNAL THERMAL DIODE)

CPU TEMPERATURE ZONE

2. ROUTE GROUNDED GAURD TRACES AROUND THE DXP/DXN DIFF PAIR3. 10 MIL TRACE WIDTHS AND 10MIL SPACING BETWEEN THE GAURD

CRITICAL

78171-0004M-RT-SM

4

3

2

1

6

5

J5550

0.0022UF10%50V402CERM

NOSTUFF

2

1 C5524

402CERM6.3V1UF10%

2

1 C5502

0.0022UF10%CERM40250V2

1 C5510

40216V0.1UFX5R10%

2

1 C5501

402MF-LF1/16W5%

33 21R5524

4026.3V10%CERM

1UF2

1 C5523

402CERM

0.0022UF50V10%

2

1 C5521

402CERM50V10%0.0022UF

2

1 C5520

402MF-LF1/16W1%10

21

R5522

CRITICAL

EMC1043-5MSOP

6

78

5

3

1

4

2

U5520

402MF-LF1/16W1%10

21

R5523

40216V0.1UF10%X5R2

1 C5522

SOT732-3BC846BM3T5G

CRITICAL

2

3

1Q5520

402MF-LF1/16W5%

33 21

R5501

CRITICAL

MSOPEMC1043-5

6

78

5

3

1

4

2

U5500

0.0022UFCERM40250V10%

2

1 C5511

TEMPERATURE SENSESYNC_MASTER=GPU

01

76


49

051-7455

THRM_HEATPIPE_P

THRM_HEATPIPE_N

PP3V3_S0_THRM_CPU_F =PP3V3_S0_THRM_SNR

THRM_CPU_SMB_DATATHRM_CPU_SMB_CLK

CPU_THERMD_P

CPU_THERMD_N

THRM_DIMM_DX_N

THRM_DIMM_DX_F_N

THRM_DIMM_DX_PTHRM_DIMM_DX_F_P

THRM_HEATPIPE_SMB_DATATHRM_HEATPIPE_SMB_CLK

PP3V3_S0_THRM_HEATPIPE_F =PP3V3_S0_THRM_SNR

THRM_FINSTACK_N

THRM_FINSTACK_P

49D2

49C2

6A1

6A1

7C4

47C3

47C3

9C6

9C6

6A1

6A1

47D3

47D3

7C4

6A1

6A1

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D

GS

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TACHMOTOR CONTROL

NC

GNDNC

518S0521

5V DC47K1/16W5%MF-LF402

21R5665

5%

402MF-LF1/16W47K

2

1R5660

5%1/16WMF-LF

402

100K

2

1R5661SSM3K15FVSOD-VESM

21

3

Q5660

CRITICAL

78171-0004M-RT-SM

4321

6

5

J5601

FanSYNC_DATE=11/10/2005

01

50

SYNC_MASTER=ENET

76

051-7455

FAN_RT_PWMSMC_FAN_1_CTL

SMC_FAN_1_TACH

=PP5V_S0_FAN_RT

FAN_RT_TACH

=PP3V3_S0_FAN_RT

44A8

44A8

7A7

7C4

6D2

6D2

6D2

6D2

6D2

6D2

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TEST

S0S1

PS

GND

NC2NC1

OUTPUTX

NC13NC14

OUTPUTZ

OUTPUTY

VMUX

SELF

THRMLPAD

VDD

SDO

VDD

GND

INT

SCK

SDI

RESERVED

CSB

VDDIO

NC

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

(Placed on board bottom side)Desired Orientation

+X

(UP)+Z

+Y

1

Package Top

NC

NC

SMC_ACC_SELFTEST-->is a test signal

PAGE NOTES

SMS_ONOFF_L - CONNECT TO SMC TO BE ABLE TO PUT SMS INTO LOW-POWER MODE

5/19/2005 - FIRST REVISION OF PAGE

0 -->Normal operation

Desired Orientation(Placed on board bottom side)

+Y

Package Top

1

+Z (up)

+X

NC

NC

NC

7/26/2005 - REMOVED BOM TABLE AND UPDATED SYMBOL TO KXM52-20507/26/2005 -

=PP3V3_S3_SMS - 3.3V POWER FOR SMS (STAYS ALIVE IN SLEEP)

SMS_ACC_*_AXIS - ACCELEROMETER OUTPUT TO SCUOUTPUT

PAGE HISTORY

INPUT

7/26/2005 - CONNECTED PD PIN TO SMC’S SMS_ONOFF_L

NCNC

NC

1 -->Self test

NC

16V0.1UF10%

X5R4022

1C5920

402MF-LF1/16W5%10K

2

1R5921

DFNKXPA42050

CRITICAL 123

15

9

1011

8

6

7

5

2

1413

1

4

U5920

10%16V402

0.033UFX5R2

1C590510%16V402

0.033UFX5R2

1C5906

LGANOSTUFF

SMB380

92

7

8

6

10

1

12

11

43

5

U5930

NOSTUFF

402

10%CERM-X5R16V0.022UF

2

1 C5931NOSTUFF

0.1UF10%16VX5R4022

1 C5932

10%16VX5R402

0.033UF2

1C5904

SMS

01

SYNC_MASTER=SMC SYNC_DATE=08/23/2005

51 76

051-7455

=PP3V3_S3_SMBUS_SMC_MGMT

=I2C_SMS_SDA

=I2C_SMS_SCL

SMC_SMS_INT

SMS_Z_AXISSMS_Y_AXISSMS_X_AXIS

SMS_ONOFF_L

=PP3V3_S3_SMS

SMS_ACC_SELFTEST

47C3

45C3

7A4

47B1

47B1

44B5

44A8

44A8

44A8

44A5

7A4

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SO

VDD

CE*

SCK

VSSHOLD*

SI

WP* OUTIN

IN IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

R6191 close to SB

R6190 close to SB

R6114 close to u6100

R6193 close to SB

10%

X5R16V

0.1UF

4022

1C6100

MF-LF

3.3K

402

5%1/16W

2

1R61013.3K

MF-LF402

5%1/16W

2

1R6100

PLACEMENT_NOTE=Place R6114 within 12.7mm of U6100

15

MF-LF402

5%1/16W

21

R6114

CRITICAL

OMIT

16MBITSOI

SST25VF016B

3

4

8

2

56

7

1

U6100

23C5 73A3


402

5%1/16W

15

MF-LF

21

R6190


15

1/16W5%

402MF-LF

21

R619123C5 73A3

23C5 73A3


1/16W5%

MF-LF402

1521

R619323C5 73A3

051-7455 01

7652

SPI ROMsSYNC_MASTER=WFERRY SYNC_DATE=04/26/2006

SPI_A_HOLD_LSPI_A_WP_L

=PP3V3_S5_ROM

SPI_A_SCLK_R

SPI_CE_L<0>SPI_CE_R_L<0>

SPI_SCLK_R

SPI_A_SO_R

SPI_A_SI_R SPI_SI_R

SPI_SO

7D1

73A3

73A3 73A3

73A3

www.vinafix.vn

IN

IN

IN

IN

OUT

THRM_PAD NC

IN1

ENIN2

OUT1OUT2NR/FB

GND

PORT-B-VREFO2

PORT-A-VREFO/DCVOL

PORT-E-L

THRM_PAD

AVSS1

SYNC

CD-R

PORT-F-VREFO

PORT-E-VREFO

PORT-B-VREFO

PORT-C-VREFO

PORT-B-R

PORT-B-L

PORT-E-R

PORT-H-R

PORT-H-L

PORT-G-R

PORT-G-L

JDREF

VREF

PORT-D-R

PORT-D-L

PORT-C-RPORT-C-L

SPDIFO

PORT-F-R

PORT-F-L

DVSS

CD-GND

BEEP

AVSS2

AVDD2

AVDD1

SDATA_IN

CD-L

SENSE_ASENSE_B

GPIO1/DMIC-L

BCLK

DVDD

NC

SPDIFI/EAPD/MIDI-I/DMIC-R

PORT-A-LPORT-A-R

RESET*

GPIO0/DMIC-CLK

SDATA_OUT

DVDD_IO

REV B3

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

AUDIO CODECAPPLE P/N 353S1538

PLACE R6210, R6211, AND C6224 CLOSE TO U6201VOUT=1.2246V*[1+(R6210/R6211)]=4.58V

AUDIO 4.5V REGULATORAPPLE P/N 353S1576

0.1UF

CRITICAL

X5R402

16V10%

2

1 C6208

5%

MF-LF

39

402

1/16W

21

R6204

50V10%0.001UF

402CERM2

1 C6212

0.001UF

CERM50V10%

4022

1 C620610%

CERM50V

402

0.001UF2

1 C62030.001UF

402CERM

20%50V2

1 C62070402

FERR-220-OHM21

L6201

20.0K

MF-LF

1%

402

1/16W

2

1R6205

6.3VCERM

CRITICAL

1UF10%

4022

1C6200

CASE-B2

CRITICAL

POLY

20%6.3V

150UF2

1C6205CRITICAL

150UF

CASE-B2

6.3VPOLY

20%2

1C6204

0402

FERR-220-OHM21

L6200

20%10UF

603

CRITICAL

X5R6.3V 2

1C6221

402

1K

1/16W5%

MF-LF

21

R6202

0.1UF

402

10%

X5R16V2

1 C6220

5%

402MF-LF1/16W

0

NO STUFF

21

R6200

CERM50V10%0.001UF

4022

1 C6223

0402

FERR-220-OHM21

L6202

402

1/16W

29.4K

MF-LF

1%

2

1R6211

1/16W1%

MF-LF

80.6K

4022

1R6210

39

402MF-LF1/16W5%

21

R6206

402

5%100K1/16WMF-LF

2

1R6209

SONLREG_TPS79501DRB

9

43

5

7

21

6

8

U6201

CRITICAL

QFNALC885Q-VB3-GR

27

49

104847

3413

58

11

4645

4443

301716

31151436

35

29

2423

32

28

2221

33

4139

3740

32

74

91

20

1819

12

6

42

26

3825

U6200

MF-LF

10K

402

1/16W5%

2

1R6271

100K

402MF-LF1/16W5%

NO STUFF

2

1R6270

50V

15PF5%

402CERM2

1 C6224

3.3UF10%

CRITICAL

SMA-LFTANT16V 2

1C6210

0.001UF

402

10%50VCERM2

1 C6201

100K1/16WMF-LF402

5%

2

1R6203

MF-LF

5%0

NO STUFF

402

1/16W

2

1R6201

53

01

76

051-7455

AUD_CODEC_JDREF

NC_AUD_VREF_PORT_DNO_TEST

NC_AUD_VREF_PORT_CNO_TEST

CODEC_DVDDVOLTAGE=3.3VMIN_NECK_WIDTH=0.20MM

NO_TESTNC_BAL_IN_COM

NC_AUD_BI_PORT_E_LNO_TEST

NC_AUD_VREF_PORT_ENO_TEST

NO_TESTNC_BAL_IN_R

NC_AUD_BI_PORT_E_RNO_TEST

CODEC_SDATA_IN

VOLTAGE=3.3V=PP3V3_S0_AUDIO


AUD_SPDIF_O

ACZ_SDATAIN<0>

CODEC_DVDDACZ_SYNC

AUD_GPIO_1

MIN_NECK_WIDTH=0.20MMAVDD_ADC_DAC

VOLTAGE=4.5VPP4V5_AUDIO_ANALOG


NO_TEST NC_AUD_BI_PORT_F_L

PP4V5_AUDIO_ANALOG

4V5_REG_FB

AUD_4V5_REG_IN

AUD_BI_PORT_A_R

AUD_SPDIF_IAUD_SENSE_A

AUD_SPDIF_OUT

AUD_SENSE_B

NO_TEST NC_AUD_BI_PORT_F_RNO_TEST NC_AUD_VREF_PORT_F

AUD_BI_PORT_A_L

=GND_AUDIO_CODEC

AUD_BI_PORT_D_L

AUD_BI_PORT_C_L

ACZ_BITCLK

ACZ_SDATAOUT

AUD_GPIO_0

BEEP


=PP5V_S0_AUDIOVOLTAGE=5V


=GND_AUDIO_CODEC

=PP3V3_S0_AUDIO

AUD_BI_PORT_C_R

ACZ_RST_L

NO_TESTNC_BAL_IN_L

AUD_BI_PORT_D_R

NO_TESTNC_VRP

AUD_REG_SHDN_L

MIN_LINE_WIDTH=0.30 MMVOLTAGE=0VMIN_NECK_WIDTH=0.20 MM

=GND_AUDIO_CODEC

AUD_VREF_PORT_A

AUD_VREF_PORT_BAUD_BI_PORT_B_LAUD_BI_PORT_B_R

NC_AUD_BI_PORT_G_LNO_TESTAUD_BI_PORT_G_R

NC_AUD_BI_PORT_H_LNO_TESTNC_AUD_BI_PORT_H_RNO_TEST

AUD_CODEC_VREF

56C4

56C4

56C4

56B8

56B8

56B8

56B5

56B5

56B5

56B4

56B4

56B4

56B1

56B1

56B1

56A8

56A8

56A8

56A4

56A4

56A4

55B3

55B3

55B3

54C8

54C8

54C8

54B8

54B8

54B8

56B5

54A8

54A8

56B5

54A8

55D8

53B7

56C4

53D3

55D8

53D3

53A7

8A5

8A5

56C8

53A7

8A5

8A5

7A7

53B7

53D7

8A5

53A7

53C8 7C4

6D1

53D6

6C1

53A3

53D3

56C4

55B3

56A8

55D3

56C8

56C4

8B4

54B8

56B1

6C1

6D1

54A8

6D1

8B4

7C4

56A1

6C1

54C8

8B4

56C2

56B4

56A4

56A4

54A8

www.vinafix.vn

IN

IN

IN

OUT

OUT

OUT

OUT

OUT

OUT

IN

GND PGND

VDD PVDD

IN-

IN+

SYNCOUT-

OUT+

SHDN*

THRMLPAD

GND PGND

VDD PVDD

IN-

IN+

SYNCOUT-

OUT+

SHDN*

THRMLPAD

GND PGND

VDD PVDD

IN-IN+

SYNC

OUT-OUT+

SHDN*

THRMLPAD

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

80 HZ < FC < 132 HZ12DBGAIN

APN:353S1595

362 HZ < FC < 603 HZ

SATELLITE & SUB TWEETER AMPLIFIER

RIGHT SATELLITE

SUB-TWEETER

LEFT SATELLITE

SATELLITE

SUB

MF-LF1/16W

10K

402

5%

2

1R6610

16V

402X7R10%

0.047UF

CRITICAL

21

C6610

10%16VX7R

0.047UF

CRITICAL

402

21

C6620

16V

402

10%

CRITICAL

X5R

0.1UF2

1C6631

FERR-1000-OHM

0402

21

L6611

53C7

53C7

53C7

1uF

CERM402

10%6.3V 2

1C6607

0

1/16WMF-LF

5%

402

R6600

0402

FERR-1000-OHM21

L6620

0402

FERR-1000-OHM21

L6610

6B1 55C2

6B1 55C2

6B1 55C2

6B1 55C2

6.3V

1UF10%

CERM402

2

1C6606 6A1 55C2

6A1 55C2

10%

CRITICAL

16V

402X5R

0.1UF21

C6630FERR-1000-OHM

0402

21

L6630

53B2

X7R10%

CRITICAL

16V

0.047UF

4022

1C6621

402

1uF6.3V10%

CERM 2

1C6609

CRITICAL

POLY6.3V

120UF

CASE-B2

20%2

1 C6605

MAX9705

CRITICAL

TDFN1

1

11

65

10

7

89

23

4

U6630

CRITICAL

MAX9705TDFN1

1

11

65

10

7

89

23

4

U6610

CRITICAL

MAX9705TDFN1

1

11

65

10

7

8

9

2

3

4

U6620

X7R10%16V

CRITICAL

0.047UF

4022

1C6611

1uF10%

CERM6.3V

4022

1C6608

6.3V

1UF10%

CERM402

2

1C6602CRITICAL

20%47UF

POLY6.3V

CASE-B3-SM2

1 C6601

4021/16WMF-LF

1005%

2

1R6601

20%6.3VPOLY

47UF

CRITICAL

CASE-B3-SM2

1 C66036.3V

1UF10%

CERM402

2

1C6604

0

402

5%

MF-LF1/16W

2 1

R6660

MF-LF

5%

402

0

1/16W

2 1

R6661

0

402

5%

MF-LF1/16W

2 1

R6670

MF-LF

5%

402

0

1/16W

2 1

R6671

0

402

5%

MF-LF1/16W

2 1

R6680

1/16WMF-LF

5%

402

02 1

R6681

402

5%100

MF-LF1/16W

2

1R6602

SM21

XW6600

01

54 76


AUDI0: SPEAKER AMPSYNC_MASTER=M70AUDIO

051-7455

AUD_SPKRAMP_INR

=GND_AUDIO_CODEC

PP5V_S0_AUDIO_F

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 MMVOLTAGE=5V

=GND_AUDIO_CODEC

AUD_SPKRAMP_SHUTDOWN_L

MAX9705_SUB_N

=GND_AUDIO_AMP

AUD_BI_PORT_D_R

=PP5V_S0_AUDIO_AMP

MIN_LINE_WIDTH=0.60 MMVOLTAGE=5V


=GND_AUDIO_AMP

PP5V_S0_AUDIO_F

SPKRAMP_THERMPLANE

SPKRAMP_L_N_OUT

=GND_AUDIO_AMP

=PP5V_S0_AUDIO_AMP

=PP5V_S0_AUDIO_AMP

PP5V_S0_AUDIO_F

AUD_SPKRAMP_INSUB_L AUD_SPKRAMP_INSUB

SPKRAMP_SYNC1

=GND_AUDIO_AMPMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.60 MM

SPKRAMP_THERMPLANE

MIN_LINE_WIDTH=0.30 mmMIN_NECK_WIDTH=0.20 MMSPKRAMP_L_P_OUT

SPKRAMP_R_P_OUT

SPKRCONN_R_P_OUT

MIN_LINE_WIDTH=0.30 mmMIN_NECK_WIDTH=0.20 MM

MIN_LINE_WIDTH=0.30 mmMIN_NECK_WIDTH=0.20 MMSPKRAMP_R_P_OUT

SPKRCONN_L_P_OUTMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 mm

MIN_LINE_WIDTH=0.30 mmMIN_NECK_WIDTH=0.20 MMSPKRAMP_SUB_P_OUT

MIN_NECK_WIDTH=0.20 MMSPKRCONN_SUB_P_OUT


MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 mm

SPKRCONN_R_N_OUT

SPKRCONN_L_N_OUTMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 mm


SPKRCONN_SUB_N_OUTMIN_NECK_WIDTH=0.20 MM

SPKRAMP_THERMPLANE

MIN_NECK_WIDTH=0.20 MMSPKRAMP_L_N_OUT



SPKRAMP_SUB_N_OUTMIN_NECK_WIDTH=0.20 MM


SPKRAMP_R_N_OUTMIN_NECK_WIDTH=0.20 MM

AUD_BI_PORT_D_L

SPKRAMP_SYNC2

SPKRAMP_SUB_P_OUT

AUD_GPIO_0

AUD_BI_PORT_G_R

SPKRAMP_SYNC1

MAX9705_L_N

AUD_SPKRAMP_INL SPKRAMP_L_P_OUT

SPKRAMP_THERMPLANE

MAX9705_R_N

AUD_SPKRAMP_INR_L

AUD_SPKRAMP_INL_L



SPKRAMP_SUB_N_OUT

SPKRAMP_SYNC2

SPKRAMP_R_N_OUT

=GND_AUDIO_CODEC

56C4

56C4

56C4

56B8

56B8

56B8

56B5

56B5

56B5

56B4

56B4

56B4

56B1

56B1

56B1

56A8

56A8

56A8

56A4

56A4

56A4

55B3

55B3

55B3

54B8

54C8

54C8

54A8

54B8

54A8

53D3

53D3

54C8

54C8

54B8

54C8

54D8

54D8

54C8

53D3

53B7

53B7

54B8

54B8

54A8

54A8

54B8

54C8

54B8

54C4

54C4

53B7

53A7

54C8

53A7

54C8

54A5

7A7

54A5

54C4

54C4

54A5

7A7

7A7

54C8

54A8

54B4

54B4

54B4

54C8

54B8

53A7

8B4

54B8

8B4

54B8

8A4

6D1

8A4

54B8

54A4

54C3

8A4

6D1

6D1

54C4

54C4

8A4

54A4

54B4

54D3

54C4

54A4

54A4

54B4

54A4

54C4

54B4

54B3

54A4

54C3

54A4

54A6

54A6

54B3

54A4

54C3

8B4

www.vinafix.vn

IN

IN

IN

IN

IN

IN

VCCGNDVOUT

SHLD_PIN

SHLD_PIN

VINGNDVCC

SHLD_PIN

SHLD_PIN

OUT

OUT

OUT

BI

BI

OUT

IN

BI

BI

OUT

OUT



TABLE_5_ITEM

TABLE_5_ITEM

TABLE_5_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

MIC EMI FILTER

SPEAKER CONNECTORAPN:518S0519

APN:514-0408

APN:514S0392MIC CONNECTOR

APN:518S0521

AUDIO JACK 1: LO/HP CONNECTOR, SPDIF TX

AUDIO JACK 2: LINE IN CONNECTOR, SPDIF RX

APN:514-0409

0402-LF

FERR-120-OHM-1.5A21

L6700

0402

FERR-1000-OHM21

L6702

0402

FERR-1000-OHM21

L6703

0402

FERR-1000-OHM21

L6705

0402

FERR-1000-OHM21

L6707

10%1UF6.3VCERM402

2

1 C6700

6A1 54B1

6A1 54B1

6B1 54D1

6B1 54C1

SM21

XW6700

SM21

XW6701

10

402

5%1/16WMF-LF

21

R6749

6.3V

603

20%10uF

X5R2

1 C6751

0402

FERR-220-OHM21

L6790

6B1 54C1

6B1 54C1

MF-LF5%

0

1/16W402

21

R6791

OMIT

F-RT-TH

CRITICAL

AUDIO-IN-MG3-M42

6

8

9

5

4

3

2

10

1

7

J6750

SM21

XW6705

48227-0301M-RT-SM1

CRITICAL

3

2

1

5

4

J6701

F-RT-TH

OMITCRITICAL

AUDIO-OUT-M42-MG3

8

7

9

5

4

32

10

1

6

J6700

CRITICAL

78171-0004M-RT-SM

4

3

2

1

6

5

J6703

M-RT-SM

CRITICAL

78171-0002

2

1

4

3

J6702

0402

FERR-1000-OHM21

L6770

0402

FERR-1000-OHM21

L6772

6B1 56A6

6B1 56A6

0402-LF

FERR-120-OHM-1.5A21

L6750

0402-LF

FERR-120-OHM-1.5A21

L6751

05%

402

1/16WMF-LF

2

1R6740

0402

FERR-1000-OHM21

L6771

FERR-1000-OHM

0402

21

L6773

402

CRITICAL

6.8V-100PF

2

1

DZ6770

4026.8V-100PF

CRITICAL2

1

DZ6771

6.8V-100PF

CRITICAL

402

2

1

DZ6702402

CRITICAL

6.8V-100PF

2

1

DZ6704

6.8V-100PF402

CRITICAL2

1

DZ67056.8V-100PF

CRITICAL

402

2

1

DZ6703

CRITICAL

6.8V-100PF402

2

1

DZ6753

CRITICAL

4026.8V-100PF

2

1

DZ6752

0402

FERR-1000-OHM21

L6754

6.8V-100PF

CRITICAL

402

2

1

DZ6754

6.8V-100PF402

CRITICAL2

1

DZ6755

5.6V-15A0405

NO STUFF

42

31

DZ6700

NO STUFF

5.6V-15A0405

42

31

DZ6701

04055.6V-15A

NO STUFF

42

31

DZ6750

04055.6V-15A

NO STUFF

42

31

DZ6751

0402

FERR-1000-OHM21

L6756

1/16W5%

10K

402MF-LF

21

R6750

1/16W5%

402

4.7

MF-LF

21

R6751

CERM40250V5%100PF

2

1 C6756

0402

FERR-1000-OHM21

L6755

FERR-1000-OHM

0402

21

L67530402

FERR-1000-OHM21

L6752

0402

FERR-1000-OHM21

L6757

CERM6.3V

402

10%1UF

2

1 C6750

53C2

56A2

56B2

56A8

53C2

56C1

56C1

0402-LF

FERR-120-OHM-1.5A21

L6701

0402

FERR-1000-OHM21

L6704

FERR-1000-OHM

0402

21

L6706

56B6 56B8

56C8

1/16WMF-LF402

10K

5%

21

R6700

4.7

402MF-LF5%

1/16W

21

R6701

100PF50VCERM402

5%2

1 C6705

NORMALJ6700 CRITICAL514-0409 1 CONN, 3.5MM COMBO AUDIO OUT, RA MG3, LF

514-0408 CONN, 3.5MM COMBO AUDIO IN, RA, MG3, LF NORMALJ67501 CRITICAL

FANCYCRITICALJ6750CONN, 3.5MM COMBO AUDIO IN, RA, BLACK, LF514-0410 1

1 FANCYJ6700514-0411 CRITICALCONN, 3.5MM COMBO AUDIO OUT, RA, BLACK, LF

SYNC_MASTER=M70AUDIO SYNC_DATE=03/12/2007

76

01

55

051-7455

AUDIO: JACK

=GND_AUDIO_CODEC

AUD_CONNJ1_RING_F

PP3V3_S0_AUDIO_SPDIF

MIC_HI_CONN

MIC_LO_CONN

AUD_PORTC_L

=GND_CHASSIS_AUDIO_JACK

GND_AUDIO_SPDIF_DGND

AUD_CONNJ2_SLEEVEDET

AUD_CONNJ2_RING_FAUD_CONNJ2_TIP

AUD_CONNJ2_RING

AUD_CONNJ2_SLEEVE

AUD_CONNJ2_TIPDET

PP3V3_S0_AUDIO_SPDIF

AUD_J2_OPT_OUT

AUD_CONNJ1_RING

AUD_CONNJ1_SLEEVE

GND_AUDIO_SPDIF_DGND

MIC_LO_CONN

SPKRCONN_L_P_OUT

MIC_SHLD_CONN

SPKRCONN_R_P_OUTSPKRCONN_SUB_N_OUT

SPKRCONN_R_N_OUT

=PP3V3_S0_AUDIO

AUD_J1_SLEEVEDET_R

AUD_PORTA_L

AUD_PORTA_R

AUD_CONNJ1_TIPDET

SPKRCONN_SUB_P_OUT

AUD_CONNJ1_SLEEVE_F

SPKRCONN_L_N_OUT

MIC_HI_CONN

CHASSIS_AUDIO_JACK_ISOL

MIC_HI

MIC_SHLD_CONN

AUD_CONNJ1_TIP

AUD_CONNJ1_SLEEVEDET

AUD_SPDIF_I

AUD_PORTC_R

AUD_CONNJ1_TIP_F

CHASSIS_AUDIO_JACK_ISOLAUD_J1_COM

AUD_CONNJ1_SLEEVEDET_F

AUD_CONNJ2_TIP_F

CHASSIS_AUDIO_JACK_ISOL

AUD_CONNJ2_SLEEVEDET_F

AUD_J2_TIPDET_R CHASSIS_AUDIO_JACK_ISOL

AUD_SPDIF_OUT

MIC_HI_CONN_F

MIC_LO_CONN_F

AUD_J1_TIPDET_R

AUD_CONNJ2_TIPDET_F

AUD_CONNJ2_SLEEVE_F

AUD_J2_COM

MIC_LO

AUD_CONNJ1_TIPDET_F

56C4 56B8 56B5 56B4 56B1 56A8 56A4 54C8 54B8 54A8 53D3

56B5

53B7

56A6

53D7

55C8

56A6

55C1

55C8

55C8

53A7

55D3

55D3

55B1

55A1

53A7

55B1

55A8

55D3

55A8

55C1

55C1

8B4

55B8

6B1

6B1

8D8

55C8

55D8

55A8

6B1

6B1

7C4

6B1

55A3

6B1

55A3

55A3

55A8

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IN

OUT

OUT

INOUT

IN

IN

IN

IN

OUT

IN

IN

D

G S

D

SG

D

SG

D

SG

D

SG

OUTLINR

INL OUTR

SHDN*

CEXT

VCC

GND PADTHM

IN

OUTIN

IN OUT

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

PORT C LI

CODEC INPUT SIGNAL PATHSCONVERTER

N/A

NC

NC

NC

N/AN/A

VREF0x230x24N/ASPDIF IN

MIC INLINE IN

0x1B (E)

Line-in (PORT C) DETECT

PORT A HP/LO

MIC INPUT CIRCUITRY

PLACE C6852 NEAR U6200

0x070x0A

0x08

N/A

PIN COMPLEX

PORT A DETECT

PLACE L6800/C6800 CLOSE TO Q6800

N/A

PORT E DETECT(SPDIF DELEGATE)

B (80%)

0x1E (SPDIF OUT)GPIO 0

HP/LO DE-POP SWITCHAPN:353S1459

FUNCTION MIXER

CONVERTER MUTE CONTROL DET ASSIGNMENT

DET ASSIGNMENT0x1A (C)0x18 (B)0x1F (SPDIF IN)

N/A0x1A (C)

N/A

N/A

PIN COMPLEX0x15 (A)VREF_A(100%)

GPIO 00X15 (A)

0x16 (G)0x14 (D)

VOLUME

SUB SPKRSAT SPKRLINE OUTFUNCTION

CODEC OUTPUT SIGNAL PATHS

0X0F

0x06

0X05

0x040X260X0E

SPDIF OUT

0X25

0.1UF16V

X5R10%

4022

1

C68015%

402MF-LF1/16W

47K21

R6802

100UF

B2

CRITICAL

POLY6.3V20%

21

C6830

POLY

100UF

20%6.3V

B2

CRITICAL

21

C6831

53C2

55C3

55C3

53C2 53C2 56A8

55C3

X5R

CRITICAL

0.1uF

10%40216V

21

C6850

0

402

5%1/16WMF-LF

NO STUFF

21

R6853

SM

21

XW6800

MF-LF402

1/16W5%

NO STUFF

021

R6854

MF-LF 4025%1/16W

2.2K21

R6855

1/16WMF-LF

5%100K

4022

1R6852

330

MF-LF1/16W 5%

402

21

R6851

680PF10%50V

CERM402

CRITICAL

2

1C6851

6B1 55B3

6B1 55B3

6B1 55A1 55D3

16VX5R

0.1UF

402

10%

2

1 C6800

0402

FERR-1000-OHM

21

L6800

402

1/16W1%

MF-LF

39.2K

2

1R6806

1/16W

100K

5%

402MF-LF

21

R6803

270K

402MF-LF

5%1/16W

2

1R6861

CERM

10%16V

402

0.01UF

2

1 C6802

53C2

55C3 56B6

10K

MF-LF1/16W

5%

4022

1R6813

402

0.1UFX5R

16V10%2

1

C68115%

402MF-LF

47K

1/16W

21

R681255A3

10%

X5R402

0.1UF16V2

1 C6835

100PFNO STUFF

50V5%

CERM

CRITICAL

4022

1C6852

1%402

6.81K

MF-LF1/16W

21

R6850

CERM6.3V

1UF10%

4022

1 C6836

CRITICAL

20%6.3V

10UF

X5R603

2

1 C6853

SSM3K15FVSOD-VESM

21

3

Q6802

SOT563SSM6N15FE

45

3Q6800

SOT563SSM6N15FE

12

6Q6800

SOT563SSM6N15FE

45

3Q6801SSM6N15FE

SOT563

12

6Q6801

16V10%

SMA-LFTANT

CRITICAL

3.3UF2 1

C6832

SMA-LFTANT16V10%

3.3UF

CRITICAL

2 1

C6833

MF-LF

1%

402

1/16W

39.2K

2

1R6805

CRITICAL

TDFN

MAX9890BETA+

U6801

5%1/16W

10K

402MF-LF

2

1 R6839

53C2

1/16W5%

MF-LF402

270K

2

1R6801

1/16W5%

402

270K

MF-LF

2

1R6811

53C7 55B3

1/16WMF-LF402

1%27.4K

2

1R6836

55B3

MF-LF1/16W1%

27.4K

402 2

1R6837

53C7

402MF-LF1/16W1%

27.4K

2

1R6835

MF-LF1/16W1%

27.4K

402 2

1R6834

5%1/16W

402

0

MF-LF

NO STUFF

21

R6856


01

56 76

051-7455

AUDIO: JACK TRANSLATORSSYNC_MASTER=M70AUDIO

=GND_AUDIO_CODEC

AUD_PORTC_L

AUD_PORTC_R AUD_BI_PORT_C_R

AUD_BI_PORT_C_L

AUD_PORTA_DET_L

=GND_AUDIO_CODEC

=GND_AUDIO_CODEC

AUD_INJACK_INSERT_L

AUD_J2_DET_RC

MAX9890_CEXT

AUD_J1_DET_RC

PP3V3_S0_AUDIO_F

AUD_J2_TIPDET_R

PP3V3_S0_AUDIO_F

AUD_SENSE_A

AUD_PORTA_L

PP3V3_S0_AUDIO_F

MAKE_BASE=TRUEAUD_BI_PORT_B_L

AUD_BI_PORT_B_R

VREF_PORT_B_R

MAX9890_OUTR

AUD_BI_PORT_A_R

AUD_VREF_PORT_A

AUD_BI_PORT_A_L

MIC_IN

=GND_AUDIO_CODEC

=PP3V3_S0_AUDIO

AUD_J1_TIPDET_R

=GND_AUDIO_CODEC

AUD_J1_SLEEVEDET_R

AUD_J1_SLEEVEDET_R

AUD_PORTE_DET_L

AUD_J1_SLEEVEDET_INV

AUD_SENSE_B

AUD_OUTJACK_INSERT_L

AUD_VREF_PORT_B

=GND_AUDIO_CODEC

MAX9890_OUTL

AUD_PORTA_R

=GND_AUDIO_CODEC

=PP5V_S0_AUDIO

PP3V3_S0_AUDIO_F

=GND_AUDIO_CODEC

AUD_SENSE_A

MIC_HI

MIC_SHLD_CONN

=GND_CHASSIS_AUDIO_MIC

MIC_LO

56C4

56C4

56C4

56C4

56C4

56B8

56B8

56C4

56B8

56C4

56B8

56B8

56B8

56B5

56B5

56B8

56B5

56B8

56B5

56B4

56B5

56B4

56B4

56B5

56B4

56B5

56B4

56B1

56B4

56B1

56B1

56B1

56B1

56B4

56A8

56A8

56B1

56A8

56A8

56A8

56A8

56B1

56A4

56A4

56A4

56A4

56A4

56A4

56A4

56A8

55B3

55B3

55B3

55B3

55B3

55B3

55B3

55B3

54C8

54C8

54C8

54C8

54C8

54C8

54C8

54C8

54B8

54B8

54B8

54B8

54B8

54B8

54B8

54B8

54A8

54A8

54A8

54A8

54A8

54A8

54A8

54A8

53D3

53D3

53D3

53D3

55D8

53D3

53D3

53D3

53D3

53B7

53B7

53B7

56B8

56C8

56C8

53B7

53D7

53B7

53B7

53B7

53A7

56C8

53B7

53A7

53A7

53A7

56B3

56B8

56C8

56B8

53A7

53A7

53A7

56B8

53A7

53A7

7A7

56B3

53A7

8B4

8B4

8B4

56A8

56B3

53C2

56A8

53C2

53C2

8B4

7C4

8B4

55C3

53C2

8B4

8B4

6D1

56A8

8B4

8D8

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V-

V+

D SG

D

SG

D

SG

D

GS

NC

Y

B

A

GD

S

NC

V-

V+-

+

DSG

VOID

D1

D3

D4S3S2

GATE

S1 D2

TABLE_ALT_ITEM


TABLE_ALT_HEAD

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_ALT_ITEM

DC-JACK INTERFACE

LID HALL EFFECT SENSOR

518S0526

INRUSH LIMITER

BATTERY INTERFACE

NC NC

MLB TOP VIEW

PIN 1

OVP

NCACIN DETECTION

402MF-LF1/16W1%24.3K

2

1 R6932

0.1UF25VX5R402

10%2

1 C69301/16W402

5%100KMF-LF

2

1 R6933

1/16WMF-LF402

100K5%

2

1 R6931

SOT23-5LM397

CRITICAL

5

3

1

4

2U6990

CRITICAL

87438-0563M-RT-SM

54321

J6900

5%100K1/16WMF-LF4022

1 R690010%0.001UF50VCERM402

2

1 C6903

1K

402MF-LF1/16W1%

2

1 R6901

402MF-LF1/16W10K5%

2

1 R6903

MF-LF402

5%47K1/16W2

1

R6904

SC-75

RCLAMP2402B

CRITICAL

2

1

3

D6900 100KMF-LF402

5%1/16W

21

R6911

MF-LF8051/8W5%47

21

R6905

402

5%MF-LF1/16W1K

21

R6902

402

10%CERM50V0.001UF

2

1 C6907

SSM6N15FESOT563

1

2

6

Q6920

SSM6N15FESOT563

12

6Q6910

SSM6N15FESOT563

45

3Q6910

SSM3K15FVSOD-VESM

2 1

3Q6999

CRITICALHN2D01JEFSOT665

2

4

5

3

1

D6901

1/8W5%47MF-LF805

21

R6940

TC7SZ08AFEF

CRITICAL

SOT665

4

5

3

1

2

U6950SOT723-3NTK3142P

2

1

3Q6940

CRITICAL

TLV7211SC70

2

5

13

6

4U6900

SSM6N15FESOT563

45

3

Q6920

SM-LFFERR-50-OHM

21

L6901

0402-LF120-OHM-0.3A-EMI

21

L6902

120-OHM-0.3A-EMI0402-LF

21

L6903

120-OHM-0.3A-EMI0402-LF

21

L6904

FERR-50-OHMSM-LF

21

L6905

402

47pF5%50VCERM2

1 C6906

402

47pF5%50VCERM2

1 C69150.001UF10%50VCERM402

2

1 C690950V

402CERM10%0.001UF

2

1 C69050.001UF50VCERM10%

4022

1 C6911127216FA020

CRITICAL

F-ST-SM

9

8 7

6 5

4 3

20

2

19

18 17

16 15

14 13

12 11

10

1

J6950

0402600-OHM-300MA

21

L6909

0402600-OHM-300MA

21

L6907

10%0.01uF16VCERM402

2

1 C6921

0402600-OHM-300MA

21

L6908

CERM16V0.01uF10%

4022

1 C6920

X5R402

0.1UF25V10%

2

1 C6918

1/16WMF-LF402

102K1%

2

1R6908

5%

402MF-LF1/16W1M

21

R6910

4021/16W51.1K1%MF-LF2

1R6909

402

1%1/16WMF-LF

10.7K

2

1R6907

1%1/16W402

102KMF-LF2

1R6906

402MF-LF1/16W5%330K

2

1R6914

1/16W402MF-LF5%470K

2

1R691320%

60325VX5R

0.22UF2

1 C6917

SOIAO4409

CRITICAL

321

4

8765

Q6950

10%25V402X7R

0.01uF2

1 C6902

1206-1

CRITICAL6AMP-24V

21

F6900

U6990353S1297 ?353S1717 TI & NATIONAL

01051-74557657

DC-In & Battery ConnectorsSYNC_MASTER=POWERSYNC_DATE=07/13/2005

376S0466 Q6950 AOS MOSFET376S0543 ?

BATT_NEG

MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.2 MMACIN_ENABLE_L_DIV

PPDCIN_G3H_R

SMC_BC_ACOK

=PP3V42_G3H_ACIN

BATT_POS

VOLTAGE=18.5V

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.6 MMPP18V5_DCIN

SMC_LID

=PP3V42_G3H_LIDSWITCH

=GND_BATT_CHGND

PP3V42_G3H_LIDSWITCH_F

SMC_LID_F

GND_SMC_LID_F

SMBUS_BATT_SCL_F

=GND_BATT_CHGND

SMC_BS_ALRT_L_F

SMBUS_BATT_SDA_F

=SMBUS_BATT_SCL

BATT_POS_F

=SMBUS_BATT_SDA

SMC_BS_ALRT_L

ADAPTER_SENSE

ACIN_ENABLE_GATE

ONEWIRE_DCIN_DIV

ONEWIRE_ESDONEWIRE_OV

PP18V5_DCIN_ONEWIRE

=GND_DCIN_CHGNDONEWIRE_PWR_EN_L_DIV

ONEWIRE_PWR_EN_L

ONEWIRE_EN

SYS_ONEWIRE_BILAT

ACIN_ENABLE_L

SMC_BC_ACOK_ONEWIRE_R

SYS_ONEWIRE

=PPDCIN_G3H

BATT_POS_F PPVBATT_G3H_R

ACIN_DIV

ACIN_1V20_REF

SMC_ADAPTER_EN

=PP18V5_G3H_INRUSH

MIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.6 MMVOLTAGE=18.5V

SMC_BC_ACOK

PP18V5_DCIN_FMIN_LINE_WIDTH=2 MMMIN_NECK_WIDTH=0.20 MMVOLTAGE=18.5V

45B3

66A6

44D5

66A6

57C7

66B8

45C5

38C6

57C3

45B6

66A8

44B5

45C5

45D5

35C7

45B6

44C5

66A5

42C3

57A6

57A6

66B2

44C5

66A6

44B8

66B2

33C7

44C5

6D1

6C1

7B1

6D1

6B2

7B1

8D8

6D1

8D8

6D1

47C1

57D5

47C1

6D1

6C1

8C8

6C1

7B3

57B2

6C1

7B3

6C1

www.vinafix.vn

NCNC

NC

NC

UVLO_D

UVLO_CUVLO_B

UVLO_A

RESET*

DLY_OFF_CDLY_OFF_D

DLY_OFF_A

DLY_OFF_B

DLY_ON_D

DLY_ON_CDLY_ON_B

DLY_ON_A

GATE_D

GATE_CGATE_B

GATE_A

VDD

ENABLE_1

PADTHML

GND

SENSE

CT

VDD

GND

RESET*

MR*

D

SG

D

SGD

G

S

D

G

S

D

SG

D

SG

G

SD

TABLE_ALT_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


TABLE_ALT_HEAD

S0 FETS & POWER SEQUENCING & PGOOD

LATEST ISSUE: 2007/01/02

LOADING

CHANNELRDS(ON)LOADING

15 mOhm @4.5V

NC

NC

MOSFETN-TYPECHANNEL

3.3V S0 FET

RDS(ON)

MOSFETN-TYPE

MOSFET

~26MS

4.348 A

N-TYPEFDM6296

1.5V S0 RUN/SS CONTROL0.260 A

FDC655BN

FDC655BN 1.25V S0 RUN/SS CONTROL

U7002.3 has int 90K pull-up

DEASSERTED 160MS

5V S0 FET1.05V S0 RUN/SS CONTROL

LOADING33 mOhm @4.5V1.810 A

CHANNEL

1.8V S0 FET

RDS(ON) 33 mOhm @4.5V

AFTER UVLO_D VALID

NCNC

402

50V10%0.0022UF

CERM

21

C7003

402

10%0.0022UF50VCERM

21

C7004

CERM

0.0022UF10%

50V

40221

C7005

ISL6130IRZAQFN

CRITICAL2314171220

25

24

9

221911

10

7652

1

1516821

431318

U70004021/16W1%MF-LF

4.87K

2

1R700230.9KMF-LF4021/16W1%

2 1

R7001

1/16W1%7.5K

402MF-LF

2

1R7004

1%MF-LF4021/16W13.7K

2

1R7006

CERM-X5R40216V0.022UF10%

2

1 C7023

402CERM16V

NOSTUFF

10%0.01UF

2

1 C70220.01UF

NOSTUFF

16VCERM402

10%2

1 C7021

402CERM

1UF10%6.3V2

1 C7000

CRITICALTPS3808-1.25V

SOT23-6

6

51

3

2

4

U7002

402X5R16V10%0.1UF

2

1C7001

CERM40250V10%0.001UF

2

1C7002

SOT563SSM6N15FE

45

3Q7007

1/16W5%MF-LF

100K

4022

1R7012

28.7K1/16W1%

402MF-LF

2 1

R7003

402

22.1K1%MF-LF1/16W

2 1

R7005

4021/16WMF-LF5%330

2 1

R7040

SOT563SSM6N15FE

12

6Q7007

402MF-LF1/16W5%100K

2 1

R7030MF-LF5%330

4021/16W

2 1

R7031

0.01UFCERM40216V10%

2

1 C7030

MF-LF

10K5%1/16W402

2 1

R7050

402CERM50V10%0.0012UF

2

1 C7040

402

3305%MF-LF1/16W

2 1

R7051

CERM10%

402

0.001UF50V2

1 C7050

402MF-LF5%1/16W100K

2 1

R7041

NOSTUFF

16V10%

402

0.01UFCERM2

1 C7024

402

475%1/16WMF-LF

21

R7007

FDC655BNSOT6

CRITICAL

4

36521

Q7001

FDC655BNSOT6

CRITICAL

4

36521

Q7004

SOT563SSM6N15FE

45

3Q7006

SSM6N15FESOT563

12

6Q7006

402MF-LF1/16W470K5%

2

1R7061

FDM6296MICROFET3X3

CRITICAL

321

4

5

Q7000

? Q7000376S0448 376S0445

051-745576

01

58

S0 FETS & Power SequencingSYNC_MASTER=DSIMON-WF SYNC_DATE=05/31/2006

=PP5V_S5_FET

=PP5V_S0_FET

PGOOD_SEQUENCER

P5VS0_EN

P1V8S0_EN

=PP1V8_S0_FET

S0PWRGD_1V8_DIVS0PWRGD_3V3_DIVS0PWRGD_5V_DIV

PM_SLP_S3_L

PGOOD_1V8S3

=PP1V25_S0_FET

=PP1V8_S0_FET

=PP3V3_S5_FET

=PP3V3_S0_FET

=PP3V3_S0_FET

RUNSS_GATE_D_L

1V5S0_RUNSS

=PP3V3_S0_FET

=PP3V3_S0_FET

1V25S0_RUNSS

RUNSS_GATE_D_L

1V25S0_RUNSS_BUF

1V05S0_RUNSS_BUF

=PP5V_S5_FET

RUNSS_GATE_D_L

1V5S0_RUNSS_BUF

=PP1V8_S3_FET

PGOOD_1V5S0 ALL_SYSPWRGD_DLY

=PP5V_S0_FET

=PP3V3_S0_FET

1V05S0_RUNSS

MAKEBASE=TRUEALL_SYS_PWRGD_AND

=PP3V3_S0_FET

ALL_SYS_PWRGD

=PP5V_S5_FET

TP_DLY_ON_ATP_DLY_ON_B

TP_DLY_ON_D

DLY_OFF_BDLY_OFF_A

DLY_OFF_DDLY_OFF_C

P3V3S0_EN

PGOOD_1V05S0

TP_DLY_ON_CS0SEQ_BEGIN

RUNSS_GATE_D

62B8

58C4

58D3

58D3

58D3

58D3

58D3

45A6

58C3

58C3

58C4

58C4

58C4

58C4

65B5

44C5

58B8

58B8

58B8

58C3

65B5

58C3

58C3

65B5

58C6

35C7

65C4

58B3

58B3

58B3

58B8

58D5

58B3

58B8

44D8

58D5

58B3

58C8

58B8

33C7

58C4

65A5

58A3

58A3

58C2

61B5

58A3

58A3

58C2

58C6

58D4

58A3

58B3

27A5

58B3

7C1

7A8

7B8

24D3

62A3

7C7

7B8

7D1

7D6

7D6

58B2

6D7

7D6

7D6

64B6

58B2

7C1

58C2

7B4

61A3

7A8

7D6

61B5

7D6

6B2

7C1

61A6

www.vinafix.vn

IN

IN

OUT

IN

OUT

IN

VID0

DPRSTP*

NC

VW

COMP

FB

FB2

RBIAS

VR_TT*

NTC

VR_ON

PGOOD

PSI*

RTN

VSEN

DFB

DROOP

VO

OCSET

VSUM

ISEN2

VID1

VID3

VID2

VID4

VID5

VID6

PGND2

VIN VDD PVCC

LGATE2

PHASE2

UGATE2

ISEN1

PGND1

LGATE1

UGATE1

PHASE1

BOOT1

BOOT2

3V3

VDIFF

SOFT

DPRSLPVR

TPADGND

CLK_EN*

IMONOUT

TABLE_ALT_ITEM


TABLE_ALT_HEAD

TABLE_ALT_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

MIN_LINE_WIDTH

R1100/R1101 **ON THE CPU PAGE** PROTECT THE IMVP6 IF THE CPU IS NOT INSTALLED

(IMVP6_VW)

DCR=0.8mOhmMPC1055LR36

ERT-J0EV474J

FROM SMC (GND)

0

(GND)

0

Operation Mode

2-Phase CCM

1

(IMVP6_FB)

1-Phase DCM

1

MIN_NECK_WIDTH

DPRSTP*

10 10

PSI*

01

DPRSLPVR

0

1-Phase CCM

1-Phase DCM

ERT-J1VR103J

(IMVP6_VO)

(IMVP6_VSUM)

1

(IMVP6_PHASE2)

(IMVP6_ISEN2)

(IMVP6_PHASE1)

MIN_NECK_WIDTH

MIN_LINE_WIDTH MIN_NECK_WIDTH

(IMVP6_ISEN1)

DCR=0.8mOhmMPC1055LR36

MAX CURRENT = 44APWM FREQ. = 300 kHz

(IMVP6_VO)

NOTE 1: C7132,C7133 = 27.4 OHM FOR VALIDATING CPU ONLY.

(IMVP6_COMP)

IMVP6 CPU VCORE REGULATORMIN_LINE_WIDTH


50V

402CERM

10%

NO STUFF

0.0022UF

2

1 C7100

OMIT

SM

2

1

XW7100

NO STUFF

402

10%50VCERM

0.0022UF2

1 C7190 10K1/16W

402

1%MF-LF

21

R7100

1%

402MF-LF1/16W

3.65K

2

1 R7101

10%

402

16VX5R

0.1UF

2

1C7115

402

13.7K

MF-LF1%1/16W

2

1 R7116

1%11K1/16WMF-LF4022

1 R7115

402

1/16W10K1%

MF-LF

21

R71050.22uF10%

CERM-X5R6.3V

402

21

C7104

1/16W1%

402

3.65K

MF-LF2

1 R7143

MPC1055-SM0.36UH-30A-0.80MOHM

CRITICAL21

L7101

MPC1055-SM

CRITICAL

0.36UH-30A-0.80MOHM

21

L7100

NO STUFF

402CERM50V10%0.0022UF

2

1 C71020.0022UF

402

10%

NO STUFF

CERM50V2

1 C7192

10%16VX5R402

0.1UF

2

1C7127

105%

402

1/16WMF-LF

21

R7120

5%MF-LF402

1/16W10

21

R71126.3VCERM

1UF10%

4022

1 C7126

402CERM10%16V0.01UF

2

1 C7196

402

5%101/16WMF-LF

21

R712110%

402

0.1uF16VX5R2

1 C7130

402

1%1/16WMF-LF

NO STUFF

1K

21

R7113

402

1%1/16WMF-LF

1K

2

1 R7109

402

1%1/16WMF-LF

255

2

1 R7111

10%

402

470PF50VCERM2

1 C7114

402

1%1/16WMF-LF

97.6K

2

1 R7114CERM402

25V5%220PF

2

1 C7113

402

0.001UF50VCERM10%

2

1 C71076.81K

MF-LF1/16W1%

4022

1 R7110

MF-LF1/16W1%4.32K

402

21

R7117

MF-LF

1K1%

402

1/16W

2

1 R7118180pF

CERM402

5%50V2

1 C7129

CERM-X5R10%6.3V0.22UF

4022

1 C7128

10VCERM402

0.068UF10%

21

C7131

CERM402

16V10%0.01UF

NO STUFF

21

C7132

0.018UF16V10%

402X7R

21

C7133

MF-LF1/16W

05%

4022

1 R7122

MF-LF1/16W

05%

4022

1R7123

0.033UF

402

16VX5R10%

2

1 C7134

603

20%6.3V10UF

X5R2

1 C7135

NO STUFF

4.02K

MF-LF1/16W1%

40221

R7127

10%

40216V

NO STUFF

0.01uF

CERM

21

C7110

X7R402

10%16V

0.015uF

21

C7105MF-LF1/16W1%

402

147K

21

R7108

10%

402CERM50V0.001UF

2

1 C71060.001UF

402CERM

10%50V

NO STUFF

2

1

C7116

3.92K

402

1%

MF-LF1/16W

2

1 R7130

CERM-X5R

0.22uF

402

6.3V10%

21

C7121

0.22uF

CERM-X5R6.3V

402

10%

21

C71035%1

402

1/16WMF-LF

21

R7104

5%11/16WMF-LF402

21

R7107

0603-LF

10KOHM-5%

CRITICAL

2

1

R7131

402

1/16W

499

MF-LF

1%

2

1R7145

402470K CRITICAL

NO STUFF

21

R7126MF-LF1/16W5%0

402

21

R7125

1/16W5%0

MF-LF402

21

R7124

5%

MF-LF1/16W402

0

NO STUFF

21

R7106

CASED2E-SM

20%POLY

CRITICAL

33UF16V2

1 C710916VPOLYCASED2E-SM

CRITICAL

20%33UF

2

1 C7117

POLY16V20%33UF

CRITICAL

CASED2E-SM2

1 C710116V

CRITICAL

POLYCASED2E-SM

33UF20%

2

1 C7108

10%25V

603

1UF

X5R2

1 C7118

603X5R10%25V1UF

2

1 C7199

LFPAK

CRITICAL

RJK0305DPB

321

4

5

Q7100

RJK0301DPBLFPAK

CRITICAL

321

4

5

Q7101LFPAKRJK0301DPB

CRITICAL

321

4

5

Q7104

RJK0305DPBLFPAK

CRITICAL

321

4

5

Q7102

LFPAKRJK0301DPB

CRITICAL

321

4

5

Q7103LFPAK

CRITICAL

RJK0301DPB

321

4

5

Q7105

QFN

CRITICAL

ISL9504BCRZ

9

19

14

5

44

18

20

4342

4140

39

3837

13

22

27

35

49

7

15

4

31

2

28

34

129

33

8

6

25

30

32

23

24

3

21

1211

16

4645

17

10

47

2636

48

U7100

NO STUFF

4.53K

4021/16WMF-LF

1%

21

R7146

NO STUFF

10K1%

1/16WMF-LF402

21

R7152

1/16WMF-LF402

1%10K

NO STUFF21

R7151

? C7109,C7117128S0092 KEMET T520V336M016ATE0457650128S0093

128S0092 ? C7101,C7108KEMET T520V336M016ATE0457650128S0093

01

7659

IMVP6 CPU VCore Regulator

051-7455

SYNC_DATE=07/13/2005SYNC_MASTER=POWER

CPU_VID<6>

SMC_CPU_ISENSE

CPU_VID<5>

=PP5V_S0_CPU_IMVP

PP5V_S0_IMVP6_VDDVOLTAGE=5VMIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.2 MM

=PPVIN_S5_CPU_IMVP

GND_IMVP6_SGND

PP3V3_S0_IMVP6_3V3MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.25 MM

CPU_VID<4>CPU_VID<3>CPU_VID<2>

CPU_VID<0>

IMVP6_VDIFF

IMVP6_PHASE2 0.25 MM0.25 MM

CPU_VCCSENSE_P

PM_DPRSLPVR

IMVP6_DFB

CPU_DPRSTP_L

IMVP6_PSI_LIMVP6_PMON

IMVP_DPRSLPVR

IMVP6_RBIAS

GND_IMVP6_SGND

IMVP6_VW

IMVP6_NTC_R

=PPVORE_S0_CPU_REG

CPU_PROCHOT_L

IMVP6_SOFT

IMVP6_NTC

VR_PWRGOOD_DELAY

VR_PWRGD_CK505_L

0.25 MM0.25 MMCPU_VCCSENSE_P0.25 MM 0.25 MMCPU_VCCSENSE_N

0.25 MM 0.20 MMIMVP6_VDIFF

=PPVIN_S5_CPU_IMVP

IMVP6_VO_R

CPU_VID<1>

=PPVIN_S5_CPU_IMVP

IMVP_VR_ON

0.25 MM 0.20 MMIMVP6_COMP

0.25 MM 0.25 MMIMVP6_RTN

0.25 MM0.25 MMIMVP6_BOOT1

IMVP6_COMP_RC

IMVP6_RBIAS 0.25 MM 0.20 MM

=PP3V3_S0_IMVP

0.25 MM 0.25 MMIMVP6_VW

IMVP6_FB 0.25 MM 0.20 MMIMVP6_FB2 0.25 MM 0.20 MM

0.25 MM 0.25 MMIMVP6_BOOT2

IMVP6_SOFT 0.25 MM 0.20 MMIMVP6_DFB 0.25 MM 0.20 MMIMVP6_DROOP 0.25 MM 0.20 MMIMVP6_VO 0.20 MM0.25 MMGND_IMVP6_SGND 0.20 MM0.50 MM

0.25 MM 0.20 MMIMVP6_VSUMCPU_VCCSENSE_N 0.25 MMIMVP6_OCSET 0.20 MM

0.25 MMIMVP6_VSEN 0.25 MM

IMVP6_LGATE2 0.25 MM0.25 MM0.25 MM 0.25 MMIMVP6_UGATE2

IMVP6_ISEN2 0.25 MM 0.25 MM

MIN_LINE_WIDTH=0.25 MMPPVIN_S5_IMVP6_VINMIN_NECK_WIDTH=0.2 MM

IMVP6_FB2

IMVP6_BOOT2IMVP6_BOOT1

IMVP6_VR_TT

IMVP6_VDIFF_RC

IMVP6_FB

IMVP6_ISEN1 0.25 MM 0.25 MM

IMVP6_UGATE1 1.5 MM 0.25 MM

IMVP6_BOOT1_RC

IMVP6_BOOT2_RC

IMVP6_UGATE1

IMVP6_PHASE1

IMVP6_LGATE1

IMVP6_ISEN1

IMVP6_UGATE2

IMVP6_PHASE2

IMVP6_LGATE2

IMVP6_ISEN2

IMVP6_OCSET

IMVP6_DROOP

IMVP6_VSUM

IMVP6_VSEN

IMVP6_RTN

IMVP6_VO

IMVP6_COMP

IMVP6_PHASE1 0.25 MM1.5 MM

IMVP6_LGATE1 0.25 MM1.5 MM

59D4

70B3

70C3

59D8

59D8

59C2

70A3

70B3

22C4

45C3

70A3

70A3

59C2

59D4

70A3

70A3

48C1

70A3

48D7

59B7

70A3

70A3

70A3

70A3

59A4

24C3

15B6

59A4

59C8

45B5

27B5

59A5

59A5

48D7

70A3

48D7

59B7

59B7

59B6

59B6

59C8

59A4

59A4

59A4

59A4

10B7

44C5

10B7

7A7

7B1

59A4

10B7

10B7

10B7

10B7

59A4

59C6

10A6

15A6

59A4

9B2

27B2

70B3

6D7

59A4

59A4

7D8

9C5

59A4

15B6

27A7

10A6

10A6

59B7

7B1

10B7

7B1

6D7

59B6

59C6

6D7

7C4

59B7

59B7

59B7

59C6

59C7

59B6

48D5

48C5

59B7

59C6

10A6 59B6

59B5

59C6

59C6

59C6

59A4

59A6

59A8

59A4

59C6

59C6

59A8

59A8

59A8

59A8

59A6

59A6

59A6

59A6

59A4

48D5

59A4

59A4 59A4

48C5

6D7

59C6

59C6

www.vinafix.vn

R1-

R1+ R2

V-V+

+

SOFT

VWVSUM

VSS

VSEN

VR_ON

VO

VIN

VID1VID0

VDIFF

UGATE

THRM_PAD

RTN

PVCC

PHASEPGOOD

PGND

OCSET

LGATEFDE

FB

DROOP

DFBCOMP

BOOT

AF_EN

VDD

RBIAS

VID2VID3VID4

IMON

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


TABLE_ALT_HEAD

TABLE_ALT_ITEM


PWM FREQ. = 333 kHzMAX CURRENT = 7.7A

NC

Placement Note:

PLACE RC CLOSE TO SMC

PLACE C7221 NEAR U7201 PIN 7

MIN_LINE_WIDTH MIN_NECK_WIDTH MIN_LINE_WIDTH MIN_NECK_WIDTH

RENDER VCORE POWER SUPPLY

I103

I104

I105

I106

I107

I108

I109

I110

I111

I112

I113

I114

I115

I116

I117

I118

I119

I120

I121

I122

I123

I124

I125

10%16VX5R402

0.1UF

2 1

C7201

750MF-LF1%1/16W402

21

R7204

20%6.3VX5R402

0.22UF2

1 C7222

402MF-LF1/16W1%100

21

R7226

4.53K1%1/16WMF-LF402

21

R7227

10%16VX5R

0.1UF

402 2

1C7223

INA326EA-250MSOP

CRITICAL

74

5

8

16

2

3 U7201

50V10%

402CERM

470PF2

1 C7203

101/16W5%

402MF-LF

21

R7200

200K1%1/16WMF-LF4022

1 R7207

2.21K1%MF-LF1/16W4022

1 R7206

1%1/4WMF-LF1206

CRITICAL

0.002

21

R7205ISL6263B

CRITICALQFN

413

15

8

29

12

14

2726252423

7

16

18

33

2

9

1

22

1931

20

3

21

28

32

6

10

115

17

30

U7200

5%0

402MF-LF1/16W

21

R7201

402

30K5%MF-LF1/16W

2

1R7220

603

10UFX5R20%6.3V2

1 C7219

RJK0305DPB

CRITICAL

LFPAK

321

4

5

Q7200

CRITICAL

RJK0303DPBLFPAK

321

4

5

Q7201

100KMF-LF1/16W402

5%

21

R7225

IHLP2525EZ-SM0.82UH-16.5A

CRITICAL

21

L7200

25V402X7R

0.01UF10%

2

1 C7200

5%50V47PF

402CERM2

1 C7204

402

15.8K1%1/16WMF-LF

21

R7208

50V10%

402CERM

0.001UF

2 1

C7205

X5R

0.1UF10%

40216V2

1 C7206

1K1%1/16WMF-LF402

21

R7209

1%2.94K1/16WMF-LF402

21

R7210

330PF

402CERM50V10%

2 1

C7207

2.21K1%1/16WMF-LF402

21

R7212

402

10%CERM50V0.0018UF

2 1

C72081%1.1K1/16WMF-LF402

21

R7211

150K1%1/16WMF-LF402

21

R7213

402CERM

680PF10%50V

2 1

C7209

6.98K1%1/16WMF-LF4022

1R7214

40250VCERM

0.001UF10%

2

1 C7211

150PFCERM5%50V402 2

1C7210

10%50VCERM402

0.001UF

2 1

C7212

5%01/16WMF-LF4022

1R72155%01/16WMF-LF4022

1R7216

MF-LF402

150K1%1/16W

21

R7217

402

10%X7R

0.015UF16V

2 1

C7215 NO STUFF4.53K1%1/16WMF-LF402

21

R72181

402MF-LF5%1/16W

21

R7203

MF-LF5%101/16W402

21

R7202

603CERM120%6.3V2.2UF

2

1 C7202

10%

402CERM6.3V1UF

2 1

C7221

40250V10%CERM

0.001UF2

1 C7214

402CERM50V10%0.001UF

2

1 C7213

33UF

CASED2E-SM

20%16VPOLY

CRITICAL

2

1 C7217X5R25V603

10%1UF

2

1 C7218

POLY20%

CRITICAL

330UF2.5VCASE-D2E-LF2

1 C7220

SM

21

XW7200

MF-LF5%

4021/16W10K

21

R7224402MF-LF1/16W10K1%

NO STUFF

2

1R7221

MF-LF1/16W10K

402

5%

21

R7223

NO STUFF

10K1%1/16WMF-LF4022

1R7222

SYNC_MASTER=GPU

051-7455

Render VCore SuppliesSYNC_DATE=06/29/2006

60 76

01

C7217 KEMET T520V336M016ATE0457650?128S0093 128S0092

GND_GCORE_SGND

GCORE_DFBGCORE_OCSET

=PPVCORE_S0_NB_GFX_IMVP

GCORE_FDEGCORE_LGATE

GCORE_VW

GCORE_RTN

GCORE_PHASE

GCORE_PMON

GFX_VR_EN

GCORE_SOFT

GCORE_VIN

GND_GCORE_SGND

=PP3V3_S0_NB_GFX_IMVP

SMC_GPU1_ISENSE

GCORE_VDIFF_RC

GCORE_FB_RC

GCORE_BOOT_RC

GPU_ISENSEGPU_ISENSE_R1_P

=PP3V3_S0_PDCISENS

GCORE_VSUM_R

=PPVIN_S5_NB_GFX_IMVP

GPU_ISENSE_R2

GPU_ISENSE_VCC

SMC_GPU1_ISENSE

=PP5V_S0_NB_GFX_IMVP

GND_GCORE_SGND

GPU_ISENSE_R1_N

GND_SMC_AVSS

0.25 MM0.3 MMGCORE_DFB0.25 MMGCORE_VSUM 0.3 MM0.25 MMGCORE_DROOP 0.3 MM0.25 MMGCORE_VIN 0.3 MM0.25 MMGCORE_PVCC 0.3 MM0.25 MMGCORE_VDD 0.3 MM0.25 MMGND_GCORE_SGND 0.6 MM0.25 MMGCORE_BOOT_RC 0.3 MM0.25 MMGCORE_LGATE 1 MM0.25 MMGCORE_UGATE 1 MM0.25 MMGCORE_BOOT 0.3 MM0.25 MMGCORE_PHASE 1 MM

0.25 MMGCORE_VDIFF_RC 0.3 MM0.25 MMGCORE_FB_RC 0.3 MM0.25 MMGCORE_VDIFF 0.3 MM0.25 MM0.3 MMGCORE_FB

GCORE_COMP 0.25 MM0.3 MMGCORE_SOFT 0.25 MM0.3 MM

0.25 MMGCORE_RBIAS 0.3 MM

GCORE_RTN 0.25 MM0.3 MMGCORE_VW 0.25 MM0.3 MMGCORE_OCSET 0.25 MM0.3 MM

GCORE_VSEN 0.25 MM0.3 MM

GFX_VID<4>GFX_VID<3>GFX_VID<2>

GCORE_RBIAS

GCORE_VDD

GCORE_AF_EN

GCORE_BOOT

GCORE_COMP

GCORE_DROOP

GCORE_FB

GCORE_PVCC

GCORE_UGATE

GCORE_VDIFF

GFX_VID<0>GFX_VID<1>

GCORE_VSEN

GCORE_VSUM

66C2 66B1 62C2 61C5 48C6 48C1 48B1

60D7

60C5

66C3

60D7

48A1

60D7

60C5

60A7

60B2

61C5

60C7

60A7

45B6

60C5

21B6

21B6

21B6

21B6

60A7

60A7

60A5

7B8

60A7

60A5

60A5

60A7

8B1

60A5

60A7

60A5

7C4

44A2

60A5

60A5

7C4

7B1

44A2

7A7

60A5

44C1

60B5

60B5

60B5

60C5

60D5

60D5

60A5

60C5

60C5

60C5

60C5

60C5

60B6

60B6

60B6

60B6

60B6

60C6

60D6

60B6

60B6

60B5

60C6

15A3

15B3

15B3

60A5

60A7

60A7

60A5

60A7

60A5

60A7

60A7

60A5

15B3

15B3

60A5

60A7

www.vinafix.vn

R1-

R1+ R2

V-V+

+

V5FILT

DR_VH1

VO2VO1

VFB2VFB1

VBST2VBST1

V5IN

TRIP2TRIP1

TONSEL

THRM_PAD

PGOOD2PGOOD1

LL2

GNDEN2EN1

DR_VL2

DR_VH2

PGND

DR_VL1LL1

SYM(1 OF 2)

S

D

G

S

D

G

S

D

G

JUMPER

D

S

G


TABLE_ALT_HEAD

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_ALT_ITEM

TABLE_ALT_ITEM


TABLE_ALT_HEAD

Vout = 0.758V * (1 + Rc / Rd)



Routing Note:

pad (pin 25)

MAX CURRENT = 4APWM FREQ. = 360 kHzPWM FREQ. = 300 kHz

NEAR NB

Placement Note:PLACE C7390,C7391

0.00V1.05V

PP1V5_S0

S3/S5/G3HotHIGH 1.5V

PP1V05_S0

LOW 0.0V

PM_SLP_S3_LState

PLACE C7303 NEAR U7301 PIN 7

<Ra>

<Rb>

sensing trace,C7301 close to U7600 pin 16.

NC

Routing Note:

S0

Note: pu on PGOOD page

a dedicated trace to the output cap;The discharge path (VO2) should have

separate from the output voltageR7361,C7305 close to U7300 pin 15.Placement Note:

Placement Note:

MAX CURRENT = 8A

sensing trace,separate from the output voltagea dedicated trace to the output cap;The discharge path (VO1) should have

Routing Note:

<Rd>

<Rc>

1.5V/1.05V POWER SUPPLY

put 6 vias under the thermal

"note: pu on pgood page"

Vout = 0.758V * (1 + Ra / Rb)

402X5R

20%6.3V

0.22UF2

1 C7306

402MF-LF1/16W1%4.53K

21

R7305

1001%1/16WMF-LF402

21

R7390

402

10%16VX5R

0.1UF

2

1C7303

INA326EA-250MSOP

CRITICAL

74

5

8

16

2

3 U7301

10%

402

470PFCERM50V2

1 C7399200K1/16W402MF-LF1%

2

1 R7391

805

20%22UFCERM6.3V2

1C7390

1%MF-LF12061/4W

CRITICAL

0.002

2

1 R7302

402

1%MF-LF1/16W2.21K

2

1 R7392

QFNTPS51124

CRITICAL 61

52

922

16

15

1417

4

25

724

13

18

1120

3

823

1219

1021 U7300

PWRPK-1212-8SI7110DN

CRITICAL

321

4

5

Q7361

402

05%1/16WMF-LF

21

R73640.1UF16V402

10%X5R

2 1

C7364

SM-IHLP1.0UH-13A-5.6M-OHMCRITICAL

21

L7360

D2TTANT10%330UF2.0V

CRITICAL

3 2

1C7392

CRITICAL

CASED2E-SM

20%16VPOLY

33UF2

1 C7380

603X5R10%1UF25V

2

1 C7381

1%

402MF-LF1/16W20.0K

2

1

R7367

20.5K

402MF-LF1/16W1%

2

1 R73681/16WMF-LF1%3.74K

4022

1 R73655%220PF25V402CERM2

1 C7389

4021/16W5%0MF-LF

21

R73240.1UF16VX5R402

10%

2 1

C7324

402

NO STUFF

100PF5%CERM50V2

1 C7369

SI7110DNPWRPK-1212-8

CRITICAL

3 2 1

4

5

Q7320

SI7108DNSPWRPK-1212-8

CRITICAL

3 2 1

4

5Q7321

CRITICAL

16VPOLYCASED2E-SM

20%33UF

2

1 C7340X5R10%1UF

603

25V2

1 C7341

CASE-D2E-LF2.5VPOLY

330UF20%

CRITICAL

2

1

C7352

402MF-LF1/16W6.65K1%

2

1 R7325

7.68K1%1/16WMF-LF4022

1 R7327

1%1/16WMF-LF402

20.0K

2

1 R7328

CERM402

5%100PF50V

NO STUFF

2

1 C7329

603

10UF20%X5R6.3V2

1 C7301

402

5%MF-LF

3.31/16W

21

R7361

X5R10%10V

402

1UF2

1 C7305

OPEN-SAWTOOTH21

XW7320

603X5R

10UF20%6.3V2

1C7350

SM

21

XW7300

402MF-LF1%

NO STUFF

274K1/16W

2

1R7326

402

0.1UF10%X5R16V

NO STUFF

2

1 C7325

10%CERM50V402

0.001UF

NO STUFF

2

1 C7328

1.0UH-13A-5.6M-OHMCRITICAL

SM-IHLP21

L7320

CRITICAL

MICROFET3X3FDM6296

321

4

5 Q7360

220PFCERM402

5%25V2

1 C7398

6.3V10UF20%X5R603

2

1 C7351

01

7661

051-7455

SYNC_DATE=07/13/2005SYNC_MASTER=POWER1.5V / 1.05V Supplies

376S0445376S0448 ? Q7360

C7380,C7340128S0092 ?128S0093 KEMET T520V336M016ATE0457650

1V5S0_VFB1V05S0_VFB

GND_1V51V05S0_SGND

PGOOD_1V05S0

SMC_NB_CORE_ISENSE

=PP1V05_S0_REG_R=PP3V3_S0_PDCISENS

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=1 mm 1V05S0_LL

NB_ISENSE_R1_P

1V5S0_TRIP

NB_ISENSE

1V05S0_TRIP

1V05S0_RUNSS

=PPVIN_S5_1V5S0

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=1 mm 1V05S0_VL

1V05S0_VBST

1V05S0_LL_RC

1V5S0_VBST_RC1V5S0_VBST

MIN_LINE_WIDTH=1 mmMIN_NECK_WIDTH=0.25 mm

1V05S0_VH

1V5S0_RUNSS

=PP5V_S5_1V51V05S0

=PP1V5_S0_REG

1V51V05S0_V5FILT

1V05S0_VBST_RC

GND_1V51V05S0_SGND

NB_ISENSE_R1_N

NB_ISENSE_R2

GND_SMC_AVSS

=PP1V05_S0_REGMIN_LINE_WIDTH=1.5 mmVOLTAGE=1.05VMIN_NECK_WIDTH=0.25 mm

=PPVIN_S5_1V05S0

PGOOD_1V5S0

1V5S0_VLMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=1 mm

1V5S0_LLMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=1 mm

1V5S0_VHMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=1 mm PP1V5_S0_REG_P

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=1.5 mmVOLTAGE=1.5V

NB_ISENSE_VCC

66C2 66B1 62C2 60B2 48C6 48C1 48B1

66C3

48A1

60C2

58B1

62C5

45B6

7D8

61B6

58A5

44A8

7D8 7C4

58D1

7A1

6D7

7C1

7C8

61A3

44C1

6B2

7A1

58A5

www.vinafix.vn

R1-

R1+ R2

V-V+

+

VDDQSET

S3

COMP

VTT

THRM_PAD

DRVHLL

PGNDCS_GND

CS

PGOOD

NC1

S5

NC0

GND VTTGND

MODE

DRVL

VTTREF VLDOIN VBST V5IN VDDQSNS VTTSNSV5FILT

SYM (1 OF 2)

S

D

G

S

D

G

TABLE_ALT_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE


TABLE_ALT_HEAD

PLACE C7543 NEAR NB

CONNECT VDDQSNS TO C7542 PIN1

PP0V9_S0PP1V8_S3PM_SLP_S3_L


PWM FREQ. = 400 kHz

0.0V0.9V

0.0V

1.8V

0.0V1.8V

LOW

HIGHLOW

LOW

HIGHPM_SLP_S4_L

HIGH

StateS0

<Ra>

NCNC

PLACE XW7500,XW7501 NEAR C7542 PIN 2

Placement Note:

Routing Note:Connect CS_GND tousing Kevin connection.Q7521 PIN1,2.3

<Rb>

MAX CURRENT = 10.75A

Placement Note:

Vout = 0.75V * (1 + Ra / Rb)

Placement Note:PLACE C7504 NEAR U7501 PIN 7

using separate trace.

Routing Note:

S5/G3HotS3

1.8V/0.9V POWER SUPPLY

Routing Note:

Routing Note:put 6 vias under the thermal pad


CONNECT VTTSNS TO C7507 PIN1using separate trace.

402

1001/16WMF-LF5%

21

R7561

20%6.3VX5R

0.22UF

4022

1 C75051/16WMF-LF402

4.53K1%

21

R7503INA326EA-250

CRITICAL

MSOP

74

5

8

16

2

3 U7501

40250VCERM10%470PF

2

1 C7564200KMF-LF4021/16W1%

2

1 R7563

2.94K

402MF-LF1/16W1%

2

1 R7560

0.002

CRITICAL

1206

1%1/4WMF-LF2

1R7502

QFNTPS51116

CRITICAL

25

1

24

23

89 22

15

14

25

1110 13

18

127

4

20

3

19

21

17

16

6

U7500SM-IHLP

CRITICAL1.0UH-13A-5.6M-OHM

21

L7520

1/16W05%MF-LF402

21

R7500

402X5R16V10%0.1uF

2

1C7509

CRITICAL

33UF20%POLY16VCASED2E-SM

2

1 C7530

20%POLY

CRITICAL

330UF2.5VCASE-D2E-LF2

1 C7542

X5R6036.3V10UF20%

2

1C7541

603X5R

10UF20%6.3V2

1 C7502

8.25K

402MF-LF1/16W1%

2

1R7510

5%4.71/16WMF-LF402

21

R7507

SM

21

XW7500

28K1%1/16WMF-LF402 21

R75211%20.0K1/16WMF-LF402

21

R7522

50V

100PF5%

NO STUFF

402CERM

21

C7503

20%

603X5R6.3V10UF

2

1 C7501

16V402

10%0.033UF

X5R

21

C7540

603

20%6.3VX5R

10UF2

1 C750710UFX5R6.3V20%

6032

1 C7508

X5R10%

40210V

1UF

21

C7500

SM

21

XW7501

CRITICAL

2.5V20%

CASE-C2POLY

330UF2

1 C7543

1UF

60325V10%X5R2

1 C7531

0.1UFX5R16V10%

4022

1C7504


CRITICAL

321

4

5Q7520

PWRPK-1212-8

CRITICAL

SI7108DNS

321

4

5

Q7521

100K5%MF-LF4021/16W

21

R7599

?128S0092128S0093 C7530 KEMET T520V336M016ATE0457650

051-7455

SYNC_DATE=07/13/2005SYNC_MASTER=POWER1.8V/0.9V Supplies

62 76

01

1V8S3_VBST_RC

1V8S3_VDDQSET

1V8S3_V5FILT

=PP0V9_S0_REG

=PP5V_S5_1V8S30V9S0 GND_SMC_AVSS

MEM_ISENSE_VCC

SMC_NB_1V8_ISENSE

MEM_ISENSE_R2

GND_1V8S3_SGND

GND_1V8S3_VTTGND

=PP3V3_S3_PDCISENS

MEM_ISENSE

1V8S3_CS

PM_SLP_S3_L

=PP3V3_S3_PDCISENS

1V8S3_RUNSS

MEM_ISENSE_R1_P

=PPVIN_S5_1V8S30V9S0

=PP1V8_S3_REG_R

1V8S3_DRVLMIN_LINE_WIDTH=1 mmMIN_NECK_WIDTH=0.25 mm

PGOOD_1V8S3

1V8S3_VBST

GND_1V8S3_VTTGND

MEM_ISENSE_R1_N

MEMVTT_VREF =PP1V5_S0_REG

=PP1V8_S3_REGMIN_NECK_WIDTH=0.25 mmVOLTAGE=1.8VMIN_LINE_WIDTH=1.5 mm

1V8S3_LLMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=1 mm

MIN_LINE_WIDTH=1 mmMIN_NECK_WIDTH=0.25 mm1V8S3_DRVH

66C2 66B1 61C5 60B2 48C6

58B7

48C1

45A6

48B1

44C5

48A1

35C7

45B6

62A2

33C7

61B1

7D8

44C1

44A8

62C5

7A4

24D3

65C2

7A1

7B5

58B6

62A6

7C8

7B6

www.vinafix.vn

JUMPER

DRVL2

LL2

DRVH2

VBST2

EN2

EN3

EN5

VO2

PGOOD2

VREG5

CS1

PGND1

VIN

V5FILT

VREG3

CS2

PGND2

DRVL1

LL1

DRVH1

VBST1

EN1

PGOOD1

TONSEL

SKIPSEL

PWPD

VO1

VFB1

VREF2

VFB2

COMP2

COMP1

SYM (2 OF 3)

GND

JUMPER

S

D

G

S

D

G

S

D

G

D

S

G

TABLE_ALT_ITEM

TABLE_ALT_ITEM


TABLE_ALT_HEAD

TABLE_ALT_ITEM

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Vout = 1V * (1 + Ra / Rb) Vout = 1V * (1 + Rc / Rd)<Rd>

(pin 33)

Routing Note:put 6 vias under the thermal pad

separate from the output voltagesensing trace,

The discharge path (VO1) should have

SMC_PM_G2_EN

5V/3.3V POWER SUPPLY

PWM FREQ. = 430 kHzMAX CURRENT = 5A

R7605,R7603 close to U7600.C7603 CLOSE TO U7600 PIN 19.C7604 close to U7600 pin 21.C7602 close to U7600 pin 22.R7601,C7605 close to U7600 pin 20.

Placement Note:


MAX CURRENT = 7.5APWM FREQ. = 280 kHz

PP3V3_S5PP5V_S5PP3V3_G3HState

Routing Note:

a dedicated trace to the output cap;

<Ra> <Rb>

NC

<Rc>

sensing trace,

Routing Note:

a dedicated trace to the output cap;The discharge path (VO2) should have

NC

separate from the output voltage

G3H3.3V3.3V 0.0VLOW

3.3V5.0V0.0V

HIGHS0/S3/S5

OPEN-SAWTOOTH21

XW7620

16V10%

402

0.1UFX5R

2 1

C7620

CRITICAL

6.3VPOLYCASE-B2

20%150UF

2

1C7651

TPS51120

CRITICAL

LLP

21

19

4 81

22

63

1328

20

31

33

32

1130

17

24

1526

5

9

10

1229

1625

1427

18

23

72

U7600

20%6.3VX5R

10UF

6032

1 C7650

402

22PF50VCERM5%

2

1 C7622

X5R10V10%

402

1UF2

1 C7605

1/16W1%

402MF-LF

5.90K

2

1 R7603

6.3V20%10UF

603X5R2

1 C76046.3VX5R

10UF

603

20%2

1 C7603

CASED2E-SM16V20%POLY

CRITICAL

33UF2

1 C7640

CRITICAL

IHLP3.3UH

21

L7660

OPEN-SAWTOOTH21

XW7660

4021/16WMF0.1%20K

CRITICAL

21

R7627

402

100PFCERM5%

NO STUFF

50V

2 1

C7627

402

8.66K1/16WMF0.1%

CRITICAL

21

R7628

0MF-LF1/16W402

5%

21

R7620 60325V1UFX5R10%

2

1 C7641

CASE-B2POLY6.3V20%

CRITICAL

150UF2

1C7652

0

402

5%MF-LF1/16W

21

R766016V10%X5R402

0.1UF

2 1

C7660

4021/16WMF0.1%20K

CRITICAL

21

R7667

4021/16W4.99KMF0.1%

CRITICAL

21

R7668

5%

402

100PF50VCERM

NO STUFF

2 1

C7667402

0.001UF50VCERM10%

2

1 C7600

60325V1UFX5R10%

2

1 C768133UF20%16VPOLY

CRITICAL

CASED2E-SM

2

1 C7680

POLY6.3V20%

CASE-B2

CRITICAL

150UF2

1C7692CRITICAL

20%6.3VPOLYCASE-B2

150UF2

1C7691X5R60316V10%2.2UF

2

1 C7690

CRITICAL

33UF20%16VPOLYCASED2E-SM

2

1 C7682

25V10%X5R603

1UF2

1 C7602

1/16W7.87K

402MF-LF1%

2

1R7605

402MF-LF5%1/16W4.7

21

R7601

SM

21

XW7601

CRITICAL


321

4

5

Q7621

CRITICAL


3 2 1

4

5

Q7660

CRITICAL

4.7UHIHLP

21

L7620


CRITICAL

3 2 1

4

5

Q7661

402

5%1/16WMF-LF

100K

NO STUFF

2

1R7670

10%16V402CERM

0.01UF2

1 C7671

402

NO STUFF

1/16W100K5%MF-LF

2

1 R7671

0

4021/16W5%MF-LF

21

R7610

40225V5%

NO STUFF

220PFCERM

2

1C7670

FDM6296MICROFET3X3

CRITICAL

321

4

5

Q7620

KEMET T520V336M016ATE0457650?376S0448 376S0445 Q7620

? C7640 KEMET T520V336M016ATE0457650128S0093 128S0092

C7682,C7680128S0092 ? KEMET T520V336M016ATE0457650128S0093

SYNC_MASTER=POWER SYNC_DATE=07/13/2005

051-7455

5V/3.3V Supplies

63 76

01

5VS5_VFB

GND_5V3V3S5_SGND

MIN_LINE_WIDTH=1.5 mmVOLTAGE=5V

MIN_NECK_WIDTH=0.25 mmPP5V_S5_REG_P

=PPVIN_S5_5VS5

5VS5_VBST

3V3S5_RUNSS VOLTAGE=3.3VMIN_LINE_WIDTH=1.5 mmMIN_NECK_WIDTH=0.25 mm PP3V3_S5_REG_P

3V3S5_VFB

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=1 mm

3V3S5_DRVL

3V3S5_CS

5V3V3S5_VREG3

5VS5_RUNSS

MIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=1 mm

3V3S5_DRVH

5VS5_LLMIN_LINE_WIDTH=1 mmMIN_NECK_WIDTH=0.25 mm

=PPVIN_S5_5VS55V3V3S5_V5FILT

5VS5_VREG

GND_5V3V3S5_SGNDGND_5V3V3S5_SGND

=PP5V_S5_REG

5VS5_VBST_RC

5VS5_CS

3V3S5_VBST_RC3V3S5_VBST

=PP3V3_S5_REG

GND_5V3V3S5_SGND

5V3V3S5_V5FILT

RSMRST_PWRGD

MIN_LINE_WIDTH=1 mmMIN_NECK_WIDTH=0.25 mm3V3S5_LL

=PPVIN_S5_3V3S5

5VS5_DRVLMIN_NECK_WIDTH=0.25 mmMIN_LINE_WIDTH=1 mm

5V3V3S5_TONSEL

5V3V3S5_VREF

RSMRST_PWRGD

5VS5_DRVHMIN_LINE_WIDTH=1 mmMIN_NECK_WIDTH=0.25 mm

63B6

63C4 63C4

63C4

63B5 63B4

63B4

65C5

63B6

63B4 63B6

63B6

45D5 45D5

63A4

65C5 6D7

7A1

63C4

63A4 63A4

7C3 7D3

63B4

63A4

44D8

7A1

44D8

www.vinafix.vn

FB

BIASSWSHDN*

NC

VIN BOOST

GND

RTRUN/SS

SYNC/MODEITH

VFB

PGOOD

PVINSVIN

THERMPADPGNDSGND

SW

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

Burst

MAX CURRENT = 0.2APWM FREQ. = 1 MHz @16.5V

<Ra>

Vout = 1.25V * (1 + Ra / Rb)

<Rb>

Supply needs to guarantee 3.31V delivered to SMC VRef generator

NC


3.425V G3H SUPPLY

Vout = 1.2516V<Ra>

<Rb>

Vout = 0.8V * (1 + Ra / (Rb + Rc))

(Switcher limit)3.0A max output

If unconnected, powers up with PVIN.Connect RUNSS off-page to control

1.25V S0 REGULATORContinuous

NOTE: Be aware of pull-up on this signal.

<Rc>

CERM20%6.3V22UF

8052

1C7793348K1%1/16WMF-LF4022

1R779150V5%CERM

22pF

4022

1 C7792

200K1/16WMF-LF402

1%

2

1R7792

33uHCDPH4D19F-SM

CRITICAL

21

L77900.22uF10%6.3VCERM-X5R402

2

1C7791

LT3470CRITICAL

TSOT23-8

3

51

2

4

8

6

7

U7790

1206-1X5R25V10%10UFCRITICAL

2

1 C7790

20%47UF4V

0805CERM-X5R2

1 C7730

0805

47UF20%4V

CERM-X5R 2

1C772910%

X7R

1000PF25V

4022

1 C7728

1%

MF-LF1/16W

402

47.0K

2

1R7723

60.4K1%

MF-LF402

1/16W

2

1R7724

23.2K1%

MF-LF1/16W

402 2

1R7725

47UF20%4V

CERM-X5R0805

2

1C7720

QFNLTC3412A

CRITICAL

14

17

16

9

8

54

11

2

1

15

310

12

76

13

U7720

IHLP1616BZ-SM

CRITICAL

2.2UH-3.25AL7720

SM

21

XW77001%

MF-LF1/16W

402

309K

2

1R7726

CERM

10%50V

402

470PF2

1C7725

1/16WMF-LF

05%

402

NO STUFF

2

1R7727

MF-LF402

1/16W

1M5%

2

1R7722

5%

402MF-LF

01/16W

2

1R7728

50VCERM

5%100PF

4022

1C7724

MF-LF

1%8.25K1/16W

402 2

1R7721

10%

X7R

1000PF25V

4022

1 C7723

01

SYNC_MASTER=ENETSYNC_DATE=12/06/2005

051-745564 76

3.42V/1.25V Switcher

P3V42G3H5_BOOST

P3V42G3H_FB

=PP3V42_G3H_REGPP3V42G3H_SW

=PPVIN_G3H_P3V42G3H


P1V25S0_SWMIN_LINE_WIDTH=0.6 mm

=PP1V25_S0_REG

=PP3V3_S5_1V25S0

P1V25S0_RT1V25S0_RUNSS

P1V25S0_ITHP1V25S0_MODE

P1V25S0_ITH_RC

P1V25S0_VFB_DIV

P1V25S0_VFBVOLTAGE=0VMIN_LINE_WIDTH=0.2 mmMIN_NECK_WIDTH=0.2 mm

GND_P1V2S3_SGND

7C3

7B1

7C8

7C1

58C1

www.vinafix.vn

NC

D

SG

IN

D

SG

IN

IN

D

SG

D

SG

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

1.8V S3 RUN/SS CONTROL

S3 FETS & S3/S5 CONTROL

NC

LOADING

MOSFETCHANNEL

LOADING

CHANNELRDS(ON)

MOSFET

Open drain output

5V/3.3V S5 RUN/SS CONTROL

5V S3 FETP-TYPEFDC638P

0.051 ARDS(ON)

3.3V S3 FET

0.098 A65 mOhm @2.5VP-TYPEFDC638P

48 mOhm @4.5V


74LVC1G07CRITICAL

SC704

5

1 3

2

U7870 402

1%10KMF-LF1/16W

2

1 R7875

CRITICAL

SM-LFFDC638P

4

3

6521

Q7865

CERM402

10%0.0022uF50V

21

C7801

FDC638PSM-LF

CRITICAL

4

3

6521

Q7866

SSM6N15FESOT563

45

3

Q7859

10K5%1/16WMF-LF402

21

R7806

CERM10%16V

0.01UF

402 21

C78025%1/16WMF-LF

10K

40221

R7808

MF-LF402

1/16W100K5%

21

R7805

MF-LF1/16W402

5%100K

2

1R7807

SSM6N15FESOT563

12

6

Q7859

1/16WMF-LF402

470K5%

21

R7857

MF-LF5%100K1/16W4022

1 R7856

SSM6N15FESOT563

45

3Q7860

SSM6N15FESOT563

12

6Q7860

SYNC_DATE=06/12/2006SYNC_MASTER=DSIMON-WF

051-7455

S3 FET & S3/S5 Control

65 76

01

PM_S4_STATE_L

PM_SLP_S4_LS5V

=PP3V3_S5_FET

P3V3S3_EN_L

=PP3V3_S3_FET

=PP5V_S5_FET

SMC_PM_G2_EN_L

=PP3V3_S5_FET

=PP5V_S3_FET

=PP3V42_G3H_PWRCTL

SMC_PM_G2_EN

5VS5_RUNSS

P5VS3_EN_L=PP5V_S5_PWRCTL

3V3S5_RUNSS

PM_S4_STATE_L

=PP3V3_S3_FET

1V8S3_RUNSS

65C4

58D5

65A6

44C5 65C4

58C6

65A5

44C5

33B7 58C5

65C3

58B3

58C5

63B5

33B7

65A4

24D3 7D1

7A6

7C1

7D1

7A5

7B1

44D5

6D7

7C1

63B4

24D3

7A6

62B8

www.vinafix.vn

GND

OUT

VIN+ VIN-

V+

GND

OUT

VIN+ VIN-

V+

ACSET

EN

CSIP

DCPRN

THRML_PAD

PGND

DCSET

LGATE

UGATEBOOT

BGATE

DCIN

CSIN

SGATE

VREF

ACPRN

CSON

CSOP

VCOMPICOMP

VDDP

CELLSVADJ

VDD

CHLIM

PHASE

FB

ACLIM

GND

D

SG

D

SG

D

SG

D

S G

D

SG

D

SG

D

SG

D

SG

D

SGD

SG

V+

V-

GND

VCC

PGOOD

OUT

FB

IN

SHDN*

I.C.THRMLPAD

D

GS

D1

D3D4

S3S2

GATE

S1D2

D1

D3

D4S3S2

GATE

S1 D2

D1

D3D4

S3S2

GATE

S1 D2

TABLE_ALT_ITEM


TABLE_ALT_HEAD

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_ALT_ITEM

PBUS SUPPLY / BATTERY CHARGER

PWM FREQ. = 300 kHz


Placement Note:



Placement Note:PLACE NEAR R7908

NC

NCNC

NC

NCPLACE NEAR R7997

CRITICAL

7AMP1206

21

F7900

SM

21

XW7900

1/16W

402MF-LF

5%100K

NO STUFF

2

1R7903

CRITICALB0530WXFSOD-123

21

D7900

25V

402X5R

0.1UF10%

2

1 C7940

CRITICAL

MF

0.020.5%1W

06122

1R7997

MF-LF402

1/16W

88.7K1%

2

1R7940

10%1UF

CERM6.3V

4022

1 C7975

1%10K1/16WMF-LF4022

1R7941

INA193SOT23-5

CRITICAL

43

5 1

2

U7970

1UF10%

CERM6.3V

4022

1 C7970 0.22UF

402

6.3VX5R

20%2

1 C7971

20%6.3VX5R402

0.22UF

2

1 C7972

X5R16V10%

402

0.033uF

21

C7900

402

5%1/16W4.7

MF-LF

21

R7900

5%MF-LF

18

4021/16W

21

R7905

100K

402

1%1/16WMF-LF

2

1R7944

402MF-LF1/16W100K5%

NO STUFF

21

R7902

25V

402X5R

0.1UF10%

2

1C7903

4.53K

402MF-LF1/16W1%

21

R7970

MF

0.01

0612

CRITICAL

0.5%1W

21

R7908

402MF-LF1/16W1%4.53K

21

R7971

10K1%1/16WMF-LF402

21

R7925

27

2525

5%MF3W

21

R7920

0.1UF25V

402

10%

X5R2

1 C7941 0.001UF

CERM402

50V10%

NO STUFF

2

1C7916

402MF-LF1/16W5%2.2

21

R7910

402

0.1UFX5R25V

NO STUFF

10%2

1 C7917

10VX5R402

10%1UF

2

1 C7902

402

0.0022UF

CERM10%50V2

1 C79811/10WMF-LF

49.91%

603

21

R7981

402

10%0.22UF10VCERM2

1 C7918

CRITICAL

CASED2E-SMPOLY

20%16V

33UF2

1C7908

SOT23-5INA193

CRITICAL

43

5 1

2

U7975

402

16VCERM

0.01UF10%

2

1 C7928402

15.0K1%MF-LF1/16W

21

R7962

402

44.2K

MF-LF1/16W1%

2

1R7963402MF-LF1/16W5%10K

21

R7979

0.022UF16VCERM-X5R

10%

4022

1 C7927402

15.0K

MF-LF1/16W1%

21

R7960

MF-LF1/16W1%20.0K

4022

1R7961

1/16W10K5%MF-LF402

21

R7969

402MF-LF1/16W

100K1%

2

1

R7950

470PF

402CERM50V10%

2

1 C7967

QFN

ISL6257HRZ

CRITICAL

6

13

26

49

15

29

18

16

11

12

3

10

5

1

2824

25

2122

1920

7

2 14

17

2723

8 U7900

402

100K

MF-LF1/16W1%

21

R7909

1/16W402MF-LF1%2.37K

21

R7968

10%

402

16VX5R

0.1UF

2

1C7980

X5R

10%25V

1UF

6032

1 C7910

RJK0305DPB

CRITICAL

LFPAK

321

4

5

Q7901

RJK0305DPBLFPAK

CRITICAL

321

4

5Q7902

1%56.2K1/16WMF-LF402

21

R7901

4021/16W3.01K1%MF-LF

21

R7967

0.001UF10%CERM50V402

21

C7901

X5R10V402

1UF10%

21

C7911

100K1%1/16WMF-LF4022

1 R7951

402MF-LF1/16W

2.25%

2

1R7906MMBD914XXGSOT23

3

1 D7922

SSM6N15FESOT563

45

3Q7922

SSM6N15FESOT563

12

6 Q7922

SSM6N15FESOT563

45

3Q7924

SOT563SSM6N15FE

1 2

6 Q7924

SOT563SSM6N15FE

12

6Q7960 SSM6N15FESOT563

45

3Q7960

SOT563SSM6N15FE

12

6

Q7961SSM6N15FESOT563

45

3Q7961

X5R603

10%25V1UF

2

1 C7950X5R25V10%1UF

6032

1 C7907

CASE-D2-LFPOLY25V

CRITICAL

20%22UF

2

1 C7905POLYCASE-D2-LF

CRITICAL

22UF20%25V2

1 C7906

2.43K

402

NOSTUFF

1%1/16WMF-LF

21

R7964

SOT563SSM6N15FE

12

6 Q7950

SOT563SSM6N15FE

45

3Q7950

100K

4021/16WMF-LF1%

21

R7965

TLV341

SOT563

CRITICAL

6

5

4

32

1

U7901

CRITICAL

MAX8719TDFN

4

9

6 5

81

7

2

3

U7950

1UF25VX5R603

10%2

1 C7952

402

100K1/16WMF-LF

5%

2

1R7954

10%1UF

X5R25V

6032

1 C7951

CRITICAL

1/16WMF

0.1%22.6K

4022

1R7953

402

221K1/16WMF-LF0.1%-50PPM

CRITICAL

21

R7952

SOT-323BAT54CW-X-F

3

2

1

D7950

SOT-23FDN360P_NL

2

1

3

Q7940

10%

402

1UF10VX5R2

1 C7912

SOIAO4409

CRITICAL

321

4

8765

Q7900

25V

0.1UF10%

402X5R 2

1C7904

4.7UHCRITICAL

SM

3

2 1

L7900100UF

CRITICAL

6.3X5.5SM1

20%16VELEC2

1 C7909

SOIAO4409CRITICAL

321

4

8765

Q7920

SOI

CRITICAL

AO4409

321

4

8765

Q7921402MF-LF1/16W1%470K

2

1R7930

402

5%330K1/16WMF-LF

2

1R7931

402MF-LF1/16W

39.2K1%

2

1R7922

402MF-LF1/16W

35.7K1%

2

1R7923

402

0.01uF10%16VCERM2

1 C79200.1UF10%

402

16VX5R2

1 C7921

NO STUFF

0.01uF

402

10%16VCERM2

1 C7924

CERM

10%

402

16V

0.01UF

NO STUFF

2

1 C7922

402

10%16VX5R

0.1UF

2

1 C7923

KEMET T520V336M016ATE0457650? C7908,C7910128S0093 128S0092

PBUS Supply/Battery ChargerSYNC_MASTER=SMC

7666

01051-7455


376S0466 376S0543 Q7900,Q7920,Q7921? AOS MOSFET

CHGR_DCIN

CHGR_VDD

=PP18V5_G3H_CHGR

GND_CHGR_SGND

MIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.25 MMPPVBAT_G3H_CHGR_REG

SMC_ENRGYSTR_LDO_EN

SMC_ENRGYSTR_LDO_PGOOD

LDO_FDBK


PP18V5_S5_CHGR_SW_R

PPVBATT_G3H_PRE MIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.6 MM

BATT_POS_F


BYPASS_R_GATE

PPVBAT_G3H_CHGR_OUT

BATT_FET_GATE

MIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.25 MMPPVDCIN_G3H_PRE

CHGR_SGATE


CHGR_ACLIM_R

SMC_SYS_ISET_L

LDO_OUTMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.5 MM

MIN_LINE_WIDTH=0.6 MMMIN_NECK_WIDTH=0.25 MMPPVBAT_G3H_CHGR_OUT

DCIN_ISENSE

CHGR_LGATE

GND_CHGR_SGND

CHGR_PHASE

CHGR_CSIN

CHGR_VREF

BATT_RC

BATT_ENABLE_LMIN_NECK_WIDTH=0.2 MMMIN_LINE_WIDTH=0.2 MM

CHGR_FB

CHGR_ACSET

SMC_BATT_ISET_L

CHGR_BOOT

=PP3V42_G3H_ACIN

CHGR_ACSET_RC

=PP3V42_G3H_ACIN

SMC_SYS_ISET

=PP3V3_S0_PBATTISENS

SMC_BATT_CHG_EN

GND_SMC_AVSS

GND_SMC_AVSS


CHGR_VDD

SMC_BATT_ISENSE

BYPASS_R_DRV

BATT_ISENSE

CHGR_VCOMP_RC

=PPBUSB_G3H

CHGR_PHASE_RC

CHGR_CHLIM_R

SMC_BC_ACOK

GND_CHGR_SGND

ACIN_ENABLE_GATE

=PPBUSA_G3H

CHGR_BGATE

CHGR_FB_R

CHGR_UGATE

CHGR_VCOMPCHGR_ICOMP

CHGR_VDDP

CHGR_CSOPCHGR_BOOT_RC

SMC_DCIN_ISENSE

CHGR_ACPRN

P3V42_G3H_ACIN_R

=PP3V3_S0_PDCISENS

CHGR_EN

=PP3V42_G3H_ACIN

CHGR_CHLIM

CHGR_ACLIM

CHGR_VREF_VF

SMC_BATT_ISET

66C2

66B1

62C2

62C2

61C5

61C5

60B2

60B2

48C6

48C6

48C1

48C1

57C7

66A8

66B8

48B1

48B1

57C3

66B8

66A5

66A5

45B6

48A1

48A1

45B6

45B6

61C5

66A8

66B8

45C5

57D5 66C2

66B5

66B8

57C4

57C4

44C8

45B6

45B6

44C8

44C5

66B5

60C2

57C4

44B5

66B5

7B1

66A8

44A2

44A2

57B2 6B1

6B1

66B5

7B1

7B1

44B5

7C4

6C1

44C1

44C1

6C1

66C6

44C5

7B3

6C1

66A8

7B3

44C5 7C4

7B1

6C1

www.vinafix.vn

IN

IO

IO

IN

SYM_VER-1

IO

IO

IO

IO

IO

IO

IO

IO

D

G S

D

G S

Y

B

A

GD

S

SYM_VER-1

OUT

OUT

OUT

SG

D

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

518S0521

INVERTER CONNECTOR

LVDS REFERENCE CURRENT,2.37K OHM PULL DOWN RESISTOR NEEDED

(LVDS DDC POWER)

LCD + CAMERA CONNECTOR

CAMERA I/F

*Enclosure: 518S0364Plexi: 516S0212

LCD I/F

THIS GND CONECTS TO CHASSIS GND

0.0022UF

10%CERM40250V

21

C9014

100K

4021/16WMF-LF1%

2

1R9000

402

2.37K

MF-LF1/16W1%

21

R9013

402MF-LF

NOSTUFF

10K5%1/16W

2

1R9016NOSTUFF

4021/16W5%10KMF-LF

2

1R9015

603

10UF20%6.3VX5R2

1 C901216VX5R10%

402

0.1UF2

1 C9011

FERR-120-OHM-1.5A

0402-LF21

L9005

402CERM

0.001UF50V10%

2

1C9016

100K

402MF-LF

5%1/16W

2

1R9002

SM90-OHM-200MA

CRITICAL

4

32

1

L9007

0402-LF

120-OHM-0.3A-EMI21

L9008

10K5%MF-LF1/16W402

21

R9023

S-050162BCRITICAL

F-RT-SM

9876543

26

25

24

23

222120

2

19181716151413121110

1

J9001

FERR-120-OHM-1.5A

0402-LF21

L9002

FERR-120-OHM-1.5A

0402-LF21

L9003

1/16WMF-LF

100K1%

402

21R9001

SSM3K15FVSOD-VESM

21

3Q9006

SSM3K15FVSOD-VESM

21

3Q9004

SOT665TC7SZ08AFEF

CRITICAL

4

5

3

1

2

U9053

X5R

0.1UF10%16V402

2

1C9059

NTK3142PSOT723-3

2

1

3 Q9005

402

100K1/16WMF-LF1%

2

1R9014

40250V5%CERM

100PF2

1 C900250V5%100PFCERM402

2

1 C9003CERM

100PF5%50V402

2

1 C9000

50V0.001UF10%CERM402

2

1C9015402

0.001UF50VCERM10%

2

1C9010

402

10%CERM50V

0.001UF2

1C9008

M-RT-SM78171-0004

CRITICAL

4321

6

5

J9000

SM90-OHM-200MA

CRITICAL

4

32

1

L9006

CRITICAL

402-1

NOSTUFF

8V-100PF

2

1

DZ9001NOSTUFF

8V-100PF402-1

CRITICAL 2

1

DZ9000

NOSTUFF

0402

FERR-1000-OHM21

L9010

0402

NOSTUFF

FERR-1000-OHM21

L9011

NOSTUFF

0402

FERR-1000-OHM21

L9012

FDC606PSOT-6

CRITICAL

4

3

6521

Q9003

CERM

100PF5%50V402

2

1C9001

120-OHM-0.3A-EMI

0402-LF21

L9000

120-OHM-0.3A-EMI

0402-LF21

L9001

0.001UF

40250VCERM10%

21

C9009

1/16W402MF-LF5%10K

2

1R90095%1/16W402MF-LF

10K

2

1R90080402-LF

FERR-120-OHM-1.5A21

L90040.0033UF

402CERM10%50V

21

C9013

01

7667

051-7455

SYNC_MASTER=GPU SYNC_DATE=06/23/2006INVERTER,LVDS,TMDS

INV_GND


VOLTAGE=12.6VPPBUS_ALL_INV_CONN

BKLIGHT_CTLLVDS_BKLT_CTL

INV_PWREN_L

VOLTAGE=5VMIN_NECK_WIDTH=0.20 MMMIN_LINE_WIDTH=0.30 MM

PP5V_INV

=PP3V3_S0_LCD

=PP3V3_S0_LCD

LVDS_DDC_CLK

MIN_LINE_WIDTH=0.25 MMMIN_NECK_WIDTH=0.20 MMVOLTAGE=3.3VPP3V3_S0_LCD_F

=GND_CHASSIS_LVDS

LVDS_A_CLK_N

MIC_HI_LVDS

MIC_SHIELD_LVDS

MIC_LO_LVDS

=PP5V_S3_CAMERA

LVDS_IBG

LVDS_CTRL_CLK

=PP3V3_S0_LCD

LVDS_VDD_EN

=PP3V3_S0_LCD

INV_PWREN_F_L

LVDS_BKLT_EN

LVDS_A_CLK_P

LCDVDD_PWREN_L

LVDS_A_DATA_N<2>

LVDS_A_CLK_F_NLVDS_A_CLK_F_P

USB2_CAMERA_CONN_NUSB2_CAMERA_CONN_P

LVDS_A_DATA_P<0>LVDS_A_DATA_N<1>LVDS_A_DATA_P<1>

LVDS_A_DATA_N<0>

LVDS_A_DATA_P<2>

MIN_LINE_WIDTH=0.30 MMVOLTAGE=5VPP5V_INV_F

MIN_NECK_WIDTH=0.20 MM INV_BKLIGHT_PWM_L

INVT_CHGND

=PPBUS_S5_INV

LCDVDD_PWREN_L_R

=PP5V_S0_LCD

PLT_RST_L

PP3V3_LCDVDD_SW


VOLTAGE=3.3V

=USB2_CAMERA_P

=USB2_CAMERA_N

MIN_LINE_WIDTH=0.30 MMMIN_NECK_WIDTH=0.20 MMPP3V3_LCDVDD_SW_F

VOLTAGE=3.3V

VOLTAGE=5V


PP5V_S3_CAMERA_F MIC_LO_LVDS_CONNMIC_HI_LVDS_CONN

=GND_CHASSIS_LVDS

=GND_CHASSIS_LVDS

LVDS_DDC_DATA

=PP3V3_S5_LCD

LVDS_CTRL_DATA

MIC_LO_LVDS_CONN

MIC_HI_LVDS_CONN

=GND_CHASSIS_LVDS

67C6

67A6

67C6

67B2

67B2

67B2

67B7

67B7

67A4

67C6

67B7

67A6

67A6

67A4

67B5

67B5

67A2

71D3

71C3

14D5

67B5

67B5

71D3

71D3

71D3

71D3

71D3

71D3

71D3

27D4

67A4

67A2

14D5

67A2

6B1

6B1

14D5

7C4

7C4

14D5

8C8

14C5

7A4

14D5

12B1

7C4

14D5

7C4

14D5

14C5

14C5

14C5

14C5

14C5

14C5

14C5

6B1

6B1

8D8

7B1

7A7

23A6

8C2

8C2

67A4

67A4

8C8

8C8

14D5

7D1

12B1

67A2

8C8

www.vinafix.vn

OUT

OUT

OUT

OUT

OUT

OUT

OUT

TX0_PTX0_N

TX1_N

TX1_P

TX2_P

TX2_N

TXC_P

SCLDDC

SDADDC

SDG_P

TEST

EXT_SWING

TXC_N

SGND1

SGND0

PGND2

AGND0

AGND1

AGND2

GND1

SPGND

GND0

HTPLGA1

SDSDA

SDSCL

RESET*

EXT_RES

SDI_PSDI_N

SDC_P

SDC_N

SDB_P

SDB_N

SDR_NSDR_P

SDG_N

VCC1

VCC0

VCC2

AVCC0

AVCC1

PVCC1

PVCC2

SVCC0

SVCC1

SPVCC

OVCC

CORESDVO RCVR

I2C MASTERINTER

TEXT MODECONFIG/PRGRM

DIFF SIGDATA

OUT

IN

IN

IN

IN

IN

IN

IN

IN

NC

OUT

OUT

IO

IO

IN

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

MINI DVI CONN J9401PLACE R9200,U9201 CLOSE TO

3.3V ACTIVE OUTPUT

TMDS CHIP SDVO INPUT INTERRUPT SIGNAL TO MCH

TMDS_I2C_SCL AND TMDS_I2C_SDA DON’T NEED TO CONNECT

ONE 0.1UF AND 1000PF FOR EACH PIN


MCH SDVO CHANNEL R,G,B,CLK SIGNAL TO TMDS CHIP

IF HIGH, ADDRESS=0X72ADDRESS=0X70NC

PLACE THE CAP NEAR THE NB SIDE


"Place R9250 near U2300.F12"

CURRENT IS SMALLR9200 INSURES ESD DIODE

5.5V TOL INPUT

402

10%X5R

0.1UF16V2

1 C9241

10UF20%6.3VX5R603

2

1 C92400.1UF10%X5R16V402

2

1C923810%CERM50V0.001UF

4022

1 C9236

5.23K1/16W402MF-LF1%

2

1R9201

0402-LF

FERR-120-OHM-1.5A21

L9201

0402-LF

FERR-120-OHM-1.5A21

L9200

0402-LF

FERR-120-OHM-1.5A21

L9206

0402-LF

FERR-120-OHM-1.5A21

L9203

0402-LF

FERR-120-OHM-1.5A21

L9204

0402-LF

FERR-120-OHM-1.5A21

L9205

CRITICAL

LQFPSIL1362ACLU

34

28

10

1413

2322

2019

1716

30

42

36

48

3

4539

45

3738

3233

4041

4647

4344

98

2

26

11

27

1

29

317

25

35

21

15

241812

6

U9200

1%249MF-LF1/16W4022

1R9204

X5R6.3V20%10UF

6032

1 C9205

402

0.001UF50VCERM10%

2

1 C9237

0.001UF10%CERM50V402

2

1 C9230

0.001UF50VCERM10%

4022

1 C9232

CERM10%50V0.001UF

4022

1 C9234

10%CERM50V402

0.001UF2

1 C920850VCERM10%

402

0.001UF2

1 C921010%CERM50V0.001UF

4022

1 C9212

10%CERM50V0.001UF

4022

1 C92000.001UF50VCERM10%

4022

1 C920110%CERM50V402

0.001UF2

1 C9223

0.001UF50VCERM10%

4022

1 C9224

0.001UF10%

40250VCERM2

1 C9222

10%CERM50V0.001UF

4022

1 C9225

16VX5R10%0.1UF

4022

1C9239

0.1UF10%X5R16V402

2

1C923116VX5R10%0.1UF

4022

1C9214

0.1UF10%X5R16V402

2

1C923316VX5R10%0.1UF

4022

1C9206

10%X5R16V402

0.1UF2

1C9235

5%10KMF-LF4021/16W

2

1R9205

0.1UF10%16V402X5R2

1C92070.1UF10%X5R16V402

2

1C920916VX5R10%0.1UF

4022

1C9211

0.1UF10%X5R16V402

2

1C920216VX5R10%0.1UF

4022

1C9203

16V10%X5R

0.1UF

4022

1 C92420.1UF10%X5R40216V2

1 C9243

16V0.1UF

X5R10%

4022

1 C9244

X5R402

0.1UF10%16V2

1 C92450.1UF16VX5R10%

4022

1 C9246

402

10%X5R

0.1UF16V2

1 C9247

16V0.1UF

X5R10%

4022

1 C9248

0.1UF10%X5R 16V40221

C9220

402MF-LF1/16W5.23K

1%

2

1R9202

1/16WMF-LF1%

49.9

402

21

R9237

49.91%

MF-LF1/16W402

21R9238

1/16WMF-LF1%

49.9

402

21R9208

MF-LF1/16W402

49.91%

21

R9209

1/16W1%

402MF-LF

49.921

R9239

49.91%

MF-LF1/16W402

21R9240

1/16WMF-LF1%

49.9

402

21R9210

MF-LF4021/16W5%10K

2

1R9206

4021/16W

1%MF-LF

16.5K

2

1R92111%

16.5KMF-LF

1/16W402 2

1R9212

10K

1/16WMF-LF5%

402

21R9200

MF-LF402

5%1/16W100K

2

1R9250

5%1/16WMF-LF

270K

402 2

1R9213

SOT-553

CRITICAL

74LVC1G17DRL4

5

1 3

2

U9201

1K5%MF-LF1/16W4022

1R9203

10UF20%X5R6.3V603

2

1 C9213

10UF20%X5R6.3V603

2

1 C9204

10%X5R16V402

0.1UF2

1 C9221

X5R0.1UF10% 16V

40221

C9219

PEG_D2R_P<1>

49.91%

MF-LF1/16W402

21

R9207

76

SYNC_DATE=06/06/2005EXTERNAL TMDS

01

68

SYNC_MASTER=GRAPHIC

051-7455

TMDS_HTPLG_BUF

=PP3V3_S0_TMDS

TMDS_HTPLG_R

TMDS_SDB_P

TMDS_SDC_PTMDS_SDC_N

SDVO_CTRLCLK

PEG_D2R_N<1>

DVI_HOTPLUG_DET

=PP3V3_S0_TMDS

TMDS_TX_P<0>

TMDS_I2C_SCL

TMDS_TX_N<2>TMDS_TX_P<2>TMDS_TX_N<1>TMDS_TX_P<1>

TMDS_TX_CLK_P

TMDS_EXT_SWING

TMDS_I2C_SDA

TMDS_TX_CLK_N

TMDS_TX_N<2>

TMDS_TX_P<1>

DVI_HOTPLUG_DET

=PP1V8_S0_TMDS

PEG_R2D_C_N<1>

PEG_R2D_C_P<1>

TMDS_SDR_N

TMDS_SDB_N

TMDS_TX_N<0>

TMDS_TX<1>

TMDS_TX<2>

TMDS_TX_CLK

PP1V8_S0_ANALOG_SDVO_FPP3V3_S0_PVCC2_TMDS_F

PP3V3_S0_ANALOG_TMDS_FPP1V8_S0_TMDS_F

TMDS_SDG_PTMDS_SDG_N

TMDS_INT_PTMDS_INT_N

PEG_R2D_C_N<0>

PP3V3_S0_PVCC1_TMDS_F

PP3V3_S0_ANALOG_SDVO_F

PEG_R2D_C_P<0>

PP3V3_S0_PVCC1_TMDS_FMIN_LINE_WIDTH=0.3MMMIN_NECK_WIDTH=0.25MM

VOLTAGE=3.3V

VOLTAGE=3.3V



=PP3V3_S0_TMDS

PP3V3_S0_PVCC2_TMDS_FMIN_LINE_WIDTH=0.3MMVOLTAGE=3.3V


TMDS_RST_L

TMDS_TX_N<1>

TMDS_TX_CLK_NTMDS_TX_CLK_P




PP3V3_S0_ANALOG_TMDS_F

=PP3V3_S0_TMDS

=PP3V3_S0_TMDS

=PP3V3_S0_TMDS

=PP1V8_S0_TMDS TMDS_TX_P<0>PP3V3_S0_ANALOG_TMDS_FMIN_NECK_WIDTH=0.25MM


PP1V8_S0_TMDS_FVOLTAGE=1.8V


TMDS_SDR_P

TMDS_TX_N<0>TMDS_TX<0>

TMDS_TX_P<2>

=PP3V3_S0_TMDS

PEG_R2D_C_N<3>PEG_R2D_C_P<3>

TMDS_HTPLG

TMDS_EXT_RES

PEG_R2D_C_N<2>PEG_R2D_C_P<2>

SDVO_CTRLDATA

69C8

69C8

69C8

69C8

69C8

69C8

69C2

69C2

69C2

69C2

69C8

69C2

69C2

69B7

69B7

69B7

69B7

69C2

69B7

69B7

68D8

68D8

68D8

68D8

69B7

68D8

68D8

68C8

68C8

68C8

68C8

68D8

68C8

68C8

68B7

68B7

68B7

68B7

68C8

68B2

68B7

68B2

68B2

68B2

68B2

68B7

71D3

68B1

68B8

68B1

69B2

69B2

69B2

69B2

69B2

69A2

69A2

69B2

69B2

68D6

71D3

71D3

69B2

68D6

71D3

71D3

68B1

69B2

69A2 69A2

68D6

68B1

68B1

68B1

68D6 69B2 69B2

69B2

68B2

71D3

71D3

71D3

71D3

14C3

7C4

15A3

23A6

7C4

68D3

68C1

68C3

68D1

68D3

68C3

68C1

68B2

68B2

7B7

14C3

14B3

68D1

68D3

68C7

68B1

68D3

14C3

68C6

68D6

14B3

68C4

68C4

7C4

68C4

27D1

68B2

68B2 68B2

68C4

68B4

7C4

7C4

7C4

7B7 68B2 68B2

68B2

7C4

14B3

14B3

69C6

14C3

14B3

15A3

www.vinafix.vn

VCC

125GND

A Y

VCC

125GND

A Y

SYM_VER-1

SYM_VER-1

SYM_VER-1

SYM_VER-1

DSG

DSG

GND

VCCDAS1A

S2A

S1BS2B

S1C

S2C

S1D

S2D INEN_L

DD

DC

DB

IO

IO

DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

TABLE_5_ITEM


TABLE_ALT_HEAD



TABLE_ALT_ITEM

NOTE: CRT_DDC_* ARE NOT 5V COMPLIANT

NC

PLACE R9452 R9453 CLOSE TO GMCH



NB VIDEO ALIASES

PLACE THE RESISTOR CLOSE TO GMCH AND THE CAP NEAR THE CONNECTOR

TMDS(MINI DVI) INTERFACE

NC

Video Connectors

Isolation required for DVI power switch

EXTERNAL VIDEO (VGA) INTERFACE

PLACE THE RESISTOR CLOSE TO GMCH AND THE CAP NEAR CONNECTOR

AND GROUND

DVI power DIODE on page 95 (D9500)

A 1.3K OHM 1% RESISTOR IS REQUIRED BETWEEN CRT_IREF

SM-LF

CRITICAL

0.5AMP-13.2V21

F9404

0.001UF

402

10%50VCERM2

1 C9410

0.1UF20%10VCERM402

2

1 C9460

1/16WMF-LF402

5%2.2K

2

1R9462

MF-LF1/16W402

2.2K5%

2

1R9463

NOSTUFF

5%33PFCERM50V402

2

1 C9442

100PF50VCERM5%

4022

1 C9411

NOSTUFF

33PF5%CERM50V402

2

1 C9443

402X5R16V10%0.1UF

2

1 C9421

CRITICALSN74LVC2G125DCUUS

3

8

74

5

U9404

CRITICAL

USSN74LVC2G125DCU

6

8

14

2

U9404

90-OHM-100MA1210-4SM1

CRITICAL

4

32

1

L9405

CRITICAL

90-OHM-100MA1210-4SM1

4

32

1

L9406

CRITICAL

300-OHM-50MA1210-4SM

4

32

1

L9404

1210-4SM190-OHM-100MA

CRITICAL

4

32

1

L9407

SOT563SSM6N15FE

4

5

3

Q9401

SOT563SSM6N15FE

1

2

6

Q94011/16WMF-LF

5%2.2K

4022

1R9422

1/16W5%

39

402MF-LF

21

R9461

395%

MF-LF1/16W402

21R9470

1/16WMF-LF5%

39

402

21

R9471

402

0.1UFX5R16V10%

2

1C9439

40250V100PFCERM5%

2

1 C9412

CRITICAL

SOP

TS3V330

16

13

10

6

3

14

11

5

2

1

8

15

12

9

7

4U9401

1/16WMF-LF1%

402

75

2

1R9451

402

1%1/16WMF-LF

75

2

1R9453

402MF-LF1/16W1%75

2

1R9450

1/16WMF-LF402

1%75

2

1R9452

751%1/16WMF-LF4022

1R9455751%1/16WMF-LF4022

1R9454

2.2KMF-LF5%

4021/16W

2

1R9466

402

2.2KMF-LF1/16W5%

2

1R9467

210MHZMEA2010P-SM

CRITICAL

81

54

63

72

FL9400

SOD-7231SS418

2 1

D9401

CRITICAL

MINI-DVI-M42-BLKF-RT-TH

OMIT

31

2719

36353433

24

29

22

16

15

14

13

12

11

32

30

28

10

925

1826

1

2

3

4

5

6

7

8

20

17

J9401

402CERM10V20%0.1UF

2

1 C94040402

600-OHM-300MA21

L9444

395%

MF-LF1/16W402

21R9460

402

1.21K

1/16WMF-LF1%

21

R9469

2.2K5%

MF-LF1/16W4022

1R9421

01

69 76

SYNC_MASTER=EUGENESYNC_DATE=05/21/05MINI-DVI CONNECTOR

051-7455CRITICAL1514-0376 CONN,REC,MINI-DVI,32P,RA,TABS,BLK J9401 FANCY

CONN,REC,MINI-DVI,32P,RA,TABS,MG3 NORMAL514-0375 CRITICALJ94011

? F9404740S0028740S0044

=GND_CHASSIS_TMDS_DOWN

GPU_CRT_DDC_DATA

CRT_DDC_CLK

=PP3V3_S0_TMDS

TMDS_HTPLG

MAKE_BASE=TRUECRT_VSYNC_R


TMDS_TX_CONN_N<0>

TMDS_TX_CONN_CLK_P

TMDS_TX_CONN_CLK_N

PP5V_S0_DVIPORT

GPU_CRT_DDC_CLK

VGA_BVGA_HSYNC

VGA_GVGA_VSYNC

VGA_R

TMDS_TX_CONN_P<2>

TMDS_TX_CONN_N<1>

TMDS_TX_CONN_P<0>

PP5V_S0_DVIPORT_D

MAKE_BASE=TRUECRT_RED

MAKE_BASE=TRUECRT_BLUE

TV_C_DAC

=TV_C_RTN

=CRT_GREEN_L

=TV_B_RTN

=CRT_BLUE_L

=TV_A_RTN

TV_A_DAC

PP5V_S0_TMDS_FUSEMIN_LINE_WIDTH=0.5 MMMIN_NECK_WIDTH=0.25 MM

VOLTAGE=5V

TV_A_DACMAKE_BASE=TRUE

=CRT_TVO_IREF=TV_A_DAC

=TV_C_DAC

=CRT_HSYNC_R=CRT_VSYNC_R MAKE_BASE=TRUE

CRT_HSYNC_R

=CRT_RED

=CRT_GREENMAKE_BASE=TRUE

CRT_GREEN

CRT_TVO_IREFMAKE_BASE=TRUE

TV_C_DACMAKE_BASE=TRUE

CRT_HSYNC_LS_R

CRT_VSYNC_LS

CRT_HSYNC_R

SB_CRT_TVOUT_MUX_L

EXT_Y_G

EXT_C_R

CRT_GREEN

TMDS_TX_P<2>

TMDS_TX_P<1>

TMDS_TX_N<0>

TMDS_TX_P<0>

TMDS_TX_CLK_P

=CRT_RED_L

TMDS_TX_CLK_N

CRT_DDC_DATA


PP5V_S0_DVIPORT

MIN_NECK_WIDTH=0.25 MMMIN_LINE_WIDTH=0.5 MMVOLTAGE=5V

TV_DCONSEL<1>

=PP3V3_S0_NB

CRT_TVO_IREF

VGA_HSYNC

VGA_VSYNC

=PP3V3_S0_TMDS

CRT_HSYNC_LS

CRT_VSYNC_R CRT_VSYNC_LS_R

CRT_BLUE

EXT_COMPVID_B


VOLTAGE=5V=PP5V_S0_TMDSMIN_LINE_WIDTH=0.30 MM

TV_B_DACMAKE_BASE=TRUE

TV_DCONSEL<0>

=CRT_BLUE

=PP3V3_S0_TMDS

CRT_RED

TV_B_DAC

=TV_B_DAC

TMDS_TX_N<1>

TMDS_TX_N<2>

TMDS_TX_CONN_P<1>

TMDS_TX_CONN_N<2>

69C2

69C8

69C8

69B7

69B7

69C2

68D8

68D8

68D8

68C8

68C8

68C8

68B7

68B7

68B7

68B2

68B2

68B2

68B1

71C3

69C4

71C3

71C3

71C3

71C3

71C3

71C3

71C3

71C3

71C3

71C3

71C3

68C3

68D3

68D1

68D3

68C3

68C1

69A4

71C3

68B1

71C3

71C3

68B1

71C3

71C3

68D1

68C1

8A6

14B5

7C4

68A8

69C3

8C8

69D4

69C1

69C1

69A8

69B8

69D7

14B5

14B5

14B5

14B5

14B5

69D7

69B8

14A5

14C5

14B5

14B5

14A5

69C3

14B5

14B5 69A8

69D8

69A8

69D5

24D2

69D5

68B2

68B2

68B2

68B2

68B2

14B5

68B2

14B5

8C8

69B4

14B5

7C4

69D7

69B4

69B4

7C4

69D5

69D5

7A7

14B5

14B5

7C4

69D5

69D7

14B5

68B2

68B2

www.vinafix.vn

TABLE_PHYSICAL_RULE_ITEM

LINE-TO-LINE SPACINGLAYERSPACING_RULE_SET WEIGHTTABLE_SPACING_RULE_HEAD

TABLE_SPACING_RULE_ITEM




TABLE_SPACING_RULE_ITEM TABLE_SPACING_RULE_ITEM



MINIMUM LINE WIDTHALLOW ROUTEON LAYER? LAYER MINIMUM NECK WIDTH MAXIMUM NECK LENGTH DIFFPAIR PRIMARY GAP DIFFPAIR NECK GAPPHYSICAL_RULE_SET

TABLE_PHYSICAL_RULE_HEAD





TABLE_SPACING_ASSIGNMENT_ITEM

AREA_TYPE SPACING_RULE_SETNET_SPACING_TYPE1 NET_SPACING_TYPE2TABLE_SPACING_ASSIGNMENT_HEAD


DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE













NOTE: Design Guide does not indicate FSB spacing to other signals, assumed 3:1.

DSTB complementary pairs are spaced 1:1 and routed as differential pairs.

Worst-case spacing is 2:1 within Addr bus, with 3:1 spacing to the ADSTBs.

FSB (Front-Side Bus) Constraints

(See above)

(See above)

CPU / FSB Net PropertiesPHYSICAL

NET_TYPE

SPACING

DG recommends at least 25 mils, >50 mils preferred

Design Guide recommends each strobe/signal group is routed on the same layer.

Worst-case spacing is 2:1 within Data bus, with 3:1 spacing to the DSTBs.

Design Guide recommends FSB signals be routed only on internal layers.

Some signals require 27.4-ohm single-ended impedance.

NOTE: Design Guide allows closer spacing if signal lengths can be shortened.

All FSB signals with impedance requirements are 55-ohm single-ended.

CPU Signal Constraints

SOURCE: Santa Rosa Platform DG, Rev 0.9 (#20517), Sections 4.2 & 4.3

ELECTRICAL_CONSTRAINT_SET

Most CPU signals with impedance requirements are 55-ohm single-ended.

(See above)

SOURCE: Santa Rosa Platform DG, Rev 0.9 (#20517), Sections 4.4 & 5.8.2.4

NOTE: 7 mil gap is for VCCSense pair, whichIntel says to route with 7 mil spacing withoutspecifying a target differential impedance.

(See above)

(FSB_CPURST_L)

=STANDARD=55_OHM_SEY =55_OHM_SE* =55_OHM_SEFSB_55S =STANDARD

?*FSB_DATA =3:1_SPACING

FSB_COMMON * =2:1_SPACING ?

25 MIL*CPU_VCCSENSE ?

FSB_ADDR2ADSTB * =3:1_SPACING ? ?FSB_DATA2DSTB * =3:1_SPACING

7 MIL7 MILCPU_27P4S =27P4_OHM_SE=27P4_OHM_SE=27P4_OHM_SEY*

?FSB_DSTB * =3:1_SPACING

=2:1_SPACING*CPU_2TO1 ?

?FSB_DATA2DATA * =2:1_SPACING

*CPU_COMP ?25 MIL

CPU_ITP * =2:1_SPACING ?

FSB_DATA *FSB_DATA FSB_DATA2DATA

*FSB_ADSTB =3:1_SPACING ?

01

70

SYNC_MASTER=WFERRY SYNC_DATE=06/08/2006

CPU/FSB Constraints

76

051-7455

25 MILCPU_GTLREF * ?

=STANDARD=STANDARDY =55_OHM_SE* =55_OHM_SE =55_OHM_SECPU_55S

FSB_DATA2DSTB*FSB_DATA FSB_DSTB

*FSB_ADSTBFSB_ADDR FSB_ADDR2ADSTB

FSB_ADDRFSB_ADDR * FSB_ADDR2ADDR

* =3:1_SPACINGFSB_ADDR ?

=55_OHM_SEY =55_OHM_SE* =55_OHM_SEFSB_DSTB_55S =1:1_DIFFPAIR =1:1_DIFFPAIR

*FSB_ADDR2ADDR =2:1_SPACING ?

CPU_55SCPU_BSEL1 CPU_BSEL<1>CPU_2TO1

CPU_55S CPU_IGNNE_LCPU_FROM_SB

CPU_55S CPU_A20M_LCPU_FROM_SB

CPU_2TO1CPU_55S NB_BSEL<1>

CPU_DPRSTP_LCPU_2TO1CPU_55SCPU_DPRSTP_L

CPU_27P4S CPU_COMPCPU_COMP CPU_COMP<2>CPU_55S CPU_COMP<1>CPU_COMP CPU_COMP

CPU_55S CPU_DPSLP_LCPU_FROM_SB

CPU_55S CPU_2TO1 CPU_BSEL<0>CPU_BSEL0

CPU_FROM_SB CPU_STPCLK_LCPU_55S

CPU_COMP CPU_COMP<0>CPU_27P4S CPU_COMP

CPU_55S CPU_SMI_LCPU_FROM_SB

CPU_INIT_LCPU_55SCPU_INIT_L

CPU_55S CPU_NMICPU_FROM_SB

CPU_FROM_SB CPU_INTRCPU_55S

CPU_55S CPU_PWRGDCPU_PWRGD

CPU_55S CPU_2TO1 CPU_PROCHOT_LCPU_PROCHOT_L

CPU_55S CPU_FERR_LCPU_FERR_L

FSB_ADSTB0 FSB_ADSTB_L<0>FSB_ADSTBFSB_55S

FSB_ADDRFSB_55SFSB_ADDR_GROUP1 FSB_A_L<35..17>FSB_55S FSB_ADSTB_L<1>FSB_ADSTB1 FSB_ADSTB

FSB_ADDR FSB_A_L<16..3>FSB_55SFSB_ADDR_GROUP0

FSB_DSTB_55S FSB_DSTB FSB_DSTB_L_N<3>

FSB_DSTBFSB_DSTB_55S FSB_DSTB_L_N<2>FSB_DSTB_55SFSB_DSTB2 FSB_DSTB FSB_DSTB_L_P<2>FSB_55S FSB_DATAFSB_DATA_GROUP2 FSB_DINV_L<2>

FSB_COMMONFSB_55S FSB_HIT_LFSB_COMMON

FSB_DINV_L<1>FSB_55S FSB_DATAFSB_DATA_GROUP1

FSB_DSTB_55S FSB_DSTB_L_P<1>FSB_DSTBFSB_DSTB1

FSB_D_L<15..0>FSB_DATAFSB_DATA_GROUP0 FSB_55S

FSB_DSTB_55S FSB_DSTB FSB_DSTB_L_N<1>

FSB_DATAFSB_55SFSB_DATA_GROUP3 FSB_DINV_L<3>

FSB_55S FSB_COMMON FSB_BNR_LFSB_COMMON

FSB_DSTB_55S FSB_DSTB_L_P<0>FSB_DSTBFSB_DSTB0

FSB_DSTB_55S FSB_DSTB_L_N<0>FSB_DSTB

FSB_DATAFSB_55SFSB_DATA_GROUP3 FSB_D_L<63..48>

FSB_DSTB_55SFSB_DSTB3 FSB_DSTB FSB_DSTB_L_P<3>

FSB_REQ_L<4..0>FSB_55SFSB_ADDR_GROUP0 FSB_ADDR

FSB_55S FSB_COMMON FSB_DEFER_LFSB_COMMON

FSB_55S FSB_COMMON FSB_CPURST_LFSB_CPURST_L

FSB_55S FSB_COMMON FSB_HITM_LFSB_COMMON

FSB_55S FSB_COMMON FSB_DPWR_LFSB_COMMON

FSB_55S FSB_COMMON FSB_DRDY_LFSB_COMMON

FSB_55S FSB_COMMON FSB_LOCK_LFSB_COMMON

FSB_55S FSB_COMMON FSB_RS_L<2..0>FSB_COMMON

FSB_DINV_L<0>FSB_DATAFSB_55SFSB_DATA_GROUP0

FSB_COMMON FSB_BREQ0_LFSB_55SFSB_COMMON

FSB_COMMON FSB_DBSY_LFSB_55SFSB_COMMON

FSB_55S FSB_COMMON FSB_ADS_LFSB_COMMON

FSB_COMMON FSB_BPRI_LFSB_55SFSB_COMMON

FSB_55S FSB_COMMON FSB_TRDY_LFSB_COMMON

FSB_55S FSB_D_L<31..16>FSB_DATAFSB_DATA_GROUP1

FSB_55S FSB_D_L<47..32>FSB_DATA_GROUP2 FSB_DATA

CPU_BSEL<2>CPU_BSEL2 CPU_55S CPU_2TO1

CPU_IERR_L CPU_55S CPU_IERR_L

PM_THRMTRIP_L CPU_55S CPU_2TO1 PM_THRMTRIP_LFSB_CPUSLP_LFSB_CPUSLP_L CPU_55S

CPU_55SPM_DPRSLPVR CPU_2TO1 PM_DPRSLPVRIMVP_DPRSLPVRCPU_2TO1CPU_55S

CPU_GTLREF CPU_GTLREFCPU_GTLREFCPU_55S

CPU_55S CPU_2TO1 NB_BSEL<0>

CPU_COMPCPU_55SCPU_COMP CPU_COMP<3>

CPU_2TO1 NB_BSEL<2>CPU_55S

XDP_BPM_L<5>XDP_BPM_L5 CPU_ITPCPU_55S

XDP_CLK_NCLK_FSB_100D CLK_FSB

CLK_FSBCLK_FSB_100D XDP_CLK_P

CPU_55S CPU_ITP ITP_CPURST_L

CPU_55S CPU_VID<6..0>CPU_2TO1

CPU_55S CPU_2TO1 IMVP6_VID<6..0>

CPU_27P4S CPU_VCCSENSE CPU_VCCSENSE_NCPU_VCCSENSE

CPU_27P4S CPU_VCCSENSE CPU_VCCSENSE_PCPU_VCCSENSE

CPU_VCCSENSE IMVP6_VSEN_NCPU_27P4S

CPU_27P4S CPU_VCCSENSE IMVP6_VSEN_P

CPU_55S CPU_ITPXDP_BPM_L XDP_BPM_L<4..0>XDP_TRST_L XDP_TRST_LCPU_ITPCPU_55S

XDP_TCK XDP_TCKCPU_ITPCPU_55S

XDP_TMS XDP_TMSCPU_ITPCPU_55S

XDP_TDO XDP_TDOCPU_ITPCPU_55S

XDP_TDI XDP_TDICPU_ITPCPU_55S

59C7

59C8

45B3

12B3

22C4

46B2

22C4

45C3

13D3

13D5

13B5

13A3

13A5

13C5

13C5

22C2

59D8

59A5

59A5

12B3

12B3

12B2

12B2

12B5

12B3

29B6

22C4

22C4

29B8

15B6

22C4

29C6

22C4

22C4

22C4

22C4

22C4

12B1

45B5

22C2

13C3

13C3

13C3

13C3

13B3

13B3

13A3

13B3

13B3

13B3

13B3

13C5

13B3

13B3

13C3

13B3

13B3

9C2

13A3

9D8

13B3

12B5

13B3

13B3

13B3

13B3

13A3

13B3

13B3

13B3

13C3

13C3

13B3

9C4

13B5

29A6

15A6

13A5

24C3

29C8

29B8

12B2

59C7

59A4

59A4

12B2

9C6

9C6

9C6

9C6

9C6

9A4

9C8

9C8

15C6

9B2

9B3

9B3

9B2

9B4

9B8

9B3

9B8

9D6

9B8

9B8

9B2

9C5

9C8

9D8

9C8

9C8

9D8

9B2

9C2

9C2

9C2

9C6

9B4

9B4

9C4

9B4

9B2

9D6

9C4

9C4

9B2

9B2

9C8

9D6

9D6

9C6

9B2

9D6

9D6

9D6

9C4

9D6

9D6

9D6

9D6

9D6

9B4

9C2

9A4

9D6

9C6

9A2

15A6

59C7

9B4

15C6

9B3

15B6

9C5

75C3

75C3

10B7

10A6

10A6

9C6

9A7

9A7

9B7

9A7

9B7

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DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE













PCI-Express / DMI Bus Constraints

- 37.5-ohm +/- 15% from GMCH to first termination resistor.

CRT_HSYNC/CRT_VSYNC signals are 55-ohm +/- 15% single-ended impedence.

SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 8.1 - 8.3.

ELECTRICAL_CONSTRAINT_SET PHYSICAL

NET_TYPE

DG Says 40 mil spacing minimum


CRT & TVDAC signal single-ended impedence varies by location:

- 55-ohm +/- 15% from second termination resistor to connector.- 50-ohm +/- 15% from first to second termination resistor.

LVDS signals are 100-ohm +/- 20% differential impedence.


Video Signal ConstraintsSOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 7.2, 9.2 & 10.5

SPACING

TVDAC_2TVDAC * ?20 MIL

DMI 20 MIL ?*

=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFFPCIE_100D * Y =100_OHM_DIFF =100_OHM_DIFF

* ?CRT_SYNC2SYNC 20 MIL

CRT_2CRTCRTCRT *

*CRT_SYNC CRT_SYNC CRT_SYNC2SYNC

20 MILPCIE * ?

CRT_2CRT * ?20 MIL

76

051-745571

SYNC_MASTER=WFERRY

NB ConstraintsSYNC_DATE=06/12/2006

01

20 MILLVDS * ?

=50_OHM_SE=50_OHM_SE =STANDARDY* =STANDARD=50_OHM_SECRT_50S

=100_OHM_DIFFDMI_100D =100_OHM_DIFFY* =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF

=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF* Y =100_OHM_DIFFLVDS_100D

=55_OHM_SE=55_OHM_SECRT_55S =55_OHM_SE* Y =STANDARD =STANDARD

CRT 25 MIL* ?

TVDAC_2TVDACTVDACTVDAC *

TVDAC 25 MIL* ?

?* 25 MILCRT_SYNC

CRT_50S TV_C_DACTVDACTV_C_DAC

CRT_50S TVDAC TV_A_DACTV_A_DAC

CRT_SYNC CRT_55S CRT_SYNC CRT_VSYNC_R

CRT_RED CRTCRT_50S CRT_REDCRT_GREEN CRTCRT_50S CRT_GREENCRT_BLUE CRTCRT_50S CRT_BLUE

LVDS_IBG LVDS_IBGLVDS

PCIEPCIE_100D PEG_R2D_C_P<3..0>

CRT_SYNCCRT_55SCRT_SYNC CRT_HSYNC_R

CRT_50S TV_B_DACTVDACTV_B_DAC

PCIEPCIE_100D PEG_R2D_C_N<3..0>

DMIDMI_100D DMI_S2N_N<3..0>

CRT CRT_TVO_IREFCRT_TVO_IREF

LVDS_A_DATA LVDS_A_DATA_P<2..0>LVDS_100D LVDS

LVDS_A_DATA3 LVDS_A_DATA_N<3>LVDSLVDS_100D

LVDS_A_DATA3 LVDS_A_DATA_P<3>LVDSLVDS_100D

LVDS_A_DATA LVDS_A_DATA_N<2..0>LVDS_100D LVDS

LVDSLVDS_A_CLK LVDS_A_CLK_NLVDS_100D

LVDS_A_CLK LVDS_A_CLK_PLVDSLVDS_100D

DMIDMI_100D DMI_S2N_P<3..0>DMI_S2N

DMI_100D DMI DMI_N2S_N<3..0>DMI_100DDMI_N2S DMI DMI_N2S_P<3..0>

PCIEPCIE_100DPEG_R2D PEG_D2R_N<1>PCIEPCIE_100D PEG_D2R_P<1>

68C6

68C6

68B6

23D2

69D7

69D7

69D5

69D5

69D5

69D5

67A8

68B6

69D5

69D7

14C3

15C3

69D8

67B2

67B2

67B3

67B3

23D2

23D2

23D2

68B6

68B6

69A8

69B8

69C3

69A8

69A8

69B8

14D5

14B3

69C3

69A8

14B3

15B3

69D7

14C5

14C5

14C5

14C5

15B3

15B3

15B3

14D3

14C3

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DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

















TABLE_SPACING_ASSIGNMENT_ITEMTABLE_SPACING_ASSIGNMENT_ITEM












Memory Net PropertiesNET_TYPE

SPACING

SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Section 6.2

ELECTRICAL_CONSTRAINT_SET PHYSICAL

DDR2 Memory Bus Constraints

Need to support MEM_*-style wildcards!

MEM_CLK MEM_CMD2MEM*MEM_CMD

* =85_OHM_DIFF =85_OHM_DIFF =85_OHM_DIFF=85_OHM_DIFFMEM_85D Y =85_OHM_DIFF

MEM_70D =70_OHM_DIFF =70_OHM_DIFF=70_OHM_DIFF* Y =70_OHM_DIFF=70_OHM_DIFF

=55_OHM_SE =STANDARD=STANDARDMEM_55S Y* =55_OHM_SE=55_OHM_SE

MEM_CMD2CMDMEM_CMDMEM_CMD *

?=1.5:1_SPACING*MEM_CMD2CMD

MEM_CTRL MEM_DATA2MEMMEM_DATA *

MEM_45S * =STANDARD=45_OHM_SE =STANDARDY =45_OHM_SE =45_OHM_SE

MEM_CMD MEM_CLK2MEMMEM_CLK *

?*MEM_2OTHER 25 MIL

MEM_DQS *MEM_CMD MEM_CMD2MEM

?=3:1_SPACING*MEM_CTRL2MEM

?*MEM_DATA2DATA =1.5:1_SPACING

MEM_CLKMEM_DATA MEM_DATA2MEM*

MEM_CTRL MEM_CTRL2MEM*MEM_CMD

?=3:1_SPACING*MEM_DQS2MEM

*MEM_CLK MEM_CTRL2MEMMEM_CTRL

MEM_CTRL *MEM_CTRL MEM_CTRL2CTRL

MEM_CTRL2MEM*MEM_CTRL MEM_DQS


Memory Constraints

01

7672

051-7455

MEM_CTRL * MEM_CTRL2MEMMEM_DATA

?* =3:1_SPACINGMEM_DATA2MEM

?=3:1_SPACING*MEM_CMD2MEM

MEM_CTRL MEM_CMD2MEMMEM_CMD *

MEM_DQS MEM_CLK2MEMMEM_CLK *

?* =2:1_SPACINGMEM_CTRL2CTRL

MEM_DATA *MEM_CLK MEM_CLK2MEM

MEM_CTRL * MEM_DQS2MEMMEM_DQS

*MEM_DATA MEM_DATA MEM_DATA2DATA

?MEM_CLK2MEM =4:1_SPACING*

MEM_DQSMEM_DQS MEM_DQS2MEM*

MEM_CMDMEM_DQS MEM_DQS2MEM*

MEM_DATA * MEM_DQS2MEMMEM_DQS

MEM_CLK * MEM_DQS2MEMMEM_DQS* *MEM_CLK MEM_2OTHER

* *MEM_DQS MEM_2OTHER

**MEM_DATA MEM_2OTHER

* *MEM_CMD MEM_2OTHER

**MEM_CTRL MEM_2OTHER

MEM_DATA MEM_CMD2MEMMEM_CMD *

MEM_CLK MEM_CLK MEM_CLK2MEM*

MEM_CLK MEM_CTRL MEM_CLK2MEM*

MEM_CMD *MEM_DATA MEM_DATA2MEM

MEM_DQS *MEM_DATA MEM_DATA2MEM

MEM_B_CNTL MEM_ODT<3..2>MEM_45S MEM_CTRL

MEM_B_BS<2..0>MEM_B_CMD MEM_55S MEM_CMD

MEM_B_CMD MEM_B_RAS_LMEM_55S MEM_CMD

MEM_B_CMD MEM_B_CAS_LMEM_55S MEM_CMD

MEM_85D MEM_DQS MEM_A_DQS_N<6>MEM_85D MEM_DQS MEM_A_DQS_P<7>MEM_A_DQS7

MEM_CLK_P<5..3>MEM_B_CLK MEM_CLKMEM_70D

MEM_DQSMEM_85D MEM_A_DQS_N<7>

MEM_CLKMEM_70DMEM_A_CLK MEM_CLK_P<2..0>

MEM_A_DM5 MEM_DATAMEM_55S MEM_A_DM<5>

MEM_DATAMEM_55SMEM_A_DM7 MEM_A_DM<7>

MEM_A_DQ_BYTE5 MEM_DATAMEM_55S MEM_A_DQ<47..40>MEM_A_DQ_BYTE4 MEM_DATAMEM_55S MEM_A_DQ<39..32>

MEM_A_DQ<31..24>MEM_A_DQ_BYTE3 MEM_DATAMEM_55S

MEM_CMDMEM_55S MEM_A_RAS_LMEM_A_CMD

MEM_CMD MEM_A_BS<2..0>MEM_A_CMD MEM_55S

MEM_CMD MEM_A_A<14..0>MEM_A_CMD MEM_55S

MEM_45S MEM_CTRL MEM_ODT<1..0>MEM_A_CNTL

MEM_CTRLMEM_45S MEM_CS_L<1..0>MEM_A_CNTL

MEM_70D MEM_CLK MEM_CLK_N<2..0>

MEM_B_DQS_N<7>MEM_85D MEM_DQS

MEM_B_DQS_N<6>MEM_85D MEM_DQSMEM_B_DQS_P<7>MEM_B_DQS7 MEM_85D MEM_DQS


MEM_B_DQS_P<5>MEM_B_DQS5 MEM_85D MEM_DQS

MEM_B_DQS_P<4>MEM_B_DQS4 MEM_85D MEM_DQSMEM_B_DQS_N<4>MEM_85D MEM_DQS


MEM_85D MEM_DQS MEM_B_DQS_N<3>

MEM_B_DQS_N<2>MEM_85D MEM_DQS




MEM_B_DM<7>MEM_B_DM7 MEM_DATAMEM_55S


MEM_B_DM<4>MEM_B_DM4 MEM_DATAMEM_55SMEM_B_DM<5>MEM_B_DM5 MEM_DATAMEM_55S

MEM_B_DM<1>MEM_B_DM1 MEM_DATAMEM_55SMEM_B_DM<2>MEM_B_DM2 MEM_DATAMEM_55S

MEM_B_DQ<63..56>MEM_B_DQ_BYTE7 MEM_DATAMEM_55S

MEM_B_DM<0>MEM_B_DM0 MEM_55S MEM_DATA

MEM_B_DQ<47..40>MEM_B_DQ_BYTE5 MEM_DATAMEM_55SMEM_B_DQ<55..48>MEM_B_DQ_BYTE6 MEM_DATAMEM_55S

MEM_B_DQ<39..32>MEM_B_DQ_BYTE4 MEM_DATAMEM_55S

MEM_B_DQ<23..16>MEM_B_DQ_BYTE2 MEM_DATAMEM_55SMEM_B_DQ<31..24>MEM_B_DQ_BYTE3 MEM_DATAMEM_55S

MEM_B_DQ<7..0>MEM_B_DQ_BYTE0 MEM_55S MEM_DATAMEM_B_DQ<15..8>MEM_B_DQ_BYTE1 MEM_DATAMEM_55S

MEM_B_CMD MEM_B_WE_LMEM_55S MEM_CMD

MEM_B_CMD MEM_B_A<14..0>MEM_55S MEM_CMD

MEM_B_CNTL MEM_CS_L<3..2>MEM_45S MEM_CTRL

MEM_B_CNTL MEM_45S MEM_CTRL MEM_CKE<4..3>

MEM_CLK_N<5..3>MEM_CLKMEM_70D

MEM_85D MEM_DQS MEM_A_DQS_P<6>MEM_A_DQS6


MEM_85D MEM_DQS MEM_A_DQS_N<4>

MEM_85D MEM_DQS MEM_A_DQS_N<5>




MEM_85D MEM_DQSMEM_A_DQS1 MEM_A_DQS_P<1>MEM_85D MEM_DQS MEM_A_DQS_N<1>

MEM_85D MEM_DQS MEM_A_DQS_N<0>MEM_85D MEM_DQSMEM_A_DQS0 MEM_A_DQS_P<0>


MEM_A_DM<3>MEM_A_DM3 MEM_DATAMEM_55S


MEM_A_DM<2>MEM_A_DM2 MEM_DATAMEM_55S

MEM_A_DM<0>MEM_A_DM0 MEM_55S MEM_DATAMEM_A_DM<1>MEM_DATAMEM_A_DM1 MEM_55S

MEM_DATAMEM_55S MEM_A_DQ<63..56>MEM_A_DQ_BYTE7

MEM_A_DQ<55..48>MEM_A_DQ_BYTE6 MEM_DATAMEM_55S

MEM_A_DQ<15..8>MEM_A_DQ_BYTE1 MEM_55S MEM_DATAMEM_A_DQ<23..16>MEM_A_DQ_BYTE2 MEM_DATAMEM_55S

MEM_A_DQ<7..0>MEM_A_DQ_BYTE0 MEM_55S MEM_DATA

MEM_55S MEM_A_WE_LMEM_A_CMD MEM_CMD

MEM_CMDMEM_55S MEM_A_CAS_LMEM_A_CMD

MEM_CKE<1..0>MEM_CTRLMEM_45SMEM_A_CNTL


32B5

32C6

32A5

30C6

31C6

30C4

31C4

32A6

30B6

30D6

32C6

30B6

31B6

31B6

32D6

32D6

32D6

31C6

30B4

30B6

30D4

30C6

30B4

32D6

32D6

31A6

31B4

31B6

31B4

31B6

32D5

30A6

32D6

31B6

31B6

32A6

32A6

31D4

30D4

30A6

30B4

30C6

32B6

30B6

16C5

30B6

30B6

30D4

31A4

31A6

31A6

31B4

31C6

31C6

31D6

31D6

32A6

16C1

31B4

31C6

31D4

30A4

30A6

30D6

30C6

30D6

32B6

32B6

30C6

31B4

31B4

31B4

31B6

30A4

30A6

31A4

30A6

30A4

30B6

30A4

30A4

16C8

30C4

30B4

30B4

16B5

30B4

30B4

30A4

31A4

31A6

31A4

31B4

31A6

31A4

31B6

31B6

31C4

31C4

31C6

31D6

31C6

31D6

31D6

31D6

31A6

31A4

31B4

31A6

31D4

31C4

16B4

31D4

31A4

31A4

16C4

31C4

31C4

31D4

31D4

31B6

16B1

15D3

31C4

31A4

30A4

30B4

30B6

30B4

30C6

30B6

30C4

30C4

30C6

30D6

30D6

30D6

30D6

30A6

30C4

30B4

30C6

30D4

30D4

16B8

30A4

30D4

30C4

30D4

30B6

30B6

30C4

31C6

15C3

16D1

16B1

16D1

16C5

16C5

15D3

16C5

15D3

16C5

16C5

16B8

16B8

16C8

16B5

16D5

15C6

15C3

15D3

15D3

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16C1

16D1

16C1

16A4

16D1

16B4

16B4

16B4

16C4

16C4

16D4

16C4

16B1

15C6

15C3

15D3

15D3

16C5

16C5

16C5

16C5

16C5

16C5

16C5

16C5

16C5

16C5

16C5

16C5

16C5

16C5

16C5

16C5

16C5

16D5

16D5

16A8

16B8

16C8

16C8

16D8

16B5

16D5

15D3

16C1

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DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE












USB 2.0 Interface Constraints

DG says minimum spacing 50 mils to clocks


NET_TYPE

SPACINGPHYSICAL

SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Section 10.13.2

Internal Interface Constraints

SOURCE: Napa Platform DG, Rev 0.9 (#17978), Section 10.9.1

HD Audio Interface Constraints

SOURCE: Santa Platform DG, Rev 1.0 (#21112), Section 10.17

SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 10.7 & 10.9

Disk Interface Constraints

Y* =STANDARD =STANDARD=55_OHM_SE =55_OHM_SE =55_OHM_SEUSB_60S

Y =100_OHM_DIFF=100_OHM_DIFFSATA_100D =100_OHM_DIFF =100_OHM_DIFF* =100_OHM_DIFF

=STANDARD =STANDARD=55_OHM_SE=55_OHM_SEY* =55_OHM_SEHDA_55S

=STANDARDY =55_OHM_SE =55_OHM_SE =STANDARDIDE_55S =55_OHM_SE*

=STANDARD* =55_OHM_SE=55_OHM_SEY =STANDARD=55_OHM_SESATA_55S

?*SMB =3:1_SPACING

?*IDE =1.8:1_SPACING

?20 MIL*SATA

?=1.8:1_SPACINGSPI *

051-7455

SYNC_MASTER=WFERRY

SB Constraints (1 of 2)SYNC_DATE=06/12/2006

73 76

01

=STANDARD=STANDARD=55_OHM_SE=55_OHM_SE =55_OHM_SEY*SMB_55S

?* 25 MILUSB_2CLK

USB_90D Y* =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF =90_OHM_DIFF

=STANDARD=STANDARD=55_OHM_SE*SPI_55S =55_OHM_SE=55_OHM_SEY

* ?=1.8:1_SPACINGHDA

20 MILUSB ?*

SPI_SCLK_RSPISPI_55SSPI_SCLK

SMB_SB_ME_SCL SMB_ME_CLKSMB_55S SMB

USB_60S USB_RBIASUSB_RBIAS

USB USB_EXTC_NUSB_90D

USB_90D USBUSB_EXTB USB_EXTB_P

IDE_PDDACK_LIDEIDE_55SIDE_CNTL

SATASATA_100DSATA_A_R2D SATA_A_R2D_C_P

IDEIDE_55S IDE_PDIORDYIDE_PDIORDY

IDE_PDD IDEIDE_55S IDE_PDD<15..0>

IDE_55S IDEIDE_CNTL IDE_PDDREQ

IDE_PDCS IDEIDE_55S IDE_PDCS3_LIDE_CNTL IDE_55S IDE IDE_PDIOW_L

IDEIDE_55SIDE_RST_L ODD_RST_5VTOL_L

USB_EXTA_NUSBUSB_90D

USB_90D USB USB_EXTA_MUXED_P

USBUSB_90DUSB_MINI USB_MINI_P

USB_TPAD_NUSBUSB_90D

SATA_100D SATA SATA_A_R2D_NSATASATA_100D SATA_A_R2D_P

SATA_100D SATA SATA_A_R2D_C_N

IDEIDE_55SIDE_IRQ14 IDE_IRQ14

IDE_PDIOR_LIDE_PDIOR_L IDEIDE_55S

IDE_PDCS IDEIDE_55S IDE_PDCS1_LIDEIDE_PDA IDE_55S IDE_PDA<2..0>

SATASATA_100D SATA_A_D2R_PSATA_A_D2R

SATA_100D SATA SATA_A_D2R_NSATA_100D SATA_A_D2R_C_PSATA

SMB_SB_ME_SDA SMB_ME_DATASMBSMB_55S

SMB_DATASMB_55S SMBSMB_SB_SDA

SMB_CLKSMB_SB_SCL SMBSMB_55S

USB_90D USBUSB_EXTC USB_EXTC_PUSB_90D USB USB_EXCARD_NUSB_90D USBUSB_EXCARD USB_EXCARD_PUSB_90D USB USB_EXTB_N

USBUSB_90D USB_IR_NUSBUSB_90DUSB_IR USB_IR_P

USBUSB_90DUSB_TPAD USB_TPAD_PUSBUSB_90D USB_BT_NUSBUSB_90DUSB_BT USB_BT_PUSBUSB_90D USB_CAMERA_NUSBUSB_90DUSB_CAMERA USB_CAMERA_P

USB_3G_NUSBUSB_90D

USB_3G USB_3G_PUSBUSB_90D

USB_90D USB USB_MINI_N

USB_90D USB USB_EXTA_MUXED_N

USB_EXTA USB_EXTA_PUSBUSB_90D

HDA_RST_LHDAHDA_RST_L HDA_55S

HDA_SYNC HDAHDA_55S HDA_SYNC

SATA_100D SATA_A_D2R_C_NSATA

HDA_BIT_CLKHDAHDA_55SHDA_BIT_CLK

HDAHDA_55S HDA_BIT_CLK_R

HDA_SYNC_RHDAHDA_55S

HDA_RST_L_RHDAHDA_55SHDA_SDIN0HDA_55S HDAHDA_SDIN0

HDA_55S HDA HDA_SDOUTHDA_SDOUT

HDAHDA_55S HDA_SDOUT_R

SPISPI_55S SPI_A_SCLK_R

SPI_A_SI_RSPISPI_55S

SPISPI_55SSPI_SI SPI_SI_R

SPI_CE_R_L<0>SPI_CE_L0 SPISPI_55S

SPI_SO SPI_SOSPI_55S SPI

SPI_55S SPI SPI_A_SO_R

SPI_55S SPISPI_CE_L1 SPI_CE_R_L<1>SPI_CE_L<0>SPISPI_55S

39C5 39C3

39B5

23C2

23C2

23C2

23C2

52C7

47A8

23C2

23C2

39B3

40D4

39B5

22C4

39C3

39B3

39B5

39A8

23C2

23C2

23C2

40D4

39B5

39C3

39B5

39B3

40C4

40D4

47A8

47D8

47D8

23C2

23C2

23C2

23C2

8C2

8C2

23C2

8B2

8C2

23C2

23C2

23C2

23C2

22C8

22C8

22C8

22C8

22B8

52C3

52C7

52C3

23C5

24D5

23B3

8B1

8B1

22B4

22B6

22A4

22B4

22A4

22B4

22B4

23B6

8C1

8C1

8C1

40D7

40D7

22B6

22B4

22B4

22B4

22B4

22B6

22B6

40C7

24D5

24D5

24D5

8B1

8B1

8B1

8B1

8C1

8C1

8C1

8B1

8C1

8C1

8C1

8C1

8C1

8A6

8A6

40D7

8A6

22C6

22C6

22C6

8A6

8A6

22B6

52C5

52C4

23C5

23C5

23C5

52C4

52C6

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DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE






















PCI Bus Constraints

SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 10.18.1 & 10.19

PHYSICAL SPACING

NET_TYPE


Platform LAN (Nineveh) Constraints

DG says 30 mils min separation.

SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 10.27.1.5-7, 10.29 & 10.30

Controller Link (AMT) Constraints

SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 10.27.1.5-7, 10.29 & 10.30

CLINK_12MIL 300 MILS5 MILS12 MILSY =STANDARD* =STANDARD

051-7455

SB Constraints (2 of 2)SYNC_MASTER=WFERRY SYNC_DATE=06/12/2006

74 76

01

=100_OHM_DIFF =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFFENET_100D Y*

=STANDARD=55_OHM_SEPCI_55S * =55_OHM_SE =STANDARD=55_OHM_SEY

20 MILSENET_GLAN ?*

=1.5:1_SPACINGENET_LAN * ?

* Y =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF=100_OHM_DIFFGLAN_100D

=STANDARD=55_OHM_SEY =55_OHM_SE* =STANDARD=55_OHM_SELAN_55S

?*ENET_MDI 25 MILS

=1.8:1_SPACING*CLINK ?

12 MILSCLINK_VREF * ?

=2:1_SPACING*PCI ?

CLINK_55S Y =55_OHM_SE =STANDARD=55_OHM_SE* =STANDARD=55_OHM_SE

=2.5:1_SPACINGENET_CLK * ?

LAN_55S ENET_GLAN_CLK_RENET_CLKENET_GLAN_CLK

PCI_PERR_LPCIPCI_55SPCI_CNTL

PCI_AD<31..21>PCIPCI_55SPCI_AD

ENET_MDI_P<0>ENET_MDIENET_100DENET_MDI0ENET_MDI_N<0>ENET_100D ENET_MDI

ENET_100D ENET_MDI ENET_MDI_N<2>

ENET_100D ENET_MDI ENET_MDI_N<3>

CLINK_NB_CLKCLINKCLINK_NB CLINK_55S

CLINK_55S CLINK CLINK_NB_RESET_LCLINK_NB_RESET_L

CLINK_WLAN_RESET_LCLINK_55SCLINK_WLAN_RESET_L CLINK

SB_CLINK_VREF0 CLINK_VREFCLINK_12MIL SB_CLINK_VREF0SB_CLINK_VREF1 CLINK_VREFCLINK_12MIL SB_CLINK_VREF1

ENET_MDI ENET_MDI_N<1>ENET_100D

ENET_100D ENET_MDI_P<1>ENET_MDIENET_MDI1

LAN_55S ENET_GLAN_CLKENET_CLK

NB_CLINK_VREF NB_CLINK_VREFCLINK_12MIL CLINK_VREF

CLINK_WLAN_DATACLINK_WLAN CLINKCLINK_55S

CLINKCLINK_55S CLINK_WLAN_CLKCLINK_WLAN

CLINKCLINK_55S CLINK_NB_DATACLINK_NB

ENET_100D ENET_MDI ENET_MDI_P<3>ENET_MDI3

ENET_MDIENET_100DENET_MDI2 ENET_MDI_P<2>

PCI_TRDY_LPCIPCI_55SPCI_CNTL

PCI_LOCK_LPCIPCI_55SPCI_LOCK_L

PCI_DEVSEL_LPCIPCI_55SPCI_CNTL

PCI_STOP_LPCIPCI_55SPCI_CNTL

PCI_SERR_LPCI_55S PCIPCI_CNTL

PCI_IRDY_LPCIPCI_55SPCI_CNTL

PCI_C_BE_L<3..0>PCIPCI_55SPCI_C_BE_L

PCI_PARPCIPCI_55SPCI_AD

PCI_AD<20>PCIPCI_55SPCI_AD20

PCI_AD<19>PCIPCI_55SPCI_AD19

PCI_AD<18..0>PCI_55S PCIPCI_AD

PCIE_E_D2R_NPCIEPCIE_100D

PCIEPCIE_100DPCIE_E_D2R PCIE_E_D2R_P

PCI_REQ1_LPCIPCI_55SPCI_REQ1_L

PCI_FRAME_LPCIPCI_55SPCI_CNTL

PCI_FW_REQ_L PCI_FW_REQ_LPCIPCI_55S

PCI_FW_GNT_L PCI_FW_GNT_LPCIPCI_55S

PCI_GNT1_LPCIPCI_55SPCI_GNT1_LPCI_REQ2_LPCIPCI_55SPCI_REQ2_LPCI_GNT2_LPCIPCI_55SPCI_GNT2_LINT_PIRQA_LPCIPCI_55SINT_PIRQA_L

PCIPCI_55SINT_PIRQB_L INT_PIRQB_LPCIPCI_55SINT_PIRQC_L INT_PIRQC_LPCIPCI_55SINT_PIRQD_L INT_PIRQD_LPCIINT_PIRQE_L PCI_55S INT_PIRQE_LPCIINT_PIRQF_L PCI_55S INT_PIRQF_L

LAN_D2R<2..0>ENET_LAN LAN_55S ENET_LAN

LAN_R2D<2..0>LAN_55SENET_LAN ENET_LAN

ENET_LAN LAN_RSTSYNCLAN_55S ENET_LAN

GLAN_COMP GLAN_COMP

PCIE_100D PCIE PCIE_E_R2D_C_NPCIE_100D PCIEPCIE_E_R2D PCIE_E_R2D_C_P

37C5

37A5

37A5

37A5

37A5

37A5

37A5

37B5

37A5

37A5

37A5

23A6

37B5

36B7

36B7

36C7

36C7

24C3

24C3

36C7

36C7

24C3

36C7

36B7

23A6

23A6

23A6

23A6

23A6

23A6

37B5

37B5

37B5

37B6

23B8

33C5

23B6

23A6

23B6

37A5

23B6

23A8

23A8

23A8

23A8

23A6

23A6

33B6

33B6

23A4

23A8

34B8

34B8

34B8

34B8

15A3

15A3

24D5

24C3

24C3

34B8

34B8

15A4

24C3

24C3

15A3

34B8

34B8

23A4

23A4

23A4

23A4

23A4

23A4

23B6

23A6

23A8

23A8

23A8

33B5

33B5

23A4

23A4

23A4

23B5

23A4

23A4

23A4

23A4

23A4

23A4

23A4

22C6

33B5

33B5

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DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

CK505 PCI5 is project-specific

SPACING

NET_TYPE


Clock Signal Constraints

(CPU_BSEL2)(CPU_BSEL0)

PHYSICAL

CK505 PCI4 is project-specific

CK505 SRC8 is project-specific

CK505 SRC7 is project-specific

(CK505_NB)

(CK505_PCIF1)(CK505_PCIF0)

(CK505_ITP)

(CPU_BSEL0)

(CK505_SRC1)(CK505_SRC1)

(CPU_BSEL2)

(CK505_LVDS)(CK505_LVDS)

(CK505_SRC6)(CK505_SRC6)(CK505_SRC5)

(CK505_SRC4)

(CK505_SRC3)(CK505_SRC2)(CK505_SRC2)

(CK505_SRC4)

(CK505_SRC3)

(CK505_SRC5)

(CK505_PCI3)

(CPU_BSEL2)(CPU_BSEL0)

(CK505_DOT96)(CK505_DOT96)

(CK505_PCI1)(CK505_PCI2)

(CK505_ITP)(CK505_NB)

Clock Net Properties

(CK505_CPU)(CK505_CPU)

SOURCE: Santa Rosa Platform DG, Rev 1.0 (#21112), Sections 14.1 - 14.6

?CLK_FSB * 25 MIL

?CLK_MED * 20 MIL

* ?CLK_PCIE 20 MIL

CLK_SLOW ?* 10 MIL

=100_OHM_DIFFY* =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFFCLK_PCIE_100D =100_OHM_DIFF

* =55_OHM_SE =STANDARDYCLK_MED_55S =55_OHM_SE =55_OHM_SE =STANDARD

CLK_FSB_100D Y* =100_OHM_DIFF=100_OHM_DIFF=100_OHM_DIFF =100_OHM_DIFF =100_OHM_DIFF

CLK_SLOW_55S =55_OHM_SE =STANDARD=STANDARD=55_OHM_SEY* =55_OHM_SE

Clock ConstraintsSYNC_MASTER=WFERRY

75 76

01


051-7455

CLK_FSBCLK_FSB_100D XDP_CLK_N

CK505_SRC7_NCLK_PCIECLK_PCIE_100D

CK505_SRC3_PCK505_SRC3 CLK_PCIECLK_PCIE_100D

CK505_SRC2_PCLK_PCIECLK_PCIE_100DCK505_SRC2CK505_SRC2_NCLK_PCIECLK_PCIE_100D

CK505_DOT96_27M_PCLK_PCIECLK_PCIE_100DCK505_DOT96

CK505_CLK14P3M_TIMERCLK_MEDCLK_MED_55S

CLK_FSB_100D CLK_FSB CK505_CPU0_PCK505_CPU

CK505_NB CLK_FSB_100D CK505_CPU1_PCLK_FSB

CLK_FSB_100D CK505_CPU0_NCLK_FSBCK505_CPU

CLK_FSB_100DCK505_ITP CK505_CPU2_ITP_SRC10_NCLK_FSB

CK505_ITP CLK_FSB_100D CLK_FSB CK505_CPU2_ITP_SRC10_PCLK_FSB_100D CK505_CPU1_NCLK_FSBCK505_NB

CLK_MEDCLK_MED_55S CK505_USB48_FSA

CLK_PCIE_100D CLK_PCIE CK505_DOT96_27M_N

CK505_LVDS_NCLK_PCIECLK_PCIE_100D

CLK_PCIECLK_PCIE_100D CK505_SRC1_N

CLK_MEDCK505_PCI5 CLK_MED_55S CK505_PCI5_FCTSEL1CLK_MEDCLK_MED_55SCK505_PCI4 CK505_PCI4_CLKCLK_MEDCLK_MED_55SCK505_PCI3 CK505_PCI3_CLKCLK_MEDCK505_PCI2 CLK_MED_55S CK505_PCI2_CLKCLK_MEDCLK_MED_55S CK505_PCI1_CLKCK505_PCI1

CLK_MEDCLK_MED_55S CK505_PCIF1_CLKCK505_PCIF1

CLK_MEDCK505_PCIF0 CK505_PCIF0_CLKCLK_MED_55S

CK505_SRC1_PCLK_PCIECLK_PCIE_100DCK505_SRC1

CK505_LVDS_PCLK_PCIECLK_PCIE_100DCK505_LVDS

CK505_SRC5_PCLK_PCIE_100DCK505_SRC5 CLK_PCIE

CK505_SRC3_NCLK_PCIECLK_PCIE_100D

PCI_CLK33M_SBCLK_MEDCLK_MED_55S

PCI_CLK33M_LPCPLUSCLK_MEDCLK_MED_55S

PCI_CLK33M_FWCLK_MEDCLK_MED_55S

PCI_CLK33M_SMCCLK_MEDCLK_MED_55S

CLK_MED SB_CLK48M_USBCTLRCLK_MED_55S

CK505_FSACLK_MED_55S CLK_MED

NB_CLK100M_DPLLSS_PCLK_PCIECLK_PCIE_100D

CLK_PCIE_100D CLK_PCIE NB_CLK100M_DPLLSS_N

PEG_CLK100M_NCLK_PCIECLK_PCIE_100DSB_CLK100M_DMI_PCLK_PCIECLK_PCIE_100D

CLK_PCIE_100D CLK_PCIE PCIE_CLK100M_EXCARD_NCLK_PCIECLK_PCIE_100D PCIE_CLK100M_EXCARD_P

SB_CLK100M_SATA_PCLK_PCIE_100D CLK_PCIE

NB_CLK100M_PCIE_PCLK_PCIECLK_PCIE_100D

SB_CLK100M_SATA_NCLK_PCIECLK_PCIE_100D

PCIE_CLK100M_MINI_PCLK_PCIE_100D CLK_PCIE

NB_CLK100M_PCIE_NCLK_PCIE_100D CLK_PCIE

PCIE_CLK100M_MINI_NCLK_PCIECLK_PCIE_100D

CLK_PCIE_100D PEG_CLK100M_PCLK_PCIE

NB_CLK96M_DOT_NCLK_PCIE_100D CLK_PCIE

NB_CLK96M_DOT_PCLK_PCIE_100D CLK_PCIE

CLK_MED_55S CLK_MED SB_CLK14P3M_TIMER

CLK_PCIE_100D CLK_PCIE SB_CLK100M_DMI_N

CK505_FSCCLK_MED_55S CLK_MED

PCI_CLK33M_TPMCLK_MEDCLK_MED_55S

CLK_FSB_100D CLK_FSB XDP_CLK_PFSB_CLK_NB_NCLK_FSBCLK_FSB_100D

FSB_CLK_NB_PCLK_FSBCLK_FSB_100D

FSB_CLK_CPU_NCLK_FSBCLK_FSB_100D

FSB_CLK_CPU_PCLK_FSBCLK_FSB_100D


CK505_SRC6_NCLK_PCIE_100D CLK_PCIE

CLK_PCIE_100D CK505_SRC5_NCLK_PCIE

CK505_SRC4_PCLK_PCIECLK_PCIE_100DCK505_SRC4CK505_SRC4_NCLK_PCIECLK_PCIE_100D


CLK_PCIE_100D CK505_SRC8_NCLK_PCIE

CK505_SRC8_PCLK_PCIECK505_SRC8 CLK_PCIE_100D

29C6

29C6

29B6

29D6

29D6

29D6

29D6

29D6

29D6

29B6

29C6

29B6

29C6

29C6

29B3

46C4

37A5

44C8

29D6

29D6

29B6

29C6

29C6

29C6

29C6

29B6

29B6

28B4

28B4

28A4

29D8

28C4

28C4

28C4

28C4

28C4

28C4

29D8

28A4

28B4

29B2

28B6

29A6

28B6

29B6

28B6

29B6

28B4

28B4

29A5

29B3

29B3

29A5

29A5

29D6

29C3

29C3

29C3

29C3

29C3

29C3

33C5

29C3

33C5

29B3

29B3

29A5

29C3

29D6

29D3

29D3

29D3

29D3

28B4

28B4

28B4

28B4

28B4

28A4

28A4

70A3

6C7

6C7

6C7

28A4

6C7

6C7

6C7

6C7

6C7

6C7

28A4

6C7

6C7

28B6

8C4

28B6

8C4

28B6

6C7

28B8

6C7

6C7

23A6

6C2

29A5

29A3

24D3

29C8

8B1

8A1

23C2

22B6

15C3

22B6

29C3

15C3

29B3

8B1

8B1

24D3

23D2

29A8

70A3

13B3

13B3

9B6

9B6

6C7

6C7

6C7

6C7

6C7

6B7

6B7

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DSIZE

OFSHT

DRAWING NUMBER






12345678

12345678

B

C

D

A

B

C

D

A

REV.


NONE

FireWire Interface ConstraintsELECTRICAL_CONSTRAINT_SET

NET_TYPE

PHYSICAL

FireWire Net PropertiesSPACING

SPACINGPHYSICAL

NET_TYPE


SMC SMBus Net Properties

Port 2 Not Used

Y*FW_55S =55_OHM_SE =55_OHM_SE =STANDARD =STANDARD=55_OHM_SE

=2:1_SPACINGFW * ?

=110_OHM_DIFF=110_OHM_DIFFFW_110D =110_OHM_DIFF=110_OHM_DIFF=110_OHM_DIFFY*

FW_TP ?=3:1_SPACING*

FireWire & SMC ConstraintsSYNC_DATE=06/12/2006SYNC_MASTER=WFERRY

76

01

76

051-7455

FW_55S FW FW_LPSFW_LPS

FW_LREQ FW_LREQFWFW_55SFW_PINTFW_PINT FWFW_55S

CLK98P304M_FW_XI_RFWPHY_CLK98P304M_XI CLK_MEDCLK_MED_55S

FW_LINK<7..0>FWFW_55SFW_D_CTL

CLKFW_PHY_PCLKCLK_MEDCLK_MED_55S

CLKFW_LINK_PCLKCLK_MED_55S CLK_MEDFW_PCLK

CLKFW_PHY_LCLKCLK_MED_55S CLK_MED

CLKFW_LINK_LCLKCLK_MED_55S CLK_MEDFW_LCLK

FW_D_CTL FW_CTL<1..0>FW_55S FW

FW_LKON FW_LKONFWFW_55SFW_LKON_RFW_55S FW

FW_0_TPA_PFW_0_TPA FW_110D FW_TP

SMBUS_SMC_B_S0_SDASMBUS_SMC_B_S0_SDA SMBSMB_55S

SMBUS_SMC_0_S0_SDASMBUS_SMC_0_S0_SDA SMBSMB_55S

SMBUS_SMC_BSA_SDASMBUS_SMC_BSA_SDA SMBSMB_55S

SMBUS_SMC_A_S3_SCLSMBUS_SMC_A_S3_SCL SMBSMB_55S

SMBUS_SMC_B_S0_SCLSMBUS_SMC_B_S0_SCL SMB_55S SMB

SMBUS_SMC_0_S0_SCLSMBUS_SMC_0_S0_SCL SMB_55S SMB

SMBUS_SMC_BSA_SCLSMBUS_SMC_BSA_SCL SMB_55S SMB

SMBUS_SMC_A_S3_SDASMBUS_SMC_A_S3_SDA SMBSMB_55S

SMBUS_SMC_MGMT_SDASMBUS_SMC_MGMT_SDA SMB_55S SMB

SMBUS_SMC_MGMT_SCLSMBUS_SMC_MGMT_SCL SMBSMB_55S

FW_TP FW_0_TPB_NFW_110D

FW_0_TPA_NFW_0_TPA FW_TPFW_110D

FW_1_TPB_NFW_110D FW_TP

FW_1_TPB_PFW_1_TPB FW_110D FW_TP

FW_1_TPA FW_1_TPA_PFW_110D FW_TP

FW_1_TPA FW_1_TPA_NFW_110D FW_TP

FW_0_TPB FW_0_TPB_PFW_TPFW_110D

CLK98P304M_FW_XICLK_MED_55S CLK_MED

47C5

47C5

6B2

47D5

47C2

47D2

6B2

47D5

47C2

47D2

47B2

47B2

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