74 combinational logic design process 1. understand the problem what is the circuit supposed to...
DESCRIPTION
76 Process Line Control Example (cont.) Where to place the light sensors A, B, and C to distinguish among the three cases? Assume that A detects the leading edge of the rod on the conveyorTRANSCRIPT
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Combinational Logic Design Process
1. Understand the Problem what is the circuit supposed to do? write down inputs (data, control) and outputs draw block diagram or other picture
2. Formulate the Problem in terms of a truth table or other suitable design representation truth table, Boolean algebra, etc.
3. Choose Implementation TargetPAL, PLA, Mux, Decoder, Discrete Gates
4. Follow Implementation Procedure K-maps, Boolean algebra
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Process Line Control Example
Statement of the ProblemRods of varying length (+/-10%) travel on conveyor beltMechanical arm pushes rods within spec (+/-5%) to one sideSecond arm pushes rods too long to other sideRods too short stay on belt
3 light barriers (light source + photocell) as sensors
Design combinational logic to activate the arms
Understanding the ProblemInputs are three sensors, outputs are two arm control signals
Assume sensor reads "1" when tripped, "0" otherwise
Call sensors A, B, C
Draw a picture!
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Process Line Control Example (cont.)
Where to place the light sensors A, B, and C to distinguish among the three cases?
Assume that A detects the leading edge of the rod on the conveyor
Spec
+ 5%
+10%
Too Long
ROD
Spec
+ 5%
- 5%
Within Spec
ROD
Spec
- 5%
- 10%
Too Short
ROD
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Process Line Control Example (cont.)
A
B
C
Spectification - 5%
Specification + 5%
Too Long
Too Short
Within Spec
A to B distance place apart at specification - 5%
A to C distance placed apart at specification +5%
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Process Line Control Example (cont.)
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Combinational vs. Sequential Logic
Combinational logic no feedback among inputs and outputs outputs are a pure function of the inputs e.g., seat belt light: (Dbelt, Pbelt, Passenger) mapped into (Light)
Network implemented from logic gates.The presence of feedback distinguishes between sequentialand combinational networks.
---
X1X2
Xn
LogicNetwork
Z1Z2
Zm
---
LogicCircuit
DbeltPbelt
Passenger
Seat Belt Light
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Circuit Timing BehaviorSimple model: gates react after fixed delay
A
B
C
D
E
F
0
1
0
1
AB C
D E F
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Circuit can temporarily go to incorrect states
Must filter out temporary states
Hazards/Glitches
Copilot Autopilot Request
Pilot Autopilot Request
Pilot in Charge? Autopilot EngagedA B
C
CAR
PIC
PAR
A
B
C
AE
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Safe Sequential CircuitsClocked elements on feedback, perhaps outputs
Clock signal synchronizes operationClocked elements hide glitches/hazards
Clock
---
X1X2
Xn
LogicNetwork
Z1Z2
Zm
---
Clock
Data Valid ComputeCompute Valid Compute