110416 developments in mems packaging - ieee · developments in mems packaging presented to...
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Developments in MEMS PackagingPresented to IEEE-CPMTAlissa M. Fitzgerald, Ph.D. | 13 April 2011
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 2
Overview
• About us• What are MEMS? • MEMS-specific packaging issues• MEMS process technologies important to IC
About AMFitzgerald
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 4
Company Mission
We turn your ideas into silicon.
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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Fully integrated services: concept to production
• Complete project management• Feasibility and cost analysis• Design optimization using simulation• Development on 150 mm wafers, small batches
– Prototype fabrication with own staff engineers at UC Berkeley’s Microlab
• Test system development• Packaging, system integration• Foundry selection, tech transfer and ramp-up
Technology Strategy
Design Simulation
Prototyping Testing Foundry Transfer
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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MEMS design and process expertise
Technologies we have developed:
• Piezoresistive devices• Piezoelectric
(AlN and ZnO) devices• Electrostatic structures• Solar cells• Passive microfluidics• Electrophoretic pumps• Mold masters• Gratings, phase shift lenses etc.• PDMS, SU-8 structures• Mechanical dummies for package
reliability testing• Custom test systems
Over 70 clients served
Application areas:• Chemical sensing• Materials characterization• Medical implant• Medical diagnostics• Pressure sensing• Filtration products• Laser/ Infrared/ Visible
optics• Chip cooling• Cell culture• Radiation sensing• Microphones• Gas flow metering• Multi-chip modules• Solar
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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Standard TSV available for prototypes
• Silex Microsystems Sil-Via®– Already in volume production for consumer electronics– “Via-first” process– Solid via: mechanically stable and robust
Low resistiv ity silicon electrical connection
through wafer
Wafer surface
contact hole opening
Wafer surface
passivation
Dielectric fil led trenches isolating via connections from bulk silicon
Low resistiv ity bulk wafer silicon
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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Modeling and design optimization
• ANSYS Multiphysics R13• Matlab• Proprietary fracture
prediction
• Intelligent use of simulation to minimize risk and reduce fab cycles– Management of uncertainty in
MEMS material properties• Design exploration and
performance optimization
Package-induced stresses
Magnetic field of inductor coils
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 9
Technology strategy
• Device feasibility• Manufacturing cost models• Technology readiness• Patent landscapes• Development roadmaps• Due diligence
Customized workshops on MEMS
What are MEMS and how are they different from IC?
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 11
What are MEMS?
• Micro Electro Mechanical Systems– Not a platform device
technology– But a powerful
manufacturing technology for miniaturization
• Semiconductor process heritage
Source: Ed Phillips
Airbag sensors (1980)
Airbag sensors (2005)
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 12
Challenge of MEMS development
• High technical complexity– Coupled physics– Moving parts– Environmental exposure– Test and packaging
challenges
12
15 um
Microvision Pico-P
TI DLP pixels
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 13
• Smaller, better, cheaper– But not always all three
• Ease of electronics integration enables sophisticated capabilities in small form factor:– Multiple sensors– Signal processing and
analysis– Telemetry capability– Low power
• Multi-chip module preferred to monolithic integration
Why MEMS are exciting for so many applications
Integrated Pressure Sensor
Source: IMD
MEMS sensor
Stacked MEMS and ASIC chips,
wirebonded
Source: Chipworks/Kionix
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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MEMS are not ICs!
• Parallels to IC can be misleading and dangerously naive– IC design to product < 18 months– Enabled by well established processes, design rules,
sophisticated simulation software– Competitive wafer costs– Packaging standards and automation
• MEMS design to product timeline > 5 years typical– Lack of sophisticated simulation tools and process
standardsSolutions evolving slowly
– Wafer costs vary widely– Packaging challenges are huge and solutions are
considered a proprietary advantageCan be > 50% of unit cost
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 15
Today, most MEMS go into consumer electronics
• Current MEMS devices in consumer electronics– Accelerometers:
games/apps, user interface– Gyroscopes:
games/apps, user interface– Microphones:
size and cost reduction (assembly)
• Until 2007, inkjet, DLP, and automotive dominated MEMS markets Thanks to the iPhone, I can
finally explain what I do for a living to non-engineers!
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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Other consumer electronics that use MEMS
Laptops (shock isolation)
Sports performance/safety
Cameras(image stabilization,
microphones)
Portable projectors
GPS navigation
Game consoles(user interface)
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 17
Near-term MEMS developments: Mobile phones
Accelerometers: image stabilization, shock protection, navigation
Gyroscopes: navigation
Microphones: multiple devices for noise cancellation
Pressure sensors Multiple Cameras
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 18
Near-term MEMS developments: Mobile phones
Low power displays
Pico-projectors
Magnetometers & IMUs: navigation, games
Micro-lenses: focus enhancement
Speakers RF filters
Oscillators
MEMS-specific packaging issues
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 20
MEMS-specific packaging issues
• Some MEMS need to be open to the environment– Pressure sensors, microphones– Chemical, fluidic sensors
• Others need to be hermetically sealed, sometimes with a buffer gas and/or anti-stiction agent– Accelerometer– Gyroscope– Oscillators
• Delicate structures
• MEMS sensors can sense package strain!– Package-induced stresses cause zero offset, drift, non-linear
behavior
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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Pressure sensor packaging: open to environment
Package form factor varies according to pressure range and application
GE Sensing
VTIMeasurement Specialties
AST
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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Inertial sensor packaging: MEMS+ASIC
Need to integrate ASIC AND hermetically seal MEMS
Chipworks: STMicro 3-axis accel
Chipworks: Bosch 3-axis accelInvenSense gyroscope
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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SiTime MEMS oscillator: hermetic sealing
Hermetic encapsulation using thick epi-poly
“MEMS first” process, CMOS can be added later
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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Delicate, released structures create handling problems
Texas Instruments DLP
FLIR bolometer
Microvision Pico P
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 25
MEMS packaging considerations
• Variety of shapes and form factors make standardization difficult– Package design and integration must be part of MEMS R&D
effort– Some capped/sealed MEMS can be packaged like IC chips
and leverage IC packaging methods• Packages can provide competitive and cost advantages
– Lots of IP generated in solving MEMS packaging problems
MEMS process technologies now used in IC
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 27
The Bosch DRIE Process
Si
Si
Scalloping
SF6 Plasma
C4F8 Plasma
SF6 Plasma
F + ions SiF4
-CF2-
Passivation
A cyclic process alternating between etch and passivation
Mask
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 28
Deep silicon etch (DRIE)
• Patented by Bosch, licensed to tool manufacturers– Significant process technology in
MEMS, and now IC• Aspect ratios pushing 50:1• Silicon etch rates 1- 50 um/min
AMFitzgerald
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 29
TSV and isolation trenches enabled by silicon DRIE
ST-Ericsson
Alchimer Silex Microsystems
imec
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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Sacrificial etch: make MEMS from CMOS wafers
• Anhydrous vapor HF– Oxide etching
• XeF2– Isotropic silicon etchant,
does not attack metals
• Release MEMS structures made in a CMOS process
HF vapor etch
XeF2 etch
Chipworks: ADI accel Akustica microphone
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
Page 31
Front-to-backside lithography
• Registration of front and backside patterns essential in MEMS– Pressure sensor
• Now useful in IC– Interposers– Wafer bonding– TSV
Basic pressure sensor cross-section
Implanted piezoresistors and
metal contactsMembrane
(5-20 um typ.)
Cavity etched from backside
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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Wafer bonding
• Anodic: CTE-matched glass to silicon
• Glass frit• Metal eutectics• Plasma-activated• Adhesives – low
temperature, temporary
• Front-to-back pattern registration within 2 um
EVGroup bonder
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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MEMS process technologies migrating to IC
• Through silicon via• 3D integration – chip stacking and bonding• Trench isolation
Presented to IEEE-CPMT/Silicon Valley © AMF 2010-2011
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Summary
• Huge variety in MEMS architectures and applications create endless packaging challenges
• TSV and 3DIC people: welcome to our mechanical world!– Stress, CTE mismatch problems - familiar MEMS problems
• MEMS-specific processes now enabling semiconductor technologies
