11 ee462l isolated firing circuit for h bridge inverter

8/12/2019 11 EE462L Isolated Firing Circuit for H Bridge Inverter

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EE462L, Spring 2014

Isolated Firing Circuit for

H-Bridge Inverter

(partially pre-Fall 2009 approach)


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Isolation is needed because we have threeseparate

MOSFET source nodes, and these threenodes are

ground references for the respective firing circuits

One logic

signal

toggles

A+,A

One logic

signal

toggles

B+,B

Vdc

(source of power delivered to load)

Load

A+

B+

A B

Local ground

reference for A+

firing circuit

Local ground

reference for B+

firing circuit

Local groundreference for B

firing circuit

Local groundreference for A

firing circuitS

S

S

S

!


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8 5Comp

1 4

270k

Vtri

Vcont

Vcont

270k

1k

1.5k

1.5k

V(A+,A)

12V

from DC-DC chip

+12V

from DC-DC chip

Common (0V) from DC-DC chip

+12V

12V

Comparator Gives V(A+,A)

wrt. Common (0V)

Vcont> Vtri

Vcont< Vtri

+24V

0V

Vcont> Vtri

Vcont< Vtri

Use V(A+,A) wrt.12V

Output of the Comparator Chip

Since the comparator

compares signals that can beeither positive or negative, the

comparator must be powered

by V supply


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8 5Comp

1 4

270k

Vtri

Vcont

Vcont

270k

1k

1.5k

1.5k

V(B+,B)

12V

from DC-DC chip

+12V

from DC-DC chip

Common (0V) from DC-DC chip

+12V

12V

Comparator Gives V(B+,B)

wrt. Common (0V)

Vcont> Vtri

Vcont< Vtri

+24V

0V

Vcont> Vtri

Vcont< Vtri

Use V(B+,B) wrt.12V

Output of the Comparator Chip

Since the comparator

compares signals that

can be either positive ornegative, the

comparator must be

powered by V supply


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AC wall wart

(marked with yellow paint)

DC

wallwart

V(A+,A)

control

signal

V(B+,B)

control

signal

Reference (is 12V

from DC-DC chip)

The control signals at the open-circuited output

of the PWM control circuit are +24V, or 0V

When V(A+,A) is 24V,MOSFET A+ is on,

MOSFET A is off

When V(A+,A) is 0V,

MOSFET A+ is off,

MOSFET A is on

MOSFETs B+ and B work

the same way with V(B+,B)


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Figure 14. Output control voltage V(A+,A) on top, and V(B+,B) on bottom, with respect

to protoboard12V reference, with ma> 0 (the situation shown is where Vcontis negative)

Figure 13. Output control voltage V(A+,A) on top, and V(B+,B) on bottom, with respect

to protoboard12V reference, with ma> 0 (the situation shown is where Vcontis positive)

Save screen

snapshot #3

0V

+24V

0V

+24V

0V

+24V

0V

+24V

Look for symmetry of

pulse centers

Look for s

ymmetry of

pulse centers


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One firing circuit for each MOSFET, with each firingcircuit mounted on a separate protoboard. Protoboards

Aand Bcan share a power supply and ground. A+

andB+must each use separate power supplies andgrounds. Do not connect any of these grounds to the

ground of the control circuit.

O+ O

(see Figure 2 for connections)

Powered by +12V that is isolatedfrom thePWM control circuit

10k

0.1F101.2k

MOSFET

G D S

100k

5 4

Opto8 1

5 4

Driver

8 1

Outline ofprotoboard

A+and B+ use inverting drivers

(1426s). A and B use non -inverting drivers (1427s) . Theoptocouplers provide an additional

inversion.

green

green

green

blue for A+

,B+

,violet for A,B

blue

blue

red

blue

Grounds (isolatedfrom control circuit)

Wait until

next week

Switching diode

14mA

Optocoupler is current-

controlled. Gate current

turns on the transistor,

which pulls down the

collector voltage.

Isolating

barrier

Once the MOSFET is

connected, this

asymmetrical circuit will

add blankingby making

the turn-on slower than

the turn-off. (blanking isthe opposite of overlap)

Overlap is the time that

A+and Aare

simultaneously on,

which should be avoided.

Hence, some blanking

(time between one

turning off and the other

turning on) is desirable.


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14mA from

control circuit10k

+12V

+

Vdriver = 0V

Isolatingbarrier

14mAto Opto Input Yields 0Vto Input of Driver Chip,

so Inverting Driver Chip Turns MOSFET ON

To

driver

1.2mA (will pull down Vdriverto zero)

Spec. sheet current transfer ratio

0.2 to 0.3 (times 14mA)

!


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10k

+12V

+

Vdriver = 12V

0mA

Isolatingbarrier

0mAto Opto Input Yields 12Vto Input of Driver Chip, so

Inverting Driver Chip Turns MOSFET OFF

To

driver

0mA from

control circuit

!


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A+

Firing

A

Firing

B+

Firing

B

Firing

Control Circuit from Previous Lab

Jack for

DC wall

wart

Figure 2. Physical layout of firing circuits

(A+opto and driver are powered by a +12V isolated DC converter chip. Likewise, B+ is powered

by another +12V isolated DC converter chip. Aand Bare powered by the DC wall wart.)

Individual protoboard for

each firing circuit

Optically-isolated firing

circuits. Mount drivers

near the MOSFETs

O+ O O+ O O+ O O+ O

V(A+,A) V(B+,B)

12Vdc

regulated

blue

blue blue

violet violet

Jack for

AC wall

wart

8

We use the control signals to send 14ma through

optocouplers on each of the four firing circuit boards

A+ and Aare

daisy chained

B+ and Bare

daisy chained

(for complementary

outputs)

So, each 14mA control signal passes through two optocouplers in series


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24V control signals from the comparators, less 3.2V drop across twoseries optocoupler LEDs, and with 14mA, requires about 1.5kof

resistance in series with the daisy-chained optocouplers

With 14mA, the LED of each optocoupler has about 1.6Vdrop

If applied half the time, 24V across a 1.5k resistor would produce

about 0.2W. So, it is a good idea to size up to W resistors.


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Thus, you use W series resistors between the

comparator chip and the output terminals

8 5

Op Amp1 4

1

en.14

0.01F 100k

Approx

22kHz

triangle

wave

Filtered and

buffered

triangle wave

igh-pass filter to

block DC

8 5

Comp1 4

1.5k, W

270k

1.5k, W

1k

+12Vdc regulated from 2W,

DC converter chip

V(A+,A)

red

green

blue

bl

red

These W resistors can get hot - keep them offthe surface of the protoboard

Vcont


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Layout of inverter control circuit and isolated firing circuits

AC wall wart(marked with yellow paint)

DC

wallwart

A+

A

B+

B

No MOSFETs connected yet (i.e., the drivers are open-circuited)


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Keep the 0.1F capacitorsacross the drivers to prevent

driver failure

Use the same pattern for B+

and B

One DC converter chip feeds

A+

Another DC converter chip

feeds B+

Wall wart feeds Aand B

DC converter chip

feeds A+circuit

Inverting driver

for A+(1426s)

Non-inverting driver

for A(1427s)

Wall wart feeds Acircuit

12Vr

ailfedb

DCco

nverterchi

12Vr

ailfedb

wallwart

groundrailfedby0Vo

utpu

tpinofDC

converterchip

groundrailfed

bywallwart

Zoom-in view of A+ and

Aisolated firing circuits


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wallwartinput

chipoutput

+ +

Side view of A+ and Aisolated firing circuit and single 12V

isolated DC-DC converter chip that powers A+

Socket each single DC-DC converter chip,

using one half of an 8-pin SIP socket.

Carefully break an 8-pin SIP socket in

half. Do this by clamping on one-half

with your long-nose pliers, and then

bending the other half down with your

fingers. It should be a clean break.


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V(A+,A)

Opto A+

output

Save screen

snapshot #1

0.5V

3.2V

Input and Output Voltages of Optocoupler

Vcont= 0 (i.e., ma= 0) in this Snapshot

12V

0V

Opto Input (the 1.5kresistor drops the voltage

from 24V to 3.2V)

As expected, the opto

output is inverted

This phototransistor turn off delay will limit

your PWM operating frequency

Phototransistor

turning on

Phototransistor

turning off

Look for Symmetry Among all Four Circuits

!

Different time-constants to avoid shoot-through

(i.e. to provide a dead-time)


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Look for Nearly Perfect Alignment Between V(A+,A) Signal to

Optocoupler, and Output of A+Inverting Driver Chip

V(A+,A)

A+driveroutput

In

phase


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Look for Nearly Perfect Out of PhaseAlignment Between V(A+,A)

Signal to Optocoupler, and Output of ANon-Inverting Driver Chip

V(A+,A)

Adriveroutput

Out of

phase


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Now the present circuit based on PCBs:


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20Key new component: IRS21844


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IRS21844

High output

Low output

Actual pinout


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IRS21844

Blanking time and isolation already integrated in a single IC

11 ee462l isolated firing circuit for h bridge inverter

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