1 sop and pos expressions from k-maps the examples so far have all generated minimal sop...
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SOP and POS Expressions from K-mapsThe examples so far have all generated minimal SOP expressions. POS expressions can be formed as follows:1. Group 0’s in the K-map instead of 1’s (these groupings correspond to F’).2. Find a minimal SOP expression for F’.3. Find F from F’ by applying DeMorgan’s theorem. This yields a minimal POS
expression.
Lecture #5 EGR 277 – Digital Logic
Reading Assignment: Chapter 3 in Digital Design, 3rd Edition by Mano
Note: We cannot in general predict whether the minimal SOP expression or minimal POS expression will result in the fewest gates. It is often useful to check both expressions to see which gives the best result.
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Lecture #5 EGR 277 – Digital Logic
Example: Determine SOP and POS expressions for f(a,b,c,d) = (0, 2, 4-9, 13-15). Draw the corresponding circuits.
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Lecture #5 EGR 277 – Digital Logic
Example: Determine SOP and POS expressions for f(a,b,c,d) = (0-2, 4-5, 8-10,14). Draw the corresponding circuits.
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“Don’t Care” conditionsThere are often unused input combinations or input combinations that are illegal and should never occur. In such cases, we often “don’t care” what the output is since the input should never occur anyway. We typically represent “don’t cares” in a K-map using either “d” or “X”.
Lecture #5 EGR 277 – Digital Logic
Example: BCD inputs are used to represent the digits 0 – 9, so the input codes corresponding to 10 – 15 are illegal inputs. Find both minimal SOP and POS expressions for f(A, B, C, D) = (0, 2-5, 7) + d(10-15).
Rule: Include a “don’t care” in a grouping only if it helps to make for larger groupings. It is not necessary to include all “don’t cares” in groupings.
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Multiple Output Functions
So far we have concentrated on minimizing single functions. Many problems, however, require multiple outputs. When we minimize multiple output functions it is often useful to compare the Karnaugh maps for each output and look for common groupings (which will correspond to shared gates).
Lecture #5 EGR 277 – Digital Logic
Note: It is sometimes better to use a smaller grouping in order to allow for shared terms.
(Note: Test #2 material begins here)
Example: A multiple output circuit is illustrated below. The outputs are defined as follows:
F1(A, B, C, D) = ( 0 - 2, 4 – 5, 7 )
F2(A, B, C, D) = ( 0 - 1, 7 – 9, 15 )
F3(A, B, C, D) = ( 2, 4 – 5, 8 – 9, 15 )
MultipleOutputCircuit
ABCD
F1F2F3
3 Outputs4 Inputs
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Lecture #5 EGR 277 – Digital Logic
A) Minimize each of the 3 outputs separately and implement each circuit. Count the total number of gates.
B) Minimize the total circuit by comparing the K-maps and looking for shared terms. Count the total number of gates.
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Recognizing XOR and XNOR functions from K-mapsFirst a review of the various ways to express the outputs of XOR and XNOR gates:
Lecture #5 EGR 277 – Digital Logic
x y
x y
F x y x y x y
F x y x y x y x y x y x y
Note: Diagonal or staggered groupings in K-maps often indicate that using XOR gates will yield a simpler solution than either SOP or POS form.
Example: Minimize each function shown below. Make use of XOR gates as much as possible. Compare the number of gates using XOR’s to the number that would be required in SOP form.
x yz
00 01
0
1
11 10
1 1 0 0
0 0 1 1
1.
x yz
00 01
0
1
11 10
0 1 1 0
1 0 1 0
2.
x yz
00 01
0
1
11 10
0 0 0 0
0 1 1 0
3.
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Lecture #5 EGR 277 – Digital Logic
Example: Minimize each function shown below. Make use of XOR gates as much as possible. Compare the number of gates using XOR’s to the number that would be required in SOP form.
1 0 0 0
1 0 0 0
0 0 0 1
0 0 0 1
AB CD
00 01 11 10
00
01
11
10
0 0 1 1
1 1 0 0
0 0 1 1
1 1 0 0
AB CD
00 01 11 10
00
01
11
10
4. 5.
0 0 0 1
0 0 1 0
0 1 0 0
1 0 0 0
AB CD
00 01 11 10
00
01
11
10
6.