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2

Width-dependent Statistical Leakage Modeling for Random Dopant Induced Threshold Voltage Shift

Jie Gu, Sachin Sapatnekar, Chris Kim

Department of Electrical and Computer EngineeringUniversity of Minnesota

chriskim@umn.eduwww.umn.edu/~chriskim

3

Outline Introduction Conventional statistical leakage modeling Proposed statistical leakage modeling

“Microscopic” random dopant fluctuation

Experimental results Application to leakage sensitive circuits

Dynamic circuits SRAM memory bitlines

Conclusions

4

Motivation

worst-case corner

(150nm CMOS Measurements, 110°C)

nominal corner

4X variation between nominal and worst-case leakage Channel length/width variation, line edge roughness,

dopant fluctuation Performance determined at nominal leakage Power/robustness determined at worst-case leakage

0

50

100

150

200

Normalized IOFF

Nu

mb

er o

f d

ies

0 1 2 3 4 5 6 7

5

Leakage Variation Impact: Dynamic Circuit Example

Static keeper prevents the dynamic node droop Keeper has to be properly sized for sufficient noise margin Accurate leakage estimation is critical for meeting noise margin

requirements

0

50

100

150

200

Pull down leakage

Nu

mb

er o

f d

ies

0 1 2 3 4 5 6 7

clk

...RS0

D0

RS1

D1

RS7

D7

Dyn_out

keeper

IleakIleakIleak

wo

rst-

case

co

rner

Over-designed for robustness

Fail to meet target robustness

6

Conv. Statistical Leakage Modeling

0VV W,,0T0T

Conventional approach (square-root method):

Device parameters provided by fabs:

00VT

VT

/mkTqVleak

LW

LW/)(V

)(V

WeI

0T

0T

T

Statistically, larger devices have lesser variation

W0

GSD

W

7

µ-RDF Induced Threshold Voltage Shift

Threshold voltage depends on both the # of dopants in the channel and the “microscopic” random dopant placement

30mV+ VT shift has been reported by P. Wong (IEDM ’93)

VT=0.78V, 130 dopants, Leff = 30nm

3D simulation results on surface potential A. Asenov, TED 1998

VT=0.56V, 130 dopants, Leff = 30nm

Evenly distributed dopants

Dominant leakage path

Unevenly distributed dopants

S

D

S

D

8

Golden Statistical Leakage Modeling

Golden approach:

0T

0T

Ti

VTi

VTi

n

1i

/mkTqV0leak

)(V

)(V

eWI

Need to sum the leakage dist. of the sub-devices

0VV W,,0T0T

Device parameters provided by fabs:

W0

VTi

GSD

W0W=nW0

VTi+1

9

Conventional versus Golden Method

3σsquare3σgolden

32%

Leakage model shows 32% discrepancy btwn 3σ values µ(VT) reduces when adding lognormal distributions

Delay model matches well with golden results µ(VT) does not change when adding normal distributions

32nm PTM

Leakage distribution Delay distribution

1,)V-(VWIn

1iTidd0on

n

1i

/mkTqV0leak

TieWI

32nm PTM

10

Statistical Leakage Estimation

Effective VT concept introduced to model width-dependency

inaccurate

VTi W0

Golden Conventional Proposed

W=nW0VTi+1

Given reference device parameter: W0 , ,0TV0TV

),,W(f)(V

),,W(f)(V

eWI

0T0T

0T0T

Teff

VVTeff

VVTeff

/mkTqVleak

00VT

VT

/mkTqVleak

LWLW

/)(V

)(V

eWI

0Tsq

0Tsq

sqT

0T

0T

Ti

VTi

VTi

n

1i

/mkTqV0leak

)(V

)(V

eWI

(VTi varies due to RDF )

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Previous Work and Our Contribution

To the best of our knowledge, this is the first work to model the VT dependency on device width Previous work proposed by Ananthan (DAC06), Chang (DAC05),

Narendra (ISLPED02) did not consider this Simple closed-form expression derived that can handle

continuous width case

mkTqV

1

T1

eW

mkTqV

2

T2

eW

mkTqV

3

T3

eW

lawsquarefollows

)V()V()V( T3T2T1

Previous work Proposed

))V(),V(,W(f)V(

))V(),V(,W(f)V(

0T0TiTi

0T0TiTi

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Given a reference device with Wx, μ0, σ0

Wy=nWx Discrete width multiplication

Directly apply Wilkinson’s method

Wy=αWx (α=n/m) Continuous width multiplication (α is any rational

number) Extend Wilkinson’s method to handle

continuous integration

Calculation of Effective VT

q/mkT

V

yq/mkT

Vn

1ixleak

yTiTx

eWeWI

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Wilkinson’s Method

2/m2/mn

1i1

2yy

2ixix nee)S(Eu

2yyjxixij

2jx

2ixjxix

2ixix

2m222/)r2(mmn

1ij

1n

1i

2m2n

1i

22 enee2e)S(Eu

122y

21y

uln2uln

uln2/1uln2m

First moment:

Second moment:

Moment matching results:

yxn

1i

nWeeW i

Sum of lognormals can be approximated as a single lognormal with a calculable mean and standard deviation

y is the new Gaussian variable calculated by moments matching

A. Abu-Dayya, IEEE Vehicular Technology Conference, 1994

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Discrete Width Multiplication (Wy=nWx)

0)n

e)1n(eln(B

2TxV

2x

2TxV

2

Tx

BrB2V

2

22V

2V

VV

B/

B/2

1

TxTy

TxTy

where

Both the mean and sigma of VT decreases with larger device width

The mean and sigma of VT also decreases with smaller rx

Effective VT Sub-device VT

.coeffncorrelatior,qmkTB x

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Spatial Correlation Coefficient)eW,eW(r)eW,eW(r 2Ty1Tyi2Txi1Tx BV

y

BV

y

BVn

1ix

BVn

1ix

1e

1e

)eW()eW(

)eW(E)eW(E)eWeW(E

)eW,eW(r

2TyV

2

2TyV

2y

2yT1yT

2yT1yT2yT1yT

2yT1yT

B

Br

BV

y

BV

y

BV

y

BV

y

BV

y

BV

y

BV

y

BV

y

1n

e)1n(e

1e

)eW()eW(

)eW(E)eW(E)eWeW(E

)eW,eW(r

2TxVx

2TxV

2

2TxV

2x

i2Txi1Tx

i2Txi1Txi2Txi1Tx

i2Txi1Tx

rB

Br

BVn

1ix

BVn

1ix

BVn

1ix

BVn

1ix

BVn

1ix

BVn

1ix

BVn

1ix

BVn

1ix

x2V

2V

xBrB

2V

2

y rr

ne)1n(e

ln

Br

Ty

Tx

2x

2x

2TxV

2

Tx

ry goes up as width increases (rx≤ ry ≤1 and ry=1 iff rx=1)

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Reference Device Size Independence

Same results can be obtained independent of the reference device size

22V

2V

VV

B/

B/2

1

TyTx

TyTx

)n/1

e)1n/1(eln(B

2TyV

2y

2TyV

2

Ty

BrB

2V

2

x2V

2V

y rrTy

Tx

Given μy, σy of a large device with Wy, we can reverse the calculation to find out μx, σx of a smaller device with Wx

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Assume there exists a small virtual device that satisfies Wx=mW0,

Wy=nW0. Applying Wilkinson’s for both we get,

x2V

2V

y rrTy

Tx

Continuous Width Multiplication (Wy=αWx)

Expression identical to the discrete width multiplication case

22V

2V

VV

B/

B/2

1

TxTy

TxTy

where 0)e)1(e

ln(B

2TxV

2x

2TxV

2

Tx

BrB2V

2

Effective VT Sub-device VT

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Width Dependent VT Statistics

21mV difference in VT mean between conventional and golden method

No significant difference in VT sigma between golden, square-root, and proposed method

32nm PTM

21mV

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Leakage Distribution Comparison:Different Widths

Leakage estimation error (3σ point) reduced from 10.5% to 0.8% using the proposed model

3σsquare

(10.5% error)

3σproposed

(0.8% error)

3σgolden

W=5W0

/ =10%, r=0TxVTxV

3σsquare

(11.4% error)

3σproposed

3σgolden

(1.4% error)

/ =10%, r=0TxVTxV

W=10W0

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Leakage Distribution Comparison:Different σ/µ’s

Error of conventional approach increases to 45.5% for larger σ/µ due to larger variation between the sub-devices

Proposed approach exhibits a smaller leakage estimation error (<12.0%) limited by the accuracy of the Wilkinson’s formula

/ =15%TxVTxV

3σsquare

(26.8% error)

3σproposed

(5.1% error)

3σgolden

W=5W0, r=0

3σsquare

(45.5% error)

3σproposed

(12.0% error)

3σgolden

/ =25%TxVTxV

W=5W0, r=0

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Leakage Distribution Comparison:Different Correlation Coefficients

Conventional model does not consider spatial correlation (assumes that sub-devices are uncorrelated)

Proposed work’s estimation error is small for a wide-range of VT correlation coefficients

3σsquare

(19.0% error)

3σproposed

(0.8% error)

3σgolden

r=0.1

W=10W0, / =10%TxVTxV

3σsquare

(33.8% error)

3σproposed

(0.4% error)

3σgolden

r=0.4W=10W0, / =10%TxV

TxV

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Design Example: Dynamic Circuit Keeper Sizing

Conventional approach underestimates the pull-down leakage misguiding the designer to use a smaller keeper

This work shows that a 30% keeper size up is required to meet the target noise margin

clk

...RS0

D0

RS1

D1

RS7

D7

Dyn_out

keeper

IleakIleakIleak0

50

100

150

200

250

300Square-root Proposed Golden

Pull-down NMOS WidthK

eep

er S

ize

(nm

)

15W0 30W0 45W0

20%5%

20%3%

25%

5%* Numbers show estimation error

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Design Example: SRAM Bitline

Actual bitline delay is 3-12% longer than expected when using the conventional model due to underestimated bitline leakage

10% Vdd

BL

Vo

lta

ge

(V

)

Time (ns)0.2 0.4 0.6

Vdd

10% Vdd

BL

Bitline Delay w/o BL Leakage

Bitline Delay w/ BL Leakage

200

300

400

500

600

64 128 256

Square-root Proposed Golden

Number of Cells per Bitline

3σ

Bit

lin

e D

ela

y (

ps

)

3% 0.3%5%

0.5%

11%

1%* Numbers show estimation error

WL='1'

'1' '0'

BL

WL='0'

'0' '1'

WL='0'

'0' '1'

Ion

Ileak

Sense Amplifier

VT0

VTn

Unaccessed cells

Accessed cell

Ileak

BL

...

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Conclusions “Microscopic” RDF leads to width-dependent VT

Conventional statistical VT model is inaccurate Only capable of modeling on current (linear function of VT)

Fails to model leakage current (exponential function of VT)

Exhibits as much as 45% error in 3σ leakage value

Proposed width-dependent VT model Simple closed-form expression with than 5% estimation error Can be expanded to general sources of within-device variation Handles both uncorrelated and correlated process variables Useful for leakage-sensitive circuit designs such as dynamic

circuits, SRAM bitlines, and subthreshold logic