xilinx logicore animation and connect6 game development on remote fpga student - stephen conway...

Xilinx LogiCore Animation and Connect6 game development on Remote FPGA Student - Stephen Conway Supervisor - Fearghal Morgan Co-Supervisor – Martin Glavin

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Xilinx LogiCore Animation and Connect6 game development on

Remote FPGAStudent - Stephen Conway

Supervisor - Fearghal MorganCo-Supervisor – Martin Glavin

Overview

LogiCore Background & Generation

Goals (Phase 1 & Phase 2) Phase 1: Animate Xilinx LogiCore Modules Phase 2: Implement Connect6 game on Remote

FPGA lab

Tasks Completed (Phase 1)

Future Work (Phase 2)

Summary

Page 3: Xilinx LogiCore Animation and Connect6 game development on Remote FPGA Student - Stephen Conway Supervisor - Fearghal Morgan Co-Supervisor – Martin Glavin

LogiCore Background

PlanAhead Design & Analysis Suite.

IP Core

IP Catalogue

Core Generation

Page 4: Xilinx LogiCore Animation and Connect6 game development on Remote FPGA Student - Stephen Conway Supervisor - Fearghal Morgan Co-Supervisor – Martin Glavin

LogiCore Generation

Page 5: Xilinx LogiCore Animation and Connect6 game development on Remote FPGA Student - Stephen Conway Supervisor - Fearghal Morgan Co-Supervisor – Martin Glavin

Goals Phase 1: Animate Xilinx LogiCore Modules

Learn and apply Xilinx LogiCore IP block generator.

Simulate and implement basic IP block apps on local FPGA.

Implement and animate IP blocks on Remote FPGA Lab.

Integrate RAM IP Core into automated client application GUI (separately under development).

Use the RFL to shadow the animation of internal RAM contents

Page 6: Xilinx LogiCore Animation and Connect6 game development on Remote FPGA Student - Stephen Conway Supervisor - Fearghal Morgan Co-Supervisor – Martin Glavin

Phase 2: Implement Connect6 game on Remote FPGA lab

Functionally correct, high performance, winning player on RFL

PC FPGA

Referee (P1)

Maintain a view of game. (Arrays)

Processor (P2)

Page 7: Xilinx LogiCore Animation and Connect6 game development on Remote FPGA Student - Stephen Conway Supervisor - Fearghal Morgan Co-Supervisor – Martin Glavin

Tasks Completed (Phase 1)

Generation. (Add_Sub, FIFO, Multiplier)

I/O Width

Chip Enable

Flags/Warnings

Integration.

Page 8: Xilinx LogiCore Animation and Connect6 game development on Remote FPGA Student - Stephen Conway Supervisor - Fearghal Morgan Co-Supervisor – Martin Glavin

Tasks Completed (Phase 1)Simulation. (Testbench)

Local Implementation. (Add_Sub)

BitStream

Page 9: Xilinx LogiCore Animation and Connect6 game development on Remote FPGA Student - Stephen Conway Supervisor - Fearghal Morgan Co-Supervisor – Martin Glavin

Tasks Completed (Phase 1)Implementation on FPGA Lab

RAM_IP Core

Interactive GUI.File I/O.

Internal Memory Display

Page 10: Xilinx LogiCore Animation and Connect6 game development on Remote FPGA Student - Stephen Conway Supervisor - Fearghal Morgan Co-Supervisor – Martin Glavin

Future Tasks (Phase 2)

Review Connect6 Instructions.

Download/Run referee. (Player 1)

Connect Referee to another PC via Serial Port.

Implement several Player 2 variations. (Next Slide)

Page 11: Xilinx LogiCore Animation and Connect6 game development on Remote FPGA Student - Stephen Conway Supervisor - Fearghal Morgan Co-Supervisor – Martin Glavin

PC-based ‘C’ program. (enables full understanding of connect6 and referee operation)

Develop an embedded Microblaze (logiCore IP block) processor. / UART system and port ‘C’ code to run on Microblaze.

Future Tasks (Phase 2)

PC FPGA

Referee (P1)

‘C’ Code

MicroBlaze (P2)

Page 12: Xilinx LogiCore Animation and Connect6 game development on Remote FPGA Student - Stephen Conway Supervisor - Fearghal Morgan Co-Supervisor – Martin Glavin

Future Tasks (Phase 2)

Perform a full digital design of the connect6 game player (FSM, memory, etc)

Integrate connect6 game with client app GUI (separately under development)

FPGA

Summary

LogiCore Background & Generation

Goals (Phase 1 & Phase 2) Phase 1: Animate Xilinx LogiCore Modules Phase 2: Implement Connect6 game on Remote

FPGA lab

Tasks Completed (Phase 1)

Future Work (Phase 2)

Questions?

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