wide ouput range power supply - university of california
TRANSCRIPT
Wide ouput range power supply
Armond Gauthier PierreYves Droz
I Introduction specifications
II D2 dependant circuits
III Flyback
I Introduction specifications
II D2 dependant circuit
III Flyback
Goal / Constraints of the project
Offline power supply.
Constraints:- cheap- wide output range
application :Power supply compatible with a wide range of devices
good point :power loss is not a big issue for offline applications, it is just limited by the heat that the box can dissipate.
I Introduction specifications
II D2 dependant circuit
III Flyback
SpecificationsDC Input Voltage 260 V – 390 VMax Power 50 WOutput Current Limit 10 AOutput Voltage 2.5 V – 30 VOutput Ripple Ratio (I and V)PWM Frequency 200 kHz
±15%
0 2.5 5 7.5 10 12.5 15 17.5 20 22.5 25 27.5 300
1
2
3
4
5
6
7
8
9
10
Output range
Vout
Iout I=
D−1⋅V out
L⋅
1
f
We want to limit L to 1mH f = 200 kHz
max power
0 0.1 0.2 0.3 0.4 0.5 0.6 0.7 0.8 0.9 10
0.2
0.4
0.6
0.8
1
1.2
1.4
1.6
1.8
2
D (Buck)
D2 (Buck/Buck)
D/(1-D) (Flyback)
D2/(1-D) (Flyback/Buck)
D
Vou
t/Vin
I Introduction specifications
II D2 dependant circuits
III Flyback
Exploring the different topologiesAssumption :Minimizing the range in which D varies will help us to reduce power dissipation.
I Introduction specifications
II D2 dependant circuits
III Flyback
D2 dependant circuitsD2 D2
D−10.010 < D < 0.350.26 < D < 0.93 with N=7
0.010 < D < 0.300.36 < D < 0.77 with N=20
I Introduction specifications
II D2 dependant circuits
III Flyback
D2 dependant circuitsFlyback Buck
I Introduction specifications
II D2 dependant circuits
III Flyback
D2 dependant circuits power dissipation
Transistor 25 W (23 W switching)Diodes 6 WTransformer 40 WInductors 2 WCapacitor neglectable
Transistor
Pdiss=
t sw⋅V ds⋅I sw⋅f
C gd⋅V ds
2⋅f
2
Transformer
Pdiss=1
2⋅Lmag I 2⋅f
Diodes
Pdiss=
V drop⋅I
Metrics of Comparison
Assume:● Cost follows power dissipation
● Package and component size● Cost follows switch stress
Why Flyback?
● Small parts count, single transistor● Cheap!
● DC isolation● DCM operation for low power application
I Introduction specifications
II D2 dependant circuits
III Flyback
Switch Utilization
● Switch stress: S =
● Switch utilization: U(D) =
V∗I
P load
∑ S
Governing formula:
U(D) = 1−D∗D
Starting Methodology
● Center D variation around max U(D)● Bias voltage associated with max U(D) towards lower end of output range
I Introduction specifications
II D2 dependant circuits
III Flyback
Flyback converter
Governing equations:
Vout
Vin=
n∗D
1−D
Iout
Iin=1−D
n
Transistor on Transistor off
I Introduction specifications
II D2 dependant circuits
III Flyback
Implementation 1
High VMAX
:
● Look at flyback input º ● Transistor must block“stacked” voltageV
in + V
out / n
Conclusions :
● Look at “n” equation● N proportional to V
D,opt
● To decrease transistor blocking voltage,
increase VD,opt
and n.
n=V D ,opt
V i , nom.
∗1−Dopt
Dopt
I Introduction specifications
II D2 dependant circuits
III Flyback
n .049(20 turns on primary side)D range .12 - .70U(D) range .305 (low D) - .251 (high D)
Transistor stress
Diode StressRequired Inductance 4.73 mH
IMAX
= 681mA, VMAX
= 990V, S = 675 W
IMAX
= 23.9A, VMAX
= 49.1V, S = 1173 W
Implementation 2
Conclusions:
● Sacrificing ?S in favor of reducing peak transistor voltage advantageous● Smaller, cheaper device with lower loss
● U(D) just a general metric, not an end in itself
How to further push down peak transistor voltage and power dissipation?
● Cannot reduce DMIN
too far º too much current stress● Try to reduce ?D...
I Introduction specifications
II D2 dependant circuits
III Flyback
n .075(13 turns on primary side)D range .079 - .606U(D) range .260 (low D) - .306 (high D)
Transistor stress
Diode StressRequired Inductance 3.24 mHOverall max power dissipation 43.0 W
IMAX
= 942mA, VMAX
= 790V, S = 744 W
IMAX
= 22.56A, VMAX
= 63.8V, S = 1438 W
Multiple secondary windings
● Each winding will supply a portion of total output range● Will reduce D, but will require switching between windings
Questions:
● How to divide output range among secondary windings?● How to optimize number of secondary windings?
I Introduction specifications
II D2 dependant circuits
III Flyback
Optimizing ranges● Will minimize D if:
?
● If output range divided equally, low secondary
has largest ?D
M D
n=Constant
Constant {
Advantages● ?D equal for all ranges
● U(D) held closer to optimum● Reduce peak transistor voltage
Disadvantage● Look at transformer inductance required for current ripple versus D º
I Introduction specifications
II D2 dependant circuits
III Flyback
Implementation 3
* Using single diode and capacitor at output high diode stress
I Introduction specifications
II D2 dependant circuits
III Flyback
Range 1: 2.5V < Vout < 5.5V n=.027Range 2: 5.5V < Vout < 12.5V n=.061Range 3: 12.5V < Vout < 30.0V n=.147D range .179 - .440U(D) range .347 (low D) - .371 (high D)
Transistor stress
Diode Stress *Required Inductance 8.14 mHOverall max power dissipation 23.8 W
IMAX
= 780mA, VMAX
= 595V, S = 464 W
IMAX
= 27.1A, VMAX
= 87.3V, S = 2366 W
0 0.25
0.5 0.75
1 1.25
1.5 1.75
2 2.25
2.5 2.75
3 3.25
3.50
1
2
3
4
5
6
7
8
9
10
11
?
M(D) / n
Pdi
ss
Switches on DC side● Advantages:
● Smaller diodes required º cheaper● Less power lost per diode
● Disadvantages:● Multiple diodes and output capacitors● Possible problem with unloaded output
Switches on transformer side● Advantages:
● Single diode and output capacitor required● Output “never” unloaded
● Disadvantages:● Large required diode● Switches must block AC voltage
I Introduction specifications
II D2 dependant circuits
III Flyback