€¦ · web viewfig.2 shows the architectural design in the fpga using the xilinx ise. the...

9
Supervisory Control And FPGA Based DAQ Card Syed Mashhood Hafeez 1, a and Yasir Jamal Ghauri 2, b 1 Hamdard University, Karachi, Pakistan 2 Hamdard University, Karachi, Pakistan a [email protected], b [email protected] Keywords: FPGA, Data Acquisition, LabVIEW, Web Monitoring, Data Logging, SCADA, SMS Monitoring Abstract. The purpose of this paper was to design the efficient, cost-effective and reliable FPGA based Data acquisition card with the smart features. Features like Web monitoring and SMS monitoring makes it better supervisory control. The Graphical User Interface (GUI) is made on the LabVIEW, which provides the very easy user interface. It cannot solely be applied in the industry, but also for the academic purpose. 1. Introduction There are many Data Acquisition (DAQ) cards in the market which are very costly and have the limited characteristics. As the more features are added to the card, the cost keeps increasing. On the other hand the low cost DAQ doesn’t provide the robustness and the flexibility is compromised as most of them are microcontroller based [10]. The Field Programmable Gate Array (FPGA) is a good choice for the data acquisition system as it has hundreds of IO pin, its architecture can be planned according to the need and it owns the power to do parallel multitasking with fast processing speed [7]. For these reasons, the FPGA is selected for the DAQ card in this work.

Upload: others

Post on 21-Feb-2020

3 views

Category:

Documents


0 download

TRANSCRIPT

Page 1: €¦ · Web viewFig.2 shows the architectural design in the FPGA using the Xilinx ISE. The communication between the FPGA and the other peripherals is SPI based on the Spartan 3E

Supervisory Control And FPGA Based DAQ Card

Syed Mashhood Hafeez1, a and Yasir Jamal Ghauri2, b

1Hamdard University, Karachi, Pakistan2Hamdard University, Karachi, Pakistan

[email protected], [email protected]

Keywords: FPGA, Data Acquisition, LabVIEW, Web Monitoring, Data Logging, SCADA, SMS Monitoring

Abstract. The purpose of this paper was to design the efficient, cost-effective and reliable FPGA based Data acquisition card with the smart features. Features like Web monitoring and SMS monitoring makes it better supervisory control. The Graphical User Interface (GUI) is made on the LabVIEW, which provides the very easy user interface. It cannot solely be applied in the industry, but also for the academic purpose.

1. Introduction

There are many Data Acquisition (DAQ) cards in the market which are very costly and have the limited characteristics. As the more features are added to the card, the cost keeps increasing. On the other hand the low cost DAQ doesn’t provide the robustness and the flexibility is compromised as most of them are microcontroller based [10]. The Field Programmable Gate Array (FPGA) is a good choice for the data acquisition system as it has hundreds of IO pin, its architecture can be planned according to the need and it owns the power to do parallel multitasking with fast processing speed [7]. For these reasons, the FPGA is selected for the DAQ card in this work.

Fig. 1. Block Diagram of Supervisory Control and FPGA Based DAQ Card

The idea of the whole project is illustrated in fig. 1. The architecture of the DAQ card is designed in the FPGA, i.e. PWM channels, Analog to Digital & Digital to Analog channels and Digitals channels. These channels connect to the GUI through the UART designed in the FPGA. GUI monitors and controls all the parameters coming from the FPGA and additional features are designed in LabVIEW like Remote web monitoring & controlling, Data logging, Email and SMS monitoring through GSM module.

2. FGPA’s Architecture

FPGAs have the flexibility of changing the architecture as per requirement in the field. Using this characteristic, the glide slope was to make such a model which can be redesigned in the field, e.g.

Page 2: €¦ · Web viewFig.2 shows the architectural design in the FPGA using the Xilinx ISE. The communication between the FPGA and the other peripherals is SPI based on the Spartan 3E

increasing or decreasing the channels of analog input, analog output, digital input, digital output and PWM by making some changes in the architecture. This feature dramatically cuts down the hardware changes and requirements as in the other data acquisition card [7]. The above feature can be accessed by using FPGA chip and design its printed circuit board and other peripherals (ADC, DAC, RS232). This work is carried out on the Spartan 3E starter board which has already built-in ADC, DAC, and RS232 so that FPGA’s flexibility was brought down as these peripherals were already tied to the FPGA’s digital pin. [1]

Fig. 2. FPGA’s Architecture

Fig.2 shows the architectural design in the FPGA using the Xilinx ISE. The communication between the FPGA and the other peripherals is SPI based on the Spartan 3E board [8]. All the results of the designs are verified on the Chipscope Pro tool [2] because it provides the result of the hardware at run-time.

2.1 First In First Out (FIFO)

FIFO is designed in the FPGA. The FIFO is the centre of the task as it is controlling the three main parts: Digital output, PWM and Analog output (DAC) [10]. FIFO receives the information from the GUI using the serial port.

Fig. 3. FIFOThe above design is implemented and observes on the ChipScope Pro tools. The fig. 3 shows the observation of the FIFO on ChipScope pro.

2.2 Digital TO Analog Converter (DAC)

The kit has four channels of the DAC. Only one channel is operational at a time due to the SPI based, which is not the requirement of the project. The Multiplexer (MUX) made in the design is connected by the counter, the yield of the FIFO is connected to the input of the MUX. When the counter gives the signal to the MUX, it will shift the data one by one to the SPI based DAC. In this way, all the four channels of the DAC become operational at a time. The output can be viewed on the chipscope pro tool to verify that the design is operating correctly.

Page 3: €¦ · Web viewFig.2 shows the architectural design in the FPGA using the Xilinx ISE. The communication between the FPGA and the other peripherals is SPI based on the Spartan 3E

Fig. 4. The output of the DAC.2.3 Analog To Digital Converter (ADC)

The Spartan 3E has two analog channels which is not enough for the industrial requirement so the four channels MUX is connected before the ADC channel_1. It converts the single channel ADC into four channels through the MUX. These analog channels are employed to store the real time industrial parameters like pressure, flow, level and temperature in the FPGA, which transfer’s these data to GUI through the UART transmitter, made in the FPGA [8]. All the data is received in the FPGA through the ADC, as it is SPI based so the same strategy is adopted for every bit in the DAC using the counter and MUX [9]. The result of the design is tested on the ChipScope pro tool. Fig. 5 shows the result of the ADC1 and ADC2.

Fig. 5. Output Waveform of ADC1 and ADC2

2.4 Pulse Width Modulation (PWM)

The data bits are sent from the GUI. The data bits are first received at the UART receiver bit by bit. The UART receiver passes these data bits to the FIFO for the synchronization. After FIFO, data bits are received at the PWM. The PWM increases the duty cycle, according to the data bits are given from the GUI.

Fig. 6. Result of PWM on Chipscope Pro

3. Graphical User Interface

The GUI is built in LabVIEW and can be well applied by any layman in the industry, plant or lab [9] [10]. In this project the standard GUI is built which is showing the standardize parameters control, but as per the need of the industry, process and instrumentation diagram (P&ID) can be

Page 4: €¦ · Web viewFig.2 shows the architectural design in the FPGA using the Xilinx ISE. The communication between the FPGA and the other peripherals is SPI based on the Spartan 3E

established which will be showing the approximate result of a procedure. Fig. 7 shows the main GUI of the work.

Fig. 7. Main GUI of the Project

In this proposed DAQ card, the parameters of the DAC, PWM and digital output can be controlled through a GUI and ADC & digital input can also be monitored. Some of the advancement introduced in this project is the Data Logging, SMS Monitoring, Remote Web Monitoring & Control and Email. These features make this DAQ card more powerful. In spite of adding such feature to the DAQ card, the system was very easy to apply by the layman as he can avail such features by a single click. Fig. 8 shows the programming done in the LabVIEW block diagram.

Fig. 8. G Programming3.1 Data Logging & Email

A data logging option is added to provide the record of all the parameters and analyse the behaviour of the system. The report of the data logging will be available for every shift in the plant so that the upcoming shift can be well-aware of the abnormality if happens previously. The report of the data logging is generated in excel format and can be emailed to the concerned authorities. For e-mail, Microsoft .NET platform interface is used in the LabVIEW, which configures the Simple Mail Transfer Protocol (SMTP). [3]

Page 5: €¦ · Web viewFig.2 shows the architectural design in the FPGA using the Xilinx ISE. The communication between the FPGA and the other peripherals is SPI based on the Spartan 3E

3.2 SMS Monitoring

SMS monitoring is performed by connecting the SIM 900 module [4] with a PC. By using this interface, all the parameters are sent to the operator of the system according to the time set. This timing option is present in the GUI for the convenience of the operator. If the operator is away or can’t reach to the system, then he can receive the information on his cell phone and if the system is at the alarming mode then he can also turn off the system through his cell phone by simply sending the SMS. The turning off the system through the SMS is followed by the specific code to bend off the system.3.3 Remote Monitoring and Control through the Web

The most significant feature in this DAQ card is Remote Monitoring and Control through the Web. The system uses Web Server embedded in LabVIEW[5] to publish the remote panel for remote clients viewing and controlling. In industries, networking is practiced along the single IP i.e. the monitoring is performed exclusively in the range of industry, whereas in this system using web server in labview the system can not only be monitored and controlled on the local IP but it can be globally controlled by configuring the router for the port forwarding.[6] For security reason, controlled option is limited, but the monitoring is available for anyone and anywhere.

4. Summary

Thus the simple supervisory control is provided to the operator through internet and cell phone. The technology of the FPGA in this card makes it reliable, fast and robust. Many features are added to this card and still it remain cost effective. The combination of the FPGA and the LabVIEW makes this project efficient, fast, powerful and easy to use. The communication between the FPGA and the GUI is serially based, thus the enhancement can be made in future by using the Ethernet and USB protocol which will increase its data rate.

References[1] Spartan-3E Starter Kit Board User Guide (Chapter 7,9,10). [2] Tutorial 11 ChipscopePro, ISE 10.1 and Xilinx Simulator on the Digilent Spartan-3E board. [3] SMTP Email Send File VI www.ni.co m [4] SIM900 GSM/GPRS Module manual. [5] Controlling LabVIEW Remote Front Panels www.ni.co m [6] Configuring the router for the port forwarding. www.panasonic.ne t [7] M. Abdallah, O. Elkeelancy and A.T. Alouani, “A Low-Cost Stand-Alone Multichannel

Data Acquisition, Monitoring, Archival System With On-Chip Signal Preprocessing”, IEEE Transactions on Instrumentation and Measurement, Vol. 60, 2011, pp. 2813-2827.

[8] S. Thanee, S. Somkuarnpanit and K. Saetang, “FPGA-Based Multi Protocol Data acquisition System with High Speed USB Interface”, Proceedings of International Multiconference of Engineers and Computer Scientists (IMECS’10), Hong Kong, China, March 17-19, 2010, pp. 646-649.

[9] Qimao Zhang, Ming Deng, Qisheng Zhang, Qi Wang and Rui Yang, “Design of data acquisition system based on SOPC and LabVIEW”, Proceedings of International Conference on Electrical and Control Engineering (ICECE’11), Yichang, China, September 16-18, 2011, pp. 1036-1039.

[10] Kumaresan N, Suganthi J “Survey On An Embedded Synchronized Daq Using Arm And Fpga Module” Journal of Theoretical and Applied Information Technology, 10Th August 2013. Vol. 54 No.1