voltage follower

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1 Characterization of Low Power CMOS Class-A Voltage Followers in 0.5μm Technology Abstract This paper describes comparative analysis of four different class A voltage followers. All the described follow ers are characterized for voltage gain, input impedance, output impedance, bandw idth, total harmonic distortion and pow er dissipationn. They are characterized by simulating the designs using 0.5μm AMI technology using eldo spice in mentor grapics. The results are used to compare the performance of above follow ers at 3.3V pow er supply and 1pF load. Finally the comparison is tabulated in table form. For the basic source f ollow er and modified super source follow er voltage gain is 0.93 but modified super source follow er show s 6.5Ω and bandw idth 198MHz w ith pow er dissipation of 26.7μWatt. Index TermsFlipped Voltage Follow er, Harmonic distortion, Shunt feedback, Voltage gain. —————————— —————————— 1 INTRODUCTION S the CMOS process entering the nano meter scale analog circuit will need to operate in lower and low- er supply voltage. This trend is mainly because of the need of the low power and low voltage requirement in the consumer electronics. While, scaling down size technology supply voltage do not scale linearly the VT. And VDsat is not scaled down linearly either. These facts serious limit the only voltage swing in low voltage supply. Many techniques, such as feedback, threshold inde- pendent, pseudo differential, Symmetrical Push pull, body driven, class A and Class AB have been proposed in litera- tures to reduce the power supply requirement and still retain acceptable performance. In order to meet the critical power and supply voltage requirements of the portable devices, designing some new cells to satisfy the technique developing trend should be primarily considered by pre- sent analog circuit designers. Voltage Follower is a basic analog cell in which output voltage follows the input voltage and it is also known as unity gain amplifiers. In normal high gain amplifiers, the output impedance is rather high and not suitable for driving low resistive or large capacitive load. In order to drive large capacitive loads and low resistive load with high speed and attain high signal-to-noise ratios, analog buffers must provide an output current and voltage swing range which is as high as possible. As shown in Figure 1 voltage follower is inserted be- tween a driving stage and a high load (i.e. a low re- sistance) presents an infinite resistance (low load) to the driving stage.Voltage Follower mainly used as impedance matching circuit and Level shifter. The Voltage follower is one of the most important basic cells in analog circuit design. Presently most system re- quire follower to have capability to drive low resistance loads, while at the same time can handle large output voltage swing and obtained low harmonic distortion. In this paper a comparison among class-A voltage fol- lowers is made. Each topology overcomes the limitation present in previous topologies and each topology is char- acterised for voltage swing, harmonic distortion, input impedance, bandwidth, output resistance and power dis- sipation. The paper is organised as following. Section 2; introduce different class-A topologies. In section 3, simula- tion results are listed and comparison among source fol- lower, flipped voltage follower, super source follower is made and paper concludes in section 4. 2 V OLTAGE FOLLOWER 2.1 Basic Source Follower The traditional voltage follower is simple source follower and it is easy to construct as shown in Figure 1. In elec- tronics, a common-drain amplifier, also known as a source follower, is one of three basic single-stage field effect transistor (FET) amplifier topologies, typically used as a voltage buffer. In this circuit the gate terminal of the transistor serves as the input, the source is the output, and the drain is common to both (input and output), hence its name. A ———————————————— Fig.1 Voltage follower as Impedance matching anlog cell

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Voltage Follower

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Page 1: Voltage Follower

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Characterization of Low Power CMOS

Class-A Voltage Followers in 0.5µm Technology

Abstract—This paper describes comparative analysis of four different class A voltage followers. All the described follow ers are

characterized for voltage gain, input impedance, output impedance, bandw idth, total harmonic distortion and pow er dissipationn. They are characterized by simulating the designs using 0.5µm AMI technology using eldo spice in mentor grapics. The results

are used to compare the performance of above follow ers at 3.3V pow er supply and 1pF load. Finally the comparison is tabulated in table form. For the basic source follow er and modif ied super source follow er voltage gain is 0.93 but modif ied super source follow er show s 6.5Ω and bandw idth 198MHz w ith pow er dissipation of 26.7µWatt.

Index Terms— Flipped Voltage Follow er, Harmonic distortion, Shunt feedback, Voltage gain.

—————————— ——————————

1 INTRODUCTION

S the CMOS process entering the nano meter scale analog circuit will need to operate in lower and low-er supply voltage.

This trend is mainly because of the need of the low power and low voltage requirement in the consumer electronics. While, scaling down size technology supply voltage do not scale linearly the VT. And VDsat is not scaled down linearly either. These facts serious limit the only voltage swing in low voltage supply.

Many techniques, such as feedback, threshold inde-pendent, pseudo differential, Symmetrical Push pull, body driven, class A and Class AB have been proposed in litera-tures to reduce the power supply requirement and still retain acceptable performance. In order to meet the critical power and supply voltage requirements of the portable devices, designing some new cells to satisfy the technique developing trend should be primarily considered by pre-

sent analog circuit designers. Voltage Follower is a basic analog cell in which output

voltage follows the input voltage and it is also known as unity gain amplifiers.

In normal high gain amplifiers, the output impedance is rather high and not suitable for driving low resistive or large capacitive load. In order to drive large capacitive

loads and low resistive load with high speed and attain high signal-to-noise ratios, analog buffers must provide an output current and voltage swing range which is as high as possible.

As shown in Figure 1 voltage follower is inserted be-tween a driving stage and a high load (i.e. a low re-sistance) presents an infinite resistance (low load) to the driving stage.Voltage Follower mainly used as impedance matching circuit and Level shifter.

The Voltage follower is one of the most important basic cells in analog circuit design. Presently most system re-quire follower to have capability to drive low resistance loads, while at the same time can handle large output voltage swing and obtained low harmonic distortion.

In this paper a comparison among class-A voltage fol-lowers is made. Each topology overcomes the limitation present in previous topologies and each topology is char-acterised for voltage swing, harmonic distortion, input impedance, bandwidth, output resistance and power dis-sipation. The paper is organised as following. Section 2; introduce different class-A topologies. In section 3, simula-tion results are listed and comparison among source fol-lower, flipped voltage follower, super source follower is made and paper concludes in section 4.

2 VOLTAGE FOLLOWER

2.1 Basic Source Follower

The traditional voltage follower is simple source follower and it is easy to construct as shown in Figure 1. In elec-tronics, a common-drain amplifier, also known as a source follower, is one of three basic single-stage field effect transistor (FET) amplifier topologies, typically used as a voltage buffer. In this circuit the gate terminal of the transistor serves as the input, the source is the output, and the drain is common to both (input and output), hence its name.

A

————————————————

Fig.1 Voltage follower as Impedance matching anlog cell

Page 2: Voltage Follower

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This circuit is used to transform impedances. For exam-ple, the Thévenin resistance of a combination of a voltage follower driven by a voltage source with high Thévenin resistance is reduced to only the output resistance of the voltage follower, a small resistance. That resistance reduc-tion makes the combination a more ideal voltage source. From small signal analysis from [1],

Voltage Gain: Av= gm1 Ro (1)

For unity gain output resistance Ro=1/ gm1 (2)

Where, β=W/L µCox and

There are several limitations in this topology. Current through transistor M1 is heavily depending on output current. So the Vgs of M1 is signal dependent and distor-tion is produced at output. Also its sourcing capability is limited by the biasing current source Ib.

And the output resistance of source follower is 1/gm1 and it is several KΩΩ. The solution is to increase transcon-ductance gm, which means large bias current and large W/L dimension. As a result power and area increase

dramatically.

2.2 Flipped Voltage Follower

The solution of above limitation is solved in Flipped volt-age follower also known as voltage follower with shunt feedback [6].

As shown in Figure 3 the current source Ib is placed at drain of transistor M1 so the current through M1 remain constant independent of the output current. So VgsM1 is held constant independent from the change in input. This give a more precise copy of the voltage than a traditional source follower can provide. It is able to source much more current than a simple source follower.

It is able to source a large amount of current, but its sinking capability is limited by the biasing current source Ib. The large sourcing capability is due to the low imped-ance at the output node, which is approximately

(3)

Where, gm1 and ro1 are the transconductance and out-

put resistance of M1. Second limitation is that the output headroom of flipped voltage follower is decreased to Vgs-2VDsat which is less then source follower.

2.3 Super Source Follower

To minimize the area and power dissipation required to reach a given output resistance in simple Source Follower, the super source follower configuration shown in Figure 4; here the circuit uses the negative feedback to reduce the output resistance [3].

From a qualitative standpoint, when the input voltage is constant and the output voltage increases, the magni-tude of the drain current of M1 also increases, in turn in-creasing the gate-source voltage of M2. As a result, the drain current of M2 increases, reducing the output re-sistance by increasing the total current that flows into the output node under these conditions.

From a dc standpoint, the bias current in M2 is the dif-ference between Ib1 and Ib2; therefore, Ib2 > Ib1 is required for proper operation.

Here the output resistance is

Fig. 2 Basic Source Fllower

Fig. 4 Super Source Follower

Fig. 3 Flipped Voltage Follower

1 12

m Dg I

1 2 1

1o

m m o

Rg g r

1 2 1

1o

m m o

Rg g r

2

D gs Th gs ThI V -V for V V -V2

DS

Page 3: Voltage Follower

3

(4)

The output resistance of basic source follower is re-

duced by factor gm2ro1. For the Super source follower volt-age headroom around output node is VDD- VGS -2VDsat. So a trade-off between output swing and minimum supply voltage should be made. For low supply voltages the volt-age swing is Low. The main potential problem with the super source follower configuration is that the negative feedback loop through M2 may not be stable in all cases, especially when driving a capacitive load.

Because of the big voltage variation at drain node of input transistor in previous two topologies which intro-duces serious channel length modulation.

2.3 Modified Super Source Follower

So improvement is made in Super Source Follower as shown in Figure 5 by adding extra intermediate stage to

replace the VGS voltage drop in the critical path around output node and minimize the voltage headroom [5]. And because of this extra intermediate stage output resistance is gm3ro3 time smaller then the super source follower.

Here M3, a current source and a current sink make up of a folded cascade stage which further decreases the out-put impedance to a smaller value.

According to KCL and KVL the output resistance is approximately given by

(5)

Also in this VDD-3VDsat which is also bigger than flipped voltage follower and super source Follower. And because of this low output impedance this kind of voltage follower can drive low output resistance load. The lineari-ty performance is also improved because of this low im-pedance node.

The drain node of input transistor in Figure 5 is low re-sistance so small voltage variation is appeared in this node

and channel length modulation in M1 is eliminated. Table 2 shows comparison that summarizes characteristics of voltage followers.

3 SIMULATION RESULTS

All the voltage follower topologies have been simulated with eldo spice in AMI 0.5µm process. All the followers are simulated with the set up of VDD= 3.3V andVSS=0V. For the transient analysis sinusoidal Vin with 0.1V peak to peak magnitude and 1MHz signal is applied.Almost all W/L of transistors are same and bias currents are also same as shown in Table 1.

Figure 6 shows the Frequency response, Figure 7 is

plot of Vout versus Vin which shows offset in each voltage follower and Figure 8 shows output impedance of above four topologies.

As explained the flipped voltage follower has less volt-age swing compared to source follower. A little modifica-tion in super source follower result in to very low output impedance built by the folded cascade feedback loop and also it improves the linearity as shown in Fig. 6.

Fig. 5 Modified Super Source Follower

TABLE 1 TRANSISTORS SIZE

1 2 1 3 3

1o

m m o m o

Rg g r g r

Page 4: Voltage Follower

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4 CONCLUSION

In this paper characteristic comparison among source fol-

lower, flipped voltage follower, super source follower and

modified super source follower is made. Each topology

shows some limitation and it is compensated by next topolo-

gy. For the basic source follower output resistance is of or-

der of 5KΩ, which is very high. So it is not suitable for driv-

ing low impedance load.

In flipped voltage follower output impedance is lower

down to 2.86KΩ, but at the same time its voltage gain re-

duce to 0.83. Where as modified super source followers

shows very low output resistance of order of 6.5Ω and 0.93

voltages gain which is almost same as the basic source fo l-

lower. At the same time bandwidth is 198MHz. So, Modi-

fied super source follower is useful for driving low resistive

and high capacitive load with low total harmonic distortion.

Fig. 6 Output Impedance of Class-A Voltage Followers

Fig. 8 Frequency response of Class-A Voltage Followers

TABLE 2 SIMULATION RESULTS OF THE OVERALL PERFORMANCE OF

THE CLASS A VOLTAGE FOLLOWER CIRCUIT OF FIGUER 2 TO 5

Fig. 7 Offset in Class-A Voltage Followers

Page 5: Voltage Follower

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ACKNOWLEDGMENT

The authors wish to thank Nirma university for provid-ing working environment and also thank full to the col-league of nirma university.

REFERENCES

[1] P.E. Allen and D.R. Holberg, “CMOS analog circuit design”,

Oxford University Press, 2nd ed., 2002.

[2] F. Maloberti, “Analog Design for CMOS VLSI Systems”,

Kluwer Academic/Plenum press, 2003.

[3] P.R. Gray, P.J. Hurst, S.H. Lewls, R.G. Meyer, “Analysis and

design of Analog Integrated Circuits”, JOHN WlLEY & SONS,

4th ed.,2001..

[4] R.J. Baker, H.W. Li, D.E. Boyce, “CMOS Circuit Design, Layout

and Simulation”, IEEE Press Series on Microelectronics Sys-

tems, 2005.

[5] Y. Kong, S. Xu, H. Yang, “An Ultra Low Output Resistance and

Wide Swing Voltage Follower”, ICCCAS 2007, pp. 1007 - 1010,

July 2007.

[6] R.G. Carvajal, J. Ramirez-Angulo, A.J. Lopez-Martin, A.

Torralba, J.A.G. Galan, A. Carlosena, F.M. Chavero, “The

Flipped Voltage Follower: A Useful Cell for Low Voltage Low

Power Circuit Design”, IEEE circuits and systems, pp. 1276 –

1291, July 2005.

[7] A.J. Lopez-Martin, J. Ramirez-Angulo, R.G. Carvajal and L.

Acosta, “Power-efficient class AB CMOS buffer,” Electronics

Letters , Vol. 45, No. 2, Jan. 2009, pp. 89-90.