vnr vignana jyothi instiyute of engineering · pdf filepolar machines-differences-dc armature...

VNR VIGNANA JYOTHI INSTIYUTE OF ENGINEERING AND

TECHNOLOGY

BACHUPALLY (VIA), KUKATPALLY, HYDERABAD-090

ACADEMIC PLAN: 2016-17

II Year B. Tech EEE – 2-I SEM L T/P/D C

3 1 4

Subject: Electrical Machines -I Subject Code: 13EEE004

Number of working days : 90

Number of Hours / week : 5

Total number of periods planned : 70

Name of the Faculty Member : Mr.M.Ranjit

PREREQUISITES

13MTH001, 13MTH002, 13MTH005, 13PHY003, 13EEE001

COURSE OBJECTIVES

To understand the Electro-mechanical Energy conversion

To know the construction and operation of DC machines

To know the different testing methods for dc machines

To know the behavior of DC machines

To learn about different speed and voltage control methods

COURSE OUTCOMES

Upon completion of the syllabus student will be able to

To identify the different parts of a dc machine and their roles in its operation.

To carry out different testing methods to predetermine the efficiency of DC

machines

To select a DC machine for particular practical application

To start and to control voltage and speed of DC machines

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DETAILED SYLLABUS

UNIT- I

Electromechanical Energy Conversion: Law of energy conservation-Need of

Electromechanical Energy conversion –Definition of Generator and Motor-Coupling

medium-Role-Electromagnetic Machines-Electrostatic machines concept-Energy balance

equation of motor and Generator- singly excited magnetic field systems- Energy – co

energy-force- Multi excited systems-Torque expression-Problems

Learning Outcomes

After completion of this unit the student will be able to

Explain Basic concepts of energy conversion.

Explain the concept of field energy, co-energy and energy balance.

They should be able to discriminate the differences between singly excited system

and doubly excited system with practical examples.

Able to solve numerical problems to find force and torque in singly and multy -

excited systems.

TEACHING PLAN

S. No Description No. of

Periods (15)

Mode of delivery

1 Introduction to the subject of Electrical Machines 01 BBT

2 Law of conservation of energy 01 BBT

3 Electromechanical Energy conversion Principles

01 BBT

4 Generator and Motor Definition 01 BBT+ Video Link

5 Coupling medium-Role 01 BBT

6 Electromagnetic Machines-Electrostatic machines

concept

01 BBT

7 Energy balance equation of motor and Generator 01 BBT

8 singly excited magnetic field systems- Energy – co

energy-force

02 BBT

9 Multi excited systems 02 BBT

10 Torque expression&Problems 02 BBT

11 Assignment Questions Discussion 01 Assignment Sheet

12 Tutorial 01 Tutorial sheet

Tutorial

1. Describe the principle of energy conversion? What is energy balance?

2. What are the advantages of analyzing energy conversion devices by field energy?

Assignment

1. Describe singly and doubly excited magnetic systems.

2. Derive the expression for torque in a multi excited system.

UNIT- II

D.C Generators (Part-I):

D.C Generator – Principle–simple loop generator-Construction-Homo polar and Hetero

polar machines-differences-Dc armature windings – lap and wave windings-

Development- Differences—simplex, Duplex and Triplex windings – E.M.F Equation-

Classification of DC Generators- separately excited and self excited generators – Open

circuit Characteristics-critical field resistance and critical speed-– Problems.

Learning Outcomes:


Explain the Function and Principle of operation of D.C Generators,

Constructional features of all parts.

They should find the direction of induced emf – Fleming’s right hand rule

They should know the Action of commutation

They should explain various losses and remedies.

Differentiate Lap and wave windings – simple and multiplex windings

They must able to differentiate separately excited and self excited generators

Explain Voltage buildup in self excited dc generators and causes of failure

Define Rc, Nc significance

TEACHING PLAN


Periods (16)

Mode of delivery

1 Introduction about the unit – D.C Generators-

Principle of operation-simple loop generator

02 BBT+ Video Link

2 Constructional features, Purpose of all parts 01 BBT+ Video Link

3 E.M.F Equation / Voltage Equations &Problems 02 BBT

4 Armature windings(Lap & Wave windings) 02 BBT

5 Winding Design Problems 02 BBT

6 Methods of Excitation – separately excited and

self excited generators

01 BBT

7 Voltage build-up process& calculation of Rc &Nc 02 BBT

8 Problems & Conclusions 02 BBT



Tutorial

1 .Explain the constructional details of D.C Machine with neat sketches of all parts

2. a) Derive an expression for induced E.M.F from the first principles (Dynamically

induced E.M.F)

b) An 8-pole D.C generator has per pole flux of 40 mwb and winding is connected

in lap with 960 conductors. Calculate the generated EMF on open circuit when it

runs at 400 rpm. If the armature is wave wound at what speed must the machine

be driven to generate the same voltage.

Assignment

. 1. Draw the winding table for a 4-pole wave connected armature having 30 coil sides

and give a developed diagram of the winding showing the polarity and position of

brushes the main poles and the direction of motion for a D.C motor.

2. Explain the concept of voltage build-up in self excited D.C generators and also

explain the significance of critical field resistance and critical speed and also list out

factors for failure of voltage build-up and suggest some remedial measures.

UNIT – III

D.C.GENERATORS (PART –II)

Armature Reaction-Effects-Distribution of Field mmf and Armature mmf-Demagnetising

and Cross magnetizing AT/pole-Compensating Windings-Problems-Commutation-

Methods of Improving Commutation-Generator Characteristics-Power Stages- Losses-

Efficiency-Parallel Operation-Problems.

Learning Outcomes:


Explain Armature reaction and its effects – derivation of Cross magnetizing and

de-magnetizing AT/pole.

State commutation-reactance voltage and its effects and methods of improving

commutation, interpole and compensation winding.

Solve numerical problems of commutation and reactance voltage.

Students should draw Load Characteristics of shunt, series and compound

generators

State the Conditions for successful parallel operation

Explain the need of Parallel operation

Explain the Parallel operation of shunt , series and compound generators-

equalizer bars

Solve Load sharing problems.

TEACHING PLAN


Periods

(16)

Mode of delivery

1 Introduction about the unit, Armature Reaction and

its Effects

03 BBT+ Video Link

2 Distribution of Field mmf and Armature mmf 01 BBT+ Video Link

3 Demagnetizing and Cross magnetizing AT/pole 02 BBT

4 Commutation-Methods of Improving Commutation 02 BBT

5 Generator Characteristics 02 BBT

6 Power Stages- Losses-Efficiency 01 BBT

7 Parallel Operation 02 BBT

8 Problems 01 BBT



Tutorial

1. Explain the concept of Armature Reaction and Commutation effects in D.C

Generator and suggest some remedies for improving further effects, and also

derive the expressions for demagnetizing and cross magnetizing ampere turns as

well as reactance voltage.

2. A 22.38 KW, 400V, 2-pole wave wound DC shunt motor has 840 Armature

conductors and 140 commutator segments. Its full-load efficiency is 88% and the

shunt field current is 1.57 A. If brushes are shifted backward through 1.5 segments

from the geometrical natural axis. Find the demagnetizing and distorting AT/Pole.

Assignment

1. Explain the drooping characteristics of D.C shunt generator and also explain

clearly why these characteristics are suitable for successful parallel operation.

2. Two D.C compound generations A and B with an equalizing bar, supply a total

load of 500 A. The data relating to the machine are as follows.

Arm resistance RA = 0.05 ohm, RB = 0.03 ohm

Series field winding RSA = 0.02 ohm, RsB= 0.01 ohm

Generated emf EA = 463 V, EB = 470 V

Calculate

a. The armature current in each machine

b. The current in each series winding

c. The current in the equalizing bar and

d. The bus bar voltage

UNIT-IV

D.C.MOTORS (PART –I)

D.C.Motor-Principle-Function of Commutator-Types-Back emf-Voltage Equation-

Mechanical Power developed-Condition for maximum mechanical power developed-

Torque equation-Motor characteristics-Power stages- Efficiency-Condition for maximum

efficiency-problems

Learning Outcomes:


Explain Principle of operation of D.C.Motor

Explain Significance of Back E.M.F, function of commutator in motors and

differences in generators and motors

Derive the torque expression

Derive Shaft torque and armature torque & lost torque expressions & should

solve numerical problems.

Derive the Max.efficiency condition & should solve the numerical problems.

TEACHING PLAN


Periods

(09)

Mode of delivery

1 Introduction about the unit, D.C Motors – Working

Principle

01 BBT+ Video Link

2 Back E.M.F concept 01 BBT

3 Torque expression 01 BBT

4 Characteristics of motors 01 BBT

5 Armature reaction and commutation conclusions 01 BBT

6 Power stages- Efficiency-Condition for maximum

efficiency-problems

02 BBT



Tutorial

1. a) Explain the function of commutator in a D.C motor and derive the expression for

torque .

b) Draw and explain the characteristics of D.C motor

2. A Shunt motor operating on 230V takes armature current of 6A at NL an runs at

1200 rpm take Ra = 0.25 ohm. Find the speed and electromagnetic torque when the

armature takes 36 A with the same flux.

Assignment 1. A 4-pole 250V D.C shunt motor has lap connected 960 conductions. The flux per

pole is20 mwb. Determine the torque developed by the armature and the useful

torque in N-m when current drawn By the motor is 32A. The armature resistance is

0.1ohm and shunt field resistance is 125 ohm. The Rotational losses of the machin

amount to 825 W. Derive the formula used.

2. Derive the condition for maximum efficiency in D.C machine.

UNIT-V

DC MOTORS (PART –II)

Speed control-Field and Armature control methods - Ward Leonard System-starting of

D.C.Motors-3 point and 4 point starters-Design of starter steps-problems-Testing of

D.C.Machines: Brake Test-SwinBurne’s Test-Hopkinson’s test-Field’s Test-Retardation

Test-Problems-concept of Electrical Braking [Elementary Treatment only]

Learning Outcomes:


Explain Necessity of starter & design of starting resistance

Explain about different speed control methods of D.C motor

Differentiate different losses in a D.C machine.

Draw Power flow block diagram of generator and motor

Derive Efficiency expressions of dc generator and motor

Find Condition for maximum efficiency

Explain the Necessity of testing – direct / indirect and regenerative testing.

Explain different tests performed on D.C Machines.

TEACHING PLAN


Periods

(14)

Mode of delivery

1 Introduction about the unit, Speed control of D.C

Motors: Armature voltage and field flux control

methods

02 BBT

2 Ward-Leonard system 01 BBT

3 3point and 4 point starters-protection 01 BBT+ Video link

4 Losses – Constant & Variable loss, Calculation of

efficiency

01 BBT

5 Condition for maximum efficiency &problems 02 BBT

6 Testing & problems 05 BBT



Tutorial

1. a) Explain why armature is called constant torque method and field control is known

as constant power control

b) Explain the necessity and working of 3-point starter with a neat sketch

2. a) Explain about Electrical braking.

b) A 500 V, D.C shunt motor takes a current of 5A on NL. The resistances of the

armature and the field circuits are 0.22 ohm and 250 ohm respectively. Find i) The

efficiency when loaded and taking a current of 100 A ii) The percentage change in speed

state precisely the assumptions made

Assignment 1. A 200 V D.C shunt motor with a constant main field drives a load, the torque of

which varies as the square of the speed when running at 600 rpm it takes 30 A.

Find the speed at which it will run and the current it will draw if a 20 ohm resistor

is connected in series with armature. Neglect Motor losses.

TEXT BOOKS

1. Electric Machines by I.J Nagrath & D.P.Kothari, Tata Mc Graw – Hill Publishers, 3rd

edition, 2004.

2. Electric Machines by P.S.Bimbra, khanna publishers

3. Electrical Machiney A.E.Fitzgerald,C.Kingsly and S.Umans,Mc Graw-Hill-5th

edition.

4. Fundamentals of Electrical machines by Chapman Tata Mc Graw – Hill Publishers

5. Electrical Technology vol-II B.L.Thereja & A.K.Thereja

References

1. Electro mechanics – I (D.C Machines) S.Kamakshaiah Right Publishers

2. Performance and design of D.C.Machines – Clayton & Hancock BPB Publishers

3. Electromechanical energy conversion with dynamics of electrical machines by

R.D.Begamudre, New age International (p) Ltd., Publishers

4. Electrical Machine Design –A.K.Sahani

5. Electrical engineering drawing by rajalingam

COURSE ASSESSMENT METHODS

Mode of

Assessment Assessment Tool Periodicity

Percentage

Weightage Evidences

Direct

Mid Terms

Examinations Twice in a semester 25 Answer Scripts

Assignment, Quiz

etc. At the end of each unit 5

Assignment

Books / Quiz

sheets etc.

End Semester

Examination

At the end of the

Semester 70 Answer Scripts

Indirect Course End

Survey At the end of Semester 100 Feedback forms

Subject ode:13EEE004

VNR VIGNANA JYOTHI INSTITUTE OF ENGINEERING AND

TECHNOLOGY

(AN AUTONOMOUS INSTITUTE )

SUBJECT: ELECTRICAL MACHINES-I

II B.TECH. -I SEMESTER- EEE-(1&2)

MODEL QUESTION PAPER

Max.Marks.70M

Time: 3Hours

PART-A Compulsory (30 Marks)

PART-B Answer any Four

PART- A ANSWER ALL QUESTIONS

1. Answer in one sentence 5×1=5 M

a)Write EMF equation of dc generator.

b)Write voltage equation of dc motor.

c) What is the purpose of brushes?

d) Write torque equation of motor.

e) Write the condition for maximum efficiency.

2. Answer the following very briefly 5×2=10 M

a) Write the types of dc motors.

b) Write the types of dc generators.

c) What is the function of commutator?

d) Define critical speed.

f) Define critical resistance.

3. Answer the fallowing briefly 5×3=15 M

a) Draw the open circuit characteristics of dc shunt generator.

b) Write the principle of dc generator.

c) Write the principle of dc motor.

d) What is the purpose of starter?

e) What are the losses in dc machines?

R-13

PART-B

Answer any four questions 4×10=40 M

4. (a) Deduce an expression for the voltage induced in a DC generator. [5M]

(b) The lap wound armature of a 4 - pole generator armature has 51 slots.

Each slot contains 20 conductors. What will be the e.m.f generated in

machine when driven at 1500 r.p.m. If useful flux per pole is 0.01Wb? [5M]

5. (a) Explain the armature reaction in a D.C generator on no-load. Enumerate and

explain the method to overcome the adverse effects of the armature reaction. [5M]

(b) A 4-pole 50 KW, 250v wave wound, shunt generator has 400 armature con-

ductors. Brushes are given a lead of 4 commutator segments. Calculate the

demagnetizing ampere turns/pole if shunt field resistance is 50 ohms. Also

calculate extra shunt filed turns/pole to neutralize the demagnetization. [5M]

6. (a) How do you determine the magnetization characteristics of a DC generator.[5M]

(b) A separately excited generator when running at 1200 rpm supplies a curren of

200A at 125 V to circuit of constant resistance. What will be the current when the

speed drops to 1000 rpm if the field current is unaltered? Armature resistance is

0.04 ohm and the total voltage drop at the brushes is 2V.

Ignore the change in armature reaction. [5M]

7. (a) Draw a neat graph to show the open circuit characteristic of a separately

Excited DC generator? Why is a field regulator necessary for this machine? [5M]

(b) What is critical speed? Explain the significance of critical speed. [5M]

8. (a) In a DC machine the hysteresis and eddy current losses are 250 W and 100 W

respectively, when the speed is 1000 rpm. At what speed will the iron losses be

175 W, if flux remains constant. [5M]

(b) A 600 V DC motor drives a 60 kW load at 900 RPM. The shunt field

resistance is 100 and the armature resistance is 0.16 . If the motor efficiency [5M]

is 85%, determine

i. Speed at no-load and speed regulation

ii. The rotational losses.

9. (a) Explain the speed control methods for DC shunt motor. [5M]

(b) A DC series motor running a fan at 1000 rpm, takes 50 A from 250 V mains. The

combined armature and field resistance is 0.6. If an additional resistance of 4.4

ohms is inserted in series with the armature circuit, find the motor speed in case the

field flux is proportional to the armature current. [5M]

SUB: Electronic Devices & Circuits

Faculty member: Dimple Raja

UNIT I

p-n Junction Diode and Applications

Syllabus: Review of Semi Conductor Materials, Theory of p-n Junction, p-n Junction as a Diode,

Diode Equation, Volt-Ampere Characteristics, and Temperature dependence of VI

characteristic, Ideal versus Practical – Resistance levels (Static and Dynamic), Transition

and Diffusion Capacitances.

The p-n Junction as a rectifier, Half wave Rectifier, Full wave rectifier, Bridge Rectifier,

Harmonic components in a Rectifier Circuit, Inductor filters, Capacitor filters, L-

Section Filters, - section filters, Comparison of Regulation Characteristics of

different Filters, Breakdown Mechanisms in Semi Conductor Diodes, Zener Diode

Characteristics, Shunt Voltage Regulation using Zener Diode. Learning objectives

At the end of completion of all learning activities the student is able to 1. Classify materials based on energy band theory

2. Describe intrinsic semiconductor

3. Explain thermal generation

4. Explain how electrons and holes constitute current in an intrinsic

semiconductor.

5. Draw and explain the energy band diagram of intrinsic semiconductor.

6. Define drift current and diffusion current

7. Define mobility of charged particle

8. Give an expression for the current density in terms charge concentration,

electron charge and electric field intensity.

9. Derive an expression for the conductivity of a semiconductor.

10. Describe extrinsic semiconductor

11. Why is doping required

12. Explain the formation of n type semiconductor

13. Explain conductivity of n type semiconductor

14. Explain the formation of p type semiconductor

15. Explain conductivity of p type semiconductor

16. Draw and explain the energy band diagram of extrinsic semiconductor

17. Give an expression for the conductivity of p type and n type semiconductor

18. State and explain Law of mass action

19. Explain carrier concentrations in extrinsic semiconductor

20. Explain pn- junction diode

21. Derive expression for junction potential.

22. Explain forward bias and reverse bias

23. Explain the V-I characteristics of forward biased pn- junction diode

24. Explain the V-I characteristics of reverse biased pn- junction diode

25. Explain the effect of temperature on V-I characteristics of pn junction diode

26. Explain the energy band diagram of open circuited diode.

27. Define static resistance, dynamic resistance and bulk resistance of a diode.

28. Define reverse saturation current and reverse breakdown voltage of a diode.

29. Derive current equation of diode.

30. Explain the current components of a diode

31. Define transition capacitance and diffusion capacitance of a diode.

32. Distinguish the features of Si and Ge diodes

33. Explain the function of rectifier

34. Explain half wave rectifier and full wave rectifier

35. Explain the advantages of full wave rectifier over half wave rectifier

36. Explain the advantage of bridge rectifier

37. Define and derive Ripple factor, % regulation, efficiency of HWR

38. Define and derive Ripple factor, % regulation, efficiency of FWR

39. Explain how harmonic components are rectified with L filter, Derive ripple

factor.

40. Explain how harmonic components are rectified with C filter, Derive ripple

factor.

41. Explain how harmonic components are rectified with LC or L section filter,

Derive ripple factor.

42. Explain how harmonic components are rectified with π section filter, Derive

ripple factor.

43. Explain multiple L section and π section filters

44. Compare the ripple factors of a rectifier with different filters.

45. Explain avelanche and zener breakdown mechanisms.

46. Explain the V-I characteristics of zener diode

47. Define different zener diode parameters.

48. Explain Zener diode as a Regulator.

Lecture plan: 18 Hrs

Lecture1: Intrinsic, extrinsic semiconductors, p type and n type semiconductors

Lecture2: Drift current diffusion current, mobility, conductivity of extrinsic

semiconductors

Lecture3: PN-junction diode Forward bias, Reverse bias Characteristics &

junction Potential

Lecture4: Continuity equation, Current components and diode current equation

Lecture5: Temperature dependency of VI characteristics

Lecture6: Diode parameters, specifications, equivalent circuits, problems on pn

diode

Lecture7: Introduction to Rectifiers, Half wave rectifier circuits, operation.

Lecture8: Full wave rectifier, circuits, operation. Bridge rectifier

Lecture9: Performance Parameters (Regulation, Ripple factor, efficiency etc.)

Derivations of HWR.

Lecture10: Performance Parameters (Regulation, Ripple factor,efficiency etc.)

Derivations of FWR and bridge rectifier.

Lecture11: Problems on Performance Parameters

Lecture12: Introduction to filters ,Capacitor filters explanation, Derivations

Lecture13: L filter, explanation, derivations

Lecture 14:, L Section filters, ∏- section filters

Lecture15: multiple L Section & ∏- section filters ,Comparison

Lecture16: Problems on Rectifiers and Filters

Lecture17: Break down mechanism in diodes, zener diode characteristics:

Lecture18: shunt Voltage Regulators Regulator using Zener diode.

Tutorial

1. The current of germanium diode is 100 μA at a voltage of –1V, at room

temperature. Determine the magnitude of the current for the voltages of +/- 0.2 V

at room temperature.

2. A silicon diode has a reverse saturation current of 60 nA. calculate the voltage at

which 1% of the rated current will flow through the diode, at room temperature if

diode is rated for 1A.

3. For a germanium diode carrying 10 mA the required forward bias is about 0.2 V.

Estimate the reverse saturation current and the bias voltage required for currents

of 1 mA and 100 mA.

4. The voltage across a silicon diode at room temperature of 3100

K is 0.68 V when

2.2 mA current flows through it. If the voltage is increased to 0.72 V, calculate

the diode current at same temperature.

5. For a silicon diode with reverse saturation current of 0.2 μA, calculate the

dynamic forward and reverse resistance at a voltage of 0.72 V and -0.72 V

respectively, applied across the diode, at room temperature of 270 C.

6. A full wave rectifier is operated from 50Hz supply with 120Vrms.It is connected

to a load drawing 50 mA and using 100μF capacitor filter. Calculate the dc

output voltage and the rms value of ripple voltage. Also calculate the

ripple factor.

7. A full wave bridge rectifier is using LC filter. The peak value of the transformer

secondary voltage is 162 V.The LC filter components are L= 1000mH

with 100 Ω resistance and C=50 μF .The load resistance is 1K Ω Calculate the dc

filter output voltage and ripple factor.

8. Calculate the ripple factor for a π type filter ,employing 10Hchoke and two equal

capacitors 16 μF each and fed from a full wave rectifier and 50Hzs main.

Assignment

1. What is a rectifier? Define Ripple Factor, PIV, efficiency TUF, form factor of a

Rectifier.

2. Define the value of forward current in case of Si junction diode with I0 = 10µA, Vf =

0.8v at T = 3000k.

3. A Si diode has a reverse saturation current of 7.5µA at room temperature 3000K

.Calculate the reverse saturation current at 4000k.

4. The voltage across a silicon diode at room temperature (300ok) is 0.7 volts when

2mA current flows through it. If the voltage increases to 0.75V calculate the diode

current

5. What is the ratio of current for a forward bias of 0.08V to the current for the same

magnitude of reverse bias for the Germanium diode.

6. The transition capacitance of an abrupt junction diode is 30pf at 8V

Determine the value of Capacitance for an increase in the bias voltage of 2

V.

7. Find the value of dc resistance and ac resistance of a Ge junction diode at 25 0C, I0 =

10μA and applied voltage is 0.1 V.

8. Calculate the Dynamic forward and reverse resistance of a PN junction diode when

the applied voltage is 0.2 V, I0 =2 μA and T= 25 0C. Consider Ge diode.

9. A Half wave rectifier circuit feeds a resistive load of 10KΩ through a power

transformer having a step down turns ratio of 8:1 and operated from

230V,50Hzs ac mains supply. Assume the forward resistance of a diode to be

40Ω and transformer secondary winding resistance as 12Ω. Calculate the

maximum, RMS,and average values of current ,DC output voltage and power

,efficiency of rectification and ripple factor.

10. A full wave rectifier circuit is fed from a transformer having centre tapped

secondary winding .The rms voltage from either end of secondary tap to

centre is 20V.If the diode forward resistance is 3Ω and that of secondary is

5Ω,for a load of 1KΩ,calculate

a. power delivered to load

b. % regulation at full load

c. efficiency at full load

d. TUF of secondary.

UNIT II

Transistors, Biasing and Stabilization

The bipolar Junction Transistor, Transistor Current Components, Transistor Construction,

BJT Operation, Common Base, Common Emitter and Common Collector Configurations,

Limits of Operation, Transistor as an Amplifier, BJT Specifications. Principle series

voltage regulators.

The DC and AC Load lines, Quiscent operating Point, Need for Biasing, Fixed Bias,

Collector Feedback Bias, Emitter Feedback Bias, Collector-Emitter Feedback Bias,

Voltage Divider Bias, Bias Stability, Stabilization Factors, Stabilization against variations

in VBE, β1 and ICO. Bias Compensation using Diodes and thermistors and sensistors ,

Thermal Stability.

Learning objectives

At the end of completion of all learning activities the student is able to 1. Explain the principle of operation of transistor (pnp and npn)

2. Explain the basic techniques used for the construction of transistor (grown type,micro

alloy type, electrochemically etched type, diffusion type, epitaxial growth type)

3. Explain the effect of temperature on transistor characteristics

4. Draw the symbols and different configurations of transistor 5. Draw and explain the input and out put characteristics of common emitter configuration.

6. Draw and explain the input and out put characteristics of common base

configuration

7. Draw and explain the input and out put characteristics of common collector

configuration

8. Identify active ,cutoff and saturation regions on out put characteristics

9. Derive expression for collector current in CE configuration.

10. Explain why CE provides large current amplification while CB can not.

11. Explain why CE configuration is most widely used.

12. Define current gain, voltage gain, input impedance and output impedance.

13. Define αdc and βdc .Derive relationship between αdc and βdc

14. Calculate αdc and βdc, if base current and collector current are given.

15. Explain early effect.

16. Explain punch through effect

17. List out the applications of BJT

18. Explain the significance of Q point

19. What are the factors that affect the stability of amplifier.

20. Define the three stability factors and explain their significance in BJT

21. List out different techniques used for biasing transistor amplifiers

22. Define and derive the expressions for stability factors S,S’,S”

23. Explain the fixed bias circuit and derive expression for stability factor S

24. Explain the collector feedback bias circuit and derive expression for stability

factor S

25. Explain Collector to base bias circuit and derive expression for stability factor

S

26. Explain the collector-emitterfeedback bias circuit and derive expression for

stability factor S

27. Explain voltage divider bias or emitter bias circuit and derive expression for

stability factor S

28. Explain why emitter bias circuit provides more stability amongst the five types

of biasing methods

29. What are the compensation techniques used for Vbe and Ico

30. Explain diode compensation circuit, thermistor compensation and sensistor

compensation techniques

31. Explain what is Thermal runaway

32. State the condition for thermal stability

Lecture plan:14Hrs

Lecture1: Introduction to Bipolar junction transistor(BJT), Construction of BJT

,Transistor operation (pnp and pnp)

Lecture2: Transistor current components, current amplification Factor, Common

base(CB), common emitter

(CE)and common collector (CC) configurations.

Lecture3:Common base configuration characteristics, early effect, punch through.

Lecture4: Common emitter configuration characteristics, active, cut-off and

saturation regions.

Lecture5: Common collector configuration characteristics.

Lecture6: Comparison of CB, CE, CC characteristics ,specifications,problems

Lecture7: Transistor biasing, operating point , dc load line, ac load line.

Lecture8: Stabilization against variations in VBE, β and ICO. Stability factors s’, s”,s’”.Methods of

transistor biasing Lecture9: Fixed bias circuit & collector feed back bias circuit- analysis, derivation

of expression for S.

Lecture10: Collector base bias circuit and collector –emitter feed back bias

circuit-, analysis, S, problems

Lecture11: Self bias or emitter bias circuit- analysis, S, problems

Lecture12: Problems on biasing circuits.

Lecture13: Compensation techniques using diode, thermistor and Sensistor

Lecture14: Thermal run away , Thermal stability,

Tutorial

1. In a certain transistor 99.6% of the carriers injected into the base cross the

collector-base junction. If the leakage current is 5 µA and the collector current is

200mA,calculate (i) the value of αdc (ii) the emitter current

2. Calculate the values of collector current and the base current for a transistor with

αdc= 0.99 and ICBO= 10 μA. The emitter current is measured as 8 mA.

3. An npn transistor of β = 50 is used in common emitter circuit with Vcc=10V and

Rc = 2KΩ is obtained by connecting 100KΩ resistance from collector to base.

Find the quiescent point and stability factors.

4. Determine the quiescent currents and the collector to emitter voltage for a

Germanium transistor with β = 50 in self-biasing arrangement. Draw the circuit

with a given component value with Vcc = 20V, Rc = 2KΩ, Re = 100 Ω, R1

=100KΩ and R2 = 5KΩ.

5. A silicon transistor with β = 80 is used in self biasing arrangement with Vcc =

15V,Rc = 4.7K. The operating point is at Vcc=8.2V,Ic=1.2mA.Find the values of

R1,R2 and Re

Assignment

1. Calculate the values of collector current and emitter current for a transistor

with αdc= 0.99 and ICBO= 5 μA. The base current is measured as 20 μA.

2. The reverse leakage current of a transistor when connected in CB

configuration is 0.2 μA while it is 18 μA when the same transistor is

connected in CE configuration. Calculate αdc and βdc.

3. The collector and base currents are measured as 5.202 ma and 50 μA

respectively.ICB0 is measured as 2 μA. Calculate a) α, β and Ie b)new level of

Ib to make Ic=10 mA.

4. An npn transistor, with β = 50 is used in common emitter circuit with

Vcc=10V,Rc=2KΩ.The bias is obtained by connecting 100KΩ resistor from

collector to base. Find quiescent operating point and stability factor.

5. Consider a self bias circuit ,where Vcc=22.5V, Re = 5.6kΩ, R1=90 kΩ, R2 =

10kΩ, and Re = 1 kΩ. hfe =55 and VBE = 0.6. The transistor operates in active

region. Determine operating point and stability factor S.

UNIT III

Small signal low frequency BJT Amplifiers

Small signal low frequency transistor amplifier circuits: h-parameter representation of a

transistor, Analysis of single stage transistor amplifiers CE, CC, CB configurations using

h-parameters: voltage gain, current gain, Input impedance and Output impedance.

Comparison of CB, CE, CC configurations in terms of AI, Ri, AV, RO.

Learning objectives :

At the end of completion of all learning activities the student is able to 1. Define ‘ h parameters’ for a two port network

2. Draw the h parameter equivalent circuits for the three transistor configurations

CE, CB, CC.

3. Explain the operation of CE amplifier as an amplifier

4. Explain the need of C1, C2 and Ce in a single stage CE amplifier

5. Derive Ai, Av, Ri, R0 of a single stage CE amplifier

6. Give the general steps for the analysis of transistor amplifier

7. Derive Ai, Av, Ri, R0 of a single stage CB amplifier

8. Derive Ai, Av, Ri, R0 of a single stage CC amplifier

9. Compare CC, CE and CB with respect to Ri, Ro, Ai, Av.

Lecture plan:10Hrs Lecture1: Introduction two port network devises, Hybrid model

Lecture2: H-parameter-hi , hf, hr, ho

Lecture3: Transistor hybrid model of CB, CC, CE configurations

Lecture4: Analysis of transistor amplifier (CE) using h-parameters Ai , Zi Av, Y

,Avs, Ais.

Lecture5: Simplified CE analysis ,problems.

Lecture6: analysis of CE amplifier with un bypassed Re

Lecture7: analysis of CB amplifier.

Lecture8: Analysis of CC amplifier, problems.

Lecture9: Comparison of CC, CB, CE amplifiers characteristics

Lecture10: RC couple amplifier, frequency response analysis(low frequency) .

Tutorial

1.Determine Av, Ai, Ri, Ro, for a CE amplifier using npn transistor with hie =

1200Ω, hre = 0,

hfe = 36, hoe =2x10-6

mhos. RL =2.5KΩ,Rs = 500Ω (neglect the effect of biasing

circuit)

2. A common collector amplifier has the following components: R1 = 27KΩ ,

R2 = 27KΩ,

RE = 5.6KΩ, RL = 47KΩ,RS = 600Ω. The transistor parameters are, hie = 1000Ω,

hfe = 85, and

hoe =2x10-6

mhos. Calculate Av, Ai, Ri, Ro, Avs, Ais.

Assignment 1.A common base amplifier has the following components: Rc = 5.6KΩ, RE =

5.6KΩ, RL = 39KΩ,RS = 600Ω. The transistor parameters are, hie = 1000Ω, hfe =

85, and hoe =2x10-6

mhos. Calculate Av, Ri, Ro, Avs.

2. consider a single stage CE amplifier with

Rs=1K,R1=1K,r2=2K,RL=1.2K,hfe=50,hie=1.1K,hoe=24microA/V and

hre=2.5*10-4

calculate Ri,Ai=Il/Is,Av,Avs=Vo/Vs,Ro.

3.calculate Ri,Ai=Il/Is,Av,Avs=Vo/Vs,Ro for the CB ckt with

R1=10K,Rs=1K,R2=10K,RL=20K.

For the CB ckt the transistor parameters are hib=22ohms,hfb=-

0.98,hob=0.49microA

UNIT IV

FET, Biasing and Amplifiers

Construction and operation of The Junction Field Effect Transistor (JFET), Volt-

Ampere characteristics – Drain and transfer characteristics, FET as Voltage

Variable Resistor, Biasing FET, the JFET Small Signal Model, FET Common

Source Amplifier, Common Drain Amplifier, Construction, and operation of

MOSFET, MOSFET Characteristics in Enhancement and Depletion modes.

Comparison of BJT and FET amplifiers.


At the end of completion of all learning activities the student is able to 1. Explain why FET is called unipolar device

2. Explain why FET is called voltage-operated device

3. Classify FETs and give their application areas.

4. Explain construction of n channel JFET with neat diagram.

5. Explain construction of p channel JFET with neat diagram.

6. Explain the operation of n channel JFET

7. Explain the operation of p channel JFET

8. Draw the Static Characteristics of JFET and explain different portions of the

Characteristics.

9. Define Pinch Off Voltage.

10. Draw the Transfer Characteristics of JFET and explain different portions of the

Characteristics.

11. Define Rd, gm and μ of JFET.

12. Explain how Rd, gm can be calculated from Characteristic curves.

13. Explain how JFET can be used as Switch.

14. Explain how JFET can be used as Voltage Variable Resistor.

15. Explain how MOSFET differs from JFET.

16. Explain the constructional features of Depletion mode MOSFET and explain

its basic operation.

17. Explain the significance of Threshold Voltage VT in Depletion mode MOSFET

18. Draw and explain the drain Characteristics of Depletion mode MOSFET along

with different operating regions.

19. Explain the constructional features of Enhancement mode MOSFET and

explain its basic operation. 20. Draw and explain the drain Characteristics of n Channel Enhancement. Mode

MOSFET.

21. Sketch graphical Symbols for n-Channel JFET, p-Channel JFET, n-Channel

Enhancement mode MOSFET, p-Channel Enhancement mode MOSFET,

n-Channel Depletion mode MOSFET, and p-Channel Depletion mode

MOSFET

Lecture plan:7Hrs

Lecture1: FET introduction, construction operation Drain and Transfer

characteristics of n-channel and p-channel FETs.

Lecture2: Pinch off voltage, definitions of Rd, gm and μ of JFET. calculation

from characteristic curves.

Lecture3: small signal model of JFET, analysis of Common source FET

amplifier.

Lecture4: Problems on JFET.

Lecture5: Depletion MOSFET construction, symbol, operation, characteristics ,

Lecture6: Enhanced MOSFET construction, symbol, operation, characteristics

Lecture7: Comparison of BJT and FET amplifiers

Lecture8: Problems on MOSFET.

Tutorial:

1.A JFET has IDSS = 20µA and Vp = 5V. What is the maximum drain current,

what is gate source, cutoff voltage. Find dc resistant.

2.Derive the relation among rd, gm and μ of a JFET.

3.the data sheet for an enhanced MOSFET gives ID=4.5mA,VGS=12V and

VGS(TH)=6V.Determine the value of ID for VGS=10V.

Assignment: 1. Explain the construction and operation of JFET.

2. Define trans conductance gm of a FET. Write the expression for gm.

3. Why a Field Effect Transistor is called so?

4. Draw the small signal model of FET.

5. Draw the diagram for the Basic Structure of Depletion mode and Enhancement mode

MOSFET.

UNIT V

Special Purpose Electronic Devices

Principle of Operation and Characteristics of Tunnel Diode (with the help of Energy

Band Diagram), Varactor Diode and schotky barrier diode. Principle of Operation and

Characteristics of UJT, UJT Relaxation Oscillator. Principle of Operation of SCR,

Schockley diode, Diac and Triac. Principle of Operation of Semiconductor Photo Diode,

PIN Diode , Photo Transistor, LED and LCD.


At the end of completion of all learning activities the student is able to

1. Explain the principle of operation of Tunnel diode

2. Explain the V-I characteristics of Tunnel diode

3. Explain the applications of Tunnel diode .

4. Explain the principle of operation of Varactor diode

5. Explain the V-I characteristics of Varactor diode

6. Explain the applications of Varactor diode

7. Explain the principle of operation of schotky barrier diode

8. Explain the V-I characteristics of schotky diode

9. Explain the constructional details of UJT

10. What is intrinsic stand of ratio η

11. Draw and explain UJT VI characteristics

12. Draw the symbol and equivalent circuit of UJT 13. Explain how UJT can be used as negative resistance device with the aid of static

characteristics

14. List out the applications of UJT and explain UJT relaxation oscillator.

15. Explain the constructional details and operation of SCR, Diac and Triac .

16. Draw the characteristics of SCR and explain

17. Explain a) Holding current and b) Latching current

18. Explain a) Reverse break down voltage and b) Forward break over voltage

19. Explain two-transistor analogy of SCR

20. State the application of SCR

21. Explain which material is used for LED

22. Explain is photo emissive effect

23. Define radiant flux , irradiation , illumination, luminosity curve and light

intensity

24. Explain the basic principle of operation of LED

25. Explain the constructional details of LED

26. State advantages and disadvantages of LED

27. Compare LED with normal PN diode

28. Sketch output characteristics of LED

29. Explain why LEDs are preferred in displays

30. Explain the VI characteristics of photo diode

31. State any two applications of photo diode and Photo Transistor.

32. Explain the principle of operation and working of LCD

Lecture plan:10Hrs Lecture1: Principle of Operation and Characteristics of Tunnel Diode (with the

help of Energy Band Diagram),

Lecture 2:principle of operation of Varactor Diode and its applications.

Lecture 3: principle of operation , characteristics and applications of schotky

barrier diode.

Lecture 4:Principle of Operation and Characteristics of UJT, UJT Relaxation

Oscillator.

Lecture 5: Principle of Operation ,characteristics and applications of SCR, Diac

and Triac.

Lecture 6: Principle of Operation ,characteristics and applications of Diac and

Triac

Lecture 7:Principle of Operation, characteristics and applications PIN Diode

Lecture 8::Principle of Operation and applications of Semiconductor Photo

Diode and Photo Transistor .

Lecture 9: Principle of Operation and applications of LED

Lecture 10:Principle of Operation and applications of and LCD.

Tutorial:

1. A UJT used for triggering the SCR has rb1=4K and rb2=2K.Find(a)

intrinsic stand off ratio,(b)peak point voltage if VBB=15v consider barrier

potential as 0.7V.

2. The intrinsic standoff ratio of an UJT is determined to be 0.6.A

measurement of its inter base resistance indicates 7K.What are the

UJTs’ static values of rb1 and rb2.

Assignment:

1. Define Negative resistance region, peak point and valley point in Tunnel

diode characteristics.

2. Describe the two transistor analogy of SCR.

3. Describe the construction and equivalent circuit of UJT.

4. Explain the principle of operation of photo diode and photo transistor.

5. Describe the principle of operation of LCD.

Subject: ELECTROMAGNETIC FIELDS

II B.Tech I Sem, Electrical & Electronics Engineering

(2016-2017)

II Year B.Tech EEE I-Sem

ELECTROMAGNETIC FIELDS

Objective:

The objective of this course is to introduce the concepts of electric field and magnetic

fields and their applications which will be utilized in the development of the theory for

power transmission lines and electrical machines.

UNIT – I Electrostatics:

Electrostatic Fields – Coulomb’s Law – Electric Field Intensity (EFI) – EFI due to a line

and a surface charge – Work done in moving a point charge in an electrostatic field –

Electric Potential – Properties of potential function – Potential gradient – Guass’s law –

Application of Guass’s Law – Maxwell’s first law, div ( D )=v Laplace’s and Poison’s

equations – Solution of Laplace’s equation in one variable.

Teaching Plan:

Total No. of periods : 10

Introduction to electrostatic fields : 01

Coulomb’s Law : 01

Electric field intensity due to a line & a surface charge : 01

Work done in moving a point charge in an electrostatic

Field : 01

Electric potential, properties of potential function : 01

Potential gradient- Guass’s law : 01

Application of Guass’s law : 01

Maxwell’s first law, div (D) =v : 01

Lap lace’s and Poison’s equations

– Solution of Lap lace’s equation in one variable : 02

Objectives On the conclusion of the unit – I, the student must be able to

1. difference between electromagnetic & electrostatic fields

2. Importance of electrostatic field

3. find electric field intensity on different charge distributions

4. solve the problems related to point charges , gauss’s law and Maxwell’s first law

UNIT – II Conductors and Dipole Dielectric & Capacitance:

Electric dipole – Dipole moment – potential and EFI due to an electric dipole – Torque

on an Electric dipole in an electric field – Behavior of conductors in an electric field –

Conductors and Insulators.

Electric field inside a dielectric material – polarization – Dielectric – Conductor and

Dielectric – Dielectric boundary conditions, Capacitance – Capacitance of parallel plate

and spherical and co-axial capacitors with composite dielectrics – Energy stored and

energy density in a static electric field – Current density – conduction and Convection

current densities – Ohm’s law in point form – Equation of continuity

Teaching Plan:


Electric dipole, Dipole moment and potential and

EFI due to an electric dipole : 02

Torque on an Electric dipole in an electric field : 01

Behaviour of conductors in an electric field : 01

Conductors and Insulators : 01

Electric field inside a dielectric material – polarization : 01

Dielectric – Conductor and Dielectric – Dielectric boundary conditions : 01

Capacitance, Capacitance of parallel plate, spherical

and co-axial capacitors with composite dielectrics : 02

Energy stored and energy density in a static electric field & problems : 02

Current density – conduction and Convection current densities : 01

Ohm’s law in point form – Equation of continuity : 01

Objectives On the conclusion of the unit – II, the student must be able to

1. difference between conductors & insulators

2. find solution of lap lace’s equation in on e variable

3. Find the behaviour of conductors in an electric field.

4. polarization, dielectric and its strength

5. capacitance of different composite dielectrics

6. energy stored in electro static field

UNIT – III Magneto Static’s:

Static magnetic fields – Biot-Savart’s law – Oesterd’s experiment - Magnetic field

intensity (MFI) – MFI due to a straight current carrying filament – MFI due to circular,

square and solenoid current – Carrying wire – Relation between magnetic flux, magnetic

flux density and MFI – Maxwell’s second Equation, div(B)=0. Ampere’s circuital law

and its applications viz. MFI due to an infinite sheet of current and a long current

carrying filament – Point form of Ampere’s circuital law – Maxwell’s third equation,

Curl (H)=Jc, Field due to a circular loop, rectangular and square loops.

Teaching Plan:


Static magnetic fields – Biot-Savart’s law – Oesterd’s experiment : 02

Magnetic field intensity due to a straight current carrying filament, due to circular

Square and solenoid current carrying wire : 02

Relation between magnetic flux, magnetic flux density and MFI : 01

Maxwell’s second Equation, div (B) =0 & problems : 01

Ampere’s circuital law and its applications : 02

Point form of Ampere’s circuital law : 01

Maxwell’s third equation, Curl (H) = Jc : 01

Field due to a circular loop, rectangular and square loops. : 01

Objectives On the conclusion of the unit –III, the student must be able to

1. Magnetic properties and their relations

2. Magnetic field intensity due to different current carrying elements

3. Maxwell’s equation and its applications

4. Amper’s circuital law and also its appliations

UNIT – IV Force in Magnetic fields and Magnetic Potential:

Magnetic force - Moving charges in a Magnetic field – Lorentz force equation – force on

a current element in a magnetic field – Force on a straight and a long current carrying

conductor in a magnetic field – Force between two straight long and parallel current

carrying conductors – Magnetic dipole and dipole moment – a differential current loop as

a magnetic dipole – Torque on a current loop placed in a magnetic field Scalar Magnetic

potential and its limitations – vector magnetic potential and its properties – vector

magnetic potential due to simple configurations – vector Poisson’s equations.

Self and Mutual inductance – Neumans’s formulae – determination of self-inductance of

a solenoid and toroid and mutual inductance between a straight long wire and a square

loop wire in the same plane – energy stored and density in a magnetic field. Introduction

to permanent magnets, their characteristics and applications.

Teaching Plan:


Moving charges in a Magnetic field – Lorentz force equation : 01

Magnetic force on a current element , a straight &

a long current carrying conductor in a magnetic field : 02

Magnetic force between two straight long & parallel

current carrying conductors : 01

Magnetic dipole & dipole moment , differential current loop as

a magnetic dipole : 01

Torque on a current loop placed in a magnetic field : 01

Scalar Magnetic potential and its limitations : 01

Vector magnetic potential and its properties : 01

Vector magnetic potential due to simple configurations & Poisson’s eq. : 02

Determination of self inductance of a solenoid, toroid and mutual inductance

between a straight long wire and a square loop wire : 02

Energy stored & density in a magnetic field : 01

Permanent magnets their characteristics and applications : 01

Objectives On the conclusion of the unit –IV, the student must be able to

1. dipole and magnetic dipole moment

2. magnetic forces on current carrying elements in magnetic fields

3. Scalar and vector magnetic potentials

4. Self and mutual inductances determination for various shapings

UNIT – V Time Varying Fields :

Time varying fields – Faraday’s laws of electromagnetic induction – Its integral and point

forms – Maxwell’s fourth equation, Curl (E)=-B/t – Statically and Dynamically

induced EMFs – Simple problems -Modification of Maxwell’s equations for time varying

fields – Displacement current – Poynting Theorem and Poynting vector.

Teaching Plan:


Faraday’s laws of electromagnetic induction – Its integral and point forms : 02

Maxwell’s fourth equation, Curl (E)=-B/t : 01

Statically and Dynamically induced EMFs – Simple problems : 02

Modification of Maxwell’s equations for time varying fields : 01

Displacement current – Poynting Theorem and Poynting vector : 01

Objectives On the conclusion of the unit –V, the student must be able to

1. the time varying fields

2. statically and dynamically induced emf’s and their applications in various fields

TEXT BOOKS

1. “Engineering Electromagnetics” by William H. Hayt & John. A. Buck Mc. Graw-Hill

Companies, 7th

Editon.2006.

2. “Electro magnetic Fields” by Sadiku, Oxford Publications

REFERENCE BOOKS :

1. “Introduction to Electro Dynamics” by D J Griffiths, Prentice-Hall of India

Pvt.Ltd, 2nd

editon

2. “Electromagnetics” by J P Tewari.

3. “Electromagnetics” by J. D Kraus Mc Graw-Hill Inc. 4th

edition 1992.

4. “Electromagnetic fields”, by S. Kamakshaiah, Right Publishers, 2007.

VNR VIGNAN JYOTHI INSTIYUTE OF ENGINEERING AND TECHNOLOGY

BACHUPALLY (VIA), KUKATPALLY, HYDERABAD-72

ACADEMIC PLAN:2016-17

II Year B. Tech EEE – I Sem L T/P/D

C

4 1

4

Subject: NETWORK ANALYSIS

Subject Code: 13EEE002




Name of the Faculty Member : Mr.G.Sasi Kumar & Dr. J.Bhavani

PREREQUISITES

13MTH001, 13MTH002, 13MTH005, 13PHY003, 13EEE001, 13ECE001, 13EEE101,

13ECE101

COURSE OBJECTIVES

To understand Three phase circuits.

To analysis transients in Electrical systems.

To perform Synthesis on given Electrical Network from a given impedance/admittance function

To evaluate Network parameters of given Electrical network and design of filters.

To apply Fourier analysis to Electrical systems.

COURSE OUTCOMES

Upon completion of the syllabus student will be able to Describe The importance of three phase circuit for balanced and unbalanced conditions

Analyze the transient behavior of electrical networks in time domain and frequency domain.

Illustrate the concept of complex frequency, transform impedance, significance of poles and zeros

of a given transfer function and network synthesis.

Describe The properties of Fourier transforms and their applications to Electrical Systems



f PO g PO h

PO

i

PO

j PO k

PO

l

CO 1 3

2 2

2 2

3

CO 2

3 2 1 2 1

2 2

CO 3

2 2 1 1 2 2 2 2 1 2 3


DETAILED SYLLABUS

UNIT–I Three Phase Circuits

Three phase circuits: Phase sequence – Star and delta connection – Relation between line

and phase voltages and currents in balanced systems – Analysis of balanced and

Unbalanced 3 phase circuits – Measurement of active and reactive power.

Learning Outcomes


1. Appreciate the advantage of three phase over single phase.

2. Understand the positive sequence and negative sequence

3. Understand the operation of balanced and unbalanced system

4. Analyze line and phase voltage and current.

5. Describe three phase power measured by three wattmeter method

and two wattmeter method.

TEACHING PLAN


Periods (13)

Mode of delivery

1 Introduction of Three Phase Circuits 01 PPT +Video Link

2 Phase Sequence 01 BBT+ Video Link

3 Star and delta connection 02 BBT

4 Relation between line and phase voltages and

currents in balanced systems and power in line

quantities and phase quantities

01 BBT+ Video Link

5 Analysis of balanced and Unbalanced 3 phase

circuits

02 BBT

6 Measurement of active and reactive power 02 BBT

7 Problems on balanced and unbalanced systems 02 BBT



Tutorial

1 Advantages of three phase system over single phase system

2 Draw the three phase source connected to three phase load diagrams

3 Line and phase voltage relation show in phasor diagram

4 Three phase power measured by two wattmeter method with phasor diagram

Assignment

1 Explain the three phase unbalanced load solved by different methods

2 Draw the circuit diagram of reactive power measured by single watt meter method

explain its phasor diagram

3 Calculate the total power input and readings of two wattmeter’s connected to

measure power in three phase balanced load, if the reactive power input is

15KVAR and the load power factor is 0.8.

4 A 3-ph delta connected RYB system with an effective voltage of 400v, has

balanced load with impedances (3+j4)ohms. Calculate the a) phase current b) line

current c) power in each phase

UNIT–II D.C. Transient Analysis

Transient response of R-L, R-C, R-L-C circuits (Series and parallel combination) for

D.C. excitations and sinusoidal excitations–Initial conditions - Solution method using

differential equation approach and Laplace transforms.

Learning Outcomes


1 understand the initial and final conditions of the R,L,and C elements

2 draw the equivalent circuits of R,L and C elements in KCL and KVL form

3 identify the total response of the circuit by DC and AC excitation

4 solve the different circuits by various methods

TEACHING PLAN


Periods (20)

Mode of delivery

1 Introduction 01 PPT

2 Initial and final conditions equivalent circuits for

R,L,andC elements and first and second

derivatives for RL,RC and RLC circuits for t>0

01 BBT

http://www.nptel.ac.in/courses/Webcourse-contents

3 Response of RL series circuit with dc excitation

and discuss the time constant

01 BBT +NPTEL

4 Response of RC series circuit with dc excitation

and discuss the time constant

01 BBT+ NPTEL

5 Response of RLC series circuit with dc excitation

with different circuit conditions

02 BBT http://www.nptel.ac.in/courses/Webcourse-contents

6 Problems on dc excitation 04 BBT

7 Introduction of Laplace Transformation

Application of Laplace Transformation in solving

electrical networks

03 BBT

8 Response of RL,RC and RLC series circuit with

sinusoidal excitation

05 BBT



Tutorial

1 Derive the response of RLC series circuit excites with DC source by various

circuit conditions

2 Derive the complete current solution of RL series circuit is excited by a

sinusoidal voltage VCos(wt+Ф) after closing the Switch for t>0

3 For the circuit shown in fig. Switch ‘S’ has been closed for a long time then

opened at t=0 find the following

a) Vab(0-) b) Ix(0-) c)IL(0-) d)Vab(0+) e) Ix(0+)

f) Ix(t→∞) g)Vab(t→∞) h) Ix(t) for t>0

Assignment

1 Derive the response of RLC series circuit excites with DC source by various circuit

conditions using Laplace transform

2 Derive the response of RL and RC series circuit excites with sine sodial source

with various circuit conditions using Laplace transform

UNIT-III

Network Functions & Synthesis

The concept of Complex Frequency, Physical interpretation of Complex Frequency,

Transform Impedance and Transform Circuits, Series and parallel Combination of

Elements, Terminal Pairs or Ports, Networks Functions for the One-port and Two-port,

Poles and Zeros of network Functions, Significance of poles and Zeros, Properties of

Driving Point Functions, Properties of Transfer functions, Necessary Conditions for

Transfer Functions, Time Domain Response from Pole Zero Plot.

Synthesis of one port LC,RL and RC networks-Foster and Cauer methods.

Learning Outcomes After completion of this unit the student will be able to

1 understand the complex frequency

2 understand the network functions fundamentals for single-port and two-port

3 identify pole zeros significance and plot representation of the each network

function

4 Analyze the properties of network functions

5 Understand elementary synthesis procedures analysis by Foster and Cauer

methods

TEACHING PLAN


Periods (12)

Mode of delivery

1 Introduction 01 http://onlinevideolect

ure.com/?course_id=

398&lecture_no=7

2 Network functions at one port and two port 01 BBT

3 Network function for series and parallel

combinations

02 BBT

4 Poles and zeros of network functions

Pole and zero significance

01 BBT

5 Properties of Transfer functions and driving

point function

02 BBT

6 Necessary conditions for Transfer functions,

Time Domain Response from Pole Zero Plot:

01 BBT

7 Synthesis of one port LC, RL and RC networks:

Foster and Cauer methods

03 BBT



Tutorial

1 Properties of driving point function and transfer function

2 Discuss the network function

3 The driving point impedance of network is given by Z(s)= S2 + 4s +3/ S(S+2)

find the no.of energy storage elements in the network

4 Realize the function Z(s)= S(S2 +4) / 2(S

2 +1) (S

2 +9) in both foster forms of LC

network

Assignment

1 find the driving point impedance

2 for the network shown find Z11 and locate the poles and zeroes in S-plane

UNIT-IV NETWORK PARAMETERS & Filters

Impedance parameters, Admittance parameters, Hybrid parameters, Transmission

(ABCD) parameters, conversion of Parameters from one form to other, Conditions for

Reciprocity and Symmetry, Interconnection of Two Port networks in Series, Parallel and

Cascaded configurations, Image Parameters, Illustrative problems.

Classifications of filters- Low pass filter, High pass filter, Band pass and Band

Elimination, Constant-K and M-derived filters- Low pass filter, High pass

filters(qualitative and quantitative treatment) and Band pass and Band Elimination

(quantitative treatment only),illustrative problems.


1 Understand the network parameters and their importance

2 Find the relation among the network parameters

3 Know the importance of series and parallel combinations

4 Analyze the different filter circuit and their importance

TEACHING PLAN


Periods (19)

Mode of delivery

1 Introduction of network parameters 01 PPT +Video Link

2 Z parameters Conditions for Reciprocity and

Symmetry

02 BBT+ Video Link

3 Y parameters Conditions for Reciprocity and

Symmetry

01 BBT +NPTEL

4 ABCD parameters Conditions for Reciprocity and

Symmetry

01 BBT+ NPTEL

5 Hybrid parameters Conditions for Reciprocity and

Symmetry

01 BBT

6 Relations between parameters 01 BBT

7 Interconnection of Two Port networks in Series,

Parallel and Cascaded configurations

02 BBT

8 Image parameters 01 BBT

9 Introduction of filters Classifications of filters

discuss Low pass filter, High pass filter

01 BBT + PPT

10 Band pass and Band Elimination 01 BBT

11 Constant-K and M-derived filters 03 BBT

12 Low pass filter, High pass filter

(qualitative and quantitative treatment)

01 BBT

13 Band pass and Band Elimination

(quantitative treatment only)

01 BBT



Tutorial

1 A two port network described by V1 = I1+ 2V2 , I2 = -2I1 + 0.4V2

2 Find Z parameters

3 find the Y parameters

from Y parameters find the Z parameters

Assignment

8

20 20

10

+

_

+

_

V1 V2

I1 I2

1

1

4

2

2Vx

+

-

Vx

+ +

__

V1 V2

I1 I2

+

_

+

_

V1 V2

I1I2

s

1

1

1

s

1 Derive the relation between among all network parameters

2 Design T and π- network of m-derived high pass filter having nominal

characteristic impedance Ro = 900 ohm, cutoff frequency fc = 2KHz and

infinite attenuation (or resonant) frequency f∞ = 1.8KHz.

3 Write the limitations of passive filter

Unit –V

Fourier analysis of A. C. Circuits

The Fourier theorem, consideration of symmetry, exponential form of Fourier series, line

spectra and phase angle spectra, Fourier integrals and Fourier transforms, properties of

Fourier transforms.

Applications to Electrical systems-Effective value and average value of non sinusoidal

periodic waveforms, power factor, effect of harmonics


1 understand the fourier series importance

2 apply fourier series analysis to electrical systems

TEACHING PLAN


Periods (12)

Mode of delivery

1 Introduction 01 http://onlinevideo

lecture.com/?cour

se_id=398&lectur

e_no=7

2 The Fourier theorem, Symmetry

exponential form of Fourier series

line spectra and phase angle spectra

02 BBT +PPT

3 Fourier integrals and Fourier transforms

properties of Fourier transforms

02 BBT

4 Applications to Electrical systems:

Effective and average value for non-sinusoidal

periodic waveforms power factor, effect of

harmonics

02 BBT



Tutorial

1 Express the fourier-series coefficients for complex exponential function

2 Explain the properties of fourier transform

3 Find the trigonometric fourier series for the triangular function

Assignment

1 find the trigonometric series for half wave rectifier function

2 find the exponential series for square wave form

TEXT BOOKS:

1. Engineering circuit analysis by William Hayt and Jack E. Kemmerly, Mc Graw Hill

Company, 6th

edition.

2. Network Analysis by A. Sudhakar, Shyammohan Palli, Mc Graw Hill Company,

3. Circuit Theory by A. Chakrabarti, Dhanipat Rai & Co., 6th

edition.

4. Electric circuit analysis by B. Subrahmanyam, I. K international.

REFERENCE BOOKS:

1. Network Analysis by M. E Van valkenburg, PHI.

2. Electric circuit analysis by C. L. Wadhwa, New Age international.

3. Electrical Circuits by David A. Bell, Oxford University press.

4. Basic circuit analysis by D. R, Cunningham & J. A Stuller, Jaico Publications.

5. Electrical Circuit theory by K. Rajeswaran, Pearson Education 2004.

6. Network Theory and Filter Design by Vasudev K. Aatre, Eastern Wiley Publishers,

1993.

7. Engineering Network Analysis and Filter Design by Gopal G.Bhise, Prem R.Chadha,

Durgesh C.Kulshreshtha


Mode of


Percentage

Weightage Evidences

Direct

Mid Terms


Assignment, Quiz


Assignment

Books / Quiz

sheets etc.

End Semester

Examination

At the end of the


Indirect Course End


- x -

II Year B. Tech EEE – I Sem L T/P/D

C

4 1

4

Subject: Switching Theory and logic Design Subject Code:

13ECE003




Name of the Faculty Member : Dr G Naveen Kumar & Mr. B Ganesh Babu

PREREQUISITES

13MTH001, 13MTH002, 13MTH005, 13EEE001, 13ECE001, 13ECE101

COURSE OBJECTIVES

To understand the concepts of number systems, codes and design of various

combinational and synchronous sequential circuits

To realize logic networks, digital computers using PROM, PLA, PAL devices.

To design state machines and ASM charts

COURSE OUTCOMES

Upon completion of the syllabus student will be able to

Design combinational, sequential circuits

Design ASM charts for digital systems

Implement designs on PLDs



f PO g PO h

PO

i

PO

j PO k

PO

l

CO 1 3 3 3 2 3 1

3 2

3

CO 2 3

3 2 2 1 1 1

2

CO 3 3 2 2 3 3 2 2

2 1 1 2


DETAILED SYLLABUS

UNIT- I

NUMBER SYSTEMS & CODES:

Philosophy of number systems – complement representation of negative numbers-binary

arithmetic-binary codes-error detecting & error correcting codes –Hamming codes.

BOOLEAN ALGEBRA:

Fundamental postulates of Boolean algebra - Basic theorems and properties

Learning Outcomes


1. Convert decimal numbers into binary, octal, hexadecimal numbers.

2. Conversion from binary to decimal, octal & hexadecimal numbers.

3. Can add or subtract or divide or multiply binary numbers.

4. Able to convert binary code to gray code and vice-versa.

5. Able to write excess-3 code to any decimal digit.

6. Can be able to detect an error and correct the error.

7. Can simplify the given functions using known properties

8. Will be able to prove the given expressions.

TEACHING PLAN


Periods (13)

Mode of delivery

1 Introduction to number representation 01 PPT+https://www.youtu

be.com/watch?v=CeD2L6KbtVM

2 Philosophy of number systems 01 BBT+PPT

3 Complement representation of negative numbers. 01 BBT

4 Binary Arithmetic. 01 BBT

5 Binary Codes – Weighted codes, Non weighted

Codes.

01 BBT+https://www.yout

ube.com/watch?v=tIBdQ8

arQpM 6 Error detection codes. 01 BBT

7 Error correction codes – Hamming code. 01 BBT

8 Fundamental postulates of Boolean algebra. 01 BBT

9 Basic properties 01 BBT

10 Switching expressions. 01 PPT

11 De Morgan’s Theorem. 01 BBT



Tutorial

1. a) What is the necessity of binary codes in computers?

(b) Encode the decimal numbers 0 to 9 by means of the following weighted

binary codes.

i. 8 4 2 1,

ii. 2 4 2 1,

iii. 6 4 2 -3.

(c) Determine which of the above codes are self complementing and why?

2. (a) For The Logic Expression Y = AB’ + A’B: obtain the truth table

(b) Which gate can be used as parity checker? Why.

3. State and prove the following Boolean laws:

i. Commutative.

ii. Associative.

iii. Distributive.

Assignment

1. Perform the subtraction with the following unsigned binary numbers by talking

the 2’s complement of the subtrahend.

i. 11010 - 10000

ii. 11010 – 1101

iii. 100 – 1010100

iv. 1010100 – 1010100

i. Give the gray-code equivalent of the Hex number 3A7.

ii. Find the gray-code equivalent of the Octal number 527.

2. i. Express decimal digit s 0-9 in BCD code and 2-4-2-1 code.

ii. Convert the decimal number 96 into binary and convert it into gray code

number.

UNIT-II

SWITCHING FUNCTIONS

Canonical and Standard forms - Algebraic simplification, Digital logic gates, properties

of XOR gates –universal gates-Multilevel NAND/NOR realizations.

MINIMIZATION OF SWITCHING FUNCTIONS Map method, Prime implicates, don’t care combinations, Minimal SOP and POS forms,

Tabular Method, Prime –Implicate chart, simplification rules.

Learning Outcomes


1. Can draw the Karnaugh maps for 3-variable, 4-variable, and 5-variable maps.

2. Can simplify the given functions.

3. Will be able to differentiate between Sum Of Products and Products Of Sums.

4. They can also simplify the functions using Tabular Method.

5. Can draw gate networks for the obtained simplified functions.

TEACHING PLAN

S. No Description No. of Periods

(12)

Mode of delivery

1 Switching functions – Conical forms 02 BBT

2 Logic gates (AND, OR, NOT) 01 PPT+ BBT

3 Exclusive – OR gate (Introduction & properties) 01 PPT+ BBT

4 NAND and NOR gates. 01 PPT+ BBT

5 Karnaugh map representation (3-variable, 4-variable,

and 5-variable maps

01 BBT+ https://www.youtube.com/wa

tch?v=ygm25sqqepg

6 Simplification of Logic expressions using K- Map 02 BBT

7 Don’t care combinations 01 BBT

8 Prime implicates 01 BBT

9 Tabular Method 02 BBT

10 Prime implicates chart. 01 BBT



Tutorial

1.a) List the Boolean function s implification rules in the K-map

b) Simplify the following Boolean function for minimal SOP form using K-

map and

implement using NAND gates. F(W,X,Y,Z) = Σ(1,3,7,13)+d(0,2,5).

2. Simplify the following Boolean expressions using K-map and implement them using

NOR gates:

(a) F (A, B, C, D) = AB’C’ + AC + A’CD’

(b) F (W, X, Y, Z) = W’X’Y’Z’ + WXY’Z’ + W’X’YZ + WXYZ.

Assignment

1. Determine canonical POS form for the function T(x, y, z) = x (y¯ + z).

2. Prove that Y=AB + BC + AC is a self dual function.

3. Convert the function f(x, y, z) = Π (0, 3, 6, 7) to the other canonical form.

4. What are Universal gates? Why they are so called. Give their truth tables.

5. Derive Boolean expression for a 2 input Ex-OR gate to realize with 2 input

NAND gates without using complemented variables and draw the circuit.

6. Derive the truth tables separately for HIT, MISS and TIE.

7. Minimize the function using Karnaugh-Map and obtain minimal SOP function

F(A, B, C, D) = Π(1, 2, 3, 8, 9, 10, 11, 14) + ∑d (7,15).

8. Using the Quine-Mc Cluskey method of tabular reduction, minimize the given

combinational single – output function f(w, x, y, z) = ∑m (0, 1, 5, 7, 8, 10, 14,

15)

UNIT III

COMBINATIONAL LOGIC DESIGN

Design using conventional logic gates, Encoder, Decoder, Multiplexer, De-Multiplexer,

Modular design using IC chips, MUX Realization of switching functions Parity bit

generator, Code-converters, Hazards and hazard free realizations.

PROGRAMMABLE LOGIC DEVICES

Basic PLD’s-ROM, PROM, PLA, PLD Realization of Switching functions using PLD’s

Learning Outcomes


1. Explain the concept of combinational circuits

2. Designing of adder, sub tractor, serial adder, parallel adder using logic gates.

3. Concept of encoded & decoder, Designing of encoded & decoder using NAND &

NOR gates

4. Explain the applications of Encoder & Decoder

5. Explain MUX & DEMUX

6. Design MUX & DEMUX using IC’S.

7. Explain the Realization of MUX switching functions

8. Design parity bit generator.

9. Design Code converters for BCD – Binary.

10. Explain Hazards & Hazards free Realizations.

11. Designing of PLD – ROM, RAM, PAL and PLA.

12. Different types of memories, designing of ROM.

13. Design of PAL and PLA

14. Using PLD’s design PLD realizations of switching functions.

TEACHING PLAN


(12)

Mode of delivery

1 Designing using conventional logic gates 01 PPT+ BBT

2 Encoder, De coder. 02 BBT+ https://www.youtube.com/wa

tch?v=RZQTTfU9TNA 3 Multiplexer, De-Multiplexer. 02 BBT

4 Modular design using IC chips 01 BBT

5 MUX realization of switching functions 02 BBT

6 Parity bit generator 01 BBT

7 Code-converters 02 BBT

8 Hazards and Hazard free Realizations 01 BBT

9 Basic PLD’s (ROM, PROM, PLA). 01 PPT+ BBT

10 PLD Realization of Switching functions using PLD’s. 01 PPT+ BBT



Tutorial

1. (a)Implement Full Adder using decoder and OR gates.

(b) Realize the Boolean function T(X,Y,Z) = Σ(1,3,4,5) using logic gates for

haz-ard free.

2. Design a 64 line output de multiplexer using lower order de multiplexer. Such as 4 to

16 and 2 to 4 de multiplexers.

3.A combinational circuit is defined by the function

F1(A, B, C) = ∑(3, 5, 6, 7)

F2(A, B, C) = ∑(0, 2, 4, 7)

Implement the circuit with a PLA having three inputs, four product terms, and two output.

Assignment

1. Give the implementation of a 4-bit ripple-carry adder using half-adder(s) / full

adder(s).

2. Explain with an example, the mux, de mux can be used as data – selector and data-

distributor respectively.

3. Design a full adder with two half adders and basic gates.

4. Convert Excess-3 code to BCD code using Full adder circuits.

5. Give the NAND gate realization of full – adder..

6. Realize a 3-bit odd parity generator circuit using only two-input ex-or gate.

7. The following is a truth table of a 3 – input, 4 – output combinational circuit.

Tabulate the PAL programming table for the circuit and mark the fuses to be

blown in a PAL diagram.

Inputs Outputs

X Y Z A B C D

0 0 0 0 1 0 0

0 0 1 1 1 1 1

0 1 0 1 0 1 1

0 1 1 0 1 0 1

1 0 0 1 0 1 0

1 0 1 0 0 0 1

1 1 0 1 1 1 0

1 1 1 0 1 1 1

UNIT-IV

SEQUENTIAL CIRCUITS – I

Classification of sequential circuits (Synchronous, Asynchronous, Pulse mode, Level

mode with examples) Basic flip-flops-Triggering and excitation tables. Steps in

synchronous sequential circuit design. Design of modulo-N Ring & Shift counters, Serial

binary adder, sequence detector.

Learning Outcomes


1. Classify the different types of sequential circuits.

2. Explain Synchronous, Asynchronous, Pulse mode and Level mode with examples.

3. Explain various Flip-flops.

4. Explain Triggering and Excitation Tables.

5. Explain the various steps involved in synchronous sequential circuits design.

6. Design a modulo – N ring counter.

7. Design a modulo – N ring shift counter.

8. Design a binary serial adder.

9. Design a sequential decoder.

TEACHING PLAN


(15)

Mode of delivery

1 Classification of sequential circuits. 01 PPT+https://www.youtube

.com/watch?v=ibQBb5yEDl

Q 2 Synchronous, Asynchronous 02 PPT+ BBT

3 Pulse mode, Level mode 01 BBT

4 Basic flip-flops 02 BBT+ https://www.youtube.com/wa

tch?v=4CRPlaBnfV0 5 Triggering and excitation tables 01 BBT

6 Synchronous sequential circuit design 02 PPT+ BBT

7 Modulo-N Ring & Shift counters. 02 BBT

8 Serial binary adder 01 BBT

9 sequence detector 01 BBT



Tutorial

1. Design up/down counter using J-K flip-flops to count the sequence 0, 3, 2, 6, 4, 0…

2. Explain the working of 3-bit bi-directional shift register with the help of diagram.

3. Describe the operation of universal shift register with the help of diagram?

4. Design mod-9 asynchronous counter using D flip flop?

5. Design 4 bit twisted ring counter. Also draw its state diagram and sequence table?

Assignment

1. Define the following terms in connection with a Flip-Flop.

i. Set – up time.

ii. Hold time.

iii. Propagation delay – time.

2. Compare merits & demerits of ripple and synchronous counters.

3. Design a modulo – 12 up synchronous counter using T-Flip Flop and draw the

circuit diagram.

4. Define the following systems

i. Synchronous sequential system.

ii. Asynchronous sequential system.

iii. Combinational system.

5. Define a sequential system and how does it differ from a combinational System.

6. Design a modulo 6 up/down Synchronous counter using T flip flop and draw the

circuit diagram.

7. Distinguish between combinational logic and sequential logic.

Unit –V

SEQUENTIAL CIRCUITS – II

Finite state machine-capabilities and limitations, Mealy and Moore models-minimization

of completely specified and incompletely specified sequential machines, Partition

techniques and Merger chart methods-concept of minimal cover table. Introduction to

ASM charts, simple examples, system Design using data path and control subsystems,

ASM charts for Flip Flops and Binary multiplier.

Learning Outcomes


1. Explain the Finite State Machine Capabilities.

2. Explain the Finite State Machine limitations.

3. Design a Mealy machine.

4. Design a Moore machine.

5. Minimization of sequential machines.

6. Explain the concept of minimal cover table.

7. Explain the different types of Merger chart methods.

8. Explain the Salient features of the ASM chart with examples.

9. Explain the control implementations.

10. Explain the System design using data path and control subsystems.

11. Give the examples of Weighing machine and binary multiplier.

TEACHING PLAN


(12)

Mode of delivery

1 Finite state machine 01 PPT+ https://www.youtube.com/wa

tch?v=O3If0Nr9to0 2 Capabilities and limitations of Finite state machine. 01 BBT+PPT

3 Mealy machine. 01 BBT

4 Moore machine 01 BBT

5 Minimization of completely specified sequential

machines

01 BBT

6 Incompletely specified sequential machines 01 BBT

7 Partition techniques 01 BBT+PPT

8 Merger chart methods 01 BBT+PPT

9 Concept of minimal cover table 01 BBT

10

ASM charts, Salient features of ASM charts

Examples of ASM charts.

01 PPT+ https://www.youtube.com/watch?v=x3AFBpaKnWY

11 System designing using data path and control

subsystems

01 BBT

12 Control implementations 01 PPT

13 Examples of weighing machine. 01 BBT+PPT

14 Examples of Binary multiplier. 01 BBT+PPT



Tutorial

1. Obtain a minimal state table using partition technique for the state table given below.

Find the

Minimum length sequence that distinguishes state from A from state B.

2. Explain the following related to sequential ckts with suitable examples.

(a) State diagram

(b) State table

(c) State assignment.

3. Design control logic circuit as shown in below figure using multiplexers.

Assignment

1. Distinguish between Mealy and Moore Machines.

2. convert the following Mealy machine into a corresponding Moore machine

PS X=0 X=1

A C,0 B,0

B A,1 D,0

C B,1 A,1

D D,1 C,0

3. Design a half adder and half subtractor circuit using

a. Multiplexer and registers

b. One flip flop per stage... Draw the state diagram and convert it to ASM

block and tabulate its state table.

4. Construct an ASM block that has 3 input variables (A, B, C), 4 outputs (W, X, Y,

Z) and 2 exit paths. For this block, output Z is always 1 and W is 1 if A & B are

both 1. If C=1 & A=0, Y = 1 and exit path 1 is taken. If C=0 or A=1, X=1 and exit

path 2 is taken. Realize the above using the one Flip Flop state.

TEXT BOOKS:

1. Switching & Finite Automata theory by Zvi Kohavi, TMH,2nd Edition.

2. Digital Design by Morris Mano, PHI, 3rd Edition, 2006.

REFERENCES :

1. An Engineering Approach To Digital Design by Fletcher, PHI. Digital Logic –

Application and Design by John M. Yarbrough, Thomson.

2. Fundamentals of Logic Design by Charles H. Roth, Thomson Publications, 5th

Edition, 2004.

3. Digital Logic Applications and Design by John M. Yarbrough, Thomson Publications,

2006


Mode of


Percentage

Weightage Evidences

Direct

Mid Terms


Assignment, Quiz


Assignment

Books / Quiz

sheets etc.

End Semester

Examination

At the end of the


Indirect Course End


Model Paper-1

Subject Code13ECE003

R13

VNR VIGNANA JYOTHI INSTITUTE OF ENGINEERING AND

TECHNOLOGY

(AN AUTONOMOUS INSTITUTE UNDER JNTUH)

II B.Tech I SEMESTER REGULAR EXAMINATION

SUBJECT: Switching Theory and logic Design

MODEL QUESTION PAPER

TIME: 3 Hours. Max. Marks:

70

PART-A is compulsory.

PART-B Answer any FOUR.

PART –A

1. Answer in one sentence. 5x1=5

Marks

a) Convert (23A4.EC) H to Decimal.

b) What are the Universal gates?

c) What is a prime implicant chart?

d) Compare a Decoder with a Demultiplexer.

e) What are the applications of ASM chart?

2. Answer the following very briefly. 5x2=10

Marks

a) Divide (110101.11) 2 by (101) 2.

b) Convert the following into Gray number.

i) (3A7) H ii) (527) 8

c) Reduce A’B+A’BC’+A’BCD+A’BC’D’E

d) Write Excitation table of J-K Flip-Flop.

e) Define an up-counter, a down counter and an up-down counter.

3. Answer the following briefly. 5x3=15

Marks

a) Each of the following arithmetic operations is correct in at least one number

system. Determine the possible bases in each operation.

i) 41÷3=13 ii) 23+44+14+32=223 iii) Square root of 41=5

b) Design the Full Substractor circuit using only NAND.

c) Reduce the expression f=∑m (2,3,6,7,8,10,11,13,14) using K-map.

d) Convert S-R Flip-Flop into T-Flip-Flop.

e) Write six salient features of ASM chart.

PART- B (Answer any FOUR) 4x10=40 Marks

4. a) A receiver with even parity Hamming code is received the data as 1110110.

Determine the correct code.

b) Given the binary numbers

a = 1010.1, b = 101.01, c =1001.1 perform the following:

i. a + c

ii. a- b

iii. a * c

iv. a / b.

5. a) Minimize the following expression f=∑m (0,1,2,8,9,15,17,21,24,25,27,31).

b) Realize the Boolean function T(X,Y,Z) = (1,3,4,5) using logic gates for hazard

free.

6. a) Design a synchronous Modulo-6 Gray code converter using T- Flip-Flop.

b) Draw the block diagram of a 4 - bit serial adder and explain its operation.

7. Determine a minimal state table equivalent to the state table given using the partition

technique.

PS NS,Z

X=0 X=1

S1

S2

S3

S4

S5

S6

S7

S1,1

S1,1

S2,0

S1,0

S4,1

S2,0

S4,1

S1,0

S6,1

S5,0

S7,0

S3,1

S5,0

S3,1

8. a) Obtain the ASM chart for the following state transition.

Start for State T1; then if xy=00, go to T2 if xy=01, go to T3; if xy=10 go to T1;

otherwise go to T3.

b) Using PLA logic, implement a BCD to excess 3 code converter. Draw its truth

table and logic

diagram.

9. a) What are don’t-care conditions? Explain its advantage with example.

b) Simplify the following Boolean function for minimal POS form using K-map and

implement using NOR gates.

F(W,X,Y,Z) = π M (4,5,6,7,8,12) . d (1,2,3,9,11,14)

II B.Tech I SEMESTER REGULAR EXAMINATION

SUBJECT: Switching Theory and logic Design MODEL PAPER – II

PART-A is compulsory. TIME: 3

Hours.

PART-B Answer any FOUR. Max. Marks:

70

PART-A 1. Answer in one sentence. 1 Mark each

(a). Represent decimal number 6027 in BCD

(b). Convert (198)12 to decimal.

(c). Define PLA

(d). Write the truth table for AND logic gate.

(e). What is data selector

2. Answer the following very briefly. 2 Marks

each

(a). Reduce the following Boolean expressions (AB + AC)

(b). What the 15-bit hamming code requires.

(c).Why the flip-flops are used.

(d). What is the Gray code.

(e). State Duality theorem

3. Answer the following briefly. 3 Marks each

(a). Draw the block diagram of a 4 - bit serial adder.

(b). Obtain the Dual of the following Boolean expressions ABC + A’B + ABC’.

(c). Apply complements to (39)10

(d). Applications of hexadecimal number system.

(e). Determine the value of base x if : (211)x = (152)8

Part-B (Answer any FOUR) 10 Marks each

4.(a) What is the Gray code? What are the rules to construct Gray code?

Develop the 4 bit Gray code for the decimal 0 to 15.

(b) List the XS3 code for decimal 0 to 9.(6M+4M)

5. Simplify the following Boolean expressions using K-map and implement them

using NOR gates:

(5M+5M)

(a) F (A, B, C, D) = AB’C’ + AC + A’CD’

(b) F (W, X, Y, Z) = W’X’Y’Z’ + WXY’Z’ + W’X’YZ + WXYZ.

6. (a) Design BCD to Gray code converter and realize using logic gates.

(b) Design 2*4 decoder using NAND gates. (5M+5M)

7. (a) Draw the basic macro cell logic diagram and explain

(b) Explain the general CPLD configuration with suitable block

diagram.

(5M+5M)

8 . ( a ) Dr aw th e lo g ic d i agr am of a 4 b i t b ina r y r ipp l e co u n te r us in g

Pos i t i ve ed ge triggering.

(b) Draw the block diagram of a 4 - bit serial adder and explain its

Operation. (5M+5M)

9. Design a modulo-8 counter which counts in the way specified below. Use JK flip-flops

in your realization. (10M)

vnr vignana jyothi instiyute of engineering · pdf filepolar machines-differences-dc armature...

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