vlsi syllabus 2019 final course structure and syllabus

School of VLSI Technology

Indian Institute of Engineering Science and Technology, Shibpur

Proposed Course Structure for Two-Year M. Tech (VLSI Design) Program

CourseStructure

Semester 1

No Paper Sub. Code

Subject Name Credit Hours

Total Marks

Type

1 Paper I VL5101 Semiconductor Devices and Modelling

4 100 Dep. Core

2 Paper II VL5102 Analog VLSI Circuits 3 100 Dep. Core 3 Paper III VL5103 Digital VLSI Circuits 3 100 Dep. Core 4 Paper IV VL512X * At least two will be offered 3 100 Dep. Elective 5 Paper V VL516X ** One will be offered 3 100 Open Elective 6 Lab I VL5171

Semiconductor Devices and

Modelling Lab 2 100 Lab I /Dep.

Core- Paper I

7 Lab II VL5172

Analog VLSI Circuits Lab 2 100 Lab II /Dep. Core-

Paper II 8 Lab III

VL5173 Digital VLSI Circuits

Lab 2 100 Lab III /Dep.

Core- Paper III

Total 22 800

A.DepartmentalElective1. AdvancedSystemsArchitecture2. EmbeddedSystemsandIOT3. NanoandMolecularElectronics4. HardwareSecurity5. VLSIInterconnects

B.OpenElective1. MEMSandMicrosystems2. QuantumComputing3. LogicSynthesisandVerification

Semester 2

No Paper Sub. Code


Total Marks

Type

1 Paper VI VL5201 VLSI Physical Design 3 100 Dep. Core 2 Paper VII VL5202 IC Technology 3 100 Dep. Core 3 Paper VIII VL5203 Testing and Verification 4 100 Dep. Core 4 Paper IX VL522X *at least two will be offered 3 100 Dep. Elective 5 Paper X VL526X **One will be offered 3 100 Open Elective 7 Project VL5291 M.Tech Thesis –Part 1

4 200 Term Paper

8 Project VL5292 Term Paper Seminar and Viva Voce

2 100

Total 22 800

A. DepartmentalElective

1. LowPowerDesign2. Mixedsignalcircuitdesign3. RFICdesign4. SOCDesignandTesting5. EmergingTechnologies

B.OpenElective

1. VLSIArchitectureforDSP2. FPGAsystemdesign

Semester 3

No Paper Sub. Code


Total Marks

Type

1 Thesis VL6191

M.Tech Thesis Part II 12 300 Progress Report

2 Thesis VL6192 Progress Report Seminar & Viva Voce

6 100

Total 18 400 Semester 4

No Paper Sub. Code


Total Marks

Type

1 Thesis VL6291 M.Tech Final Thesis 22 400 Thesis 2 Thesis VL6292 Thesis Seminar

& Viva Voce 8 200

Total 30 600

TotalCredit:22+22+18+30=92

SyllabusofFirstSemesterVL5101 SemiconductorDevicesandModelling

L‐T‐P:3‐1‐0 Credit:4Sl.No.

Modulenameandtopic No.ofclasses

1.CrystalsandBandstructures:CrystalStructure,Lattice,Latticewithbasis,Bandstructureevolution,E‐krelation,Densityofstates,CarrierStatistics

8

2.

SemiconductorsinEquilibriumandCarrierTransportinSemiconductors:SemiconductorMaterials,CarrierConcentration,CarrierDrift,CarrierDiffusion,GenerationandRecombinationProcess,ContinuityEquation,ThermionicEmission,Tunnelling,BallisticTransport,HighFieldEffects.

8

3.

PhysicsofJunctionDevices:ThermalEquilibriumCondition,DepletionRegion,DepletionandDiffusionCapacitances,Current‐VoltageCharacteristics,ChargeStorageandTransientBehaviour,JunctionBreakdown,MetalSemiconductorContacts

8

4.PhysicsofBipolardevices:TransistorAction,StaticCharacteristics,FrequencyResponseandSwitching,Heterojunction.

4

5.

MOSElectrostaticsintwoterminalMOSstructure:Energybanddiagraminequilibriumandunderbias,Flatbandvoltage,PotentialBalanceandchargebalance,Effectofgatebodyvoltageonsurfacecondition,Accumulationanddepletion,Inversion,CVCharacteristics,Frequencyresponse.

6

6. ThreeterminalMOSStructure:Introduction,ContactingtheInversionlayer,thebodyeffect,Regionsofinversion,VCBcontrol.

2

7.

FourterminalMOSStructure:Introduction,Transistorregionofoperation,Completeallregionmodel,Simplifiedallregionmodels,ModelbasedonQuasi‐FermiPotential,Regionsofinversionintermofterminalvoltages,stronginversion,weakinversion,moderateinversion,sourcereferencedvsbodyreferencedmodelling,effectivemobility,temperatureeffects.

6

8.

SmallDimensionEffects:Introduction,carriervelocitysaturation,channellengthmodulation,chargesharing,draininducedbarrierlowering,punchthrough,hotcarriereffects,poly‐silicondepletion,quantummechanicaleffects,DCgatecurrent,junctionleakage:bandtobandtunnellingandGIDL,leakagecurrents.

4

9.Ballistic FET: Introduction, channel transmission, Introduction to theVirtualsourcemodel.

2

Totalnumberofclasses

48

TextBooks:1. Introduction toSemiconductorMaterialsanddevicesbyM.STyagi, JohnWiley&Sons,5thEdition,2005.

2.SemiconductorDevices:ModelingandTechnologybyADasgupta,N.Dasgupta,PrenticehallIndiaPrivateLimited,2004.

3.SolidStatePhysicsByNeilW.Ashcroft,N.DavidMermin,CengageLearning,2011.4.Operationandmodelingof theMOS transistorbyYannisTsividis,OxfordUniversityPress,2011

ReferenceBooks:1. Physics of SemiconductorDevices by S.M. Sze and Kwok K.Ng, JohnWiley& Sons, 3rdEdition,2002.

2. SolidStateElectronicDevicesbyBenG.StreetmanandSanjayBanerjee,PrenticeHall,6thEdition2005.

3. SemiconductorDeviceFundamentalsbyRobertF.Pierret,Addison‐WesleyPublishing,19964. SemiconductorPhysicsandDevicesbyDonaldA.Neamen,McGrawHill,3rdEdition20035. SemiconductorDevices‐BasicPrinciplesbyJaspritSingh,JohnWileyandSonsInc.,20016. SemiconductorDevices‐Physics andTechnology,by S.M. Sze andM.K.Lee, JohnWiley&Sons,3rdEdition,2012.

7. FundamentalofModernVLSIdevicesbyYuanTaurandTakH.Ning,CambridgeUniversitypress,2ndEdition,1998.

VL5102 AnalogVLSICircuitsL‐T‐P:3‐0‐0 Credit:3Sl.No.


1.Introduction:BasicMOSFETdevice,characteristics,secondordereffects,MOSdevicemodel.

4

2.

Amplifiers:Lowfrequencyandhighfrequencyoperationofsinglestageamplifieranddifferentialamplifier(i)Singlestageamplifiers:commonsource(CS),sourcefollower,commongatestage,cascadestagewithdifferentload;(ii)DifferentialAmplifiers:Basicdifferentialoperation,commonmoderesponse,Currentmirror,differentialamplifierwithcurrentmirrorload.

6

3.Noiseanalysis:Statisticalcharacteristicofnoise,thermalnoise,Flickernoise,representationnoiseincircuits.

3

4. Operationalamplifier:onestageOPAMP,twostageOPAMP,gainboosting,commonmodefeedback,slewrate,powersupplyrejection.

3

5.Bandgapreferences:Supplyindependentbiasing,temperatureindependentreferences,PTATandCTATcurrentgeneration.

4

6.Switchedcapacitorcircuits:Samplingswitches,switchedcapacitoramplifier,switchedcapacitorintegrator.

3

7.Oscillators: Feedback and Stability, Ring Oscillator, L‐C oscillator,VoltageControloscillator,phase locked loop,Buildingblocks, lockingcharacteristicsanddesign.

5

8. Comparator:Simple,Switch‐basedandlatchbased. 3

9.Data Converter: Characterization of ADC and DAC, ADC and DACarchitectures.

3

10. PowerManagement:LDOandDC‐DCConverters 311. ActiveFilters:Designofswitchcapacitorfiler,DesignofOTA‐Cfilter. 3


40

TextBooks:

1. DesignofAnalogCMOSIntegratedCircuitsbyBehzadRazavi,McGrawHill,20032. CMOSAnalogCircuitDesignbyP.EAllenandDouglasR.Holdberg,OxfordUniversityPress,

2ndedition,2012.ReferenceBooks:

1. AnalysisandDesignofAnalog IntegratedCircuitsbyPaulGrayandRobertGMeyer, JohnWiley&Sons,2009.

2. Analog CircuitDesign by JohanHuijsing Rudy van Plassche andWilly Sansen, Springer –ScienceandBusinessMedia,B.V.

VL5103 DigitalVLSICircuitsL‐T‐P:3‐0‐0Credit:3Sl.No.


1.

Combinationallogicdesign: Static CMOS design‐complementaryCMOS ‐ static properties‐ complementary CMOS design‐Powerconsumption in CMOS logic gates‐dynamic or glitching transitions ‐Design techniques to reduce switching activity ‐ Ratio logic‐passtransistor logic ‐ Differential pass transistor logic ‐ Sizing of levelrestorer‐Sizing in pass transistor‐Dynamic CMOS design‐Basicprinciples ‐Domino logic‐optimization ofDomino logic‐NPCMOS‐logicstyle–Voltagescaling.

10

2.

Sequential logicdesign:Timingmetrics for sequential circuit ‐latchesVs registers ‐static latches and registers – Bi‐stability principle ‐multiplexerbased latches‐masterslaveedge triggered registers‐non‐ideal clock signals‐low voltage static latches‐static SR flip flop ‐Dynamiclatchesandregisters‐CMOSregister‐Dualedgeregisters‐Truesinglephaseclockedregisters.

10

3.SemiconductorMemories:DynamicRandomAccessMemories(DRAM),Static RAM, non‐volatile memories, flash memories, low‐powermemory.

8

4.

CMOSsubsystemdesign:DataPathOperations:Addition/Subtraction‐Comparators‐ Zero/One Detectors‐ Binary Counters‐ Generalarrangement of 4‐bit Arithmetic Processor, Design of 4‐bit shifter,DesignofALUsub‐system,ImplementingALUfunctionswithanadder,

Carry‐look‐aheadadders,Multipliers,Pipelinemultiplierarray,Booth‟salgorithm,Finite‐StateMachines.

6

5.

HARDWARE MODELING WITH THE VERILOG HDL : HardwareEncapsulation –The Verilog Module, Descriptive Styles, StructuralConnections, Behavioural Description In Verilog, HierarchicalDescriptions of Hardware, Structured (Top Down) DesignMethodology,UsingVerilogforRTLSynthesis.

6


40

TextBooks:1. CMOSVLSIDesign–ACircuitsandSystemsPerspectivebyNeilHWeste,DHarrisandAyan

Banerjee,Pearson,2012.2. DigitalIntegratedCircuits‐ADesignPerspectivebyJMRabaey,PrenticeHall,3rdEdition,

2012.3. FPGAbasedsystems,WaneyWolf,Pearson,1sted,20054. Sung‐MoKang,YusufLeblebici,“CMOSDigitalIC‐AnalysisandDesign”,TataMcGrawHill

publication.ReferenceBooks:1. M.D.CILETTI,“Modeling,SynthesisandRapidPrototypingwiththeVerilogHDL”,Prentice‐

Hall.2. M.G.ARNOLD,“VerilogDigital–ComputerDesign”,Prentice‐Hall.

VL5171 SemiconductorDevicesandModellingLab L‐T‐P:0‐0‐3Credit:2Aspersyllabus(usingSynopsisTCADandSilvacoTCAD)

VL5172 AnalogVLSICircuitsLabL‐T‐P:0‐0‐3Credit:2Aspersyllabus(UsingCadenceTools)

VL5173 DigitalVLSICircuitsLabL‐T‐P:0‐0‐3Credit:2Aspersyllabus(UsingCadence,Synopsis,MentorGraphicsDesignautomationtools)

SyllabusofFirstSemesterElectives

VL5121 AdvancedSystemsArchitectureL‐T‐P:3‐0‐0Credit:3Sl.No. Modulenameandtopic No.ofclasses

1.Overview of von Neumann architecture: CISC and RISC processors,Instruction set architecture; Architecture, Measuring and reportingperformance,DataPathDesign.

8

2.Pipelining: Basic concepts of pipelining, data hazards, control hazards,and structural hazards; Techniques for overcoming or reducing theeffectsofvarioushazards.

6

3.

Hierarchical Memory Technology: Inclusion, Coherence and localityproperties;Cachememoryorganizations,Techniquesforreducingcachemisses; Virtual memory organization, mapping and managementtechniques,memoryreplacementpolicies.

8

4.

Instruction‐level parallelism: Concepts of instruction‐level parallelism(ILP), Techniques for increasing ILP; Superscalar, superpipelined andVLIW processor architectures; Vector and symbolic processors; Casestudiesofcontemporarymicroprocessors.

8

5.

Multiprocessor Architecture: Taxonomy of parallel architectures;Centralized shared‐memory architecture, synchronization, memoryconsistency, interconnection networks; Distributed shared‐memoryarchitecture,Clustercomputers.Multi‐corearchitectures.

6


36

TEXTBOOKS

1. ComputerArchitecture:Aquantitativeapproach–JohnL.Hennessy,DavidA.Patterson–MorganKaufmann

2. ComputerorganizationandArchitecture:DesigningforperformanceWilliamStallings–Pearson

3. Advanced Computer Architecture : Parallelism, Scalability and programmability KaiHwang,NareshJotwani–McGrawHill,2008

REFERENCEBOOKS

1. Computer Organization and design : The Hardware/Software Interface, David A.Patterson,JohnL.Hennessy‐MorganKaufmann,Year:2004

VL5122 EmbeddedSystemsandIoTL‐T‐P:3‐0‐0Credit:3Sl.No.


1. Introduction:Features,Designmetrics,Designflow. 2

2.MicrocontrollerSystems:ARMInstructionsetarchitecture,ARMpipeline,THUMB instructions, Exceptions in ARM, Raspberry Pi, Arduino basedsystemdesign(dronebasedapplications).

5

3.Digital Signal Processors: Architecture, Data access features,Computationfeatures,Accuracy,C6000familyofDSP.

4

4.Field Programmable Gate Arrays: Field programmable devices,Programmability, Logic block variations, Design flow, Modern FPGAs,ConceptofsoftandhardIP.

5

5. Interfacing: Requirements, SPI, IIC, RS232‐C family, USB, IrDA, CAN,Bluetooth,PCI

7

6. Real‐time System Design: Task classification, Periodicity, Taskscheduling,schedulingalgorithms,Resourcesharing,CommercialRTOS.

6

7.Hardware‐SoftwareCodesign: Introduction tospecification,partitioningandco‐simulation.

3

8.IoT Systems: Overview of IoT systems, wireless sensor networkapplications,IoTinHealthcare,automotiveandIIoT,SmartGrid. 8


40

TextBooks:1. EmbeddedSystemDesign,byS.Chattopadhyay,2ndEdition,2014.2. EmbeddedSystemDesign:AUnifiedHardware/SoftwareIntroduction,FrankVahid,TonyDGivargisWiley,2002.

ReferenceBooks:

1. EmbeddedSystemDesign,P.Marwedel,20032. ArnoldBerger,“Embeddedsystemdesign”‐CMPbooks

VL5123 NanoandMolecularElectronicsL‐T‐P:3‐0‐0 Credit:3Sl.No. Modulenameandtopic No.ofclasses

1.

Introduction: Nanotechnology and Nanoelectronics; Moore’s Law;Review of Semiconductor Electronics: Maxwell’s Equation, PoissonEquation,ContinuityEquations,carrierconcentration,CarrierTransport,Driftanddiffusion;basicsofmolecularelectronics.

4

2.

Basics of Quantum Mechanics: Photoelectric effect; Wave nature ofparticles and wave‐particle duality; Compton Effect; UncertaintyPrinciple; Schrodinger’s equations and its applications;Wave functionand postulates; Pauli‐exclusion principle; Quantum dots, wires, andwells;Transportinquantumstructures;Optoelectronicproperty.

14

3.NanoelectronicDevices:Overview ofMOS andMOSFET; CMOS Scalingand shrink down approaches; FINFET; Tunnel FET; JunctionlessTransistor;Singleelectrontransistors;NanowireMOSFET,GAAFET.

10

4.

Molecular Electronics: Need of molecular electronics and atoms‐upapproach;Strategiesofelectronicdevelopment;Molecularbondingandhybridization; Molecules as electronic devices; Carbon molecules &electronics; Pentacene; Transport in molecular electronics; Graphenedevices;Carbonnanotubeelectronics;CNTFET.

12


40

TEXTBOOKS1. C.P.PooleJr.andF.J.Owens,IntroductiontoNanotechnology,Wiley,2003.2. D.A.Neamen,SemiconductorPhysics&Devices,TMH,2003.3. AshcroftandMermin,SolidStatePhysics,ThomsonPress(India)Ltd,2003.4. G.W.Hanson,FundamentalsofNanoelectronics,Pearson,2009.5. M.C.Petty,MolecularElectronics:FromPrinciplestoPractice,Wiley,2007.REFERENCEBOOKS1. C.Kittel,Introductiontosolidstatephysics,Wiley,NewYork,1976.2. K. Iniewski,Nanoelectronics:nanowires,molecularelectronics,andnanodevices,McGraw

Hill,NewYork,2011.3. K.Sienicki,MolecularElectronicsandMolecularElectronicDevices,CRCPress,1994.4. S.M.Sze,PhysicsofSemiconductorDevices,Wiley,NewYork,1981.5. J.H.Davies,ThePhysicsofLow‐DimensionalSemiconductors,CambridgeUniversityPress,

1998.6. R.F.Pierrett,SemiconductorDeviceFundamentals,Pearson,2006.7. B.G.StreetmanandS.Banerjee,SolidStateElectronicDevices,Pearson,2008.

VL5124 HardwareSecurity

L‐T‐P:3‐0‐0 Credit:3

Sl.No.


1. OverviewofDifferentIssuesofHardwareSecurity 2

2.

Preliminaries:AlgebraofFiniteFields,BasicsoftheMathematicalTheoryof Public Key Cryptography, Basics of Digital Design on Field‐programmable Gate Array (FPGA), Classification using Support VectorMachines(SVMs).

5

3.

UsefulHardwareSecurityPrimitives:CryptographicHardwareandtheirImplementation, Optimization of Cryptographic Hardware on FPGA,Physically Unclonable Functions (PUFs), PUF Implementations, PUFQualityEvaluation,DesignTechniquestoIncreasePUFResponseQuality.

6

4.

Side‐channel Attacks on CryptographicHardware: Basic Idea, Current‐measurementbasedSide‐channelAttacks(CaseStudy:KochersAttackonDES), Design Techniques to Prevent Side‐channel Attacks, ImprovedSide‐channelAttackAlgorithms(TemplateAttack,etc.),CacheAttacks.

6

5.TestabilityandVerificationofCryptographicHardware:Fault‐toleranceof Cryptographic Hardware, Fault Attacks, Verification of Finite‐fieldArithmeticCircuits.

5

6.

Modern ICDesignandManufacturingPracticesandTheir Implications:Hardware Intellectual Property (IP) Piracy and IC Piracy, DesignTechniquestoPreventIPandICPiracy,UsingPUFstopreventHardwarePiracy,ModelBuildingAttacks on PUFs (Case Study: SVMModeling ofArbiter PUFs, Genetic Programming basedModeling of Ring OscillatorPUF).

8

7.

Hardware Trojans: Hardware Trojan Nomenclature and OperatingModes,CountermeasuresSuchasDesignandManufacturingTechniquesto Prevent/Detect Hardware Trojans, Logic Testing and Side‐channelAnalysisbasedTechniques forTrojanDetection,TechniquestoIncreaseTestingSensitivity InfrastructureSecurity:ImpactofHardwareSecurityCompromiseonPublic Infrastructure,DefenceTechniques (CaseStudy:Smart‐GridSecurity).

8


40

TextBooks:

1. DebdeepMukhopadhyayandRajatSubhraChakraborty,"HardwareSecurity:Design,Threats,andSafeguards",CRCPress.

ReferenceBooks:

1. Ahmad‐RezaSadeghiandDavidNaccache(eds.):TowardsHardware‐intrinsicSecurity:TheoryandPractice,Springer.

2. TedHuffmireetal:HandbookofFPGADesignSecurity,Springer.3. StefanMangard,ElisabethOswald,ThomasPopp:Poweranalysisattacks‐revealingthe

secretsofsmartcards.Springer2007.4. DougStinson,CryptographyTheoryandPractice,CRCPress.

VL5125 VLSIInterconnects

L‐T‐P:3‐0‐0 Credit:3

Sl.No.


1.

Introduction to VLSI interconnects classification, Cu Interconnect,Technological trends, Interconnect scaling, Typical interconnectstructure, Electromigration phenomenon, Signal transmission oninterconnects,On‐chipInterconnects,Packagelevelinterconnections.

5

2.

Extractionof interconnectparameters,Physicsof interconnects inVLSI,physical foundations for circuit models of VLSI interconnects,Interconnect resistance, capacitance, inductance modelling, ExtendedMillereffect,Alternativesforextraction.Modellinginterconnectdrivers.LossandLosslesstransmissionlinemodel,Switch‐levelRCmodel.Tandπ network interconnect model. Effective capacitance modelling.Modellinginterconnectwires.Generalinterconnectnetwork.AnRCtree.The transfer function. Convolution of input and impulse response.Momentsofthetransferfunction.ImpulseandstepresponseofRCtree.Elmoredelay.ResponseofsingleRC.Elmoredelayof2‐stageRC.RC‐tree.Step response of lumped vs. distributedRC line. SampleRLC network.Modifiednodeanalysisequations.

15

3.

Active and Passive interconnections, Multilevel and multilayerinterconnections,Propagationdelays,Crosstalkeffectsindigitalcircuits,spurious signals, crosstalk induced delay, energy dissipation due tocrosstalk,crosstalkeffectsinlogicVLSIcircuits.

8

4.

Techniquesforavoidinginterconnectionnoise,noisedetectionproblem,briefintroductiontothetestingoflogiccircuits,Crosstalkconfiguration,DCnoisemargins,Crosstalk‐inducedspurioussignaldetection,Reasons for high delay uncertainty, switch factor modelling of delayuncertainty,Buffer insertion fornoise;Routing topologygeneration forspeed optimization, Width optimization based on separability/monotonicityproperties.Introductiontoemerginginterconnects(CNT,Graphene,opticalinterconnectsandsoon.)

12

Totalnumberofclasses 40

TextBooks:

1. Grabinski,Hartmut,“InterconnectsinVLSIDesign”,1stEdition,Springer,2000.2. C‐K.Cheng,J.Lillis,S.Lin,N.H.Chang.InterconnectAnalysisandSynthesisJ.Wiley,

2000.3. M.Celik,L.Pillegi,A.Odabasioglu.ICInterconnectAnalysis.Kluwer,2002.

ReferenceBooks:

1. A.B.Kahng,G.Robins.OnOptimalInterconnectionsforVLSI.Kluwer,1995.2. Moll, Francesc, Roca, Miquel, “Interconnection Noise in VLSI Circuits”, 1st Edition,

Springer,2004.3. J.A.Davis,J.D.Meindl.InterconnectTechnologyandDesignforGigascaleIntegration.

Kluwer,2003.F.Moll,M.Roca.InterconnectionNoiseinVLSICircuits.Kluwer,2004.

SyllabusofFirstSemesterOpenElectives

VL5161 MEMSandMicrosystemsL‐T‐P:3‐0‐0 Credit:3Sl.No. Modulenameandtopic No.ofclasses

1. ScalingLaws,WhyMEMS? 2

2.Microfabrication Techniques: Bulk micro machining, surface micromachiningandLIGAprocesses. 6

3.MEMS based inertial sensors: Accelerometer; piezoresistive andcapacitive.

6

4. MEMSbasedgyroandtiltsensors 25. MEMSbasedpressuresensor:(TypePressureMonitoringSystem) 2

6.

Electrostatic actuation: study of electrostatically actuated micro‐machined cantilever beam: Free naturalmode of vibration, resonanceanalysis, static voltage response, pull in and pull out phenomenon.Dynamicresponsetotimevaryingelectrostaticactuation.

4

7.RFMEMS:RFswitch,MEMSbasedinductorandcapacitors,MEMSbasedvaractorsandresonators.

6

8. OpticalMEMS:MEMSbasedmirrors,MEMSbasedopticalswitch. 29. MicrofluidicandBioMEMS:advantagesofMEMSbasedfluidicsystem. 1

10.MicropumpandMicrovalve,Micronozzleand thrusters,microneedle,microcantileverbasedbiosensors,labonachip 5

11.MEMS based interfacing electronics: variable gain instrumentationamplifierandwirelessintegratedmicrosensors 4


40

TextBooks

1. AnalysisanddesignprinciplesofMEMSdevicesbyM.‐H.Bao,2. MicrosystemDesignbyStephenD.Senturia,KluwerAcademicPublishers,2001.3. MicroandSmartsystembyG.K.Ananthasuresh,K.J.Vinoy,S.Gopalakrishnan,K.N.Bhat,

V.K.Aatre,Wiley,2012.4. FundamentalsofMicrofabricationtechniques,MarcMadou,CRCPress

VL5162 QuantumComputingL‐T‐P:3‐0‐0 Credit:3Sl.No.


1.

IntroductiontoQuantumComputation:Foundationsofquantumtheory.States, observables,measurement and unitary evolution.Quantum bits,Bloch sphererepresentation of a qubit, multiple qubits, Qubits versusclassicalbits,spin‐halfsystemsandphotonpolarisations.Pureandmixedstates,densitymatrices.

8

2.

Background Mathematics and Physics: Hilber space, Probabilities andmeasurements,entanglement,densityoperatorsand correlation,basicsofquantummechanics,Measurementsinbasesotherthancomputationalbasis, Extension to positive operator valued measures and super‐operators.Decoherence andmaster equations. Quantum entanglementand Bell's theorems. Introduction to classical information theory andgeneralisationtoquantuminformation.

8

3.

Quantum Circuits: single qubit gates, multiple qubit gates, design ofquantumcircuit,Reversible computation.Universalquantum logicgatesand circuits, reversible to quantum circuit mapping, Quantum Gatelibrary,Quantumcircuitdesignconstraints,Bennettembedding,NearestNeighbourproperty,LaunderEmbeddingConstraints.

8

4.

Quantum Algorithms: Classical computation on quantum computers.Relationship between quantum and classical complexity classes.Deutsch’s algorithm, Deutsch’s‐Jozsa algorithm, Shor factorization,Groversearch,Databasesearch,FFTandprimefactorization.

8

5.Noise and error correction: Graph states and codes, Quantum errorcorrection,Clifford +T group, fault‐tolerant computation. Physicalimplementationsofquantumcomputers.

8


40

TextBooks:1. Nielsen M. A., Quantum Computation and Quantum Information, Cambridge University

Press.2. PittengerA.O.,AnIntroductiontoQuantumComputingAlgorithms2000.3. RobertWille,RolfDrechsler‐TowardsaDesignFlowforReversibleLogic‐2010(Springer)Referencebooks:1. BenentiG.,CasatiG.andStriniG.,PrinciplesofQuantumComputationandInformation,Vol.I:BasicConcepts,VolII:BasicToolsandSpecialTopics,WorldScientific.

VL5163 LogicSynthesisandVerificationL‐T‐P:3‐0‐0 Credit:3

Sl.No.


1. OverviewoftheVLSIdesignflow. 1

2.Register‐Transfer Level (RTL) Behavioural, Dataflow and Structuralsynthesis. 2

3.HardwaremodelingprinciplesandhardwaredescriptionusingtheVHDLlanguage.

6

4. Hardware modeling principles and hardware description using theVeriloglanguage.

6

5.

2‐Level Logic Synthesis (Exact & Heuristic Two‐Level LogicMinimization): SOP& POS forms: Costs& Characteristics, Implicants,CubesandCovers,Quine‐McCluskeyMethod,MinimumCoverviaUnateCovering,Branch‐and‐BoundMethods,TheESPRESSOMinimizer

5

6.Sequential logic synthesis and state minimization using Finite stateMachine(FSM)encodingalgorithm.

3

7. Retimingofsequentialcircuitsynthesis. 38. Technologymapping. 39. Multi‐levelLogicsynthesis:SIS,ABC,BDD. 3

10.High‐level Synthesis (HLS): DAG scheduling, Register allocation andbinding,Datapathandcontrollerdesign.

3

11.Verification: Introduction to formal methods for verification, BDD,Introduction and construction, OBDD, Operations on OBDD, OBDD forsequentialcircuits.

5


40

TextBooks:

1.G.DeMicheli.Synthesisandoptimizationofdigitalcircuits,1stedition,1994.2.RudigerEbendt,GorschwinFey,RolfDrechsler.AdvancedBDDOptimization,2005.

ReferenceBooks:

1.S.Palnitkar,VerilogHDL:AGuidetoDigitalDesignandSynthesis,PrenticeHall,2ndedition,2003.2.DouglasL.Perry,VHDL:ProgrammingByExample4thEdition,TMH.3.D.D.Gajski,N.D.Dutt,A.C.‐H.WuandS.Y.‐L.Lin,High‐LevelSynthesis:IntroductiontoChipandSystemDesign,Springer,1stedition,1992.4.Mano,M.Morris,“DigitalDesign”,3rdEdition,PrenticeHallPTR,20015. ThomasH. Cormen, Clifford Stein,Ronald L.Rivest, Charles E. Leiserson, “Introduction toAlgorithms”,2ndEdition,McGraw‐HillHigherEducation,2001.6.GaryD.HachtelandFabioSomenzi,LogicSynthesisandVerificationAlgorithms.Springer.

SyllabusofSecondSemesterVL5201 VLSIPhysicalDesignL‐T‐P:3‐0‐0 Credit:3Sl.No.


1.Introduction:VLSIDesignCycle,PhysicalDesignCycle,DesignStyles,System Packaging Styles, Algorithmic complexity and optimizationproblems.

4

2.Partitioning: Problem formulation, Classification of Partitioningalgorithms,Kernighan‐LinAlgorithm,SimulatedAnnealing.

4

3.Floor planning: Problem formulation, Classification of floorplanning algorithms, Constraint based floor planning, Rectangulardualization.

4

4.Pin Assignment: Problem formulation, Classification of pinassignmentalgorithms,Generalandchannelpinassignments. 4

5.Placement: Problem formulation, Classification of placementalgorithms,Partitioningbasedplacementalgorithms.

4

6.

Global Routing and Detailed Routing: Global Routing: Problemformulation, Classification of global routing algorithms, Mazerouting algorithms; Detailed Routing: Problem formulation,Classificationofroutingalgorithms,Singlelayerroutingalgorithms.

4

7.

Physical Design Automation of FPGAs: FPGA Technologies, PhysicalDesign cycle for FPGAs, Partitioning, Routing: Routing Algorithm forthe Non‐Segmented model, Routing Algorithms for the SegmentedModel; Physical Design Automation of MCMs: Introduction to MCMTechnologies,MCMPhysicalDesignCycle.

6

8.Chip Input and Output Circuits: ESD Protection, Input Circuits,Output Circuits and noise, On‐chip clock Generation andDistribution,Latch‐upanditsprevention,packaging.

4

9. OnChipPDNDesign:NoiseandDecapPlacement. 210. LithographyAwareDesign:DesignforManufacturability. 4


40

TextBooks:

1. AlgorithmsforVLSIPhysicalDesignAutomationbyNaveedShervani,SpringerInternationalEdition,3rdEdition,2005.

2. VLSIPhysicalDesignAutomationTheoryandPracticebySadiqMSait,HabibYoussef,WorldScientific.

3. FPGAbasedsystemsdesign,WaneyWolf,Pearson,1sted,2005

ReferencesBooks:1. AlgorithmsforVLSIDesignAutomation,S.H.Gerez,1999,WileystudentEdition,JohnWiley

andSons(Asia)Pvt.Ltd.2. VLSIPhysicalDesignAutomationbySungKyuLim,SpringerInternationalEdition.3. AnIntroductiontoVLSIPhysicalDesign‐MajidSarrafzadeh,C.K.Wong –“McGrawHill

VL5202 ICTechnologyL‐T‐P:3‐0‐0Credit:3Sl.No.


1.Introduction:IntegratedCircuitsandPlanarProcess,ICFamilies,CMOSProcessFlow.

2

2.

Crystal Growth andWafer Fabrication: Crystal Structure, Defects inCrystals, Rawmaterials and Purification, Czochralski and Float‐ZoneCrystal Growth Methods, Wafer Preparation and Specification,MeasurementMethods.

6

3.Lithography: Light Sources, Wafer Exposure Systems, Photoresists,MaskEngineering,MeasurementofMaskFeaturesandDefects,ResistPatternsandEtchedFeatures.

4

4.

Oxidation: Basic Concepts, Wet and Dry methods, MeasurementMethods: Physical, Electrical and Optical, Models and Simulation:LinearandParabolic,GrowthKinetics,EffectofTemperature,PressureandCrystalOrientation.

2

5.Diffusion:DopantSolidSolubility,Fick’sLaw,Predepositionanddrive‐in, Gaussian Solution near a Surface, Measurement Methods: SIMS,SpreadingResistance,SheetResistance,andCapacitanceVoltage.

4

6.Ion Implantation: Role of Crystal Structure, High‐Energy Implants,UltralowEnergy Implants, IonBeamHeating,MeasurementMethods,Models:NuclearStopping,ElectronicStopping,Damageandannealing.

2

7.Deposition:ManufacturingMethods,CVD,APCVD,LPCVD,PECVD,PVD,Epitaxial Silicon,MBE,MOCVD,Polycrystalline Silicon,dielectricsandmetals,Measurementandmodels.

6

8. Etching:Wet,PlasmaEtching,EtchingofVariousFilms,MeasurementandModels.

4

9.

Back‐end technology: Contacts, Interconnects andVias, SilicideGatesand Source/Drain Regions, IMD Deposition and Planarization,Chemical‐Mechanical Polishing, Electro‐migration, Measurementmethods.

6

10. WaferProcessing,ProcessVariationandDFM. 3Totalnumberofclasses

39

TextBooks:1. SiliconVLSITechnologybyJamesPlummer,M.DealandP.Griffin,PrenticeHallElectronics

andVLSIseries,2009.2. SemiconductorDevices:BasicPrinciples,Wiley Student edition,Paperback,2007, Jasprit

Singh3. VLSITechnology,bySMSze,McGraw‐Hill,1988.

ReferenceBooks:1. The Science and Engineering ofMicroelectronics,by Stephen Campbell,Oxford UniversityPress,1996

2. VLSIFabricationPrinciplesbySorabKGhandhi,JohnWileyandSons,2ndEdition,1994.3. MicrochipFabrication,McGrawHill,Sixthedition,4. MicrochipFabricationbyPetervanZant,McGraw‐Hill,6thedition,2013.

VL5203 VLSITestingandVerificationL‐T‐P:3‐1‐0 Credit:4 Sl.No.


1.IntroductiontoVLSITesting:Roleoftesting,VerificationVsTesting,Levelsoftesting,Overheadsoftesting,Basictestingprinciple,IdealtestsVsRealTest.

5

2.

FaultModeling:Defects,ErrorsandFaults,FunctionalVsStructuralTesting,LevelsofFaultModels,Varioustypesoffaults,FaultCoverage,FaultEfficiency,Single StuckatFault(FaultEquivalence,EquivalenceofSingleStuck atFaults,FaultCollapsing,FaultDominance,Faultdropping,CheckpointTheorem),Softerrors.

5

3.LogicandFaultSimulation:Roleofsimulationindesignverification andtest evaluation,Truevalue/logic simulation,Algorithms for logicsimulation,Faultsimulation,Algorithmsforfaultsimulation.

5

4.

TestabilityAnalysis:ControllabilityandObservability,Measuresforcontrollabilityandobservabilityofcombinationalcircuits,Measuresforcontrollabilityandobservabilityofsequentialcircuits;TestGenerationforCombinationalCircuits;DefinitionofATPG,ATPGalgorithmsforcombinationalcircuits(Roth’sDalgorithm),andSomeapplications.

5

5.TestGenerationforSequentialCircuits:Classicalapproach,DFT(DesignforTestability)approach,TimeFrameExpansionMethod,ComplexityofATPG,andExampleofCyclicCircuit.

5

6.

DesignforTestability:DesignforTestability,Adhocdesign,Genericscanbaseddesign,Classicalscanbaseddesign,SystemlevelDFTapproaches.Built InSelf Test(BIST),BISTTechniques,BISTResponseCompaction,CircularBIST,OverviewofMemoryBIST.

6

7. RecenttrendsinTestingandDiagnosis:Machinelearningapproaches 4

8.

Designverificationtechniquesbasedonsimulation,analyticalandformalapproaches. Functional verification. Timing verification. Formalverification, Mixed signal design verification (System Verilog, VerilogAMS).

5

9. Basicsofequivalencecheckingandmodelchecking.Hardwareemulation. 5


45

TEXTBOOKS1. ARoadmap for formalpropertyverification,PallabDasGupta, Springer,1sted,2006withNPTELlectures.

2. Essentials of electronic testing for digital, memory and mixed signal VLSI circuits, M LBushnellandVDAgarwal,Springer,1sted,2002

REFERENCEBOOKS1. TestingandDiagnosisofVLSIandULSI,F. Lombardi, M.G. Sami, Springer, 1988.2.

SyllabusofSecondSemesterElectivesVL5221 LowPowerDesignL‐T‐P:3‐0‐0 Credit:3Sl.No.


1.Introduction:Lowpoweranditsapplications;Algorithmic,Architectural,GateandPhysicalLevelpowerreductionapproaches. 6

2.SourcesofPowerDissipation:DynamicPowerDissipation:ShortCircuitPower, Switching Power, Gliching Power; Static Power Dissipation,DegreesofFreedom.

8

3.SupplyVoltageScalingApproaches:Devicefeaturesizescaling,Multi‐VddCircuits, Voltage scaling using high‐level transformations, Dynamicvoltagescaling,PowerManagement.

8

4.Switched Capacitance Minimization Approaches: Hardware SoftwareTradeoffs, Bus Encoding Two’s complements verses Sign Magnitude,ClockGating.

8

5.

Leakage Power minimization Approaches: Variable‐threshold‐voltageCMOS (VTCMOS) approach, Multi‐threshold‐voltage CMOS (MTCMOS)approach, Power gating, Transistor stacking, Dual‐Vt assignmentapproach(DTCMOS).

6

6. LowPowerDesignExamples:Memory,Arithmeticcircuits. 4


40

TextBooks:1. LowPowerVLSICMOSCircuitDesign,byA.Bellamour,andM.I.Elmasry,SpringerScience

+BusinessMedia,2012.2. LowPowerDesignEssentials(IntegratedCircuitsandSystems),byJanRabaey,Springer,

2009.ReferenceBooks:1. PrinciplesofCMOSVLSIDesign,byNeilH.E.WesteandK.Eshraghian,AddisonWesley

(Indianreprint).2. CMOSDigitalIntegratedCircuits,bySungMoKang,YusufLeblebici,TataMcGrawHill.3. LowPowerDigitalCMOSDesign,byAnanthaP.ChandrakasanandRobertW.Brodersen,

KluwerAcademicPublishers,1995.4. LowPowerCMOSVLSIcircuitdesignbyKaushikRoy,SharatC.Prasad,JohnWilly&Sons,

2009.

VL5222MixedsignalcircuitdesignL‐T‐P:3‐0‐0Credit:3Sl.No.


1.Introduction:Signals,FiltersandTools:SinusoidalSignals,CombFilters,RepresentingSignals,SamplingandAliasing. 4

2.Filters:Continuous‐timefilters,Discrete‐timefilters,Analoganddiscrete‐timesignalprocessing,Analog integratedcontinuous‐timeanddiscrete‐time(switched‐capacitor)filters.

6

3.

DigitalConverters:BasicsofAnalogtodigitalconverters(ADC),BasicsofDigital to analog converters (DAC), DACs, Successive approximationADCs,Dual slopeADCs,High‐speedADCs: flashADC,pipelineADC andrelatedarchitectures,High‐resolutionADCs:delta‐sigmaconverters.

8

4.Phase locked loops: PhaseDetectorVoltage ControllerOscillator, LoopFilter:XORDPLL,PFDDPLL,SystemConcerns:ClockRecoveryFromNRZData,Delay‐LockedLoops.

6

5.

VLSILayout:ChipLayout:Regularity,StandardCellExamples,PowerandGround Considerations, Layout Steps by DeanMoriarty: Planning andStick Diagrams, Device Placement, Polish, Standard cells Versus Full‐CustomLayout.

8

6. Interconnects:Basics,application,RCdelayanditsmodel. 6


38

TextBooks

1. CMOSmixed‐signalcircuitdesignbyR.JacobBaker,WileyIndia,IEEEpress,2008.

ReferenceBooks:1. DesignofanalogCMOSintegratedcircuitsbyBehzadRazavi,McGraw‐Hill,2003.2. CMOScircuitdesign,layoutandsimulationbyR.JacobBaker,Revisedsecondedition,IEEE

press,2008.3. CMOSIntegratedADCsandDACsbyRudyV.dePlassche,Springer(Indianedition),2005.4. ElectronicFilterDesignHandbookbyArthurB.Williams,McGraw‐Hill,1981.5. DesignofanalogfiltersbyR.Schauman,Prentice‐Hall1990.

VL5223 RFICdesign.L‐T‐P:3‐0‐0Credit:3Sl.No. Modulenameandtopic No.ofclasses

1.Introduction RF and Wireless Technology: Complexity, design andapplications.ChoiceofTechnology. 2

2.Basic concepts in RF Design: Nonlinearly and Time Variance, inter‐symbol Interference, random processes and Noise. Definitions ofsensitivityanddynamicrange,conversionGainsandDistortion

4

3.

Analog and DigitalModulation for RF circuits: Comparison of varioustechniques forpower efficiency.Coherent andNon coherentdefection.Mobile RF Communication systems and basics of Multiple Accesstechniques. Receiver and Transmitter Architectures and Testingheterodyne, Homodyne, Image‐reject, Direct‐IF and sub‐sampledreceivers. Direct Conversion and two steps transmitters. BJT andMOSFET behavior at RF frequencies Modeling of the transistors andSPICEmodels.Noise performance and limitation of devices. IntegratedParasitic elements at high frequencies and their monolithicimplementation.

10

4.Basic blocks inRF systems and theirVLSI implementation: LowNoiseAmplifiers design in various technologies, Design of Mixers at GHzfrequencyrange.VariousMixers,theirworkingandimplementations.

6

5.Oscillators: Basic topologies VCO and definition of phase noise.Noise‐Power trade‐off. Resonator‐less VCO design. Quadrature and single‐sidebandgenerators.

6

6.Radio Frequency Synthesizers: PLLS, design of integer‐NRF frequencysynthesizerandfrequencydividers.

5

7.DesignissuesinintegratedRFfilters:SomediscussiononavailableCADtoolsforRFVLSIdesigns;Prerequisite:(AnalogVLSIDesign).

4

8.RFpoweramplifierandlinearizationtechniques:Classificationofpoweramplifiers,designofclassABandclassEamplifier,varioustechniquesoflinearizationincartesianmode.

3


40

TextBooks

1. RFMicroelectronicsbyBRazavi,Prentice‐HallPTR,1998.2. TheDesignofCMOSRadio‐FrequencyIntegratedCircuits,byTHLee,Press,1998.3. PowerAmplifierbyCripp.

ReferenceBooks:

1. CMOSCircuitDesign,LayoutandSimulation,byRJBaker,HWLi,andD.E.Boyce,Prentice‐Hall,1998.

2. MixedAnalogandDigitalVLSIDevicesandTechnologybyYPTsividis,McGrawHill,1996.

VL5224 SoCDesignandTestingL‐T‐P:3‐0‐0 Credit3Sl.No.


1.

IntroductiontotheSystemApproach:SystemArchitecture,Componentsof the system,Hardware& Software,ProcessorArchitectures,Memoryand Addressing. System level interconnection, An approach for SoCDesign,SystemArchitectureandComplexity.

6

2.Hardware/software co‐design: partitioning, real‐time scheduling,hardwareacceleration

4

3.

Memory Design for SoC ‐ Overview of SoC externalmemory, InternalMemory, Size, Scratchpads and Cache memory, Cache Organization,Cachedata,WritePolicies,Strategies for line replacementatmiss time,TypesofCache,Split–I,andD–Caches,MultilevelCaches,Virtualtorealtranslation ,SoCMemorySystem,ModelsofSimpleProcessor–memoryinteraction.

6

4.

Interconnect Customization and Configuration: Inter ConnectArchitectures, Bus: Basic Architectures, SoC Standard Buses , AnalyticBus Models, Using the Bus model, Effects of Bus transactions andcontentiontime.SoCCustomization.

6

5.Transaction‐Level Modeling (TLM), Electronic System‐Level (ESL)languages:SystemC. 5

6. SoCandIPintegration,verificationandtest. 6

7. Network on Chips: Introduction, Components,NOC Layers, Topologies,Routing.

4

8. 3DIC:Synthesis,Powermanagementandtestissues. 3


40

TextBooks

1. DesignofSystemonaChip:DevicesandComponents,RicardoReis,1stEdition,2004,Springer

2. SystemonChipVerification–MethodologiesandTechniques,PrakashRashinkar,PeterPatersonandLeenaSinghL,“2001,KluwerAcademicPublishers.

3. ComputerSystemDesignSystem‐on‐Chip,MichaelJ.FlynnandWayneLuk,WileyIndiaPvt.Ltd.

References

1. MultiprocessorSystems‐on‐Chips,A.JerrayaandW.Wolf,eds.,MorganKaufmann,20042. ARMSystemonChipArchitecture,SteveFurber,“2ndEdition,2000,AddisonWesley

Professional.3. NetworkonChip:ThenextgenerationSystemonChipintegration,SantanuKundu,

SantanuChattopadhyay,CRCPress,Year:2014

VL5225 EmergingTechnologiesL‐T‐P:3‐0‐0 Credit:3Sl.No.


1.

Microfluidicbiochips:IntroductiontoMicrofluidics,LabonChipdevices,Flow based and digital microfluidic biochips, Biochip actuationtechniques, Biochip application, Design Automation techniques forDMFBs, Chip level design for biochips, Paper based andMEDA basedbiochips

8

2.Optical circuits:Fundamentalsofoptical switchingand itsapplications,MZIand itsapplicationasanopticalswitch,reversibilityandreversiblecircuitusingMZI,opticallogicgates

8

3.

Memristors: Introduction toMemristor ‐Anoverview to theMemristortechnologyandnon‐VonNeumannarchitecture.Memristive‐Devices‐ Types of Memristor – RRAM, PCM, STTMRAM.UtilityofusingRRAMforin‐memorycomputationsComputationalmodels for RRAM‐ Introduction to VTEAMmodel and,Stanfordmemristor‐models.Logicdesigntechniquesusingmemristor‐IMPLY,MAGIC,MRL,MTLLogicsynthesismethodologiesinsideMemristive‐memory‐Introductiontologicsynthesistools–ABC,SIMPLEMAGIC.Future possibilities‐A huge possibility for energy efficient and,performanceefficientnon‐VonNeumannmachinesoffuture

7

4.

CNT/GNR:GrapheneBasics,IntroductiontoCarbonnanotube(CNT)andGraphene nanoribbobn, Single‐Wall (SW) and Multi‐Wall (MW) CNT,CNTbasedFETandinterconnect,Singlelayer(SL)andMultilayer(ML)GNR, GNR based FET and interconnect. Introduction to modellingtechniquesandperformanceanalysisofCNTandGNRbaseddeviceandinterconnectforhighspeedpowerawareVLSIdesign.

10

5.Reversible logic: fundamentalsof rveresible logicand gates,Reversiblelogicsynthesisanddesignofreversiblecircuits

7


40

TextBooks

1. DigitalMicrofluidicBiochips:DesignAutomationandOptimization,KrishnenduChakrabarty,TaoXu–CRCPress,2010

2. DigitalMicrofluidicBiochips:Synthesis,TestingandreconfigurableTechniques,KrishnenduChakrabarty,FeiSu–CRCPress/TaylorandFrancis,2007

3. CarbonNanotubeandGrapheneNanoribbonInterconnects,DebaprasadDas,HafizurRahaman,1/eCRCPress.

4. Memristornetworks,AndrewAdamtzky,LeonChua,WorldScientificPress5. TowardsaDesignFlowforReversibleLogic‐RobertWille,RolfDrechsler‐2010

(Springer)ReferenceBooks:1. MemristorsandMemristivesystems‐R.StanleyWilliams(auth.),RonaldTetzlaff(eds.)Publisher:Springer‐VerlagNewYork,Year:2014

SyllabusofSecondSemesterOpenElectives

VL5261 VLSIArchitectureforDSPL‐T‐P:3‐0‐0 Credit:3Sl.No.


1.Introduction:IntroductiontoDSPsystems,DSPapplicationdemandandscaled CMOS technologies, representation ofDSP algorithms,DFT andFFT.

3

2.Iteration bound: Introduction, data flow graph representations, loopboundanditerationbound,algorithmsforcomputingiterationbound.

4

3.Pipeliningandparallelprocessing:Introduction,pipeliningofFIRdigitalfilters, parallel processing, pipelining and parallel processing for lowpower.

5

4.Retiming: Introduction, properties, solving systems of inequalities,retimingtechniques.

6

5.Unfolding:Introduction,algorithmforunfolding,properties,criticalpath,unfoldingandretiming,applications.

6

6.Folding: Introduction, folding transformation, register minimizationtechniques,registerminimizationinfoldedarchitectures.

6

7.Systolic Architecture Design: Introduction, systolic array designmethodology, FIR systolic arrays, scheduling vector, matrixmultiplicationand2Dsystolicarraydesign.

4

8.Bit level arithmetic architectures: Introduction, parallelmultipliers, bitserialmultipliers, bit serial filter design and implementation, canonicsigneddigitarithmetic,distributedarithmetic.

4

9.

RedundantArithmetic:Introduction,Redundantnumberrepresentation,carry free radix‐2 additions and subtractions, hybrid radix‐4 addition,radix‐2 hybrid redundant multiplication architecture, data formatconversion.

4


42

TextBooks 1. VLSIdigitalsignalprocessingsystemsbyKKParhi,JohnWiley&Sons,1999.ReferenceBooks:1.DSPwithFPGAbyU.Meyer‐Baese,Springer,2004

VL5262 FPGAsystemdesignL‐T‐P:3‐0‐0 Credit:3Sl.No.


1.

Introduction: Different kinds of programmable logic devices: FieldProgrammable Gate Array (FPGA), Programmable Logic Device (PLD),FPGAmanufacturers(Xilinx,Altera,Actel,LatticeSemiconductor,Atmel).FPGAapplications.Adjoiningdevices.Instrumentsandsoftware.

10

2.

TheStructureofFPGA:FPGAgeneraldescription.DifferentkindsofFPGApackages.FPGAarchitecture.InternalhardmodulesofFPGA(CLB,BlockRAM,DCM), theirmeaningsandusage.Differentkindsof I/Omodules,theirusageandconfiguration.

10

3.

FPGA Design Flow: Architecture design. Project design using VerilogHardware Description Language (HDL). Defining testing methodologyandtestbenchdesign.RTLsimulation,synthesizing,implementation,gatelevel simulation of design. Reusing of internal hard modules duringdesignandimplementation.

10

4.Testing Methodology: Functional and gate level testing. SDF filedescriptionandusage.

5

5.FPGA Configuration: Different types of FPGA configuration files.GenerationofconfigurationfileanditsloadingintoFPGA.

5


40

Textbooks:1.ScottHauckandAndreDehon.ReconfigurableComputing:TheTheoryandPracticeofFPGA‐BasedComputation(SystemsonSiliconBook1)

ReferenceBooks:1.D.Amos,Au.Lesea,R.Richter."FPGA‐BasedPrototypingMethodologyManual",20112.D.Vega.FPGA133SuccessSecrets‐133MostAskedQuestionsonFPGA‐WhatYouNeedtoKnow.EmereoPublishing,2014

3.V.Sklyarov,L.Skliarova,A.Barkalov,L.Titarenko.SynthesisandOptimizationofFPGA‐BasedSystems.Springer;2014

4.P.ChuPong,“FPGAPrototypingByVerilogExamples”,XilinxSpartan,3rdversion,20085.High‐performanceASICPrototypingSystems(HAPS)Datasheets6.Spartan‐3A/3ANFPGAStarterKitBoardUserGuide,20107.PLD,FPGADatasheets.

vlsi syllabus 2019 final course structure and syllabus

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