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DETAILED SYLLABUS OF ELECTIVESGRAPHIC ERA UNIVERSITY DEHRADUN

Name of Department: - Electronics and Communication Engineering

1. Subject Code: Course Title:

2. Contact Hours: L: T: P:

3. Examination Duration (Hrs): Theory Practical

4. Relative Weight: CWS PRS MTE ETE PRE

5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Digital Design

9. Course Objectives:

To provide knowledge of asynchronous circuits and their performance analysis. After completion of the course the students will be able to design various control circuits and asynchronous systems.

10. Expected Outcome:

1. Basic understanding of handshaking and pipelining.2. Performance analysis and handshake circuit implementation.3. Designing of Speed-Independent control circuits.4. Understanding of High-level languages (Tangram and VHDL) and

tools for asynchronous design.5. Thorough knowledge of Balsa programming language.

Successful completion of this course will help the students to design various control circuits and asynchronous systems.

11. Details of the Course:-

Sl. No.

Contents Contact Hours

1 Fundamentals:Handshake protocols, Muller C-element, Muller pipeline, Circuit

implementation styles, theory. Static data-flow structures:

Pipelines and rings, Building blocks, examples

8

2 Performance:A quantitative view of performance, quantifying performance,

Dependency graphic analysis. Handshake circuit implementation:

Fork, join, and merge, Functional blocks, mutual exclusion,

arbitration and meta stability.

10

32

Asynchronous System Design

013

VDM 580

0

05025025

3

4

Major Elective

Autumn/Spring

3 Speed-Independent control circuits: Signal Transition graphs, Basic Synthesis Procedure,

Implementation using state-holding gates, Summary of the

synthesis Process, Design examples using Petrify. Advanced 4-

phase bundled data protocols and circuits: Channels and

protocols, Static type checking, More advanced latch control

circuits.

10

4 High-level languages and tools:Concurrency and message passing in CSP, Tangram program

examples, Tangram syntax-directed compilation, Martin’s

translation process, Using VHDL for Asynchronous Design.

8

5 An Introduction to Balsa:Basic concepts, Tool set and design flow, Ancillary Balsa Tools

The Balsa language: Data types, Control flow and commands,

Binary/Unary operators, Program structure. Building library

Components: Parameterized descriptions, Recursive definitions.

A simple DMA controller: Global Registers, Channel Registers,

DMA control structure.

6

Total 42

12. Suggested Books:

SL.No.

Name of Authors/Books/Publishers Year of Publication/Reprint

Text Books

1. Chris. J. Myers, Asynchronous Circuit Design, John Wiley &

Sons.

2001

2. Berkel, Handshake Circuits An Asynchronous architecture for

VLSI programming, Cambridge University Pres.

2004

Reference Books

1. Jens Sparso, Steve Furber, Principles of Asynchronous

Circuit Design, Kluver Academic.

2001

13. Mode of Evaluation Test / Quiz / Assignment / Mid Term Exam / End Term Exam / Lab Exam

33

GRAPHIC ERA UNIVERSITY DEHRADUNName of Department: Electronics and Communication Engineering





5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Digital Signal Processing


To acquaint the students with fundamentals of digital signal processing and various structures which are useful in digital signal processor implementation.


1. Comprehensive understanding of Digital Signal Processing.2. Thorough knowledge of Retiming and parallel processing.3. Depth understanding of algorithmic strength reduction in

filters and transforms.4. Knowledge of scaling and round off noise computation

processes.Successful completion of this course will act as foundation for Digital Signal Processor and high speed devices.


Sl. No.


1 Introduction:Linear System Theory- Convolution- Correlation - DFT- FFT-

Basic concepts in FIR Filters and IIR Filters- Filter Realizations.

Representation of DSP Algorithms-Block diagram-SFG-DFG.

8

2 Iteration Bound:Data-Flow Graph Representations, Loop Bound and Iteration

Bound, Algorithms for Computing Iteration Bound, Iteration Bound

of Multirate Data-Flow Graph. Pipelining and Parallel Processing:

Pipelining of FIR Digital Filters, Parallel Processing, Pipelining and

Parallel Processing for Low Power.

8

34

Digital Signal Processing Structures for VLSI

013

VDM 581

0

05025025

3

4

Autumn/Spring

Core

3 Retiming:Definitions-Properties and problems- Solving Systems of

Inequalities, Retiming techniques

Fast Convolution:Cook-Toom Algorithm, Winograd Algorithm, Iterated Convolution,

Cyclic Convolution, Design of Fast Convolution Algorithm by

Inspection.

8

4 Algorithmic Strength Reduction in Filters and Transforms:Parallel FIR filters, Discrete Cosine Transform and Inverse DCT,

Parallel architectures for Rank Order filters-Odd Even Merge sort

architecture, Rank Order filter architecture, Parallel Rank Order

filters-Running Order Merge Order Sorter, Low power Rank Order

filter.

Pipelined and Parallel Recursive Filters:Pipeline Interleaving in Digital Filters- Pipelining in 1st Order IIR

Digital Filters- Pipelining in Higher-order IIR Filters-Clustered Look

ahead and Stable Clustered Look ahead-Parallel Processing for

IIR Filters and Problems.

9

5 Scaling and Round off Noise:Scaling and Round off Noise- State Variable Description of Digital

Filters, Scaling and Round off Noise Computation, Round Off

Noise in pipelined IIR Filters, Computation Using State Variable

Description, Slow-Down, Retiming and Pipelining.

9

Total 42


SL.No.


Text Books

1. K. K. Parhi, VLSI Digital Signal Processing, John-Wiley. 1999

2. John G. Proakis, Dimitris G. Manolakis, Digital Signal

Processing, Prentice Hall of India.

1995

Reference Books

1. Richard J. Higgins, Digital signal processing in VLSI, 1990

35

Prentice Hall.


36

GRAPHIC ERA UNIVERSITY DEHRADUNName of Department: - Electronics and Communication Engineering





5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Digital VLSI Design, Analog VLSI Design, Biomedical Instrumentation.


To acquaint the students with the concept of the different types of sensing specially neurochemical and neuropotential.

Analyze CMOS circuits for biomedical devices. Apart from this, CMOS circuits for wireless medical application are

covered in this subject. Lastly, integrated circuits for neural applications are discussed.


1. Understanding of the design and various applications of neurochemical and neuropotential devices.

2. Understanding the technicalities involved in the design of CMOS circuits for implantable biomedical devices and wireless biomedical applications.

3. Understanding the fabrication process of micro needles and their interfacing with neural systems

4. Understanding the process of neurosignal acquisition and amplification, neurochemical signal recording and neurostimulation.

Successful completion of this course will enable the student to be able to develop CMOS circuits for biomedical applications.


Sl. No.


1 Introduction:Wireless Integrated Neurochemical and Neuropotential circuits:

Introduction, Neurochemical Sensing, Neuropotential Sensing, RF

Telemetry and Power Harvesting in implanted Devices, Multimodal

9

37

VLSI Circuits for Biomedical Applications

013

VDM 582

0

05025025

3

4

Autumn/Spring

Elective

Electrical and Chemical Sensing. Visual Cortical Neuroprosthesis: A

System Approach: Introduction, System Architecture, Prosthesis

Exterior Body Unit and Wireless Link, Body Implantable Unit, System

Prototype.

2 CMOS Circuits for Biomedical Implantable Devices:Introduction, Inductive Link to Deliver Power to Implants, High Data

Rate Transmission through Inductive Links, Energy and Bandwidth

Issues in Multi-Channel Bio-potential Recording. Towards Self –

Powered Sensors and Circuits for Biomedical Implants: Introduction,

Stress, Strain and fatigue Predication, In Vivo strain measurement and

motivation. Fundamental of Piezoelectric-Transduction and power

delivery, Sub-Microwatt Piezo-Powered VLSI circuits.

9

3 CMOS Circuits for Wireless Medical Application:Introduction, Spectrum Regulations for Medical use, Integrated receiver

and transmitter Architecture, Radio Architecture, System Budget, Low

Noise Amplifier, Mixer, Polyphase Filter, Power Amplifier, PLL. Error

Correcting Codes for In Vivo RF wireless Links.

8

4 Micro-Needles:Introduction, Fabrication Methods for Hollow out –of –plane

Microneedles, Application for Microneedles. Integrated Circuit for

Neural Interfacing: Introduction, nature of Neural signals, Neural Signal

Amplification.

8

5 Integrated Circuits for Neural Applications:Integrated Circuit for Neural Interfacing (Neurochemical Recording),

Integrated Circuit for Neural Interfacing (Neural Stimulation):

Introduction, Electrode Configuration and Tissue Volume Conductor,

Electrode- Electrolyte interface, Efficacy, Stimulus Generator,

Stimulation Front End Circuits.

8

Total 42


SL.No.


Text Books

1. Kris Iniewski, VLSI Circuit Design for Biomedical Application,

Artech House Publishers.

2008

38

2. D. A. Hodges, H. G. Jackson and R. A. Saleh, Analysis and

Design of Digital Integrated Circuits in Deep Submicron

Technology, 3rd Ed., Tata McGraw-Hill.

2005

Reference Books

1. Parag. K. Lala, Digital circuit testing and testability, Academic

Press.

1997

2. Ashok K. Sharma, Semiconductor memories technology,

testing and reliability, Prentice-Hall of India Private Limited,

New Delhi.

1997


39






5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Microwave Engineering


This course has been designed to understand the basic introduction of microwave and optoelectronics devices.

Besides this, concept of microwave integrated circuits and microwave tubes are covered.

Lastly, introduction to optoelectronic devices and display devices are discussed in this subject


1. Understanding high frequency devices.2. Understanding the fabrication processes of MIC.3. Understanding the generation of high frequency signal.4. Understanding various optoelectronics devices.5. Knowledge of display devices

Successful completion of this course will provide the understanding of high frequency circuit design, fabrication and challenges in it.


Sl. No.


1 Introduction:Microwave frequencies, microwave transistor, microwave field

effect transistor, tunnel diode, backward diode, and MIS tunnel

diode, Transferred electron devices-Gunn Diode. Avalanche

Transit Time Devices: IMPATT Diode, BARRITT Diode, DOVETT

10

40

Microwave and Optoelectronic Devices

013

VDM 583

0

05025025

3

4

Autumn/Spring

Minor Elective

Diode, and TRAPATT Diode.

2 Microwave Integrated Circuit: Introduction, Circuit Forms, Transmission lines for MICs, Lumped

Elements for MICs, Material for MICs: Substrate, Conductor,

dielectric and resistive Materials, Fabrication techniques, Typical

example of fabrication, Hybrid fabrication

10

3 Microwave Tubes:Klystron, Reflex Klystron and Magnetron, Traveling wave tubes,

microwave detection diodes, application of microwave.

8

4 Introduction of Optoelectronic Devices: Photovoltaic devices, Solar Radiation, PN-Homo junction solar

cells, Antireflection coatings, Ideal conversion efficiency, Spectral

response, I-V Characteristics, Temperature and radiation effects,

Heterojunction solar cells, Schottky barrier solar cell, Thin film and

amorphous silicon solar cell, Solar arrays.

8

5 Display Devices: Characterization of displays, drawbacks of cathode ray tube, Flat

panel display: Electroluminescence displays (Powder and thin

films), Plasma display, LED, LCD.

6

Total 42


SL.No.


Text Books

1. S. M. Sze, and K. K. Ng, Physics of Semiconductor Devices,

3rd Ed., Wiley-Interscience.

2006

2. J. Wilson & JFB Hawkers, Optoelectronics: An introduction,

PHI, New Delhi.

1995

Reference Books

1. S. Y. Liao, Microwave Devices and Circuits,3rd Ed., Pearson

Education.

1990


41






5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Semiconductor device modeling; organic and inorganic electronic materials, electronics devices and circuits,


• This subject covers concept of organic materials and device physics. It provides a thorough knowledge of organic materials used in different layers of organic thin film transistor (OTFT).

• It discusses OTFT working principle, various structures, electrical behavior and performance parameters extraction. Besides this, modeling of single gate (SG)-OTFT are discussed.

• Operating principle and electrical properties are discussed for the organic light emitting diodes (OLEDs) and solar cells.

Last unit of this course discusses the few application based on OTFTs.


On completion of this course, students will be able to1. Classify the organic and inorganic materials used as active

channel layer in TFTs. Moreover, able to differentiate small molecule, conducting and non-conducting polymers.

2. Explain the working principle of organic material based devices. Additionally, able to classify various OTFTs structures.

3. Do the modeling and extract the OTFT performance parameters.

4. Understand operating principle and explain the electrical behavior of the OLED and organic solar cells.

5. Knowledge of various applications of organic TFTs.

Successful completion of this course will help students to pursue their specialization/research in this emerging research area. Students will able to develop their own devices and utilized that devices in digital circuit design.

42

Organic Electronics Devices and Circuits

013

VDM 584

0

05025025

3

4

Autumn/Spring

Major Elective


Sl. No.


1 Organic Materials and Device Physics: Introduction; Organic Materials: Conducting Polymers and Small molecules, Organic Semiconductors: p-type and n-type semiconductors, Source, Drain and Gate Electrodes, Gate Dielectrics, Substrate; Concept of Charge Transport in Organic Semiconductors; Energy Band Diagram; Comparison between Organic and Inorganic Semiconductors including the Merits, Demerits and Limitations.

9

2 Organic Thin Film Transistors (OTFTs): Introduction; Operating Principle; Classification of Various OTFT Structures; Output and Transfer Characteristics; Performance Parameters; Extraction of Performance Parameters, Impact of Structural Parameters on Behavior of OTFT; Merits, Demerits and Limitations of Organic Devices; Effect of Self Assemble Monolayer (SAM); Different OTFT Models; Stability Issues, Future Scope.

8

3 Analysis and Modeling of Organic Devices: Various Defects and Effects in Organic Devices; Modeling of OTFT Structures; Concept of Contact Resistance: Origin of Contact Resistance, Contact Resistance Extraction, Analysis and Performance Parameters Comparison of OTFT structures; Single Gate (SG) and Dual Gate (DG) OTFT Performance Comparison.

8

4 Organic Light Emitting Diodes (OLEDs) and Organic Solar Cells:OLED: Introduction; Organic Materials for OLEDs; Classification of OLEDs, Operating Principle; Output and Transfer Characteristics; Analysis of OLED Performance: Optical, Electrical and Thermal properties, Merits and Demerits; Stability Issues; OLEDs as display Applications.Organic Solar Cell: Introduction; Materials for organic Solar Cells; Operating Principle; Characteristics, Applications and Future Scope.

7

5 OTFT Applications:Organic Digital Circuits: All p-Type, Hybrid Complementary Inverters, Fully Organic Complementary Inverter Circuits and Their Comparison; Logic Circuit Implementation. Organic Memory: Organic Static Random Access Memory (OSRAM) and other Important Organic Memory Designs.

10

Total 42

43


SL.No.

Name of Authors/Books/Publishers Year of Publication/

ReprintText Books

1. Hagen Klauk, Organic Electronics: Materials, Manufacturing and Applications, Wiley-VCH Verlag Gmbh & Co. KGaA, Germany.

2006

2. Klaus Mullen, Ullrich Scherf, Organic Light Emitting Devices: Synthesis, Properties and Applications, Wiley-VCH Verlag Gmbh & Co. KGaA, Germany.

2005

Reference Books1. Hagen Klauk, Organic Electronics II: More Materials and

Applications, Wiley-VCH Verlag Gmbh & Co. KGaA, Weinheim, Germany, 2012

2012

2. Flora Li, Arokia Nathan, Yiliang Wu, Beng S. Ong, Organic Thin Film Transistor Integration: A Hybrid Approach, Wiley-VCH, Germany; 1st Ed.

2011

3. Wolfgang Brutting, Physics of Organic Semiconductors, Wiley-VCH Verlag Gmbh & Co. KGaA, Germany.

2005

4. IEEE Transaction on Electronic Devices, Organic Electronics Devices and Circuits based Thesis.


44






5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite:Analog VLSI Design and Digital VLSI design.


To acquaint the students with the concept of analog and discrete signal analysis, the frequency response analysis for various filters.

Besides this, depth study of the analog to digital (ADC) and digital to analog conversion (DAC) methods.

Mixed signal layout, interconnects and data transmission fundamental are discussed in this syllabi.

Basic knowledge of PLL and DLL are covered in this subject. 10. Expected Outcome:

1. Comprehensive understanding of sampling theory and filters.2. Knowledge about ADC and DAC and their various methods and

techniques of conversion. 3. Familiar and knowledge of mixed signal design and different

components used in it.4. Understanding of mixed signal layout, interconnects and data

transmission process.5. Basic knowledge of PLL and DLL

Successful completion of this course will help students to analyze the performance of mixed signal circuits.


Sl. No.


1 Introduction to Mixed Signal Circuit Design:Analog and discrete-time signal processing, introduction to

8

45

Mixed Signal Circuit Design

013

VDM 585

0

05025025

3

4

Autumn/Spring

Major Elective

sampling theory, Analog continuous-time filters: passive and

active filters, Basics of analog discrete-time filters and Z-

transform, Switched-capacitor filters, Non-idealities in switched-

capacitor filters, Switched-capacitor filter architectures, Switched-

capacitor filter applications.

2 Analog to Digital Converters:Basics of data converters, Basics of Analog to digital converters

(ADC), Successive approximation ADCs, Dual slope ADCs, High-

speed ADCs: Flash ADC, pipeline ADC, Hybrid ADC structures

and related architectures, High-resolution ADCs: Delta-sigma

converters.

9

3 Digital to Analog Converters:Basics of Digital to analog converters (DAC), Classifications of

DAC and DAC conversion methods.

8

4 Mixed Signal Layout, Interconnects and Data Transmission:Basics of mixed-signal layout, Different parts of layout,

Interconnects, Classification of interconnect, data transmission,

Voltage-mode signaling, Current-mode signaling and data

transmission, Introduction to frequency synthesizers and

synchronization.

9

5 Phase Locked Loop (PLL) and Delay Locked Loop (DLL):Basics of PLL, Analog PLL, Digital PLL, Basics of delay locked

loops (DLLs) and Different types of DLL.

8

Total 42


SL.No.


Text Books

1. R. Jacob Baker, CMOS mixed-signal circuit design, Wiley India, IEEE Press (Reprint)

2008

2. R. Jacob Baker, CMOS circuit design, layout and simulation, by Revised second edition, IEEE press,

2008

Reference Books1. B. Razavi, Design of analog CMOS integrated circuits,

McGraw-Hill Edition2002

46







5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: VLSI design and technology


To provide thorough knowledge of various fabrication steps of MEMS design, Micro Sensors and their applications.


1. Comprehensive understanding of MEMS.2. Thorough knowledge of various fabrication steps of MEMS and

Micro Sensors. Successful completion of this course will act as foundation for MEMS Circuits and Micro Sensors fabrication

11. Details of the Course:

Sl. No.


1 Microfabrication and Micromachining: Integrated Circuit Processes, Bulk Micromachining , Isotropic

Etching and Anisotropic Etching, Wafer Bonding, High Aspect-Ratio

Processes (LIGA)

10

2 Physical Micro-Sensors: Classification of physical sensors, Integrated, Intelligent, or Smart

sensors, Sensor Principles and Examples : Thermal sensors,

8

47

Micro-Sensors and MEMSVDM 586

01 3

0

5025025 0

3

4

Autumn/Spring

Major Elective

Electrical Sensors, Mechanical Sensors, Chemical and Biosensors

3 Microactuators: Electromagnetic and Thermal microactuation, Mechanical design of

microactuators, Microactuator examples, microvalves, micropumps,

micromotors Microactuator systems, Success Stories, Ink-Jet printer

heads, Micro-mirror TV Projector.

8

4 Surface Micromachining: One or two sacrificial layer processes, Surface micromachining

requirements, Polysilicon surface micromachining, Other compatible

materials, Silicon Dioxide, Silicon Nitride, Piezoelectric materials,

Surface Micromachined Systems: Success Stories, Micromotors,

Gear trains, Mechanisms.

8

5 Application Areas: All-mechanical miniature devices, 3-D electromagnetic actuators

and sensors, RF/Electronics devices, Optical/Photonic devices,

Medical devices e.g. DNA-chip, micro-arrays. MEMS for RF

Applications: Need for RF MEMS components in communications,

space and defense applications.

8

Total 42


SL.No.


Text Books1. Ristic L ,Sensor Technology and Devices, Artech House,

London1994

2. Sze S.M., Semiconductor Sensors, John Wiley, New York. 1994

Reference Books1. Gabriel M. Rebeiz, RF MEMS: Theory, Design, and

Technology, Wiley 2003

2. Marc Madou, Fundamentals of Microfabrication, CRC Press 1997


48






5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Digital communication


To determine the modulation techniques for RF circuits, VLSI Implementation of RF systems and acquainted with the RF Synthesizer. It is also designed to facilitate the student with knowledge of different types of oscillators, power amplifiers and frequency synthesizers.


1. Students must be able to explain concepts of RF design and Communication.

2. Must be able to acknowledge various multiple access techniques and wireless standards.

3. Should have good understanding of different types of oscillators.

4. Must have ability to explain Radio Frequency synthesizers.


Sl. No.


1 IntroductionIntroduction to RF and wireless technology: Complexity, design

8

49

RF Microelectronics Chip Design

013

VDM 587

0

05025025

3

4

Autumn/Spring

Minor Elective

and applications, choice of technology. Basic concepts in RF

design: Nonlinearly and time variance, intersymbol interference,

random processes and noise.

2 Modulation techniques for RF circuits Definition of sensitivity, dynamic range, conversion gains and

distortion. Analog and digital modulation for RF circuits:

Comparison of various techniques for power efficiency. Coherent

and non-coherent detection.

10

3 Detectors and transistor modelingMobile RF communication systems and basics of multiple access

techniques. Receiver and transmitter architectures and testing

heterodyne, homodyne, image-reject, direct-IF and sub-sampled

receivers. Direct conversion and two steps transmitters. BJT and

MOSFET behavior at RF frequencies, modeling of the transistors

and SPICE models.

8

4 Mixers and oscillatorsNoise performance and limitation of devices. Integrated parasitic

elements at high frequencies and their monolithic implementation.

Basic blocks in RF systems and their VLSI implementation: Low

Noise Amplifiers design in various technologies, Design of mixers

at GHz frequency range. Various mixers, their working and

implementations, Oscillators: Basic topologies VCO and definition

of phase noise. Noise-Power trade-off. Resonator less VCO

design. Quadrature and single-sideband generators.

8

5 RF SynthesizerRadio frequency synthesizes: PLLS, various RF synthesizer

architectures and frequency dividers, Power Amplifiers design.

Linearization techniques, Design issues in integrated RF filters.

Some discussion on available CAD tools for RF VLSI designs.

8

Total 42


SL.No.


Text Books

50

1. B. Razavi, RF Microelectronics, Prentice-Hall PTR. 1998

2. T. H. Lee, The Design of CMOS Radio-Frequency Integrated Circuits, Cambridge University Press.

1998

Reference Books

1. R. Jacob Baker, H. W. Li, and D.E. Boyce, CMOS circuit design, Layout and simulation, Prentice-Hall of India

1998

2. Y. P. Tsividis, Mixed analog and digital VLSI devices and technology, McGraw Hill, 1996.

1996


51






5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: VLSI Technology, Digital Design Fundamentals


To provide thorough knowledge of the process flow involved in the Development of a SOC, verification and testing requirements of SOCs and techniques involved in implementing test benches during the various stages of the SOC development process.


1. Comprehensive understanding of Digital Test Architectures and Fault-Tolerant Design.

2. Through knowledge of System/Network-on-Chip Test Architectures and SIP Test architectures.

3. Understanding of Delay Testing and Low-Power Testing.4. Understanding of DFM, DFY and DFD.5. Fundamental knowledge of Software based Testing and FPGA

Testing.

Successful completion of this course will help the individual to understand and test the complex VLSI circuit and systems. This will also help the students to make their career in the domain of VLSI Testing, SoC Design and Testing at a larger extent.

52

System-On-Chip Design and TestingVDM 588

01 3

0

5025025 0

3

4

Autumn/Spring

Major Elective


Sl. No.


1 Introduction: Importance of System-on-Chip Testing, Basics of SOC Testing, Basics of Memory Testing, SOC Design Examples.

Digital Test Architectures: Scan Design, Logic Built-In Self-test, Test Compression, Random-Access Scan Design.

Fault-Tolerant Design: Fundamentals of Fault Tolerance, Fundamentals of Coding Theory, Fault Tolerance Schemes

8

2 System/Network-on-Chip Test Architectures: System-on-Chip (SOC) Testing, Network-on-Chip (NOC) Testing, Design and Test Practice: Case Studies.

SIP Test Architectures: Introduction, Bare Die, Functional System Test, Test of Embedded Components.

Delay Testing: Delay Test Application, Delay Fault Models, Delay Test Sensitization, Delay Fault, Delay Fault Test Generation, Pseudo-Functional Testing to Avoid Over-Testing

8

3 Low-Power Testing: Introduction, Energy and Power Modeling, Test Power Issues, Low-Power Scan Testing, Low-Power Built-In Self-Test, Low-Power Test Data Compression, Low-Power RAM Testing.

Coping with Physical Failures, Soft Errors, and Reliability Issues:

Signal Integrity, Manufacturing Defects, Process Variations, and Reliability, Soft Errors, Defect and Error Tolerance.

8

4 Design for Manufacturability and Yield: Introduction, Yield, Components of Yield, Photolithography, DFM and DFY, Variability, Metrics for DFX.

Design for Debug and Diagnosis: Introduction, Logic Design for Debug and Diagnosis (DFD) Structures, Probing Technologies, Circuit Editing, Physical DFD Structures, Diagnosis and Debug Process.

8

5 Software-Based Self-Testing: Introduction, Software-Based Self-Testing Paradigm, Processor Functional Fault Self-Testing, Processor Structural Fault Self-Testing, Processor Self-Diagnosis, Testing Global Interconnect,

10

53

Testing Nonprogrammable Cores, Instruction-Level DFT, DSP-Based Analog/Mixed-Signal Component Testing.

Field Programmable Gate Array Testing: Overview of FPGAs, Testing Approaches, BIST of Programmable Resources, Embedded Processor-Based Testing

Total 42


SL.No.


Text Books

1. Laung-Terng Wang, Charles E. Stroud, Nur A. Touba, System-On-Chip Test Architectures (Nanometer Design For Testability), Elsevier

2010

Reference Books

2. Erik Larsson, Introduction to Advanced system- on- chip test design and optimization, Springer.

2005


54




3. Examination Duration (Hrs): Theory Practical:


5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Basic knowledge of Microprocessor and Digital Signal Processing.


To acquaint the students with various architecture of Digital Signal Processors and their utilization in scientific applications.


1. Knowledge about the advantages of the DSP over analog.2. Knowledge about the DSP processors and memory structures

in DSP processors.3. Knowledge about the VLIW architecture and pipelining found

in DSP processors.4. Basic details of TMS320C5X Processors

Successful completion of this course will act as foundation for Microprocessor, Microcontroller and VLSI circuits courses.


Sl. No.


1 Overview: Overview of Digital Signal Processing, Advantages of DSP over analog systems, salient features and characteristics of DSP systems, applications of DSP systems.

8

2 Introduction to DSP Processor: Common features of DSP processors, numeric representations in DSP processor, data path of a DSP processor, memory structures in DSP processors

8

3 VLIW Architecture: Special addressing modes in DSP processors, pipelining concepts, on-chip peripherals found in DSP processors.

8

4 Architecture of TMS320C5X Processors: Assembly Instructions- Addressing Modes- Pipelining and

10

55

Digital Signal Processor Architectures and ApplicationsVDM 589

1 3

0

6030010 0

3

4

Autumn/Spring

Minor Elective

0

Peripherals, Architecture of TMS320C3X- Instruction Set- Addressing Modes- Data Formats- Floating Point Operation- Pipelining and Peripherals

5 Introduction to Black Fin Processor: Architecture overview-processor core-addressing modes-instruction sets-Targeted applications, VLIW Architecture- SHARC- SIMD- MIMD Architectures.

Application: Adaptive filters-DSP based biometry receiver-speech processing-position control system for hard disk drive-DSP based power meter.

8

Total 42


SL.No.


Text Books

1. B. Venkatramani and M. Baskar, Digital Signal Processor, McGraw Hill

2000

2. Avatar Singh and S. Srinivasan, "Digital signal processing", Thomson books

2004

Reference Books

1. K.K Parhi, VLSI DSP Systems, John Wiley 1999


56






5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Soft computing and VLSI Design


To acquaint the students with different Modeling styles, their performance analysis,

Various optimization techniques and their applications in VLSI design.


1. Comprehensive understanding of modeling techniques based on

incorporating empirical parameters.

2. Statistical analysis of performance parameters and yield estimation.

3. Determination of fitting approximations and Algorithms.

4. Analysis of GA Routing Procedures and Power Estimation.

Knowledge of modeling and estimation will enhance the research

perspectives specifically in the microelectronics domain.


Sl. No.


1 Statistical Modeling: Modeling sources of variations, Monte Carlo techniques, Process variation modeling- Pelgrom’s model, Principal component based modeling, Quad tree based modeling, Performance modeling-Response surface methodology, delay modeling, interconnect delay models

8

2 Statistical Performance, Power and Yield Analysis:Statistical timing analysis, parameter space techniques, Bayesian networks Leakage models, High level statistical analysis, Gate level statistical analysis, dynamic power, leakage power, temperature and power supply variations, High level yield estimation and gate level yield estimation

8

3 Convex Optimization: 9

57

Optimization Techniques in VLSI DesignVDM 590

01 3

0

5025025 0

3

4

Autumn/Spring

Major Elective

Convex sets, convex functions, geometric programming, trade-off and sensitivity analysis, Generalized geometric programming, geometric programming applied to digital circuit gate sizing, Floor planning, wire sizing, Approximation and fitting- Monomial fitting, Maxmonomial fitting, Posynomial fitting.

4 Genetic Algorithm:Introduction, GA Technology-Steady State Algorithm-Fitness Scaling-Inversion GA for VLSI Design, Layout and Test automation- partitioning-automatic placement, routing technology, Mapping for FPGA- Automatic test generation- Partitioning algorithm Taxonomy-Multiway Partitioning Hybrid genetic-encoding-local improvement-WDFR Comparison of Cas-Standard cell placement-GASP algorithm-unified algorithm.

9

5 GA Routing Procedures and Power Estimation:Global routing-FPGA technology mapping-circuit generation-test generation in a GA frame work-test generation procedures. Power estimation-application of GA-Standard cell placement-GA for ATG-problem encoding- fitness function-GA vs Conventional algorithm. Hardware/software co-designs.

8

Total 42


SL.No.


Text Books

1. Ashish Srivastava, Dennis Sylvester, David Blaauwi, Statistical Analysis and Optimization for VLSI:Timing and Power, Springer

2005

2 Kalyanmoy Dev, Optimization for Engineering Design: Algorithms and Examples, PHI Learning

2010

Reference Books

1. Pinaki Mazumder, E.Mrudnick, Genetic Algorithm for VLSI Design,Layout and test Automation, Prentice Hall.

1998


58






5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Digital VLSI Design9. Course Objectives:

To provide thorough knowledge of VLSI physical design algorithms for placement, routing and floor planning and use of Design Automation Tools.


1. Thorough knowledge of VLSI Design Automation Tools.2. Detailed study of different Layout Compaction, Placement and

Routing algorithms. 3. In-depth knowledge of floor planning and routing algorithms.4. Gate and switch level Simulation and Logic Synthesis5. Thorough knowledge of High-Level synthesis.

Successful completion of this course will help students to optimize their design’s layout in terms of floorplaning, placement and routing.

11. Details of the Course:-Sl. No.


1 VLSI Design Automation Tools:Design cycle, design styles, algorithms and system design,

Structural and logic design, Transistor level design, Layout

design, Verification methods, Design management tools.

10

2 Layout Compaction, Placement and Routing:Design rules, symbolic layout, Applications of compaction,

Formulation methods, Algorithms for constrained graph

compaction, Circuit representation, Wire length estimation,

Placement algorithms, Partitioning algorithms.

8

3 Floor Planning and Routing: Floor planning concepts, Shape functions and floor planning,

Sizing, Local routing, Area routing, Channel routing, global routing

8

59

VLSI Physical Design Automation

013

VDM 591

0

05025025

3

4

Autumn/Spring

Major Elective

and its algorithms.

4 Simulation and Logic Synthesis: Gate level and switch level modeling and simulation.

Introduction to combinational logic synthesis, ROBDD principles,

implementation, construction and manipulation, Logic synthesis.

8

5 High-Level Synthesis:Hardware model for high level synthesis, internal representation of

input algorithms, Allocation, assignment and scheduling,

Scheduling algorithms. Aspects of assignment.

8

Total 42


SL.No.


Text Books1. S. H. Gerez, Algorithms for VLSI Design Automation, John

Wiley.1998

2. N. A. Sherwani, Algorithms for VLSI Physical Design Automation, (3/e), Kluwer.

1999

Reference Books1. M. Sait, H. Youssef, VLSI Physical Design Automation,

World scientific. 1999

2. M. Sarrafzadeh, Introduction to VLSI Physical Design, McGraw Hill (IE).

1996


60






5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Basic Microprocessor, C Programming, Assembly Programming


To provide an understanding of the different processor and controller architectures along with the Hardware and Software development environments for embedded systems.


1. Understanding of the concepts, technologies and design challenges involved in embedded systems development.

2. Understanding of the ecosystem for embedded system development, viz. the processors, controllers, languages and software development environments.

3. Interfacing of memory and peripherals with the processing unit in an embedded system.

4. Ability and understanding of the process to develop hardware and software for an embedded application.

Successful completion of this course will allow the student to make appropriate choices during the development of hardware and software for an embedded application.


Sl. No.


1 Introduction: Examples of Embedded Systems, Concepts of Embedded Systems Design, Design challenges, Processor technology, IC technology, Design technology, Custom single purpose processor hardware.

General Purpose Processor:Introduction, basic architecture, operation, super-scalar and VLSIIW architecture, application specific instruction set processors (ASIPS), microcontrollers, digital signal processors, selecting a microprocessor.Architecture Examples and Comparison:8051, PIC, ARM, AVR

10

61

Embedded System

013

VDM 592

0

05025025

3

4

Autumn /Spring

Elective

2 Memory Subsystem:Introduction, Memory write ability, Storage performance, Tradeoffs, Common memory types Memory hierarchy and cache, Multi level caches, TLBsAVR Microcontroller: Architecture and Programming in assembly and C Interfacing Analog and digital blocks: Analog-to-Digital Converters (ADCs), Digital to Analog Converters (DACs), Communication basics and basic protocol concepts, Microprocessor Interfacing: I/O addressing, Port and Bus based, I/O, Memory mapped I/O, Standard I/O interrupts, Direct Memory Access(DMA), Advanced communication principles parallel, serial and wireless, Bus Structures: (PC-104, I2C), Interfacing Protocols (USB, IrDA).

10

3 Peripheral Devices and Interfacing:Buffers and latches, Crystal, Reset circuit, Chip select logic circuit, timers and counters and watch dog timers, Universal asynchronous receiver, transmitter (UART), Pulse width modulators, LCD controllers, Keypad controllers. Design tradeoffs due to thermal considerations, Power Management.

8

4 Embedded software development environments: Real time operating systems,

Kernel architecture: Hardware, Task/process control subsystem, Device drivers, File subsystem, System Calls, Embedded operating systems,

Task scheduling in embedded systems: Task scheduler, first in first out, shortest job first, round robin, priority based scheduling,

Context switch and Task Synchronization: Mutex, Semaphore, Timers, Types of Embedded Operating Systems,

Programming Languages: Assembly Languages, High level languages. Concurrent Programming, Real Time Scheduling and I/O Management, RTOS examples.

8

5 Development for Embedded Systems: Embedded system development process: Determine the requirements, Design the system architecture, Choose the operating system, Choose the processor, Choose the development platform, Choose the programming language, Coding issues, Code optimization, Efficient input/output, Testing and Debugging, Verification of software on the host system, Verification of software on the embedded system. Networked Embedded Systems, Special Networking Protocols (CAN, Bluetooth). Applications.

8

62

Total 42


SL. No. Name of Authors/Books/Publishers Year of Publication/Reprint

Text Books

1. Frank Vahid /Tony Givargis, Embedded System Design- A unified Hardware/software introduction, John Wiley & Sons.

2002

2. David E Simon,An embedded software primer, Pearson education Asia.

2001

Reference Books

1. Dasgupta, S., Computer Architecture: A Modern Synthesis, vol. 2; Advanced Topics, John Wiley.

1989


63






5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Microprocessor, Computer Architecture


To acquaint the students with fundamentals and advanced concepts involved in modern processor design.


1. Understanding of ALU, Hardware Control Unit and Micro programmed Control Unit Design.

2. Design of a simple processor using VHDL/ Verilog. 3. Understanding the concepts and issues involved in adding

parallelism, superscalar execution and other advanced techniques to processor architecture and design.

4. Understanding of the architectures of PowerPC 620, Intel P6 and an overview of superscalar architectures.

After this course the student will be able to design a processor and appreciate the issues involved in adding parallelism and superscalar execution to the processor design.


Sl. No.


1 Introduction:Computer Architecture Fundamentals, Basic computer organization and design, Programming the basic computer, Micro programmed control, Central Processing Unit. VHDL/ Verilog based design of a simple processor.

8

2 Parallelism in Processor Design:The Evolution of Microprocessors, Instruction Set Processor Design, Principles of Processor Performance, Instruction Level Parallel Processing, Pipelined Processors, Memory and I/O Systems.

10

3 Superscalar Organization and Techniques:Limits of Scalar Pipelines, From Scalar to Superscalar Pipelines,

8

64

Advanced Processor Design

013

VDM 593

0

05025025

3

4

Autumn /Spring

Elective

Superscalar Pipeline Overview, Superscalar Instruction Flow Techniques, Superscalar Register Data Flow Techniques, Superscalar Memory Data Flow Techniques.

4 Advance Processor Architectures: Power PC 620, Intel P6 Micro architecture, Survey of Superscalar Architectures.

8

5 Advanced Processing Techniques:Advanced Instruction Flow Techniques, Advanced Register Data Flow Techniques, Executing Multiple Threads.

8

Total 42

12. Suggested Books:SL.No.


Text Books

1. M. Morris Mano, “Computer System Architecture”, Pearson, Third Edition.

2007

2. Shen, Lipasti, "Modern Processor Design: Fundamentals of Superscalar Processors", McGraw Hill, First Edition.

2013

Reference Books

1. Hennesy & Patterson, "Computer Architecture: A Quantitative Approach", Elsevier, Fifth Edition

2012

2. Patterson & Hennessy, "Computer Organization and Design -- The Hardware/Software Interface", Elsevier, Fifth Edition.

2014


65






5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Antenna and Wave propagation


To acquaint the students with the Interconnection in VLSI, cross talks in VLSI interconnections and power consideration of various circuits. Also the aim of this course is to provide knowledge about and practical experience in reduction and identification of signal integrity problems related to integrated circuits, and power distribution networks.


1. Students must be able to explain fundamentals and importance of signal integrity.

2. Students must be able to analyze and minimize cross talk in unbounded conductive media.

3. Should be able toF analysis of transmission lines and termination.

4. Able to interpret signal integrity issues due to non-ideal interconnects and buffers, timing, clock distributions and power distribution network fluctuation.


Sl. No.


1 Signal Propagation on Transmission Lines: Transmission line equations, wave solution, wave vs. circuits, initial wave, delay time, Characteristic impedance , wave propagation, reflection, and bounce diagrams Reactive terminations – L, C , static field maps of micro strip and strip line cross-sections, per unit length parameters, PCB layer stackups and layer/Cu thicknesses, cross-sectional analysis tools, Zo and Td equations for microstrip and Stripline Reflection and terminations for logic gates, fan-out, logic switching , input impedance into a transmission-line section, reflection coefficient, skin-effect, dispersion.

8

2 Multi-Conductor Transmission Lines and Cross Talk: Multi-conductor transmission-lines, coupling physics, per unit

9

66

Signal Integrity for High Speed Circuits

013

VDM 594

0

05025025

3

4

Autumn/Spring

Major Elective

length parameters, Near and far-end crosstalk, minimizing cross-talk (stripline and microstrip) Differential signaling, termination, balanced circuits ,S-parameters, Lossy and Lossles models.

3 Non-Ideal Effects: Non-Ideal Signal Return Paths – Gaps, Bga Fields, Via Transitions , Parasitic Inductance And Capacitance , Transmission Line Losses – Rs, Tanδ, Routing Parasitic, Common-Mode Current, Differential-Mode Current , Connectors.

9

4 Power Considerations and System Design: Ssn/Sso , Dc Power Bus Design , Layer Stack Up, Smt Decoupling ,, Logic Families, Power Consumption, And System Power Delivery , Logic Families And Speed Package Types And Parasitic ,Spice, Ibis Models ,Bit Streams, Prbs And Filtering Functions Of Link-Path Components , Eye Diagrams , Jitter , Inter-Symbol Interference Bit-Error Rate ,Timing Analysis.

8

5 Clock Distribution and Clock Oscillators: Timing margin, Clock skew, low impedance drivers, terminations, Delay Adjustments, canceling parasitic capacitance, Clock jitter.

8

Total 4212. Suggested Books:

SL.No.


Text Books

1. H. W. Johnson and M. Graham, High-Speed Digital Design: A Handbook of Black Magic, Prentice Hall.

1993

2. Douglas Brooks, Signal Integrity Issues and Printed Circuit Board Design, Prentice Hall.

2003

Reference Books

1. S. Hall, G. Hall, and J. McCall, High-Speed Digital System Design: A Handbook of Interconnect Theory and Design Practices, Wiley.

2000

2. Eric Bogatin , Signal Integrity – Simplified , Prentice Hall. 2003


67






5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Computer Architecture


To acquaint the students with various ideas and different techniques used to improve performance in modern computational systems and a quantitative understanding of the design and practical tradeoffs involved in the development of computer architecture. To familiarize students with the various hardware and software techniques used in parallel processing.


1. Understand the interaction between the hardware and software parts of a parallel computing system and evaluate performance criteria.

2. Be able to use internal or external parallelism using networks or shared memory systems to build more powerful computing architectures.

3. Be able to analyze the tradeoffs involved in choosing between various Multiprocessor Interconnection Networks.

4. Understand some of the popular techniques of implementing parallel software.

Successful completion of this course will facilitate in the design and analysis of more powerful computing architectures using parallel computing structures.


Sl. No.


1 Introduction to Advanced Computer Architecture and Parallel Processing: Four Decades of Computing, Flynn’s Taxonomy of Computer Architecture, SIMD Architecture, MIMD Architecture,Interconnection Networks.

Multiprocessor Interconnection Networks:

8

68

Advanced Computer Architecture and Parallel Processing

013

VDM 595

0

05025025

3

4

Autumn/Spring

Elective

Interconnection Networks Taxonomy, Bus-Based Dynamic Interconnection Networks, Switch-Based Interconnection Networks, Static Interconnection Networks, Analysis and Performance Metrics Implementation.

2 Performance Analysis of Multiprocessor Architecture: Computational Models, an Argument for Parallel Architectures, Interconnection Networks Performance Issues, Scalability of Parallel Architectures, Benchmark Performance.

Shared Memory Architecture: Classification of Shared Memory Systems, Bus-Based Symmetric Multiprocessors, Basic Cache Coherency Methods, Snooping Protocols, Directory Based Protocols, Shared Memory Programming.

9

3 Message Passing Architecture: Introduction to Message Passing, Routing in Message Passing Networks, Switching Mechanisms in Message Passing, Message Passing Programming Models, Processor Support for Message Passing, Example Message Passing Architectures, Message Passing Versus Shared Memory Architectures.

Abstract Models: PRAM Model and Its Variations, Simulating Multiple Accesses on an EREW PRAM, Analysis of Parallel Algorithms, Computing Sum and All Sums, Matrix Multiplication, Sorting, Message Passing Model, Leader Election Problem, Leader Election in Synchronous Rings

8

4 Network Computing: Computer Networks Basics, Client/Server Systems, Clusters, Interconnection Networks, Cluster Examples, Grid Computing.

Parallel Programming in the Parallel Virtual Machine: PVM Environment and Application Structure, Task Creation, Task Groups, Communication among tasks, Task Synchronization, Reduction Operations.

8

5 Message Passing Interface (MPI): Communicators, Virtual Topologies, Task Communication, Synchronization, Collective Operations, Task Creation, One-Sided Communication.

Scheduling and Task Allocation: Scheduling Problem, Scheduling DAGs without Considering Communication, Communication Models, Scheduling DAGs with Communication, The NP-Completeness of the Scheduling Problem, Heuristic Algorithms, Task Allocation, Scheduling in Heterogeneous Environments.

9

Total 42

69


SL.No.


Text Books

1. John L. Hennessy and David A. Patterson, Computer Architecture: A Quantitative Approach,5th Ed., Elsevier.

2011

2. Hesham El-Rewini and Mostafa Abd-El-Barr, Advanced Computer Architecture and Parallel Processing, John Wiley & Sons.

2005

Reference Books

1. Dasgupta, S., Computer Architecture: A Modern Synthesis, vol. 2; Advanced Topics, John Wiley.

1989

2. Decegama, A., The Technology of Parallel Processing:Parallel Processing Architectures and VLSI Hardware, Vol. 1, Prentice-Hall.

1989


70






5. Credits:

6. Semester:

7. Subject Area:

8. Pre-requisite: Digital Electronics


To acquaint the students with the various aspects of memory architecture, memory cell design, fault modeling and testing. The course covers different architecture and technology of SRAMs and DRAMs followed by memory classification in detail. Memory Fault modeling and testing is also included. At last it also covers Reliability Issues and Radiation hardness in memory.


1. In-depth study of SRAMs and DRAMs including their cell structure, architecture and technologies.

2. Detailed memory classification.3. Memory Fault modeling and testing. 4. RAM Reliability Issues and Radiation hardening.5. Thorough knowledge of different RAM technologies and

their testing.

After Successful completion of this course the students will be able to understand SRAM and DRAM architectures, memory cell design, fault modeling and testing.


Sl. No.


1 Semiconductor Memories Part-I: Introduction to semiconductor

memories and their classification.

(a) Static Random Access Memories (SRAMs): SRAM cell structures, MOS SRAM architecture, MOS SRAM cell and

peripheral circuit operation, bipolar SRAM technologies, silicon on

insulator (SOL) technology, advanced SRAM architectures and

technologies, application specific SRAMs.

(b) Dynamic Random Access Memories (DRAMs):

9

71

Design of Semiconductor Memories

013

VDM 596

0

05025025

3

4

Autumn/Spring

Major Elective

DRAM technology development, CMOS DRAM, DRAMs cell theory

and advanced cell structures, BICMOS DRAMS, soft error failures in

DRAMS, advanced DRAM designs and architecture, application

specific DRAMs.

2 Semiconductor Memories Part-II:

Read Only Memories (ROMs):Masked read-only memories (ROMs), high density ROMs,

programmable read-only memories (PROMs), bipolar PROMs, CMOS

PROMs, erasable (UV) programmable read-only memories

(EPROMs), floating gate EPROM cell, one-time Programmable (OTP)

EPROMs, electrically erasable PROMs (EEPROMs), EEPROM

technology and architecture, nonvolatile SRAM, flash memories

(EPROMs or EEPROM), advanced flash memory architecture.

10

3 Fault Modeling and Testing:RAM fault modeling, electrical testing, pseudo random testing, megabit

DRAM testing, nonvolatile memory modeling and testing, IDDQ fault

modeling and testing, application specific memory testing.

8

4 Reliability Issues and Radiation:General reliability issues- RAM failure modes and mechanism,

nonvolatile memory reliability, reliability modeling and failure rate

prediction, design for reliability, reliability test structures, reliability

screening and qualification. Radiation effects-Single event

phenomenon (SEP), radiation hardening techniques, radiation

hardening process and design issues, radiation hardened memory

characteristics, radiation hardness assurance and testing, radiation

dosimetry, water level radiation testing and test structures.

9

5 Advance Random Access Memories:Ferroelectric random access memories (FRAMs), gallium arsenide

(GaAs) FRAMs, analog memories, Magneto- resistive random access

memories (MRAMs), experimental memory devices. Memory hybrids

and MCMs (2D)-memory stacks and MCMs (3D)-memory MCM testing

and reliability issues, memory cards, high density memory packaging

future directions.

6

Total 42

72


SL.No.


Text Books

1. Ashok K. Sharma, Semiconductor Memory Technology, Testing And Reliability, Prentice-Hall of India Private Limited, New Delhi.

1997

2. Brent Keeth and R. Jacob Baker, DRAM Circuit Design: A tutorial,Wiley- IEEE press.

2000

Reference Books

1. Betty Prince, High performance memories: New architecture DRAMs and SRAMs- Evolution and function, Wiley.

1999


73

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