04222015-104222015-1

2D MATERIALS: PROSPECTS FOR ELECTRONICS

1Luigi Colombo, 2Sanjay K. Banerjee, & 3Alan Seabaugh1Texas Instruments, Dallas, TX, 2UT Austin, Austin, TX, 3Notre Dame University, Notre Dame, IN

US - EU Workshop on 2D Layered Materials and DevicesApril 22-24, 2015

04222015-2

ACKNOWLEDGMENTSUT Dallas:

Robert Wallace; KJ Cho; Moon Kim ; Chris Hinkle; JiyoungKim groups

UT Austin:Emanuel Tutuc ; Sanjay K Banerjee groups

Ulsan Korea(now):Rodney Ruoff

04222015-3

A FEW US PROGRAMS ON NANOELECTRONICS

3

Univ. Nebraska-LincolnUniv. Wisconsin-Madison Univ. OaklandSUNY Buffalo UC-Irvine Univ. Delaware

SUNY-AlbanyPurdue U. Virginia Columbia U NYUCornell GIT Brown

UT-AustinUT-Dallas NCSU Texas A&MUCSD Harvard

MIT Notre Dame (2) Columbia / FloridaMinnesota Cornell / PrincetonUC-Santa Barbara UC-Riverside / GeorgiaUC-Riverside / UC-I / UC-SD / Rochester / SUNY-BuffaloDrexel University / U. Illinois-UC / U. PennsylvaniaVirginia Commonwealth / UC-R / Michigan / U. Virginia U. Pittsburgh / U. Wisconsin-Madison / Northwestern

University of Minnesota

Carnegie MellonColorado StateJohns HopkinsMITOhio StatePenn StatePurdue

U. WisconsinU. AlabamaU. ArizonaUC/BerkeleyUC/RiversideUC/Santa BarbaraUT/AustinU. IowaU. Michigan

U. NebraskaUCLA

CALTECHColumbiaCornellMITNC StatePurdueRiceStanford

UC/BerkeleyUC/IrvineUC/RiversideUC/Santa BarbaraU of PAWVAYale

Notre DameCarnegie MellonGA TechPenn StatePurdueUC/BerkeleyUC/San DiegoUC/Santa Barbara

UT/AustinUT/Dallas

04222015-4

NRI MISSION STATEMENT – 2006 TIMEFRAME• NRI MISSION: Demonstrate novel computing devices capable of

replacing the CMOS FET as a logic switch in the 2020 timeframe. • These devices should show significant advantage over ultimate FETs in

power, performance, density, and/or cost to enable the semiconductor industry to extend the historical cost and performance trends for information technology. – To meet these goals, NRI pursues five research vectors:

• NEW DEVICE: Device with alternative state vector• NEW WAYS TO CONNECT DEVICES: Non-charge data transfer• NEW METHODS FOR COMPUTATION: Non-equilibrium systems • NEW METHODS TO MANAGE HEAT: Nanoscale phonon engineering• NEW METHODS OF FABRICATION: Directed self-assembly devices

– Finally, it is desirable that these technologies be capable of integrating with CMOS, to allow exploitation of their potentially complementary functionality in heterogeneous systems and to enable a smooth transition to a new scaling path.

J. Welser, IBM/SRC

04222015-5

COMPUTATIONAL VARIABLES

• Charge: CMOS, TFET

• Electric Dipole: FeFET

• Magnetic Dipole: NML, SWD, and ASL

• Orbital State: BiSFET

• Strain: PiezoFET

04222015-6

FIRST PRINCIPLES PREDICTIONS OF 2D CRYSTAL BANDALIGNMENTS

preferred band alignments for TFETs

Two transport optionsin‐plane

interlayer

EC

EV

Gong et al. Appl. Phys. Lett. 103, 053513 (2013)

1.3 eV

1 eV

SnSe2

WSe2

Calculated by density functional theory 

04222015-7

LIST OF DEVICES UNDER CONSIDERATION

7D. Nikonov and I Young, JxCDC-0004-Dec-2014

04222015-8

SWITCHING ENERGY VS. DELAY OF A 32-BITADDER

Nikonov and Young, IEEE Expl. Sol. St. Comp. Dev. Circ., Dec 2014.

Benchmarking emerging devices vs. CMOS

04222015-9

ARE TFET THE SOLUTION?

Fiori et al, Nature Nanotech, V9, Oct 2014

Transfer characteristics (IDS versus VGS)

Need a SS

04222015-10

BottomBilayer

TopBilayer

BN

10 µm

Straight edges assumed to be principal crystal axes Layer transfer done while keeping track of orientation

DOUBLE BILAYER ITFET: FABRICATION ANDROTATIONAL ALIGNMENT

Fallahazad B et. al., Nano Letters 15,428-433 (2015)

04222015-11

-0.4 -0.2 0.0 0.2 0.4-3

-2

-1

0

1

2

3

I int (

mA

/cm

2 )

0 V

- 20 V

20 V

- 40 V

I int (

nA)

VTL (V)

VBG = 40 V

-30

-20

-10

0

10

20

30

0 50 100 150 2000.0

0.2

0.4

0.6

0.8

I int (

mA

/cm

2 )

0 V10 V

20 V

30 VI in

t (nA

)

VTL (mV)

VBG = 40 V

0

2

4

6

86 monolayers

thick BNNDR!

5 monolayerthick BN

NDR!

DOUBLE BILAYER ITFET: INTERLAYER I-V CHARACTERISTICS AT RT

Vertical tunneling field-effect transistor using a stacked double bilayer graphene (BLG) and hexagonal boron nitride heterostructure

B. Fallahazad et al, Nano Letters 15, 428 (2105)S. Kang et al. IEEE ELECTRON DEVICE LETTERS, VOL. 36, NO. 4, APRIL 2015

04222015-12

2D-2D TUNNELING IN HETEROJUNCTION TFETS

12

VGate-MoS2 = 3V

-3.5 V -3.3 V -3.0 V

VGate-WSe2 =

0.0 0.3 0.6 0.9 1.20.0

0.5

1.0

1.5

2.0

I D (n

A)

VD (V)-0.5 0.0 0.5 1.0

10-14

10-12

10-10

10-8

10-6

10-4

I D (A

)

VD (V)

VGate-WSe2 = -3 V

VGate-WSe2 = -2.5 V

VGate-WSe2 = -2 V

Forward biasReverse bias

BTBT

Diffusion current

T. Roy, M. Tosun et al., ACS Nano, 2015

Gate controlled band‐to‐band tunneling and NDR!

04222015-13

• "If you cannot measure, your knowledge is meager and unsatisfactory." Lord Kelvin

and …….

• “there cannot be devices without materials”andmining is NOT an option as a source of compounds/ML for the SC industry …..

04222015-14

GRAPHENE SINGLE CRYSTALS:FROM MICRONS TO CENTIMETER

1 m

2013-15Single Crystal Graphene and BLG2005

Monolayer graphite

Novoselov et al., PNAS 2005Hao et al., Science 2013Hao et al , submitted for pub

04222015-15

MOBILITY OF GRAPHENE AND MOS2 ANDPREPARATION METHODS

Fiori et al, Nature Nanotech, V9, Oct 2014

04222015-16

HEXAGONAL BORON NITRIDE

Large single crystal controlled thin films needed

http://arxiv.org/ftp/arxiv/papers/1405/1405.7179.pdfA. Ismach et al., ms in preparationS. Sonde et at., ms in preparation

CVD h-BN/metals

100 m

5 nm

SiO2 h-BN

Ni

h-BNSiO2 /Si

Top

Unit cell = (2.5 ± 0.4) ÅRMS roughness = (0.35 ± 0.10) Å

Bulk h-BN

200 m

h-BN/SiO2

04222015-17

TMDS

http://www.hqgraphene.com/PeriodicTableElements/Mo.phpYongji Gong, Nature Mat., V. 13, 2014R. Yue et al., ACS Nano, V9(1), 474-480 (2015)

Bulk Crystal of MoS2 TMD Heterostructuresby CVD

MoS2 HfSe2

TMD HeterostructuresBy MBE

04222015-18

DIFFERENTIAL CONDUCTANCE AT ROOMTEMPERATURE ON NATURAL MOS2

Electrical properties variations across MoS2 can be correlated with localvariations in stoichiometry as well as metallic and structural defects.

R. Addou et al., ACS Appl. Mater. Interfaces, 2015, 7 (22), pp 11921–11929

04222015-19

2D MATERIALS GROWTH SIMULATIONS• 2H structure (L), 1T structure (R)

• In 2H structure, the second triangle is upside-down, in 1T they are pointing at the same direction.

• Inhomogeneous adsorption energy: -0.65 eV

• Homogeneous adsorption energy: -2.56 eV

• Each bond: 2 eV• Deposition rate: 0.1 ML/s• 1E13 vibrations per second

KT Cho, UT Dallas

04222015-20

1949 1958 .……………………………………………..2014

2015 ????.................................................................................???????????

J. Pelloux-Prayer et al IEDM 2014Fallahazad et al, Nano Letters, 2015

2D M

ater

ials

S

ilico

n

04222015-21

FROM A FEW MM TO 300-450 MM IN DIA

AND MANY KM/MONTH IN TOTAL LENGTH

1949-50G. Teal, IEEE TED,

ED-23 (7) 1976http://www.crystal-material.com/Single-Crystal-Materials/Silicon-Si-single-crystal.html

Today

Ge Si

http://pcplus.techradar.com/2009/05/21/how-silicon-chips-are-made/

04222015-22

SUMMARY• New devices will need rotationally aligned layers and will drive the need

(similar to lattice matching for cubic system):– To grow single crystals– Selective single crystal growth … heteroepitaxy

• Defect control (“bulk” and surface) – Chalcogenide materials are especially sensitive to the creation/formation of

point defects (vacancies) – bulk and surface

• Need to determine fundamental properties of materials and a deeper understanding of the materials growth processes– Metrology– Standards

• How about scaled 2D-materials-based devices … submicron???