universal measurement system with web interface maciej lipiński ph.d. krzysztof poźniak, msc...
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Universal Measurement Universal Measurement System with Web InterfaceSystem with Web Interface
Maciej LipińskiMaciej LipińskiPh.D. Krzysztof Poźniak, MSc GrzegorzPh.D. Krzysztof Poźniak, MSc Grzegorz Kasprowicz Kasprowicz
Wilga 30.05.2008 r.
Presentation planPresentation plan
Outline of the project hardwareOutline of the project hardware Goal and applications of the systemGoal and applications of the system Characteristic Characteristic of of developed partsdeveloped parts Overview and details of system Overview and details of system
interfacesinterfaces Future workFuture work
Outline of the projectOutline of the project
Main module (100x80mm ):Main module (100x80mm ):• Switched-mode Power SupplySwitched-mode Power Supply• Graphic controller Graphic controller • Sound controllerSound controller• I2C interfaceI2C interface• Peripherals: USB, RS232, Ethernet ports, output for Peripherals: USB, RS232, Ethernet ports, output for
built-in LCD-TFT and for VGA monitorbuilt-in LCD-TFT and for VGA monitor Single Board Computer module (50x70mm):Single Board Computer module (50x70mm):
• Microprocessor: ARM9 (AT91RM9200)Microprocessor: ARM9 (AT91RM9200)• 128128MBMB SDRAM SDRAM• Ethernet interface 10/100 MbitEthernet interface 10/100 Mbit• FLASH 8MBFLASH 8MB• SD/MMC reader, SD/MMC reader, • Interfaces: 2 x Serial ports, 2x USB hub and deviceInterfaces: 2 x Serial ports, 2x USB hub and device
Acquisition module:Acquisition module:• ALTERA Cyclone IALTERA Cyclone I• 2 x fast, 105MS/s. 14 bit ADCs2 x fast, 105MS/s. 14 bit ADCs• SSRAM – 128k x 32SSRAM – 128k x 32
Hardware provided by Grzegorz Kasprowicz, consists of 3 Hardware provided by Grzegorz Kasprowicz, consists of 3 modules:modules:
Utilization of the hardware to create an autonomous, Utilization of the hardware to create an autonomous, universal measurement system with Ethernet interface universal measurement system with Ethernet interface
and operating system on board, in order to enable on-fly and operating system on board, in order to enable on-fly reconfiguration accordingly to the user’s needs. Creation reconfiguration accordingly to the user’s needs. Creation
of TCP/IP and web-based control interface.of TCP/IP and web-based control interface.
Acquisition in dangerous places (i.e. high energy
physics)
Acquisition in places which are difficult to
access
Reconfigurable measurement
system
Digital oscilloscope
The goal of the projectThe goal of the project
Measurement system block diagram Measurement system block diagram and data flowand data flow
Signal Source
FPGA
ADC
SSRAM
Acquisition module
Single Board Computer
Main Module
LCD
External monitor
User interface
Measurement interface ARM
Universal Internet Measurement System for High Energy Physics
Ethernet
Graphic
Characteristics:Characteristics: LinuxLinux customized forcustomized for AT91RM9200AT91RM9200 : :
• Kernel: linux-2.6.22.10Kernel: linux-2.6.22.10• Busybox: version 1.7.2Busybox: version 1.7.2• uClibc library: version 0.9.29uClibc library: version 0.9.29
FPGA configuration FPGA configuration • Done via SPI Done via SPI
Acquisition logic features:Acquisition logic features:• Autotrigger and external triggerAutotrigger and external trigger• Trigger slope choiceTrigger slope choice• Sampling timeSampling time• Trigger delayTrigger delay• Record lenghtRecord lenght• Interrupt end of acquisition notificationInterrupt end of acquisition notification
Overview of interfacesOverview of interfacesUser’s space application for acquisition control
map
/dev/mem Linux File System
Linux User Space
open write
Data stored in files
Linux User Space Kernel Interface
Functions
AT91RM9200
NS
C0
External Bus Interface (EBI)
Static Memory Controller (SMC)
map
/dev/mem
Configuration registers
Mapped external memory
Paraller Input/Output Controller (PIO)
NO
E
NW
R0
NW
R1
A[15:0]
NW
AIT
D[15:0]
Read/write controller and
address decoder
Output parameter registers
Input parameter registers
Control register
Status register Readout register
ALTERACYCLONE I
User’s space application for loading the FPGA configuration
SPI
open write map
/dev/spi /dev/mem
PIO A
spi_transfer Linux Kernel Space
At91_spidev
open read
Binary file with FPGA configuration
MO
SI
SP
CK
DC
LK
DA
TA
nCO
NF
IG
CO
NF
_DO
NE
PB
1
PB
2
ADC
SSRAM
ADSC
OE
BWE
BW1
BW2
CE
CLK
Address[18:0]
ADC
AD
C1[13:0]
AD
C2[13:0]
ADC_SEL
FPGA configurationFPGA configuration design design
Linux File System
Linux User Space
Linux User Space Kernel Interface
Functions
AT91RM9200
ALTERACYCLONE I
User’s space application for loading the FPGA configuration
SPI
open write map
/dev/spi /dev/mem
PIO A
spi_transfer Linux Kernel Space
At91_spidev
open read
Binary file with FPGA configuration
MO
SI
SP
CK
DC
LK
DA
TA
nCO
NF
IG
CO
NF
_DO
NE
PB
1
PB
2
User’s space application for acquisition control
map
/dev/mem Linux File System
Linux User Space
open write
Data stored in files
Linux User Space Kernel Interface
Functions
AT91RM9200
NS
C0
External Bus Interface (EBI)
Static Memory Controller (SMC)
map
/dev/mem
Configuration registers
Mapped external memory
Paraller Input/Output Controller (PIO)N
OE
NW
R0
NW
R1
A[15:0]
NW
AIT
D[15:0]
Read/write controller and
address decoder
Output parameter registers
Input parameter registers
Control register
Status register
Readout register
ALTERA CYCLONE I
Acquired data readoutAcquired data readout
Acquisition data storageAcquisition data storage
Read/write controller and
address decoder
Output parameter registers
Input parameter registers
Control register
Status register Readout register
ADC
SSRAM
ADSC
OE
BWE
BW1
BW2
CE
CLK
Address[18:0]
ADC
AD
C1
[13
:0]
AD
C2
[13
:0]
ADC_SEL
ALTERA CYCLONE I
Work to be done:Work to be done: ResearchResearch
• Peripheral driversPeripheral drivers• Signal processing algorithmsSignal processing algorithms• ProtocolsProtocols• Visualization techniquesVisualization techniques• Interface managementInterface management
Operating System preparation Operating System preparation • Bootable from SD/USBBootable from SD/USB• DevelopmentDevelopment of of drivers drivers • Appropriate components (ex. necessary server)Appropriate components (ex. necessary server)• RReasonable sizeeasonable size
FPGA (HDL, glue logic)FPGA (HDL, glue logic)• Signal processing algorithms implementationSignal processing algorithms implementation
SoftwareSoftware• Programs (or drivers) development :Programs (or drivers) development :
Data processingData processing Data visualizationData visualization
• Implementation of one of the standard measurement protocolsImplementation of one of the standard measurement protocols• Create user interface:Create user interface:
General configuration and reconfigurationGeneral configuration and reconfiguration Remote application controlRemote application control Remote measurementRemote measurement Direct control (LCD, mouse, Keyboard)Direct control (LCD, mouse, Keyboard)
TestsTests• The system will be tested as a double channel digital oscilloscope and The system will be tested as a double channel digital oscilloscope and
spectrum analyzerspectrum analyzer
The EndThe End